1 //*----------------------------------------------------------------------------
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2 //* ATMEL Microcontroller Software Support - ROUSSET -
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3 //*----------------------------------------------------------------------------
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4 //* The software is delivered "AS IS" without warranty or condition of any
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5 //* kind, either express, implied or statutory. This includes without
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6 //* limitation any warranty or condition with respect to merchantability or
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7 //* fitness for any particular purpose, or against the infringements of
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8 //* intellectual property rights of others.
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9 //*----------------------------------------------------------------------------
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10 //* File Name : aic.h
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11 //* Object : Advanced Interrupt Controller Definition File.
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13 //* 1.0 01/04/00 JCZ : Creation
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14 //*----------------------------------------------------------------------------
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19 //#include "periph/stdc/std_c.h"
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21 /*-----------------------------------------*/
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22 /* AIC User Interface Structure Definition */
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23 /*-----------------------------------------*/
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27 at91_reg AIC_SMR[32] ; /* Source Mode Register */
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28 at91_reg AIC_SVR[32] ; /* Source Vector Register */
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29 at91_reg AIC_IVR ; /* IRQ Vector Register */
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30 at91_reg AIC_FVR ; /* FIQ Vector Register */
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31 at91_reg AIC_ISR ; /* Interrupt Status Register */
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32 at91_reg AIC_IPR ; /* Interrupt Pending Register */
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33 at91_reg AIC_IMR ; /* Interrupt Mask Register */
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34 at91_reg AIC_CISR ; /* Core Interrupt Status Register */
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35 at91_reg reserved0 ;
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36 at91_reg reserved1 ;
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37 at91_reg AIC_IECR ; /* Interrupt Enable Command Register */
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38 at91_reg AIC_IDCR ; /* Interrupt Disable Command Register */
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39 at91_reg AIC_ICCR ; /* Interrupt Clear Command Register */
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40 at91_reg AIC_ISCR ; /* Interrupt Set Command Register */
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41 at91_reg AIC_EOICR ; /* End of Interrupt Command Register */
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42 at91_reg AIC_SPU ; /* Spurious Vector Register */
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45 /*--------------------------------------------*/
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46 /* AIC_SMR[]: Interrupt Source Mode Registers */
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47 /*--------------------------------------------*/
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49 #define AIC_PRIOR 0x07 /* Priority */
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51 #define AIC_SRCTYPE 0x60 /* Source Type Definition */
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53 /* Internal Interrupts */
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54 #define AIC_SRCTYPE_INT_LEVEL_SENSITIVE 0x00 /* Level Sensitive */
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55 #define AIC_SRCTYPE_INT_EDGE_TRIGGERED 0x20 /* Edge Triggered */
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57 /* External Interrupts */
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58 #define AIC_SRCTYPE_EXT_LOW_LEVEL 0x00 /* Low Level */
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59 #define AIC_SRCTYPE_EXT_NEGATIVE_EDGE 0x20 /* Negative Edge */
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60 #define AIC_SRCTYPE_EXT_HIGH_LEVEL 0x40 /* High Level */
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61 #define AIC_SRCTYPE_EXT_POSITIVE_EDGE 0x60 /* Positive Edge */
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63 /*------------------------------------*/
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64 /* AIC_ISR: Interrupt Status Register */
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65 /*------------------------------------*/
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67 #define AIC_IRQID 0x1F /* Current source interrupt */
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69 /*------------------------------------------*/
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70 /* AIC_CISR: Interrupt Core Status Register */
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71 /*------------------------------------------*/
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73 #define AIC_NFIQ 0x01 /* Core FIQ Status */
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74 #define AIC_NIRQ 0x02 /* Core IRQ Status */
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76 /*-------------------------------*/
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77 /* Advanced Interrupt Controller */
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78 /*-------------------------------*/
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79 #define AIC_BASE ((StructAIC *)0xFFFFF000)
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