2 FreeRTOS.org V5.0.2 - Copyright (C) 2003-2008 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS.org is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS.org; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS.org, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 ***************************************************************************
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29 * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
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30 * and even write all or part of your application on your behalf. *
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31 * See http://www.OpenRTOS.com for details of the services we provide to *
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32 * expedite your project. *
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34 ***************************************************************************
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35 ***************************************************************************
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37 Please ensure to read the configuration and relevant port sections of the
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38 online documentation.
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40 http://www.FreeRTOS.org - Documentation, latest information, license and
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43 http://www.SafeRTOS.com - A version that is certified for use in safety
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46 http://www.OpenRTOS.com - Commercial support, development, porting,
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47 licensing and training services.
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50 /* Scheduler includes. */
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51 #include "FreeRTOS.h"
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55 /* Demo app includes. */
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56 #include "USBSample.h"
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58 #define usbINT_CLEAR_MASK (AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 )
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60 #define usbCSR_CLEAR_BIT( pulValueNow, ulBit ) \
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62 /* Set TXCOMP, RX_DATA_BK0, RXSETUP, */ \
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63 /* STALLSENT and RX_DATA_BK1 to 1 so the */ \
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64 /* write has no effect. */ \
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65 ( * ( ( unsigned portLONG * ) pulValueNow ) ) |= ( unsigned portLONG ) 0x4f; \
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67 /* Clear the FORCE_STALL and TXPKTRDY bits */ \
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68 /* so the write has no effect. */ \
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69 ( * ( ( unsigned portLONG * ) pulValueNow ) ) &= ( unsigned portLONG ) 0xffffffcf; \
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71 /* Clear whichever bit we want clear. */ \
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72 ( * ( ( unsigned portLONG * ) pulValueNow ) ) &= ( ~ulBit ); \
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76 /*-----------------------------------------------------------*/
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82 void vUSB_ISR_Wrapper( void ) __attribute__((naked));
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85 * Actual ISR handler. This must be separate from the entry point as the stack
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88 void vUSB_ISR_Handler( void );
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90 /*-----------------------------------------------------------*/
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92 /* Array in which the USB interrupt status is passed between the ISR and task. */
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93 static xISRStatus xISRMessages[ usbQUEUE_LENGTH + 1 ];
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95 /* Queue used to pass messages between the ISR and the task. */
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96 extern xQueueHandle xUSBInterruptQueue;
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98 /*-----------------------------------------------------------*/
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100 void vUSB_ISR_Handler( void )
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102 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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103 static volatile unsigned portLONG ulNextMessage = 0;
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104 xISRStatus *pxMessage;
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105 unsigned portLONG ulTemp, ulRxBytes;
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107 /* To reduce the amount of time spent in this interrupt it would be
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108 possible to defer the majority of this processing to an 'interrupt task',
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109 that is a task that runs at a higher priority than any of the application
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112 /* Take the next message from the queue. Note that usbQUEUE_LENGTH *must*
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113 be all 1's, as in 0x01, 0x03, 0x07, etc. */
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114 pxMessage = &( xISRMessages[ ( ulNextMessage & usbQUEUE_LENGTH ) ] );
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117 /* Take a snapshot of the current USB state for processing at the task
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119 pxMessage->ulISR = AT91C_BASE_UDP->UDP_ISR;
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120 pxMessage->ulCSR0 = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];
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122 /* Clear the interrupts from the ICR register. The bus end interrupt is
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123 cleared separately as it does not appear in the mask register. */
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124 AT91C_BASE_UDP->UDP_ICR = AT91C_BASE_UDP->UDP_IMR | AT91C_UDP_ENDBUSRES;
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126 /* If there are bytes in the FIFO then we have to retrieve them here.
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127 Ideally this would be done at the task level. However we need to clear the
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128 RXSETUP interrupt before leaving the ISR, and this may cause the data in
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129 the FIFO to be overwritten. Also the DIR bit has to be changed before the
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130 RXSETUP bit is cleared (as per the SAM7 manual). */
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131 ulTemp = pxMessage->ulCSR0;
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133 /* Are there any bytes in the FIFO? */
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134 ulRxBytes = ulTemp >> 16;
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135 ulRxBytes &= usbRX_COUNT_MASK;
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137 /* With this minimal implementation we are only interested in receiving
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138 setup bytes on the control end point. */
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139 if( ( ulRxBytes > 0 ) && ( ulTemp & AT91C_UDP_RXSETUP ) )
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141 /* Take off 1 for a zero based index. */
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142 while( ulRxBytes > 0 )
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145 pxMessage->ucFifoData[ ulRxBytes ] = AT91C_BASE_UDP->UDP_FDR[ usbEND_POINT_0 ];
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148 /* The direction must be changed first. */
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149 usbCSR_SET_BIT( &ulTemp, ( AT91C_UDP_DIR ) );
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150 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulTemp;
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153 /* Must write zero's to TXCOMP, STALLSENT, RXSETUP, and the RX DATA
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154 registers to clear the interrupts in the CSR register. */
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155 usbCSR_CLEAR_BIT( &ulTemp, usbINT_CLEAR_MASK );
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156 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulTemp;
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158 /* Also clear the interrupts in the CSR1 register. */
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159 ulTemp = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ];
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160 usbCSR_CLEAR_BIT( &ulTemp, usbINT_CLEAR_MASK );
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161 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] = ulTemp;
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163 /* The message now contains the entire state and optional data from
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164 the USB interrupt. This can now be posted on the Rx queue ready for
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165 processing at the task level. */
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166 xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
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168 /* We may want to switch to the USB task, if this message has made
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169 it the highest priority task that is ready to execute. */
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170 if( xHigherPriorityTaskWoken )
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172 portYIELD_FROM_ISR();
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175 /* Clear the AIC ready for the next interrupt. */
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176 AT91C_BASE_AIC->AIC_EOICR = 0;
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178 /*-----------------------------------------------------------*/
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180 void vUSB_ISR_Wrapper( void )
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182 /* Save the context of the interrupted task. */
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183 portSAVE_CONTEXT();
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185 /* Call the handler itself. This must be a separate function as it uses
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187 vUSB_ISR_Handler();
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189 /* Restore the context of the task that is going to
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190 execute next. This might not be the same as the originally
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191 interrupted task.*/
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192 portRESTORE_CONTEXT();
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