1 /* Sample initialization file */
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14 .extern __stack_end__
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15 .extern __data_beg__
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16 .extern __data_end__
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17 .extern __data+beg_src__
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20 .global endless_loop
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23 .set UND_STACK_SIZE, 0x00000004
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24 .set ABT_STACK_SIZE, 0x00000004
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25 .set FIQ_STACK_SIZE, 0x00000004
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26 .set IRQ_STACK_SIZE, 0X00000400
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27 .set SVC_STACK_SIZE, 0x00000400
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29 /* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
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30 .set MODE_USR, 0x10 /* User Mode */
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31 .set MODE_FIQ, 0x11 /* FIQ Mode */
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32 .set MODE_IRQ, 0x12 /* IRQ Mode */
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33 .set MODE_SVC, 0x13 /* Supervisor Mode */
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34 .set MODE_ABT, 0x17 /* Abort Mode */
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35 .set MODE_UND, 0x1B /* Undefined Mode */
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36 .set MODE_SYS, 0x1F /* System Mode */
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38 .equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
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39 .equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */
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46 /* Setup a stack for each mode - note that this only sets up a usable stack
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47 for system/user, SWI and IRQ modes. Also each mode is setup with
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48 interrupts initially disabled. */
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50 msr CPSR_c, #MODE_UND|I_BIT|F_BIT /* Undefined Instruction Mode
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52 sub r0, r0, #UND_STACK_SIZE
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53 msr CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Abort Mode */
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55 sub r0, r0, #ABT_STACK_SIZE
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56 msr CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* FIQ Mode */
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58 sub r0, r0, #FIQ_STACK_SIZE
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59 msr CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */
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61 sub r0, r0, #IRQ_STACK_SIZE
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62 msr CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Supervisor Mode */
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64 sub r0, r0, #SVC_STACK_SIZE
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65 msr CPSR_c, #MODE_SYS|I_BIT|F_BIT /* System Mode */
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68 /* We want to start in supervisor mode. Operation will switch to system
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69 mode when the first task starts. */
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70 msr CPSR_c, #MODE_SVC|I_BIT|F_BIT
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74 mov a2, #0 /* Fill value */
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75 mov fp, a2 /* Null frame pointer */
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76 mov r7, a2 /* Null frame pointer for Thumb */
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78 ldr r1, .LC1 /* Start of memory block */
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79 ldr r3, .LC2 /* End of memory block */
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80 subs r3, r3, r1 /* Length of block */
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91 /* Initialise data. */
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93 ldr r1, .LC3 /* Start of memory block */
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94 ldr r2, .LC4 /* End of memory block */
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96 subs r3, r3, r1 /* Length of block */
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107 mov r0, #0 /* no arguments */
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108 mov r1, #0 /* no argv either */
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125 .word __data_beg_src__
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129 .word __stack_end__
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132 /* Setup vector table. Note that undf, pabt, dabt, fiq just execute
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135 .section .startup,"ax"
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139 b _start /* reset - _start */
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140 ldr pc, _undf /* undefined - _undf */
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141 ldr pc, _swi /* SWI - _swi */
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142 ldr pc, _pabt /* program abort - _pabt */
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143 ldr pc, _dabt /* data abort - _dabt */
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145 ldr pc, [pc,#-0xFF0] /* IRQ - read the VIC */
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146 ldr pc, _fiq /* FIQ - _fiq */
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148 _undf: .word __undf /* undefined */
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149 _swi: .word vPortYieldProcessor /* SWI */
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150 _pabt: .word __pabt /* program abort */
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151 _dabt: .word __dabt /* data abort */
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152 _fiq: .word __fiq /* FIQ */
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154 __undf: b . /* undefined */
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155 __pabt: b . /* program abort */
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156 __dabt: b . /* data abort */
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157 __fiq: b . /* FIQ */
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