git.sur5r.net Git - freertos/blob - Demo/ARM7_LPC2129_IAR/serial/serial.c

   1 /*\r
   2         FreeRTOS.org V4.8.0 - Copyright (C) 2003-2008 Richard Barry.\r
   3 \r
   4         This file is part of the FreeRTOS.org distribution.\r
   5 \r
   6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
   7         it under the terms of the GNU General Public License as published by\r
   8         the Free Software Foundation; either version 2 of the License, or\r
   9         (at your option) any later version.\r
  10 \r
  11         FreeRTOS.org is distributed in the hope that it will be useful,\r
  12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  14         GNU General Public License for more details.\r
  15 \r
  16         You should have received a copy of the GNU General Public License\r
  17         along with FreeRTOS.org; if not, write to the Free Software\r
  18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
  19 \r
  20         A special exception to the GPL can be applied should you wish to distribute\r
  21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
  22         the source code for any proprietary components.  See the licensing section\r
  23         of http://www.FreeRTOS.org for full details of how and when the exception\r
  24         can be applied.\r
  25 \r
  26         ***************************************************************************\r
  27         ***************************************************************************\r
  28         *                                                                                                                                                 *\r
  29         * SAVE TIME AND MONEY!  Why not get us to quote to get FreeRTOS.org               *\r
  30         * running on your hardware - or even write all or part of your application*\r
  31         * for you?  See http://www.OpenRTOS.com for details.                                      *\r
  32         *                                                                                                                                                 *\r
  33         ***************************************************************************\r
  34         ***************************************************************************\r
  35 \r
  36         Please ensure to read the configuration and relevant port sections of the\r
  37         online documentation.\r
  38 \r
  39         http://www.FreeRTOS.org - Documentation, latest information, license and \r
  40         contact details.\r
  41 \r
  42         http://www.SafeRTOS.com - A version that is certified for use in safety \r
  43         critical systems.\r
  44 \r
  45         http://www.OpenRTOS.com - Commercial support, development, porting, \r
  46         licensing and training services.\r
  47 */\r
  48 \r
  49 \r
  50 /*\r
  51         BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.\r
  52 */\r
  53 \r
  54 /* Standard includes. */\r
  55 #include <stdlib.h>\r
  56 \r
  57 /* Scheduler includes. */\r
  58 #include "FreeRTOS.h"\r
  59 #include "queue.h"\r
  60 #include "task.h"\r
  61 \r
  62 /* Demo application includes. */\r
  63 #include "serial.h"\r
  64 \r
  65 /*-----------------------------------------------------------*/\r
  66 \r
  67 /* Constants to setup and access the UART. */\r
  68 #define serDLAB                                                 ( ( unsigned portCHAR ) 0x80 )\r
  69 #define serENABLE_INTERRUPTS                    ( ( unsigned portCHAR ) 0x03 )\r
  70 #define serNO_PARITY                                    ( ( unsigned portCHAR ) 0x00 )\r
  71 #define ser1_STOP_BIT                                   ( ( unsigned portCHAR ) 0x00 )\r
  72 #define ser8_BIT_CHARS                                  ( ( unsigned portCHAR ) 0x03 )\r
  73 #define serFIFO_ON                                              ( ( unsigned portCHAR ) 0x01 )\r
  74 #define serCLEAR_FIFO                                   ( ( unsigned portCHAR ) 0x06 )\r
  75 #define serWANTED_CLOCK_SCALING                 ( ( unsigned portLONG ) 16 )\r
  76 \r
  77 /* Constants to setup and access the VIC. */\r
  78 #define serU0VIC_CHANNEL                                ( ( unsigned portLONG ) 0x0006 )\r
  79 #define serU0VIC_CHANNEL_BIT                    ( ( unsigned portLONG ) 0x0040 )\r
  80 #define serU0VIC_ENABLE                                 ( ( unsigned portLONG ) 0x0020 )\r
  81 #define serCLEAR_VIC_INTERRUPT                  ( ( unsigned portLONG ) 0 )\r
  82 \r
  83 /* Constants to determine the ISR source. */\r
  84 #define serSOURCE_THRE                                  ( ( unsigned portCHAR ) 0x02 )\r
  85 #define serSOURCE_RX_TIMEOUT                    ( ( unsigned portCHAR ) 0x0c )\r
  86 #define serSOURCE_ERROR                                 ( ( unsigned portCHAR ) 0x06 )\r
  87 #define serSOURCE_RX                                    ( ( unsigned portCHAR ) 0x04 )\r
  88 #define serINTERRUPT_SOURCE_MASK                ( ( unsigned portCHAR ) 0x0f )\r
  89 \r
  90 /* Misc. */\r
  91 #define serINVALID_QUEUE                                ( ( xQueueHandle ) 0 )\r
  92 #define serHANDLE                                               ( ( xComPortHandle ) 1 )\r
  93 #define serNO_BLOCK                                             ( ( portTickType ) 0 )\r
  94 \r
  95 /*-----------------------------------------------------------*/\r
  96 \r
  97 /* Queues used to hold received characters, and characters waiting to be\r
  98 transmitted. */\r
  99 static xQueueHandle xRxedChars;\r
 100 static xQueueHandle xCharsForTx;\r
 101 static volatile portLONG lTHREEmpty = pdFALSE;\r
 102 \r
 103 /*-----------------------------------------------------------*/\r
 104 \r
 105 /* The ISR.  Note that this is called by a wrapper written in the file\r
 106 SerialISR.s79.  See the WEB documentation for this port for further\r
 107 information. */\r
 108 __arm void vSerialISR( void );\r
 109 \r
 110 /*-----------------------------------------------------------*/\r
 111 \r
 112 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
 113 {\r
 114 unsigned portLONG ulDivisor, ulWantedClock;\r
 115 xComPortHandle xReturn = serHANDLE;\r
 116 extern void ( vSerialISREntry) ( void );\r
 117 \r
 118         /* Create the queues used to hold Rx and Tx characters. */\r
 119         xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
 120         xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
 121 \r
 122         /* Initialise the THRE empty flag. */\r
 123         lTHREEmpty = pdTRUE;\r
 124 \r
 125         if(\r
 126                 ( xRxedChars != serINVALID_QUEUE ) &&\r
 127                 ( xCharsForTx != serINVALID_QUEUE ) &&\r
 128                 ( ulWantedBaud != ( unsigned portLONG ) 0 )\r
 129           )\r
 130         {\r
 131                 portENTER_CRITICAL();\r
 132                 {\r
 133                         /* Setup the baud rate:  Calculate the divisor value. */\r
 134                         ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;\r
 135                         ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;\r
 136 \r
 137                         /* Set the DLAB bit so we can access the divisor. */\r
 138                         U0LCR |= serDLAB;\r
 139 \r
 140                         /* Setup the divisor. */\r
 141                         U0DLL = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );\r
 142                         ulDivisor >>= 8;\r
 143                         U0DLM = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );\r
 144 \r
 145                         /* Turn on the FIFO's and clear the buffers. */\r
 146                         U0FCR = ( serFIFO_ON | serCLEAR_FIFO );\r
 147 \r
 148                         /* Setup transmission format. */\r
 149                         U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;\r
 150 \r
 151                         /* Setup the VIC for the UART. */\r
 152                         VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );\r
 153                         VICIntEnable |= serU0VIC_CHANNEL_BIT;\r
 154                         VICVectAddr1 = ( unsigned portLONG ) vSerialISREntry;\r
 155                         VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;\r
 156 \r
 157                         /* Enable UART0 interrupts. */\r
 158                         U0IER |= serENABLE_INTERRUPTS;\r
 159                 }\r
 160                 portEXIT_CRITICAL();\r
 161 \r
 162                 xReturn = ( xComPortHandle ) 1;\r
 163         }\r
 164         else\r
 165         {\r
 166                 xReturn = ( xComPortHandle ) 0;\r
 167         }\r
 168 \r
 169         return xReturn;\r
 170 }\r
 171 /*-----------------------------------------------------------*/\r
 172 \r
 173 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )\r
 174 {\r
 175         /* The port handle is not required as this driver only supports UART0. */\r
 176         ( void ) pxPort;\r
 177 \r
 178         /* Get the next character from the buffer.  Return false if no characters\r
 179         are available, or arrive before xBlockTime expires. */\r
 180         if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )\r
 181         {\r
 182                 return pdTRUE;\r
 183         }\r
 184         else\r
 185         {\r
 186                 return pdFALSE;\r
 187         }\r
 188 }\r
 189 /*-----------------------------------------------------------*/\r
 190 \r
 191 void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )\r
 192 {\r
 193 signed portCHAR *pxNext;\r
 194 \r
 195         /* NOTE: This implementation does not handle the queue being full as no\r
 196         block time is used! */\r
 197 \r
 198         /* The port handle is not required as this driver only supports UART0. */\r
 199         ( void ) pxPort;\r
 200         ( void ) usStringLength;\r
 201 \r
 202         /* Send each character in the string, one at a time. */\r
 203         pxNext = ( signed portCHAR * ) pcString;\r
 204         while( *pxNext )\r
 205         {\r
 206                 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );\r
 207                 pxNext++;\r
 208         }\r
 209 }\r
 210 /*-----------------------------------------------------------*/\r
 211 \r
 212 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )\r
 213 {\r
 214 signed portBASE_TYPE xReturn;\r
 215 \r
 216         /* The port handle is not required as this driver only supports UART0. */\r
 217         ( void ) pxPort;\r
 218 \r
 219         portENTER_CRITICAL();\r
 220         {\r
 221                 /* Is there space to write directly to the UART? */\r
 222                 if( lTHREEmpty == ( portLONG ) pdTRUE )\r
 223                 {\r
 224                         /* We wrote the character directly to the UART, so was\r
 225                         successful. */\r
 226                         lTHREEmpty = pdFALSE;\r
 227                         U0THR = cOutChar;\r
 228                         xReturn = pdPASS;\r
 229                 }\r
 230                 else\r
 231                 {\r
 232                         /* We cannot write directly to the UART, so queue the character.\r
 233                         Block for a maximum of xBlockTime if there is no space in the\r
 234                         queue.  It is ok to block within a critical section as each\r
 235                         task has it's own critical section management. */\r
 236                         xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );\r
 237 \r
 238                         /* Depending on queue sizing and task prioritisation:  While we\r
 239                         were blocked waiting to post interrupts were not disabled.  It is\r
 240                         possible that the serial ISR has emptied the Tx queue, in which\r
 241                         case we need to start the Tx off again. */\r
 242                         if( lTHREEmpty == ( portLONG ) pdTRUE )\r
 243                         {\r
 244                                 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );\r
 245                                 lTHREEmpty = pdFALSE;\r
 246                                 U0THR = cOutChar;\r
 247                         }\r
 248                 }\r
 249         }\r
 250         portEXIT_CRITICAL();\r
 251 \r
 252         return xReturn;\r
 253 }\r
 254 /*-----------------------------------------------------------*/\r
 255 \r
 256 __arm void vSerialISR( void )\r
 257 {\r
 258 signed portCHAR cChar;\r
 259 portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;\r
 260 \r
 261         /* What caused the interrupt? */\r
 262         switch( U0IIR & serINTERRUPT_SOURCE_MASK )\r
 263         {\r
 264                 case serSOURCE_ERROR :  /* Not handling this, but clear the interrupt. */\r
 265                                                                 cChar = U0LSR;\r
 266                                                                 break;\r
 267 \r
 268                 case serSOURCE_THRE     :       /* The THRE is empty.  If there is another\r
 269                                                                 character in the Tx queue, send it now. */\r
 270                                                                 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )\r
 271                                                                 {\r
 272                                                                         U0THR = cChar;\r
 273                                                                 }\r
 274                                                                 else\r
 275                                                                 {\r
 276                                                                         /* There are no further characters\r
 277                                                                         queued to send so we can indicate\r
 278                                                                         that the THRE is available. */\r
 279                                                                         lTHREEmpty = pdTRUE;\r
 280                                                                 }\r
 281                                                                 break;\r
 282 \r
 283                 case serSOURCE_RX_TIMEOUT :\r
 284                 case serSOURCE_RX       :       /* A character was received.  Place it in\r
 285                                                                 the queue of received characters. */\r
 286                                                                 cChar = U0RBR;\r
 287                                                                 if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )\r
 288                                                                 {\r
 289                                                                         xTaskWokenByRx = pdTRUE;\r
 290                                                                 }\r
 291                                                                 break;\r
 292 \r
 293                 default                         :       /* There is nothing to do, leave the ISR. */\r
 294                                                                 break;\r
 295         }\r
 296 \r
 297         /* Exit the ISR.  If a task was woken by either a character being received\r
 298         or transmitted then a context switch will occur. */\r
 299         portEND_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );\r
 300 \r
 301         /* Clear the ISR in the VIC. */\r
 302         VICVectAddr = serCLEAR_VIC_INTERRUPT;\r
 303 }\r
 304 /*-----------------------------------------------------------*/\r