2 FreeRTOS.org V4.7.0 - Copyright (C) 2003-2007 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS.org is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS.org; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS.org, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 See http://www.FreeRTOS.org for documentation, latest information, license
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28 and contact details. Please ensure to read the configuration and relevant
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29 port sections of the online documentation.
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31 Also see http://www.SafeRTOS.com a version that has been certified for use
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32 in safety critical systems, plus commercial licensing, development and
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34 ***************************************************************************
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39 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
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41 This file contains all the serial port components that can be compiled to
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42 either ARM or THUMB mode. Components that must be compiled to ARM mode are
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43 contained in serialISR.c.
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46 /* Standard includes. */
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49 /* Scheduler includes. */
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50 #include "FreeRTOS.h"
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54 /* Demo application includes. */
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57 /*-----------------------------------------------------------*/
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59 /* Constants to setup and access the UART. */
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60 #define serDLAB ( ( unsigned portCHAR ) 0x80 )
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61 #define serENABLE_INTERRUPTS ( ( unsigned portCHAR ) 0x03 )
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62 #define serNO_PARITY ( ( unsigned portCHAR ) 0x00 )
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63 #define ser1_STOP_BIT ( ( unsigned portCHAR ) 0x00 )
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64 #define ser8_BIT_CHARS ( ( unsigned portCHAR ) 0x03 )
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65 #define serFIFO_ON ( ( unsigned portCHAR ) 0x01 )
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66 #define serCLEAR_FIFO ( ( unsigned portCHAR ) 0x06 )
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67 #define serWANTED_CLOCK_SCALING ( ( unsigned portLONG ) 16 )
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69 /* Constants to setup and access the VIC. */
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70 #define serU0VIC_CHANNEL ( ( unsigned portLONG ) 0x0006 )
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71 #define serU0VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0040 )
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72 #define serU0VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
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75 #define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
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76 #define serHANDLE ( ( xComPortHandle ) 1 )
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77 #define serNO_BLOCK ( ( portTickType ) 0 )
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79 /*-----------------------------------------------------------*/
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81 /* Queues used to hold received characters, and characters waiting to be
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83 static xQueueHandle xRxedChars;
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84 static xQueueHandle xCharsForTx;
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86 /*-----------------------------------------------------------*/
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88 /* Communication flag between the interrupt service routine and serial API. */
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89 static volatile portLONG *plTHREEmpty;
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92 * The queues are created in serialISR.c as they are used from the ISR.
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93 * Obtain references to the queues and THRE Empty flag.
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95 extern void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx, portLONG volatile **pplTHREEmptyFlag );
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97 /*-----------------------------------------------------------*/
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99 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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101 unsigned portLONG ulDivisor, ulWantedClock;
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102 xComPortHandle xReturn = serHANDLE;
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104 /* The queues are used in the serial ISR routine, so are created from
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105 serialISR.c (which is always compiled to ARM mode). */
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106 vSerialISRCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx, &plTHREEmpty );
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109 ( xRxedChars != serINVALID_QUEUE ) &&
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110 ( xCharsForTx != serINVALID_QUEUE ) &&
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111 ( ulWantedBaud != ( unsigned portLONG ) 0 )
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114 portENTER_CRITICAL();
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116 /* The reference to the ISR function is required to load into the
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117 interrupt controller. The prototype is slightly different
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118 depending on whether in ARM or THUMB mode. */
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119 #ifdef KEIL_THUMB_INTERWORK
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120 extern void ( vUART_ISR )( void ) __arm __task;
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122 extern void ( vUART_ISR )( void ) __task;
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125 /* Setup the baud rate: Calculate the divisor value. */
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126 ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
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127 ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
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129 /* Set the DLAB bit so we can access the divisor. */
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132 /* Setup the divisor. */
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133 U0DLL = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
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135 U0DLM = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
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137 /* Turn on the FIFO's and clear the buffers. */
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138 U0FCR = ( serFIFO_ON | serCLEAR_FIFO );
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140 /* Setup transmission format. */
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141 U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
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143 /* Setup the VIC for the UART. */
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144 VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );
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145 VICIntEnable |= serU0VIC_CHANNEL_BIT;
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146 VICVectAddr1 = ( unsigned portLONG ) vUART_ISR;
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147 VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;
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149 /* Enable UART0 interrupts. */
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150 U0IER |= serENABLE_INTERRUPTS;
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152 portEXIT_CRITICAL();
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156 xReturn = ( xComPortHandle ) 0;
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161 /*-----------------------------------------------------------*/
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163 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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165 /* The port handle is not required as this driver only supports UART0. */
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168 /* Get the next character from the buffer. Return false if no characters
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169 are available, or arrive before xBlockTime expires. */
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170 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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179 /*-----------------------------------------------------------*/
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181 void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
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183 signed portCHAR *pxNext;
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185 /* NOTE: This implementation does not handle the queue being full as no
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186 block time is used! */
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188 /* The port handle is not required as this driver only supports UART0. */
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190 ( void ) usStringLength;
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192 /* Send each character in the string, one at a time. */
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193 pxNext = ( signed portCHAR * ) pcString;
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196 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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200 /*-----------------------------------------------------------*/
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202 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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204 signed portBASE_TYPE xReturn;
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206 /* The port handle is not required as this driver only supports UART0. */
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209 portENTER_CRITICAL();
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211 /* Is there space to write directly to the UART? */
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212 if( *plTHREEmpty == ( portLONG ) pdTRUE )
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214 /* We wrote the character directly to the UART, so was
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216 *plTHREEmpty = pdFALSE;
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222 /* We cannot write directly to the UART, so queue the character.
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223 Block for a maximum of xBlockTime if there is no space in the
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224 queue. It is ok to block within a critical section as each
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225 task has it's own critical section management. */
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226 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
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228 /* Depending on queue sizing and task prioritisation: While we
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229 were blocked waiting to post interrupts were not disabled. It is
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230 possible that the serial ISR has emptied the Tx queue, in which
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231 case we need to start the Tx off again. */
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232 if( *plTHREEmpty == ( portLONG ) pdTRUE )
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234 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
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235 *plTHREEmpty = pdFALSE;
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240 portEXIT_CRITICAL();
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244 /*-----------------------------------------------------------*/
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