2 FreeRTOS V5.4.0 - Copyright (C) 2003-2009 Richard Barry.
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4 This file is part of the FreeRTOS distribution.
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6 FreeRTOS is free software; you can redistribute it and/or modify it under
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7 the terms of the GNU General Public License (version 2) as published by the
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8 Free Software Foundation and modified by the FreeRTOS exception.
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9 **NOTE** The exception to the GPL is included to allow you to distribute a
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10 combined work that includes FreeRTOS without being obliged to provide the
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11 source code for proprietary components outside of the FreeRTOS kernel.
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12 Alternative commercial license and support terms are also available upon
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13 request. See the licensing section of http://www.FreeRTOS.org for full
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16 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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18 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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21 You should have received a copy of the GNU General Public License along
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22 with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
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23 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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26 ***************************************************************************
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28 * Looking for a quick start? Then check out the FreeRTOS eBook! *
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29 * See http://www.FreeRTOS.org/Documentation for details *
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31 ***************************************************************************
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35 Please ensure to read the configuration and relevant port sections of the
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36 online documentation.
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38 http://www.FreeRTOS.org - Documentation, latest information, license and
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41 http://www.SafeRTOS.com - A version that is certified for use in safety
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44 http://www.OpenRTOS.com - Commercial support, development, porting,
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45 licensing and training services.
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50 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
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52 Note this driver is used to test the FreeRTOS port. It is NOT intended to
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53 be an example of an efficient implementation!
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56 /* Standard includes. */
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59 /* Scheduler includes. */
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60 #include "FreeRTOS.h"
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64 /* Demo application includes. */
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67 /*-----------------------------------------------------------*/
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69 /* Constants to setup and access the UART. */
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70 #define serDLAB ( ( unsigned portCHAR ) 0x80 )
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71 #define serENABLE_INTERRUPTS ( ( unsigned portCHAR ) 0x03 )
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72 #define serNO_PARITY ( ( unsigned portCHAR ) 0x00 )
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73 #define ser1_STOP_BIT ( ( unsigned portCHAR ) 0x00 )
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74 #define ser8_BIT_CHARS ( ( unsigned portCHAR ) 0x03 )
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75 #define serFIFO_ON ( ( unsigned portCHAR ) 0x01 )
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76 #define serCLEAR_FIFO ( ( unsigned portCHAR ) 0x06 )
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77 #define serWANTED_CLOCK_SCALING ( ( unsigned portLONG ) 16 )
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79 /* Constants to setup and access the VIC. */
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80 #define serU1VIC_CHANNEL ( ( unsigned portLONG ) 0x0007 )
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81 #define serU1VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0080 )
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82 #define serU1VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
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85 #define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
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86 #define serHANDLE ( ( xComPortHandle ) 1 )
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87 #define serNO_BLOCK ( ( portTickType ) 0 )
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89 /* Constant to access the VIC. */
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90 #define serCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
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92 /* Constants to determine the ISR source. */
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93 #define serSOURCE_THRE ( ( unsigned portCHAR ) 0x02 )
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94 #define serSOURCE_RX_TIMEOUT ( ( unsigned portCHAR ) 0x0c )
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95 #define serSOURCE_ERROR ( ( unsigned portCHAR ) 0x06 )
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96 #define serSOURCE_RX ( ( unsigned portCHAR ) 0x04 )
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97 #define serINTERRUPT_SOURCE_MASK ( ( unsigned portCHAR ) 0x0f )
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98 #define serINTERRUPT_IS_PENDING ( ( unsigned portCHAR ) 0x01 )
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100 /*-----------------------------------------------------------*/
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103 * The asm wrapper for the interrupt service routine.
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105 extern void vUART_ISREntry( void );
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108 * The C function called from the asm wrapper.
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110 void vUART_ISRHandler( void );
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112 /*-----------------------------------------------------------*/
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114 /* Queues used to hold received characters, and characters waiting to be
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116 static xQueueHandle xRxedChars;
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117 static xQueueHandle xCharsForTx;
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119 /* Communication flag between the interrupt service routine and serial API. */
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120 static volatile portLONG lTHREEmpty;
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122 /*-----------------------------------------------------------*/
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124 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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126 unsigned portLONG ulDivisor, ulWantedClock;
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127 xComPortHandle xReturn = serHANDLE;
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129 /* Create the queues used to hold Rx and Tx characters. */
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130 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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131 xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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133 /* Initialise the THRE empty flag. */
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134 lTHREEmpty = pdTRUE;
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137 ( xRxedChars != serINVALID_QUEUE ) &&
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138 ( xCharsForTx != serINVALID_QUEUE ) &&
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139 ( ulWantedBaud != ( unsigned portLONG ) 0 )
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142 portENTER_CRITICAL()
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144 /* Setup the baud rate: Calculate the divisor value. */
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145 ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
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146 ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
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148 /* Set the DLAB bit so we can access the divisor. */
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151 /* Setup the divisor. */
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152 U1DLL = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
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154 U1DLM = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
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156 /* Turn on the FIFO's and clear the buffers. */
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157 U1FCR = ( serFIFO_ON | serCLEAR_FIFO );
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159 /* Setup transmission format. */
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160 U1LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
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162 /* Setup the VIC for the UART. */
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163 VICIntSelect &= ~( serU1VIC_CHANNEL_BIT );
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164 VICIntEnable |= serU1VIC_CHANNEL_BIT;
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165 VICVectAddr1 = ( unsigned portLONG ) vUART_ISREntry;
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166 VICVectCntl1 = serU1VIC_CHANNEL | serU1VIC_ENABLE;
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168 /* Enable UART0 interrupts. */
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169 U1IER |= serENABLE_INTERRUPTS;
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171 portEXIT_CRITICAL();
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175 xReturn = ( xComPortHandle ) 0;
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180 /*-----------------------------------------------------------*/
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182 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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184 /* The port handle is not required as this driver only supports UART0. */
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187 /* Get the next character from the buffer. Return false if no characters
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188 are available, or arrive before xBlockTime expires. */
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189 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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198 /*-----------------------------------------------------------*/
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200 void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
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202 signed portCHAR *pxNext;
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204 /* NOTE: This implementation does not handle the queue being full as no
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205 block time is used! */
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207 /* The port handle is not required as this driver only supports UART0. */
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209 ( void ) usStringLength;
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211 /* Send each character in the string, one at a time. */
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212 pxNext = ( signed portCHAR * ) pcString;
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215 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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219 /*-----------------------------------------------------------*/
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221 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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223 signed portBASE_TYPE xReturn;
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225 /* The port handle is not required as this driver only supports UART0. */
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228 portENTER_CRITICAL();
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230 /* Is there space to write directly to the UART? */
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231 if( lTHREEmpty == ( portLONG ) pdTRUE )
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233 /* We wrote the character directly to the UART, so was
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235 lTHREEmpty = pdFALSE;
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241 /* We cannot write directly to the UART, so queue the character.
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242 Block for a maximum of xBlockTime if there is no space in the
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243 queue. It is ok to block within a critical section as each
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244 task has it's own critical section management. */
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245 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
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247 /* Depending on queue sizing and task prioritisation: While we
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248 were blocked waiting to post interrupts were not disabled. It is
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249 possible that the serial ISR has emptied the Tx queue, in which
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250 case we need to start the Tx off again. */
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251 if( lTHREEmpty == ( portLONG ) pdTRUE )
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253 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
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254 lTHREEmpty = pdFALSE;
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259 portEXIT_CRITICAL();
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263 /*-----------------------------------------------------------*/
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265 void vUART_ISRHandler( void )
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267 signed portCHAR cChar;
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268 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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269 unsigned portCHAR ucInterrupt;
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271 ucInterrupt = U1IIR;
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273 /* The interrupt pending bit is active low. */
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274 while( ( ucInterrupt & serINTERRUPT_IS_PENDING ) == 0 )
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276 /* What caused the interrupt? */
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277 switch( ucInterrupt & serINTERRUPT_SOURCE_MASK )
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279 case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
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283 case serSOURCE_THRE : /* The THRE is empty. If there is another
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284 character in the Tx queue, send it now. */
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285 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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291 /* There are no further characters
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292 queued to send so we can indicate
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293 that the THRE is available. */
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294 lTHREEmpty = pdTRUE;
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298 case serSOURCE_RX_TIMEOUT :
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299 case serSOURCE_RX : /* A character was received. Place it in
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300 the queue of received characters. */
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302 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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305 default : /* There is nothing to do, leave the ISR. */
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309 ucInterrupt = U1IIR;
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312 /* Clear the ISR in the VIC. */
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313 VICVectAddr = serCLEAR_VIC_INTERRUPT;
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315 /* Exit the ISR. If a task was woken by either a character being received
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316 or transmitted then a context switch will occur. */
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317 portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
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319 /*-----------------------------------------------------------*/
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