2 FreeRTOS.org V5.1.2 - Copyright (C) 2003-2009 Richard Barry.
\r
4 This file is part of the FreeRTOS.org distribution.
\r
6 FreeRTOS.org is free software; you can redistribute it and/or modify
\r
7 it under the terms of the GNU General Public License as published by
\r
8 the Free Software Foundation; either version 2 of the License, or
\r
9 (at your option) any later version.
\r
11 FreeRTOS.org is distributed in the hope that it will be useful,
\r
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
\r
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
\r
14 GNU General Public License for more details.
\r
16 You should have received a copy of the GNU General Public License
\r
17 along with FreeRTOS.org; if not, write to the Free Software
\r
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
\r
20 A special exception to the GPL can be applied should you wish to distribute
\r
21 a combined work that includes FreeRTOS.org, without being obliged to provide
\r
22 the source code for any proprietary components. See the licensing section
\r
23 of http://www.FreeRTOS.org for full details of how and when the exception
\r
26 ***************************************************************************
\r
27 ***************************************************************************
\r
29 * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *
\r
31 * This is a concise, step by step, 'hands on' guide that describes both *
\r
32 * general multitasking concepts and FreeRTOS specifics. It presents and *
\r
33 * explains numerous examples that are written using the FreeRTOS API. *
\r
34 * Full source code for all the examples is provided in an accompanying *
\r
37 ***************************************************************************
\r
38 ***************************************************************************
\r
40 Please ensure to read the configuration and relevant port sections of the
\r
41 online documentation.
\r
43 http://www.FreeRTOS.org - Documentation, latest information, license and
\r
46 http://www.SafeRTOS.com - A version that is certified for use in safety
\r
49 http://www.OpenRTOS.com - Commercial support, development, porting,
\r
50 licensing and training services.
\r
55 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
\r
57 Note this driver is used to test the FreeRTOS port. It is NOT intended to
\r
58 be an example of an efficient implementation!
\r
61 /* Standard includes. */
\r
64 /* Scheduler includes. */
\r
65 #include "FreeRTOS.h"
\r
69 /* Demo application includes. */
\r
72 /*-----------------------------------------------------------*/
\r
74 /* Constants to setup and access the UART. */
\r
75 #define serDLAB ( ( unsigned portCHAR ) 0x80 )
\r
76 #define serENABLE_INTERRUPTS ( ( unsigned portCHAR ) 0x03 )
\r
77 #define serNO_PARITY ( ( unsigned portCHAR ) 0x00 )
\r
78 #define ser1_STOP_BIT ( ( unsigned portCHAR ) 0x00 )
\r
79 #define ser8_BIT_CHARS ( ( unsigned portCHAR ) 0x03 )
\r
80 #define serFIFO_ON ( ( unsigned portCHAR ) 0x01 )
\r
81 #define serCLEAR_FIFO ( ( unsigned portCHAR ) 0x06 )
\r
82 #define serWANTED_CLOCK_SCALING ( ( unsigned portLONG ) 16 )
\r
84 /* Constants to setup and access the VIC. */
\r
85 #define serU1VIC_CHANNEL ( ( unsigned portLONG ) 0x0007 )
\r
86 #define serU1VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0080 )
\r
87 #define serU1VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
\r
90 #define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
\r
91 #define serHANDLE ( ( xComPortHandle ) 1 )
\r
92 #define serNO_BLOCK ( ( portTickType ) 0 )
\r
94 /* Constant to access the VIC. */
\r
95 #define serCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
\r
97 /* Constants to determine the ISR source. */
\r
98 #define serSOURCE_THRE ( ( unsigned portCHAR ) 0x02 )
\r
99 #define serSOURCE_RX_TIMEOUT ( ( unsigned portCHAR ) 0x0c )
\r
100 #define serSOURCE_ERROR ( ( unsigned portCHAR ) 0x06 )
\r
101 #define serSOURCE_RX ( ( unsigned portCHAR ) 0x04 )
\r
102 #define serINTERRUPT_SOURCE_MASK ( ( unsigned portCHAR ) 0x0f )
\r
103 #define serINTERRUPT_IS_PENDING ( ( unsigned portCHAR ) 0x01 )
\r
105 /*-----------------------------------------------------------*/
\r
108 * The asm wrapper for the interrupt service routine.
\r
110 extern void vUART_ISREntry( void );
\r
113 * The C function called from the asm wrapper.
\r
115 void vUART_ISRHandler( void );
\r
117 /*-----------------------------------------------------------*/
\r
119 /* Queues used to hold received characters, and characters waiting to be
\r
121 static xQueueHandle xRxedChars;
\r
122 static xQueueHandle xCharsForTx;
\r
124 /* Communication flag between the interrupt service routine and serial API. */
\r
125 static volatile portLONG lTHREEmpty;
\r
127 /*-----------------------------------------------------------*/
\r
129 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
\r
131 unsigned portLONG ulDivisor, ulWantedClock;
\r
132 xComPortHandle xReturn = serHANDLE;
\r
134 /* Create the queues used to hold Rx and Tx characters. */
\r
135 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
\r
136 xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
\r
138 /* Initialise the THRE empty flag. */
\r
139 lTHREEmpty = pdTRUE;
\r
142 ( xRxedChars != serINVALID_QUEUE ) &&
\r
143 ( xCharsForTx != serINVALID_QUEUE ) &&
\r
144 ( ulWantedBaud != ( unsigned portLONG ) 0 )
\r
147 portENTER_CRITICAL()
\r
149 /* Setup the baud rate: Calculate the divisor value. */
\r
150 ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
\r
151 ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
\r
153 /* Set the DLAB bit so we can access the divisor. */
\r
156 /* Setup the divisor. */
\r
157 U1DLL = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
\r
159 U1DLM = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
\r
161 /* Turn on the FIFO's and clear the buffers. */
\r
162 U1FCR = ( serFIFO_ON | serCLEAR_FIFO );
\r
164 /* Setup transmission format. */
\r
165 U1LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
\r
167 /* Setup the VIC for the UART. */
\r
168 VICIntSelect &= ~( serU1VIC_CHANNEL_BIT );
\r
169 VICIntEnable |= serU1VIC_CHANNEL_BIT;
\r
170 VICVectAddr1 = ( unsigned portLONG ) vUART_ISREntry;
\r
171 VICVectCntl1 = serU1VIC_CHANNEL | serU1VIC_ENABLE;
\r
173 /* Enable UART0 interrupts. */
\r
174 U1IER |= serENABLE_INTERRUPTS;
\r
176 portEXIT_CRITICAL();
\r
180 xReturn = ( xComPortHandle ) 0;
\r
185 /*-----------------------------------------------------------*/
\r
187 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
\r
189 /* The port handle is not required as this driver only supports UART0. */
\r
192 /* Get the next character from the buffer. Return false if no characters
\r
193 are available, or arrive before xBlockTime expires. */
\r
194 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
\r
203 /*-----------------------------------------------------------*/
\r
205 void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
\r
207 signed portCHAR *pxNext;
\r
209 /* NOTE: This implementation does not handle the queue being full as no
\r
210 block time is used! */
\r
212 /* The port handle is not required as this driver only supports UART0. */
\r
214 ( void ) usStringLength;
\r
216 /* Send each character in the string, one at a time. */
\r
217 pxNext = ( signed portCHAR * ) pcString;
\r
220 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
\r
224 /*-----------------------------------------------------------*/
\r
226 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
\r
228 signed portBASE_TYPE xReturn;
\r
230 /* The port handle is not required as this driver only supports UART0. */
\r
233 portENTER_CRITICAL();
\r
235 /* Is there space to write directly to the UART? */
\r
236 if( lTHREEmpty == ( portLONG ) pdTRUE )
\r
238 /* We wrote the character directly to the UART, so was
\r
240 lTHREEmpty = pdFALSE;
\r
246 /* We cannot write directly to the UART, so queue the character.
\r
247 Block for a maximum of xBlockTime if there is no space in the
\r
248 queue. It is ok to block within a critical section as each
\r
249 task has it's own critical section management. */
\r
250 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
\r
252 /* Depending on queue sizing and task prioritisation: While we
\r
253 were blocked waiting to post interrupts were not disabled. It is
\r
254 possible that the serial ISR has emptied the Tx queue, in which
\r
255 case we need to start the Tx off again. */
\r
256 if( lTHREEmpty == ( portLONG ) pdTRUE )
\r
258 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
\r
259 lTHREEmpty = pdFALSE;
\r
264 portEXIT_CRITICAL();
\r
268 /*-----------------------------------------------------------*/
\r
270 void vUART_ISRHandler( void )
\r
272 signed portCHAR cChar;
\r
273 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
\r
274 unsigned portCHAR ucInterrupt;
\r
276 ucInterrupt = U1IIR;
\r
278 /* The interrupt pending bit is active low. */
\r
279 while( ( ucInterrupt & serINTERRUPT_IS_PENDING ) == 0 )
\r
281 /* What caused the interrupt? */
\r
282 switch( ucInterrupt & serINTERRUPT_SOURCE_MASK )
\r
284 case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
\r
288 case serSOURCE_THRE : /* The THRE is empty. If there is another
\r
289 character in the Tx queue, send it now. */
\r
290 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
\r
296 /* There are no further characters
\r
297 queued to send so we can indicate
\r
298 that the THRE is available. */
\r
299 lTHREEmpty = pdTRUE;
\r
303 case serSOURCE_RX_TIMEOUT :
\r
304 case serSOURCE_RX : /* A character was received. Place it in
\r
305 the queue of received characters. */
\r
307 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
\r
310 default : /* There is nothing to do, leave the ISR. */
\r
314 ucInterrupt = U1IIR;
\r
317 /* Clear the ISR in the VIC. */
\r
318 VICVectAddr = serCLEAR_VIC_INTERRUPT;
\r
320 /* Exit the ISR. If a task was woken by either a character being received
\r
321 or transmitted then a context switch will occur. */
\r
322 portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
\r
324 /*-----------------------------------------------------------*/
\r