2 FreeRTOS.org V5.2.0 - Copyright (C) 2003-2009 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify it
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7 under the terms of the GNU General Public License (version 2) as published
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8 by the Free Software Foundation and modified by the FreeRTOS exception.
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10 FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT
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11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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15 You should have received a copy of the GNU General Public License along
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16 with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59
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17 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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19 A special exception to the GPL is included to allow you to distribute a
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20 combined work that includes FreeRTOS.org without being obliged to provide
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21 the source code for any proprietary components. See the licensing section
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22 of http://www.FreeRTOS.org for full details.
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25 ***************************************************************************
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27 * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *
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29 * This is a concise, step by step, 'hands on' guide that describes both *
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30 * general multitasking concepts and FreeRTOS specifics. It presents and *
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31 * explains numerous examples that are written using the FreeRTOS API. *
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32 * Full source code for all the examples is provided in an accompanying *
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35 ***************************************************************************
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39 Please ensure to read the configuration and relevant port sections of the
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40 online documentation.
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42 http://www.FreeRTOS.org - Documentation, latest information, license and
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45 http://www.SafeRTOS.com - A version that is certified for use in safety
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48 http://www.OpenRTOS.com - Commercial support, development, porting,
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49 licensing and training services.
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54 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
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56 Note this driver is used to test the FreeRTOS port. It is NOT intended to
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57 be an example of an efficient implementation!
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60 /* Standard includes. */
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63 /* Scheduler includes. */
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64 #include "FreeRTOS.h"
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68 /* Demo application includes. */
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71 /*-----------------------------------------------------------*/
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73 /* Constants to setup and access the UART. */
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74 #define serDLAB ( ( unsigned portCHAR ) 0x80 )
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75 #define serENABLE_INTERRUPTS ( ( unsigned portCHAR ) 0x03 )
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76 #define serNO_PARITY ( ( unsigned portCHAR ) 0x00 )
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77 #define ser1_STOP_BIT ( ( unsigned portCHAR ) 0x00 )
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78 #define ser8_BIT_CHARS ( ( unsigned portCHAR ) 0x03 )
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79 #define serFIFO_ON ( ( unsigned portCHAR ) 0x01 )
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80 #define serCLEAR_FIFO ( ( unsigned portCHAR ) 0x06 )
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81 #define serWANTED_CLOCK_SCALING ( ( unsigned portLONG ) 16 )
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83 /* Constants to setup and access the VIC. */
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84 #define serU1VIC_CHANNEL ( ( unsigned portLONG ) 0x0007 )
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85 #define serU1VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0080 )
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86 #define serU1VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
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89 #define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
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90 #define serHANDLE ( ( xComPortHandle ) 1 )
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91 #define serNO_BLOCK ( ( portTickType ) 0 )
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93 /* Constant to access the VIC. */
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94 #define serCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
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96 /* Constants to determine the ISR source. */
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97 #define serSOURCE_THRE ( ( unsigned portCHAR ) 0x02 )
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98 #define serSOURCE_RX_TIMEOUT ( ( unsigned portCHAR ) 0x0c )
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99 #define serSOURCE_ERROR ( ( unsigned portCHAR ) 0x06 )
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100 #define serSOURCE_RX ( ( unsigned portCHAR ) 0x04 )
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101 #define serINTERRUPT_SOURCE_MASK ( ( unsigned portCHAR ) 0x0f )
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102 #define serINTERRUPT_IS_PENDING ( ( unsigned portCHAR ) 0x01 )
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104 /*-----------------------------------------------------------*/
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107 * The asm wrapper for the interrupt service routine.
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109 extern void vUART_ISREntry( void );
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112 * The C function called from the asm wrapper.
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114 void vUART_ISRHandler( void );
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116 /*-----------------------------------------------------------*/
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118 /* Queues used to hold received characters, and characters waiting to be
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120 static xQueueHandle xRxedChars;
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121 static xQueueHandle xCharsForTx;
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123 /* Communication flag between the interrupt service routine and serial API. */
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124 static volatile portLONG lTHREEmpty;
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126 /*-----------------------------------------------------------*/
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128 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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130 unsigned portLONG ulDivisor, ulWantedClock;
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131 xComPortHandle xReturn = serHANDLE;
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133 /* Create the queues used to hold Rx and Tx characters. */
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134 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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135 xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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137 /* Initialise the THRE empty flag. */
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138 lTHREEmpty = pdTRUE;
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141 ( xRxedChars != serINVALID_QUEUE ) &&
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142 ( xCharsForTx != serINVALID_QUEUE ) &&
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143 ( ulWantedBaud != ( unsigned portLONG ) 0 )
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146 portENTER_CRITICAL()
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148 /* Setup the baud rate: Calculate the divisor value. */
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149 ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
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150 ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
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152 /* Set the DLAB bit so we can access the divisor. */
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155 /* Setup the divisor. */
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156 U1DLL = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
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158 U1DLM = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
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160 /* Turn on the FIFO's and clear the buffers. */
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161 U1FCR = ( serFIFO_ON | serCLEAR_FIFO );
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163 /* Setup transmission format. */
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164 U1LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
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166 /* Setup the VIC for the UART. */
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167 VICIntSelect &= ~( serU1VIC_CHANNEL_BIT );
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168 VICIntEnable |= serU1VIC_CHANNEL_BIT;
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169 VICVectAddr1 = ( unsigned portLONG ) vUART_ISREntry;
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170 VICVectCntl1 = serU1VIC_CHANNEL | serU1VIC_ENABLE;
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172 /* Enable UART0 interrupts. */
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173 U1IER |= serENABLE_INTERRUPTS;
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175 portEXIT_CRITICAL();
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179 xReturn = ( xComPortHandle ) 0;
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184 /*-----------------------------------------------------------*/
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186 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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188 /* The port handle is not required as this driver only supports UART0. */
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191 /* Get the next character from the buffer. Return false if no characters
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192 are available, or arrive before xBlockTime expires. */
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193 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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202 /*-----------------------------------------------------------*/
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204 void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
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206 signed portCHAR *pxNext;
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208 /* NOTE: This implementation does not handle the queue being full as no
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209 block time is used! */
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211 /* The port handle is not required as this driver only supports UART0. */
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213 ( void ) usStringLength;
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215 /* Send each character in the string, one at a time. */
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216 pxNext = ( signed portCHAR * ) pcString;
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219 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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223 /*-----------------------------------------------------------*/
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225 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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227 signed portBASE_TYPE xReturn;
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229 /* The port handle is not required as this driver only supports UART0. */
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232 portENTER_CRITICAL();
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234 /* Is there space to write directly to the UART? */
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235 if( lTHREEmpty == ( portLONG ) pdTRUE )
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237 /* We wrote the character directly to the UART, so was
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239 lTHREEmpty = pdFALSE;
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245 /* We cannot write directly to the UART, so queue the character.
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246 Block for a maximum of xBlockTime if there is no space in the
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247 queue. It is ok to block within a critical section as each
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248 task has it's own critical section management. */
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249 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
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251 /* Depending on queue sizing and task prioritisation: While we
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252 were blocked waiting to post interrupts were not disabled. It is
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253 possible that the serial ISR has emptied the Tx queue, in which
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254 case we need to start the Tx off again. */
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255 if( lTHREEmpty == ( portLONG ) pdTRUE )
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257 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
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258 lTHREEmpty = pdFALSE;
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263 portEXIT_CRITICAL();
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267 /*-----------------------------------------------------------*/
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269 void vUART_ISRHandler( void )
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271 signed portCHAR cChar;
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272 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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273 unsigned portCHAR ucInterrupt;
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275 ucInterrupt = U1IIR;
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277 /* The interrupt pending bit is active low. */
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278 while( ( ucInterrupt & serINTERRUPT_IS_PENDING ) == 0 )
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280 /* What caused the interrupt? */
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281 switch( ucInterrupt & serINTERRUPT_SOURCE_MASK )
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283 case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
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287 case serSOURCE_THRE : /* The THRE is empty. If there is another
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288 character in the Tx queue, send it now. */
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289 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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295 /* There are no further characters
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296 queued to send so we can indicate
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297 that the THRE is available. */
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298 lTHREEmpty = pdTRUE;
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302 case serSOURCE_RX_TIMEOUT :
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303 case serSOURCE_RX : /* A character was received. Place it in
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304 the queue of received characters. */
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306 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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309 default : /* There is nothing to do, leave the ISR. */
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313 ucInterrupt = U1IIR;
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316 /* Clear the ISR in the VIC. */
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317 VICVectAddr = serCLEAR_VIC_INTERRUPT;
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319 /* Exit the ISR. If a task was woken by either a character being received
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320 or transmitted then a context switch will occur. */
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321 portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
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323 /*-----------------------------------------------------------*/
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