1 /******************************************************************
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3 ***** Name: cs8900.c *****
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4 ***** Ver.: 1.0 *****
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5 ***** Date: 07/05/2001 *****
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6 ***** Auth: Andreas Dannenberg *****
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7 ***** HTWK Leipzig *****
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8 ***** university of applied sciences *****
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10 ***** Func: ethernet packet-driver for use with LAN- *****
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11 ***** controller CS8900 from Crystal/Cirrus Logic *****
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13 ***** Keil: Module modified for use with Philips *****
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14 ***** LPC2378 EMAC Ethernet controller *****
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16 ******************************************************************/
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18 /* Adapted from file originally written by Andreas Dannenberg. Supplied with permission. */
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20 #include "FreeRTOS.h"
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21 #include "Semphr.h"
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25 /* The semaphore used to wake the uIP task when data arives. */
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26 xSemaphoreHandle xEMACSemaphore = NULL;
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28 static unsigned short *rptr;
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29 static unsigned short *tptr;
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31 // easyWEB internal function
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32 // help function to swap the byte order of a WORD
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34 static unsigned short SwapBytes(unsigned short Data)
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36 return (Data >> 8) | (Data << 8);
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39 // Keil: function added to write PHY
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40 void write_PHY (int PhyReg, int Value)
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44 MADR = DP83848C_DEF_ADR | PhyReg;
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47 /* Wait utill operation completed */
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49 for (tout = 0; tout < MII_WR_TOUT; tout++) {
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50 if ((MIND & MIND_BUSY) == 0) {
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57 // Keil: function added to read PHY
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58 unsigned short read_PHY (unsigned char PhyReg)
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62 MADR = DP83848C_DEF_ADR | PhyReg;
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65 /* Wait until operation completed */
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67 for (tout = 0; tout < MII_RD_TOUT; tout++) {
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68 if ((MIND & MIND_BUSY) == 0) {
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77 // Keil: function added to initialize Rx Descriptors
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78 void rx_descr_init (void)
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82 for (i = 0; i < NUM_RX_FRAG; i++) {
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83 RX_DESC_PACKET(i) = RX_BUF(i);
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84 RX_DESC_CTRL(i) = RCTRL_INT | (ETH_FRAG_SIZE-1);
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85 RX_STAT_INFO(i) = 0;
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86 RX_STAT_HASHCRC(i) = 0;
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89 /* Set EMAC Receive Descriptor Registers. */
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90 RxDescriptor = RX_DESC_BASE;
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91 RxStatus = RX_STAT_BASE;
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92 RxDescriptorNumber = NUM_RX_FRAG-1;
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94 /* Rx Descriptors Point to 0 */
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99 // Keil: function added to initialize Tx Descriptors
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100 void tx_descr_init (void) {
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103 for (i = 0; i < NUM_TX_FRAG; i++) {
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104 TX_DESC_PACKET(i) = TX_BUF(i);
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105 TX_DESC_CTRL(i) = 0;
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106 TX_STAT_INFO(i) = 0;
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109 /* Set EMAC Transmit Descriptor Registers. */
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110 TxDescriptor = TX_DESC_BASE;
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111 TxStatus = TX_STAT_BASE;
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112 TxDescriptorNumber = NUM_TX_FRAG-1;
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114 /* Tx Descriptors Point to 0 */
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115 TxProduceIndex = 0;
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119 // configure port-pins for use with LAN-controller,
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120 // reset it and send the configuration-sequence
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122 portBASE_TYPE Init_EMAC(void)
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124 portBASE_TYPE xReturn = pdPASS;
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125 static portBASE_TYPE xAttempt = 0;
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126 // Keil: function modified to access the EMAC
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127 // Initializes the EMAC ethernet controller
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128 volatile unsigned int regv,tout,id1,id2;
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130 /* Enable P1 Ethernet Pins. */
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131 PINSEL2 = configPINSEL2_VALUE;
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132 PINSEL3 = (PINSEL3 & ~0x0000000F) | 0x00000005;
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134 /* Power Up the EMAC controller. */
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135 PCONP |= 0x40000000;
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138 /* Reset all EMAC internal modules. */
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139 MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
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140 MAC1_SIM_RES | MAC1_SOFT_RES;
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141 Command = CR_REG_RES | CR_TX_RES | CR_RX_RES;
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143 /* A short delay after reset. */
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146 /* Initialize MAC control registers. */
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147 MAC1 = MAC1_PASS_ALL;
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148 MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
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149 MAXF = ETH_MAX_FLEN;
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153 /* Enable Reduced MII interface. */
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154 Command = CR_RMII | CR_PASS_RUNT_FRM;
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156 /* Reset Reduced MII Logic. */
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157 SUPP = SUPP_RES_RMII;
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160 /* Put the DP83848C in reset mode */
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161 write_PHY (PHY_REG_BMCR, 0x8000);
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162 write_PHY (PHY_REG_BMCR, 0x8000);
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164 /* Wait for hardware reset to end. */
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165 for (tout = 0; tout < 100; tout++) {
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167 regv = read_PHY (PHY_REG_BMCR);
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168 if (!(regv & 0x8000)) {
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169 /* Reset complete */
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174 /* Check if this is a DP83848C PHY. */
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175 id1 = read_PHY (PHY_REG_IDR1);
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176 id2 = read_PHY (PHY_REG_IDR2);
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177 if (((id1 << 16) | (id2 & 0xFFF0)) == DP83848C_ID) {
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178 /* Configure the PHY device */
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180 /* Use autonegotiation about the link speed. */
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181 write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);
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182 /* Wait to complete Auto_Negotiation. */
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183 for (tout = 0; tout < 10; tout++) {
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185 regv = read_PHY (PHY_REG_BMSR);
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186 if (regv & 0x0020) {
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187 /* Autonegotiation Complete. */
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197 /* Check the link status. */
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198 if( xReturn == pdPASS )
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201 for (tout = 0; tout < 10; tout++) {
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203 regv = read_PHY (PHY_REG_STS);
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204 if (regv & 0x0001) {
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212 if( xReturn == pdPASS )
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214 /* Configure Full/Half Duplex mode. */
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215 if (regv & 0x0004) {
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216 /* Full duplex is enabled. */
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217 MAC2 |= MAC2_FULL_DUP;
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218 Command |= CR_FULL_DUP;
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219 IPGT = IPGT_FULL_DUP;
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222 /* Half duplex mode. */
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223 IPGT = IPGT_HALF_DUP;
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226 /* Configure 100MBit/10MBit mode. */
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227 if (regv & 0x0002) {
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232 /* 100MBit mode. */
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236 /* Set the Ethernet MAC Address registers */
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237 SA0 = (emacETHADDR0 << 8) | emacETHADDR1;
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238 SA1 = (emacETHADDR2 << 8) | emacETHADDR3;
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239 SA2 = (emacETHADDR4 << 8) | emacETHADDR5;
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241 /* Initialize Tx and Rx DMA Descriptors */
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245 /* Receive Broadcast and Perfect Match Packets */
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246 RxFilterCtrl = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN;
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248 /* Create the semaphore used ot wake the uIP task. */
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249 vSemaphoreCreateBinary( xEMACSemaphore );
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251 /* Reset all interrupts */
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254 /* Enable receive and transmit mode of MAC Ethernet core */
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255 Command |= (CR_RX_EN | CR_TX_EN);
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256 MAC1 |= MAC1_REC_EN;
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263 // reads a word in little-endian byte order from RX_BUFFER
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265 unsigned short ReadFrame_EMAC(void)
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270 // reads a word in big-endian byte order from RX_FRAME_PORT
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271 // (useful to avoid permanent byte-swapping while reading
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274 unsigned short ReadFrameBE_EMAC(void)
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276 unsigned short ReturnValue;
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278 ReturnValue = SwapBytes (*rptr++);
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279 return (ReturnValue);
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283 // copies bytes from frame port to MCU-memory
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284 // NOTES: * an odd number of byte may only be transfered
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285 // if the frame is read to the end!
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286 // * MCU-memory MUST start at word-boundary
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288 void CopyFromFrame_EMAC(void *Dest, unsigned short Size)
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290 unsigned short * piDest; // Keil: Pointer added to correct expression
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292 piDest = Dest; // Keil: Line added
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294 *piDest++ = ReadFrame_EMAC();
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298 if (Size) { // check for leftover byte...
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299 *(unsigned char *)piDest = (char)ReadFrame_EMAC();// the LAN-Controller will return 0
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300 } // for the highbyte
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303 // does a dummy read on frame-I/O-port
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304 // NOTE: only an even number of bytes is read!
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306 void DummyReadFrame_EMAC(unsigned short Size) // discards an EVEN number of bytes
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314 // Reads the length of the received ethernet frame and checks if the
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315 // destination address is a broadcast message or not
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316 // returns the frame length
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317 unsigned short StartReadFrame(void) {
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318 unsigned short RxLen;
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321 idx = RxConsumeIndex;
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322 RxLen = (RX_STAT_INFO(idx) & RINFO_SIZE) - 3;
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323 rptr = (unsigned short *)RX_DESC_PACKET(idx);
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327 void EndReadFrame(void) {
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330 /* DMA free packet. */
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331 idx = RxConsumeIndex;
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333 if (++idx == NUM_RX_FRAG)
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336 RxConsumeIndex = idx;
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339 unsigned int CheckFrameReceived(void) { // Packet received ?
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341 if (RxProduceIndex != RxConsumeIndex) // more packets received ?
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347 unsigned int uiGetEMACRxData( unsigned char *ucBuffer )
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349 unsigned int uiLen = 0;
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351 if( RxProduceIndex != RxConsumeIndex )
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353 uiLen = StartReadFrame();
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354 CopyFromFrame_EMAC( ucBuffer, uiLen );
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361 // requests space in EMAC memory for storing an outgoing frame
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363 void RequestSend(void)
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367 idx = TxProduceIndex;
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368 tptr = (unsigned short *)TX_DESC_PACKET(idx);
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371 // check if ethernet controller is ready to accept the
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372 // frame we want to send
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374 unsigned int Rdy4Tx(void)
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376 return (1); // the ethernet controller transmits much faster
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377 } // than the CPU can load its buffers
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380 // writes a word in little-endian byte order to TX_BUFFER
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381 void WriteFrame_EMAC(unsigned short Data)
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386 // copies bytes from MCU-memory to frame port
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387 // NOTES: * an odd number of byte may only be transfered
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388 // if the frame is written to the end!
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389 // * MCU-memory MUST start at word-boundary
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391 void CopyToFrame_EMAC(void *Source, unsigned int Size)
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393 unsigned short * piSource;
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396 Size = (Size + 1) & 0xFFFE; // round Size up to next even number
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398 WriteFrame_EMAC(*piSource++);
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403 void DoSend_EMAC(unsigned short FrameSize)
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407 idx = TxProduceIndex;
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408 TX_DESC_CTRL(idx) = FrameSize | TCTRL_LAST;
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409 if (++idx == NUM_TX_FRAG) idx = 0;
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410 TxProduceIndex = idx;
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