1 #include "FreeRTOSConfig.h"
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3 IVR_ADDR DEFINE 0xFFFFF818
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5 ;*******************************************************************************
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6 ; Import the Reset_Handler address from 71x_init.s
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7 ;*******************************************************************************
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9 IMPORT __program_start
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11 ;*******************************************************************************
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12 ; Import exception handlers
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13 ;*******************************************************************************
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15 IMPORT vPortYieldProcessor ; FreeRTOS SWI handler
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17 ;*******************************************************************************
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18 ; Import IRQ handlers from 71x_it.c
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19 ;*******************************************************************************
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21 IMPORT vPortNonPreemptiveTick ; Cooperative FreeRTOS tick handler
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22 IMPORT vPortPreemptiveTickISR ; Preemptive FreeRTOS tick handler
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23 IMPORT vSerialISREntry ; Demo serial port handler
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25 ;*******************************************************************************
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26 ; Export Peripherals IRQ handlers table address
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27 ;*******************************************************************************
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33 LDR PC, Undefined_Addr
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35 LDR PC, Prefetch_Addr
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37 NOP ; Reserved vector
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43 ;*******************************************************************************
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44 ; Exception handlers address table
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45 ;*******************************************************************************
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47 Reset_Addr DCD __program_start
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48 Undefined_Addr DCD UndefinedHandler
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49 SWI_Addr DCD vPortYieldProcessor
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50 Prefetch_Addr DCD PrefetchAbortHandler
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51 Abort_Addr DCD DataAbortHandler
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52 DCD 0 ; Reserved vector
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53 IRQ_Addr DCD IRQHandler
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54 FIQ_Addr DCD FIQHandler
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56 ;*******************************************************************************
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57 ; Peripherals IRQ handlers address table
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58 ;*******************************************************************************
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62 T0TIMI_Addr DCD DefaultISR
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63 FLASH_Addr DCD DefaultISR
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64 RCCU_Addr DCD DefaultISR
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65 RTC_Addr DCD DefaultISR
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66 #if configUSE_PREEMPTION == 0
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67 WDG_Addr DCD vPortNonPreemptiveTick ; Tick ISR if the cooperative scheduler is used.
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69 WDG_Addr DCD vPortPreemptiveTickISR ; Tick ISR if the preemptive scheduler is used.
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71 XTI_Addr DCD DefaultISR
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72 USBHP_Addr DCD DefaultISR
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73 I2C0ITERR_Addr DCD DefaultISR
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74 I2C1ITERR_ADDR DCD DefaultISR
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75 UART0_Addr DCD vSerialISREntry
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76 UART1_Addr DCD DefaultISR
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77 UART2_ADDR DCD DefaultISR
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78 UART3_ADDR DCD DefaultISR
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79 BSPI0_ADDR DCD DefaultISR
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80 BSPI1_Addr DCD DefaultISR
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81 I2C0_Addr DCD DefaultISR
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82 I2C1_Addr DCD DefaultISR
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83 CAN_Addr DCD DefaultISR
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84 ADC12_Addr DCD DefaultISR
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85 T1TIMI_Addr DCD DefaultISR
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86 T2TIMI_Addr DCD DefaultISR
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87 T3TIMI_Addr DCD DefaultISR
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91 HDLC_Addr DCD DefaultISR
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92 USBLP_Addr DCD DefaultISR
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95 T0TOI_Addr DCD DefaultISR
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96 T0OC1_Addr DCD DefaultISR
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97 T0OC2_Addr DCD DefaultISR
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100 ;*******************************************************************************
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101 ; Exception Handlers
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102 ;*******************************************************************************
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108 PrefetchAbortHandler
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109 b PrefetchAbortHandler
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