1 /******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
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2 * File Name : 75x_dma.c
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3 * Author : MCD Application Team
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4 * Date First Issued : 03/10/2006
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5 * Description : This file provides all the DMA software functions.
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6 ********************************************************************************
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10 ********************************************************************************
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11 * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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13 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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14 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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15 * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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16 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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17 *******************************************************************************/
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19 /* Includes ------------------------------------------------------------------*/
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20 #include "75x_dma.h"
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21 #include "75x_mrcc.h"
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23 /* Private typedef -----------------------------------------------------------*/
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24 /* Private define ------------------------------------------------------------*/
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25 /* Private macro -------------------------------------------------------------*/
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26 /* Private variables ---------------------------------------------------------*/
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29 #define DMA_Enable 0x0001
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30 #define DMA_Disable 0xFFFE
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32 /* DMA Last Buffer Sweep */
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33 #define DMA_Last0_Enable_Mask 0x0001
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34 #define DMA_Last0_Disable_Mask 0xFFFE
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35 #define DMA_Last1_Enable_Mask 0x0002
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36 #define DMA_Last1_Disable_Mask 0xFFFD
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37 #define DMA_Last2_Enable_Mask 0x0004
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38 #define DMA_Last2_Disable_Mask 0xFFFB
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39 #define DMA_Last3_Enable_Mask 0x0008
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40 #define DMA_Last3_Disable_Mask 0xFFF7
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43 #define DMA_Stream0_MASK_Mask 0xFFEE
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44 #define DMA_Stream0_CLR_Mask 0x0011
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45 #define DMA_Stream0_LAST_Mask 0xFFFE
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47 #define DMA_Stream1_MASK_Mask 0xFFDD
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48 #define DMA_Stream1_CLR_Mask 0x0022
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49 #define DMA_Stream1_LAST_Mask 0xFFFD
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51 #define DMA_Stream2_MASK_Mask 0xFFBB
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52 #define DMA_Stream2_CLR_Mask 0x0044
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53 #define DMA_Stream2_LAST_Mask 0xFFFB
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55 #define DMA_Stream3_MASK_Mask 0xFF77
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56 #define DMA_Stream3_CLR_Mask 0x0088
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57 #define DMA_Stream3_LAST_Mask 0xFFF7
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59 #define DMA_SRCSize_Mask 0xFFE7
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60 #define DMA_SRCBurst_Mask 0xFF9F
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61 #define DMA_DSTSize_Mask 0xFE7F
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63 /* Private function prototypes -----------------------------------------------*/
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64 /* Private functions ---------------------------------------------------------*/
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65 /*******************************************************************************
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66 * Function Name : DMA_DeInit
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67 * Description : Deinitializes the DMA streamx registers to their default reset
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69 * Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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73 *******************************************************************************/
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74 void DMA_DeInit(DMA_Stream_TypeDef* DMA_Streamx)
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76 /* Reset streamx source base address register */
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77 DMA_Streamx->SOURCEL = 0;
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78 DMA_Streamx->SOURCEH = 0;
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80 /* Reset streamx destination base address register */
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81 DMA_Streamx->DESTL = 0;
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82 DMA_Streamx->DESTH = 0;
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84 /* Reset streamx maximum count register */
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85 DMA_Streamx->MAX = 0;
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86 /* Reset streamx control register */
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87 DMA_Streamx->CTRL = 0;
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88 /* Reset streamx last used buffer location register */
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89 DMA_Streamx->LUBUFF = 0;
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91 switch(*(u32*)&DMA_Streamx)
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93 case DMA_Stream0_BASE:
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94 /* Reset interrupt mask, clear and flag bits for stream0 */
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95 DMA->MASK &= DMA_Stream0_MASK_Mask;
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96 DMA->CLR |= DMA_Stream0_CLR_Mask;
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97 DMA->LAST &= DMA_Stream0_LAST_Mask;
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100 case DMA_Stream1_BASE:
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101 /* Reset interrupt mask, clear and flag bits for stream1 */
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102 DMA->MASK &= DMA_Stream1_MASK_Mask;
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103 DMA->CLR |= DMA_Stream1_CLR_Mask;
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104 DMA->LAST &= DMA_Stream1_LAST_Mask;
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107 case DMA_Stream2_BASE:
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108 /* Reset interrupt mask, clear and flag bits for stream2 */
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109 DMA->MASK &= DMA_Stream2_MASK_Mask;
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110 DMA->CLR |= DMA_Stream2_CLR_Mask;
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111 DMA->LAST &= DMA_Stream2_LAST_Mask;
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114 case DMA_Stream3_BASE:
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115 /* Reset interrupt mask, clear and flag bits for stream3 */
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116 DMA->MASK &= DMA_Stream3_MASK_Mask;
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117 DMA->CLR |= DMA_Stream3_CLR_Mask;
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118 DMA->LAST &= DMA_Stream3_LAST_Mask;
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126 /*******************************************************************************
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127 * Function Name : DMA_Init
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128 * Description : Initializes the DMAx stream according to the specified
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129 * parameters in the DMA_InitStruct.
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130 * Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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132 * - DMA_InitStruct: pointer to a DMA_InitTypeDef structure that
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133 * contains the configuration information for the specified
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137 ******************************************************************************/
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138 void DMA_Init(DMA_Stream_TypeDef* DMA_Streamx, DMA_InitTypeDef* DMA_InitStruct)
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140 /* set the buffer Size */
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141 DMA_Streamx->MAX = DMA_InitStruct->DMA_BufferSize ;
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143 /* Configure the incrementation of the current source Register */
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144 if(DMA_InitStruct->DMA_SRC == DMA_SRC_INCR)
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146 /* Increment current source register */
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147 DMA_Streamx->CTRL |= DMA_SRC_INCR;
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151 /* Current source register unchanged */
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152 DMA_Streamx->CTRL &= DMA_SRC_NOT_INCR;
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155 /* Configure the incrementation of the current destination Register */
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156 if(DMA_InitStruct->DMA_DST == DMA_DST_INCR)
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158 /* Increment current source register */
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159 DMA_Streamx->CTRL |= DMA_DST_INCR;
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163 /* Current source register unchanged */
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164 DMA_Streamx->CTRL &= DMA_DST_NOT_INCR;
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167 /* Clear source to DMA data width SOSIZE[1:0] bits */
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168 DMA_Streamx->CTRL &= DMA_SRCSize_Mask;
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169 /* Set the source to DMA data width */
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170 DMA_Streamx->CTRL |= DMA_InitStruct->DMA_SRCSize;
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172 /* Clear the DMA peripheral burst size SOBURST[1:0] bits */
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173 DMA_Streamx->CTRL &= DMA_SRCBurst_Mask;
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174 /* Set the DMA peripheral burst size */
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175 DMA_Streamx->CTRL |= DMA_InitStruct->DMA_SRCBurst;
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177 /* Clear destination to DMA dat width DESIZE[1:0] bits */
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178 DMA_Streamx->CTRL &= DMA_DSTSize_Mask;
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179 /* Set the destination to DMA data width */
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180 DMA_Streamx->CTRL |= DMA_InitStruct->DMA_DSTSize;
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182 /* Configure the circular mode */
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183 if(DMA_InitStruct->DMA_Mode == DMA_Mode_Circular)
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185 /* Set circular mode */
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186 DMA_Streamx->CTRL |= DMA_Mode_Circular;
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190 /* Set normal mode */
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191 DMA_Streamx->CTRL &= DMA_Mode_Normal;
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194 /* Configure the direction transfer */
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195 if(DMA_InitStruct->DMA_DIR == DMA_DIR_PeriphDST)
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197 /* Set peripheral as destination */
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198 DMA_Streamx->CTRL |= DMA_DIR_PeriphDST;
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202 /* Set peripheral as source */
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203 DMA_Streamx->CTRL &= DMA_DIR_PeriphSRC;
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206 /* Configure the memory to memory transfer only for stream3 */
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207 if(DMA_Streamx == DMA_Stream3)
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209 if(DMA_InitStruct->DMA_M2M == DMA_M2M_Enable)
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211 /* Enable memory to memory transfer for stream3 */
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212 DMA_Streamx->CTRL |= DMA_M2M_Enable;
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216 /* Disable memory to memory transfer for stream3 */
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217 DMA_Streamx->CTRL &= DMA_M2M_Disable;
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221 /* Configure the source base address */
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222 DMA_Streamx->SOURCEL = DMA_InitStruct->DMA_SRCBaseAddr;
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223 DMA_Streamx->SOURCEH = DMA_InitStruct->DMA_SRCBaseAddr >> 16;
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225 /* Configure the destination base address */
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226 DMA_Streamx->DESTL = DMA_InitStruct->DMA_DSTBaseAddr;
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227 DMA_Streamx->DESTH = DMA_InitStruct->DMA_DSTBaseAddr >> 16;
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230 /*******************************************************************************
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231 * Function Name : DMA_StructInit
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232 * Description : Fills each DMA_InitStruct member with its default value.
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233 * Input : DMA_InitStruct : pointer to a DMA_InitTypeDef structure
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234 * which will be initialized.
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237 *******************************************************************************/
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238 void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct)
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240 /* Initialize the DMA_BufferSize member */
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241 DMA_InitStruct->DMA_BufferSize = 0;
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243 /* initialize the DMA_SRCBaseAddr member */
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244 DMA_InitStruct->DMA_SRCBaseAddr = 0;
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246 /* Initialize the DMA_DSTBaseAddr member */
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247 DMA_InitStruct ->DMA_DSTBaseAddr = 0;
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249 /* Initialize the DMA_SRC member */
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250 DMA_InitStruct->DMA_SRC = DMA_SRC_NOT_INCR;
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252 /* Initialize the DMA_DST member */
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253 DMA_InitStruct->DMA_DST = DMA_DST_NOT_INCR;
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255 /* Initialize the DMA_SRCSize member */
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256 DMA_InitStruct->DMA_SRCSize = DMA_SRCSize_Byte;
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258 /* Initialize the DMA_SRCBurst member */
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259 DMA_InitStruct->DMA_SRCBurst = DMA_SRCBurst_1Data;
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261 /* Initialize the DMA_DSTSize member */
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262 DMA_InitStruct->DMA_DSTSize = DMA_DSTSize_Byte;
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264 /* Initialize the DMA_Mode member */
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265 DMA_InitStruct->DMA_Mode = DMA_Mode_Normal;
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267 /* Initialize the DMA_M2M member */
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268 DMA_InitStruct->DMA_M2M = DMA_M2M_Disable;
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270 /* Initialize the DMA_DIR member */
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271 DMA_InitStruct->DMA_DIR = DMA_DIR_PeriphSRC;
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274 /*******************************************************************************
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275 * Function Name : DMA_Cmd
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276 * Description : Enables or disables the specified DMA stream.
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277 * Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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279 * - NewState: new state of the DMAx stream. This parameter can
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280 * be: ENABLE or DISABLE.
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283 *******************************************************************************/
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284 void DMA_Cmd(DMA_Stream_TypeDef* DMA_Streamx, FunctionalState NewState)
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286 if(NewState == ENABLE)
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288 /* Enable the selected DMA streamx */
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289 DMA_Streamx->CTRL |= DMA_Enable;
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293 /* Disable the selected DMA streamx */
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294 DMA_Streamx->CTRL &= DMA_Disable;
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298 /*******************************************************************************
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299 * Function Name : DMA_ITConfig
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300 * Description : Enables or disables the specified DMA interrupts.
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301 * Input : - DMA_IT: specifies the DMA interrupts sources to be enabled
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302 * or disabled. This parameter can be any combination of the
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303 * following values:
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304 * - DMA_IT_SI0: Stream0 transfer end interrupt mask
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305 * - DMA_IT_SI1: Stream1 transfer end interrupt mask
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306 * - DMA_IT_SI2: Stream2 transfer end interrupt mask
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307 * - DMA_IT_SI3: Stream3 transfer end interrupt mask
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308 * - DMA_IT_SE0: Stream0 transfer error interrupt mask
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309 * - DMA_IT_SE1: Stream1 transfer error interrupt mask
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310 * - DMA_IT_SE2: Stream2 transfer error interrupt mask
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311 * - DMA_IT_SE3: Stream3 transfer error interrupt mask
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312 * - DMA_IT_ALL: ALL DMA interrupts mask
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313 * - NewState: new state of the specified DMA interrupts.
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314 * This parameter can be: ENABLE or DISABLE.
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317 *******************************************************************************/
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318 void DMA_ITConfig(u16 DMA_IT, FunctionalState NewState)
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320 if(NewState == ENABLE)
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322 /* Enable the selected DMA interrupts */
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323 DMA->MASK |= DMA_IT;
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327 /* Disable the selected DMA interrupts */
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328 DMA->MASK &= ~DMA_IT;
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332 /*******************************************************************************
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333 * Function Name : DMA_GetCurrDSTAddr
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334 * Description : Returns the current value of the destination address pointer
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335 * related to the specified DMA stream.
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336 * Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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339 * Return : The current value of the destination address pointer related
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340 * to the specified DMA stream.
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341 *******************************************************************************/
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342 u32 DMA_GetCurrDSTAddr(DMA_Stream_TypeDef* DMA_Streamx)
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346 /* Get high current destination address */
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347 Tmp = (DMA_Streamx->DECURRH)<<16;
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348 /* Get low current destination address */
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349 Tmp |= DMA_Streamx->DECURRL;
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351 /* Return the current destination address value for streamx */
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355 /*******************************************************************************
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356 * Function Name : DMA_GetCurrSRCAddr
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357 * Description : Returns the current value of the source address pointer
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358 * related to the specified DMA stream.
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359 * Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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362 * Return : The current value of the source address pointer related to
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363 * the specified DMA stream.
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364 *******************************************************************************/
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365 u32 DMA_GetCurrSRCAddr(DMA_Stream_TypeDef* DMA_Streamx)
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369 /* Get high current source address */
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370 Tmp = (DMA_Streamx->SOCURRH)<<16;
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371 /* Get slow current source address */
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372 Tmp |= DMA_Streamx->SOCURRL;
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374 /* Return the current source address value for streamx */
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378 /*******************************************************************************
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379 * Function Name : DMA_GetTerminalCounter
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380 * Description : Returns the number of data units remaining in the current
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381 * DMA stream transfer.
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382 * Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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385 * Return : The number of data units remaining in the current DMA stream
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387 *******************************************************************************/
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388 u16 DMA_GetTerminalCounter(DMA_Stream_TypeDef* DMA_Streamx)
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390 /* Return the terminal counter value for streamx */
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391 return(DMA_Streamx->TCNT);
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394 /*******************************************************************************
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395 * Function Name : DMA_LastBufferSweepConfig
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396 * Description : Activates or disactivates the last buffer sweep mode for the
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397 * DMA streamx configured in circular buffer mode.
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398 * Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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400 * - NewState: new state of the Last buffer sweep DMA_Streamx.
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401 * This parameter can be: ENABLE or DISABLE.
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404 *******************************************************************************/
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405 void DMA_LastBufferSweepConfig(DMA_Stream_TypeDef* DMA_Streamx, FunctionalState NewState)
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407 switch(*(u32*)&DMA_Streamx)
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409 case DMA_Stream0_BASE:
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410 if(NewState == ENABLE)
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412 /* Activates the last circular buffer sweep mode for stream0 */
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413 DMA->LAST |= DMA_Last0_Enable_Mask;
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417 /* Disactivates the last circular buffer sweep mode for stream0 */
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418 DMA->LAST &= DMA_Last0_Disable_Mask;
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422 case DMA_Stream1_BASE:
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423 if(NewState == ENABLE)
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425 /* Activates the last circular buffer sweep mode for stream1 */
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426 DMA->LAST |= DMA_Last1_Enable_Mask;
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430 /* Disactivates the last circular buffer sweep mode for stream1 */
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431 DMA->LAST &= DMA_Last1_Disable_Mask;
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435 case DMA_Stream2_BASE:
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436 if(NewState == ENABLE)
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438 /* Activates the last circular buffer sweep mode for stream2 */
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439 DMA->LAST |= DMA_Last2_Enable_Mask;
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443 /* Disactivates the last circular buffer sweep mode for stream2 */
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444 DMA->LAST &= DMA_Last2_Disable_Mask;
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448 case DMA_Stream3_BASE:
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449 if(NewState == ENABLE)
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451 /* Activates the last circular buffer sweep mode for stream3 */
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452 DMA->LAST |= DMA_Last3_Enable_Mask;
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456 /* Disactivates the last circular buffer sweep mode for stream3 */
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457 DMA->LAST &= DMA_Last3_Disable_Mask;
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466 /*******************************************************************************
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467 * Function Name : DMA_LastBufferAddrConfig
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468 * Description : Configures the circular buffer position where the last data
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469 * to be used by the specified DMA stream is located.
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470 * Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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472 * - DMA_LastBufferAddr: specifies the circular buffer position
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473 * where the last data to be used by the specified DMA stream
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475 * This member must be a number between 0 and the stream BufferSize-1.
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478 *******************************************************************************/
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479 void DMA_LastBufferAddrConfig(DMA_Stream_TypeDef* DMA_Streamx, u16 DMA_LastBufferAddr)
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481 /* Set the streamx last data circular buffer location */
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482 DMA_Streamx->LUBUFF = DMA_LastBufferAddr;
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485 /*******************************************************************************
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486 * Function Name : DMA_GetFlagStatus
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487 * Description : Checks whether the specified DMA flag is set or not.
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488 * Input : - DMA_FLAG: specifies the flag to check. This parameter can
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489 * be one of the following values:
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490 * - DMA_FLAG_SI0: Stream0 transfer end flag.
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491 * - DMA_FLAG_SI1: Stream1 transfer end flag.
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492 * - DMA_FLAG_SI2: Stream2 transfer end flag.
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493 * - DMA_FLAG_SI3: Stream3 transfer end flag.
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494 * - DMA_FLAG_SE0: Stream0 transfer error flag.
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495 * - DMA_FLAG_SE1: Stream1 transfer error flag.
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496 * - DMA_FLAG_SE2: Stream2 transfer error flag.
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497 * - DMA_FLAG_SE3: Stream3 transfer error flag.
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498 * - DMA_FLAG_ACT0: Stream0 status.
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499 * - DMA_FLAG_ACT1: Stream1 status.
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500 * - DMA_FLAG_ACT2: Stream2 status.
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501 * - DMA_FLAG_ACT3: Stream3 status.
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503 * Return : The new state of DMA_FLAG (SET or RESET).
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504 *******************************************************************************/
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505 FlagStatus DMA_GetFlagStatus(u16 DMA_FLAG)
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507 /* Check the status of the specified DMA flag */
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508 if((DMA->STATUS & DMA_FLAG) != RESET)
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510 /* Return SET if DMA_FLAG is set */
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515 /* Return RESET if DMA_FLAG is reset */
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520 /*******************************************************************************
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521 * Function Name : DMA_ClearFlag
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522 * Description : Clears the DMA
\92s pending flags.
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523 * Input : - DMA_FLAG: specifies the flag to clear. This parameter can
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524 * be any combination of the following values:
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525 * - DMA_FLAG_SI0: Stream0 transfer end flag.
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526 * - DMA_FLAG_SI1: Stream1 transfer end flag.
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527 * - DMA_FLAG_SI2: Stream2 transfer end flag.
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528 * - DMA_FLAG_SI3: Stream3 transfer end flag.
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529 * - DMA_FLAG_SE0: Stream0 transfer error flag.
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530 * - DMA_FLAG_SE1: Stream1 transfer error flag.
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531 * - DMA_FLAG_SE2: Stream2 transfer error flag.
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532 * - DMA_FLAG_SE3: Stream3 transfer error flag.
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535 *******************************************************************************/
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536 void DMA_ClearFlag(u16 DMA_FLAG)
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538 /* Clear the selected DMA flags */
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539 DMA->CLR = DMA_FLAG ;
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542 /*******************************************************************************
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543 * Function Name : DMA_GetITStatus
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544 * Description : Checks whether the specified DMA interrupt has occured or not.
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545 * Input : - DMA_IT: specifies the DMA interrupt source to check.
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546 * This parameter can be one of the following values:
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547 * - DMA_IT_SI0: Stream0 transfer end interrupt
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548 * - DMA_IT_SI1: Stream1 transfer end interrupt
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549 * - DMA_IT_SI2: Stream2 transfer end interrupt
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550 * - DMA_IT_SI3: Stream3 transfer end interrupt
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551 * - DMA_IT_SE0: Stream0 transfer error interrupt
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552 * - DMA_IT_SE1: Stream1 transfer error interrupt
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553 * - DMA_IT_SE2: Stream2 transfer error interrupt
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554 * - DMA_IT_SE3: Stream3 transfer error interrupt
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556 * Return : The new state of DMA_IT (SET or RESET).
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557 *******************************************************************************/
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558 ITStatus DMA_GetITStatus(u16 DMA_IT)
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560 /* Check the status of the specified DMA interrupt */
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561 if((DMA->STATUS & DMA_IT) != RESET)
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563 /* Return SET if the DMA interrupt flag is set */
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568 /* Return RESET if the DMA interrupt flag is reset */
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573 /*******************************************************************************
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574 * Function Name : DMA_ClearITPendingBit
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575 * Description : Clears the DMA
\92s interrupt pending bits.
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576 * Input : - DMA_IT: specifies the interrupt pending bit to clear.
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577 * This parameter can be any combination of the following values:
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578 * - DMA_IT_SI0: Stream0 transfer end interrupt.
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579 * - DMA_IT_SI1: Stream1 transfer end interrupt.
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580 * - DMA_IT_SI2: Stream2 transfer end interrupt.
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581 * - DMA_IT_SI3: Stream3 transfer end interrupt.
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582 * - DMA_IT_SE0: Stream0 transfer error interrupt.
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583 * - DMA_IT_SE1: Stream1 transfer error interrupt.
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584 * - DMA_IT_SE2: Stream2 transfer error interrupt.
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585 * - DMA_IT_SE3: Stream3 transfer error interrupt.
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586 * - DMA_IT_ALL: All DMA interrupts.
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589 *******************************************************************************/
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590 void DMA_ClearITPendingBit(u16 DMA_IT)
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592 /* Clear the selected DMA interrupts pending bits */
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593 DMA->CLR = DMA_IT ;
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596 /******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
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