2 This is the default Startup for STR75x devices for the GNU toolchain
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4 It has been designed by ST Microelectronics and modified by Raisonance.
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6 You can use it, modify it, distribute it freely but without any waranty.
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13 /*; Depending on Your Application, Disable or Enable the following Defines*/
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14 /*; --------------------------------------------------------------------------
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15 ; SMI Bank0 configuration
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16 ; ----------------------------------------------------------------------------*/
\r
17 .set SMI_Bank0_EN, 0 /*; enable access the SMI Bank0 if 1*/
\r
19 /*; ----------------------------------------------------------------------------
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21 ; ----------------------------------------------------------------------------*/
\r
22 .set Remap_SRAM, 0 /* remap SRAM at address 0x00 if 1 */
\r
24 /* ; ----------------------------------------------------------------------------
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25 ; EIC initialization
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26 ; ----------------------------------------------------------------------------*/
\r
27 .set EIC_INIT, 1 /*; Configure and Initialize EIC if 1*/
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30 ;/* the following are useful for initializing the .data section */
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31 .extern _sidata ;/* start address for the initialization values of the .data section. defined in linker script */
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32 .extern _sdata ;/* start address for the .data section. defined in linker script */
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33 .extern _edata ;/* end address for the .data section. defined in linker script */
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35 ;/* the following are useful for initializing the .bss section */
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36 .extern _sbss ;/* start address for the .bss section. defined in linker script */
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37 .extern _ebss ;/* end address for the .bss section. defined in linker script */
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39 ;/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
\r
40 .set Mode_USR, 0x10 ;/* User Mode */
\r
41 .set Mode_FIQ, 0x11 ;/* FIQ Mode */
\r
42 .set Mode_IRQ, 0x12 ;/* IRQ Mode */
\r
43 .set Mode_SVC, 0x13 ;/* Supervisor Mode */
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44 .set Mode_ABT, 0x17 ;/* Abort Mode */
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45 .set Mode_UNDEF, 0x1B ;/* Undefined Mode */
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46 .set Mode_SYS, 0x1F ;/* System Mode */
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48 .equ I_Bit, 0x80 ;/* when I bit is set, IRQ is disabled */
\r
49 .equ F_Bit, 0x40 ;/* when F bit is set, FIQ is disabled */
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51 /*; --- System memory locations */
\r
53 ;/* init value for the stack pointer. defined in linker script */
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56 ;/* Stack Sizes. The default values are in the linker script, but they can be overriden. */
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57 .extern _UND_Stack_Init
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58 .extern _SVC_Stack_Init
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59 .extern _ABT_Stack_Init
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60 .extern _FIQ_Stack_Init
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61 .extern _IRQ_Stack_Init
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62 .extern _USR_Stack_Init
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64 .extern _UND_Stack_Size
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65 .extern _SVC_Stack_Size
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66 .extern _ABT_Stack_Size
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67 .extern _FIQ_Stack_Size
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68 .extern _IRQ_Stack_Size
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69 .extern _USR_Stack_Size
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70 .extern vTaskSwitchContext
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71 .extern ulCriticalNesting
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73 SVC_Stack = _SVC_Stack_Init /*_estack*/ /*; 32 byte SVC stack at*/
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74 /*; top of memory */
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76 IRQ_Stack = _IRQ_Stack_Init /*SVC_Stack - 32*/ /*; followed by IRQ stack */
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77 USR_Stack = _USR_Stack_Init /*IRQ_Stack-256*/ /*; followed by USR stack */
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78 FIQ_Stack = _FIQ_Stack_Init /*USR_Stack-256*/ /*; followed by FIQ stack*/
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79 ABT_Stack = _ABT_Stack_Init /*FIQ_Stack-64*/ /*; followed by ABT stack */
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80 UNDEF_Stack = _UND_Stack_Init /*ABT_Stack-0*/ /*; followed by UNDEF stack */
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82 /*; --- System memory locations*/
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85 MRCC_PCLKEN_Addr = 0x60000030 /*; Peripheral Clock Enable register base address*/
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88 CFG_GLCONF_Addr = 0x60000010 /*; Global Configuration register base address*/
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89 SRAM_mask = 0x0002 /*; to remap RAM at 0x0*/
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92 GPIOREMAP0R_Addr = 0xFFFFE420
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93 SMI_EN_Mask = 0x00000001
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96 SMI_CR1_Addr = 0x90000000
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98 /*; --- Stack Addres for each ARM mode*/
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99 /*; add FIQ_Stack, ABT_Stack, UNDEF_Stack here if you need them*/
\r
102 /*; --- EIC Registers offsets*/
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103 EIC_base_addr = 0xFFFFF800 /*; EIC base address*/
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104 ICR_off_addr = 0x00 /*; Interrupt Control register offset*/
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105 CICR_off_addr = 0x04 /*; Current Interrupt Channel Register*/
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106 CIPR_off_addr = 0x08 /*; Current Interrupt Priority Register offset*/
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107 IVR_off_addr = 0x18 /*; Interrupt Vector Register offset*/
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108 FIR_off_addr = 0x1C /*; Fast Interrupt Register offset*/
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109 IER_off_addr = 0x20 /*; Interrupt Enable Register offset*/
\r
110 IPR_off_addr = 0x40 /*; Interrupt Pending Bit Register offset*/
\r
111 SIR0_off_addr = 0x60 /*; Source Interrupt Register 0*/
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113 /***************************************************************************************/
\r
123 LDR PC, Undefined_Addr
\r
125 LDR PC, Prefetch_Addr
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127 NOP /*; Reserved vector*/
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135 Reset_Addr : .long Reset_Handler
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136 Undefined_Addr : .long UndefinedHandler
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137 SWI_Addr : .long SWIHandler
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138 Prefetch_Addr : .long PrefetchAbortHandler
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139 Abort_Addr : .long DataAbortHandler
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140 .long 0 /*; Reserved vector*/
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141 IRQ_Addr : .long IRQHandler
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142 FIQ_Addr : .long FIQHandler
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145 /*;*******************************************************************************
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146 ; Peripherals IRQ handlers address table
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147 ;********************************************************************************/
\r
149 /* execution goes there when an interrupt occurs and there is no associated ISR */
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150 .globl __wrongvector
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152 ldr PC, __wrongvector_Addr
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153 __wrongvector_Addr:
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156 WAKUP_Addr :.long WAKUPIRQHandler
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157 TIM2_OC2_Addr :.long TIM2_OC2IRQHandler
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158 TIM2_OC1_Addr :.long TIM2_OC1IRQHandler
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159 TIM2_IC12_Addr :.long TIM2_IC12IRQHandler
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160 TIM2_UP_Addr :.long TIM2_UPIRQHandler
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161 TIM1_OC2_Addr :.long TIM1_OC2IRQHandler
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162 TIM1_OC1_Addr :.long TIM1_OC1IRQHandler
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163 TIM1_IC12_Addr :.long TIM1_IC12IRQHandler
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164 TIM1_UP_Addr :.long TIM1_UPIRQHandler
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165 TIM0_OC2_Addr :.long TIM0_OC2IRQHandler
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166 TIM0_OC1_Addr :.long TIM0_OC1IRQHandler
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167 TIM0_IC12_Addr :.long TIM0_IC12IRQHandler
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168 TIM0_UP_Addr :.long TIM0_UPIRQHandler
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169 PWM_OC123_Addr :.long PWM_OC123IRQHandler
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170 PWM_EM_Addr :.long PWM_EMIRQHandler
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171 PWM_UP_Addr :.long PWM_UPIRQHandler
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172 I2C_Addr :.long I2CIRQHandler
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173 SSP1_Addr :.long SSP1IRQHandler
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174 SSP0_Addr :.long SSP0IRQHandler
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175 UART2_Addr :.long UART2IRQHandler
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176 UART1_Addr :.long UART1IRQHandler
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177 UART0_Addr :.long vSerialISR
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178 CAN_Addr :.long CANIRQHandler
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179 USB_LP_Addr :.long USB_LPIRQHandler
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180 USB_HP_Addr :.long USB_HPIRQHandler
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181 ADC_Addr :.long ADCIRQHandler
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182 DMA_Addr :.long DMAIRQHandler
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183 EXTIT_Addr :.long EXTITIRQHandler
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184 MRCC_Addr :.long MRCCIRQHandler
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185 FLASHSMI_Addr :.long FLASHSMIIRQHandler
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186 RTC_Addr :.long RTCIRQHandler
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187 TB_Addr :.long vPortTickISR
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189 /*;*******************************************************************************
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190 ; Exception Handlers
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191 ;********************************************************************************/
\r
194 /*;*******************************************************************************
\r
195 ;* FreeRTOS.org macros for saving and restoring a task context
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196 ;*******************************************************************************/
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198 .macro portSAVE_CONTEXT MACRO
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200 /* ; Push R0 as we are going to use the register. */
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203 /* ; Set R0 to point to the task stack pointer. */
\r
209 /* ; Push the return address onto the stack. */
\r
212 /* ; Now we have saved LR we can use it instead of R0. */
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215 /* ; Pop R0 so we can save it onto the system mode stack. */
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218 /* ; Push all the system mode registers onto the task stack. */
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223 /* ; Push the SPSR onto the task stack. */
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227 LDR R0, =ulCriticalNesting
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231 /* ; Store the new top of stack for the task. */
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232 LDR R1, =pxCurrentTCB
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239 .macro portRESTORE_CONTEXT MACRO
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241 /* ; Set the LR to the task stack. */
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242 LDR R1, =pxCurrentTCB
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246 /* ; The critical nesting depth is the first item on the stack.
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247 ; Load it into the ulCriticalNesting variable. */
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248 LDR R0, =ulCriticalNesting
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252 /* ; Get the SPSR from the stack. */
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256 /* ; Restore all system mode registers for the task. */
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257 LDMFD LR, {R0-R14}^
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260 /* ; Restore the return address. */
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263 /* ; And return - correcting the offset in the LR to obtain the
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264 ; correct address. */
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271 /*;*******************************************************************************
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272 ;* Macro Name : SaveContext
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273 ;* Description : This macro used to save the context before entering
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274 ; an exception handler.
\r
275 ;* Input : The range of registers to store.
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277 ;********************************************************************************/
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279 .macro SaveContext $r0,$r12
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280 STMFD sp!,{r0-r12,lr} /*; Save The workspace plus the current return*/
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281 /*; address lr_ mode into the stack.*/
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282 MRS r1,spsr /*; Save the spsr_mode into r1.*/
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283 STMFD sp!,{r1} /*; Save spsr.*/
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286 /*;*******************************************************************************
\r
287 ;* Macro Name : RestoreContext
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288 ;* Description : This macro used to restore the context to return from
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289 ; an exception handler and continue the program execution.
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290 ;* Input : The range of registers to restore.
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292 ;********************************************************************************/
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294 .macro RestoreContext $r0,$r12
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295 LDMFD sp!,{r1} /*; Restore the saved spsr_mode into r1.*/
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296 MSR spsr_cxsf,r1 /*; Restore spsr_mode.*/
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297 LDMFD sp!,{r0-r12,pc}^/*; Return to the instruction following...*/
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298 /*; ...the exception interrupt.*/
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303 /*;*******************************************************************************
\r
304 ;* Function Name : UndefinedHandler
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305 ;* Description : This function called when undefined instruction
\r
306 ; exception is entered.
\r
309 ;*********************************************************************************/
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312 SaveContext r0,r12 /*; Save the workspace plus the current*/
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313 /*; return address lr_ und and spsr_und.*/
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314 BL Undefined_Handler/*; Branch to Undefined_Handler*/
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315 RestoreContext r0,r12 /*; Return to the instruction following...*/
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316 /*; ...the undefined instruction.*/
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318 /*;*******************************************************************************
\r
319 ;* Function Name : SWIHandler
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320 ;* Description : This function called when SWI instruction executed.
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323 ;********************************************************************************/
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328 LDR R0, =vTaskSwitchContext
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331 portRESTORE_CONTEXT
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334 /*;*******************************************************************************
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335 ;* Function Name : IRQHandler
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336 ;* Description : This function called when IRQ exception is entered.
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339 ;********************************************************************************/
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344 portSAVE_CONTEXT /*; Save the context of the current task. */
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346 LDR r0, =EIC_base_addr
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347 LDR r1, =IVR_off_addr
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348 LDR lr, =ReturnAddress /*; Load the return address. */
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349 ADD pc,r0,r1 /*; Branch to the IRQ handler. */
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351 LDR r0, =EIC_base_addr
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352 LDR r2, [r0, #CICR_off_addr] /*; Get the IRQ channel number. */
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355 STR r3,[r0, #IPR_off_addr] /*; Clear the corresponding IPR bit. */
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357 portRESTORE_CONTEXT /*; Restore the context of the selected task. */
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359 /*;*******************************************************************************
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360 ;* Function Name : PrefetchAbortHandler
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361 ;* Description : This function called when Prefetch Abort
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362 ; exception is entered.
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365 ;*********************************************************************************/
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367 PrefetchAbortHandler:
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369 B PrefetchAbortHandler
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371 /*;*******************************************************************************
\r
372 ;* Function Name : DataAbortHandler
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373 ;* Description : This function is called when Data Abort
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374 ; exception is entered.
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377 ;********************************************************************************/
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383 /*; ...has generated the data abort exception.*/
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385 /*;*******************************************************************************
\r
386 ;* Function Name : FIQHandler
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387 ;* Description : This function is called when FIQ
\r
388 ;* exception is entered.
\r
391 ;********************************************************************************/
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394 SUB lr,lr,#4 /*; Update the link register.*/
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395 SaveContext r0,r7 /*; Save the workspace plus the current*/
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396 /*; return address lr_ fiq and spsr_fiq.*/
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397 BL FIQ_Handler /*; Branch to FIQ_Handler.*/
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398 RestoreContext r0,r7 /*; Restore the context and return to the...*/
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399 /*; ...program execution.*/
\r
401 /*;*******************************************************************************
\r
402 ;* Macro Name : IRQ_to_SYS
\r
403 ;* Description : This macro used to switch form IRQ mode to SYS mode
\r
406 ;*******************************************************************************/
\r
412 /*;*******************************************************************************
\r
413 ;* Macro Name : SYS_to_IRQ
\r
414 ;* Description : This macro used to switch from SYS mode to IRQ mode
\r
415 ; then to return to IRQHnadler routine.
\r
418 ;*******************************************************************************/
\r
420 LDMFD sp!,{lr} /*; Restore the link register. */
\r
421 MSR cpsr_c,#0xD2 /*; Switch to IRQ mode.*/
\r
422 MOV pc,lr /*; Return to IRQHandler routine to clear the*/
\r
426 /*;*******************************************************************************
\r
427 ;* Function Name : WAKUPIRQHandler
\r
428 ;* Description : This function used to switch to SYS mode before entering
\r
429 ;* the WAKUP_IRQHandler function located in 75x_it.c.
\r
430 ;* Then to return to IRQ mode after the
\r
431 ;* WAKUP_IRQHandler function termination.
\r
434 ;*******************************************************************************/
\r
437 BL WAKUP_IRQHandler
\r
440 /*;*******************************************************************************
\r
441 ;* Function Name : TIM2_OC2IRQHandler
\r
442 ;* Description : This function used to switch to SYS mode before entering
\r
443 ;* the TIM3_OC2_IRQHandler function located in 75x_it.c.
\r
444 ;* Then to return to IRQ mode after the
\r
445 ;* TIM2_OC2_IRQHandler function termination.
\r
448 ;*******************************************************************************/
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449 TIM2_OC2IRQHandler:
\r
451 BL TIM2_OC2_IRQHandler
\r
454 /*;*******************************************************************************
\r
455 ;* Function Name : TIM2_OC1IRQHandler
\r
456 ;* Description : This function used to switch to SYS mode before entering
\r
457 ;* the TIM2_OC1_IRQHandler function located in 75x_it.c.
\r
458 ;* Then to return to IRQ mode after the
\r
459 ;* TIM2_OC1_IRQHandler function termination.
\r
462 ;*******************************************************************************/
\r
463 TIM2_OC1IRQHandler:
\r
465 BL TIM2_OC1_IRQHandler
\r
468 /*;*******************************************************************************
\r
469 ;* Function Name : TIM2_IC12IRQHandler
\r
470 ;* Description : This function used to switch to SYS mode before entering
\r
471 ;* the TIM2_IC12_IRQHandler function located in 75x_it.c.
\r
472 ;* Then to return to IRQ mode after the
\r
473 ;* TIM2_IC12_IRQHandler function termination.
\r
476 ;*******************************************************************************/
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477 TIM2_IC12IRQHandler:
\r
479 BL TIM2_IC12_IRQHandler
\r
482 /*;*******************************************************************************
\r
483 ;* Function Name : TIM2_UPIRQHandler
\r
484 ;* Description : This function used to switch to SYS mode before entering
\r
485 ;* the TIM2_UP_IRQHandler function located in 75x_it.c.
\r
486 ;* Then to return to IRQ mode after the
\r
487 ;* TIM3_UP_IRQHandler function termination.
\r
490 ;*******************************************************************************/
\r
493 BL TIM2_UP_IRQHandler
\r
496 /*;*******************************************************************************
\r
497 ;* Function Name : TIM1_OC2IRQHandler
\r
498 ;* Description : This function used to switch to SYS mode before entering
\r
499 ;* the TIM1_OC2_IRQHandler function located in 75x_it.c.
\r
500 ;* Then to return to IRQ mode after the
\r
501 ;* TIM1_OC2_IRQHandler function termination.
\r
504 ;*******************************************************************************/
\r
505 TIM1_OC2IRQHandler:
\r
507 BL TIM1_OC2_IRQHandler
\r
510 /*;*******************************************************************************
\r
511 ;* Function Name : TIM1_OC1IRQHandler
\r
512 ;* Description : This function used to switch to SYS mode before entering
\r
513 ;* the TIM1_OC1_IRQHandler function located in 75x_it.c.
\r
514 ;* Then to return to IRQ mode after the
\r
515 ;* TIM1_OC1_IRQHandler function termination.
\r
518 ;*******************************************************************************/
\r
519 TIM1_OC1IRQHandler:
\r
521 BL TIM1_OC1_IRQHandler
\r
524 /*;*******************************************************************************
\r
525 ;* Function Name : TIM1_IC12IRQHandler
\r
526 ;* Description : This function used to switch to SYS mode before entering
\r
527 ;* the TIM1_IC12_IRQHandler function located in 75x_it.c.
\r
528 ;* Then to return to IRQ mode after the
\r
529 ;* TIM1_IC12_IRQHandler function termination.
\r
532 ;*******************************************************************************/
\r
533 TIM1_IC12IRQHandler:
\r
535 BL TIM1_IC12_IRQHandler
\r
538 /*;*******************************************************************************
\r
539 ;* Function Name : TIM1_UPIRQHandler
\r
540 ;* Description : This function used to switch to SYS mode before entering
\r
541 ;* the TIM1_UP_IRQHandler function located in 75x_it.c.
\r
542 ;* Then to return to IRQ mode after the
\r
543 ;* TIM1_UP_IRQHandler function termination.
\r
546 ;*******************************************************************************/
\r
549 BL TIM1_UP_IRQHandler
\r
552 /*;*******************************************************************************
\r
553 ;* Function Name : TIM0_OC2IRQHandler
\r
554 ;* Description : This function used to switch to SYS mode before entering
\r
555 ;* the TIM0_OC2_IRQHandler function located in 75x_it.c.
\r
556 ;* Then to return to IRQ mode after the
\r
557 ;* TIM0_OC2_IRQHandler function termination.
\r
560 ;*******************************************************************************/
\r
561 TIM0_OC2IRQHandler:
\r
563 BL TIM0_OC2_IRQHandler
\r
566 /*;*******************************************************************************
\r
567 ;* Function Name : TIM0_OC1IRQHandler
\r
568 ;* Description : This function used to switch to SYS mode before entering
\r
569 ;* the TIM0_OC1_IRQHandler function located in 75x_it.c.
\r
570 ;* Then to return to IRQ mode after the
\r
571 ;* TIM0_OC1_IRQHandler function termination.
\r
574 ;*******************************************************************************/
\r
575 TIM0_OC1IRQHandler:
\r
577 BL TIM0_OC1_IRQHandler
\r
580 /*;*******************************************************************************
\r
581 ;* Function Name : TIM0_IC12IRQHandler
\r
582 ;* Description : This function used to switch to SYS mode before entering
\r
583 ;* the TIM0_IC12_IRQHandler function located in 75x_it.c.
\r
584 ;* Then to return to IRQ mode after the
\r
585 ;* TIM0_IC12_IRQHandler function termination.
\r
588 ;********************************************************************************/
\r
589 TIM0_IC12IRQHandler:
\r
591 BL TIM0_IC12_IRQHandler
\r
594 /*;*******************************************************************************
\r
595 ;* Function Name : TIM0_UPIRQHandler
\r
596 ;* Description : This function used to switch to SYS mode before entering
\r
597 ;* the TIM0_UP_IRQHandler function located in 75x_it.c.
\r
598 ;* Then to return to IRQ mode after the
\r
599 ;* TIM0_UP_IRQHandler function termination.
\r
602 ;********************************************************************************/
\r
605 BL TIM0_UP_IRQHandler
\r
608 /*;*******************************************************************************
\r
609 ;* Function Name : PWM_OC123IRQHandler
\r
610 ;* Description : This function used to switch to SYS mode before entering
\r
611 ;* the PWM_OC123_IRQHandler function located in 75x_it.c.
\r
612 ;* Then to return to IRQ mode after the
\r
613 ;* PWM_OC123_IRQHandler function termination.
\r
616 ;********************************************************************************/
\r
617 PWM_OC123IRQHandler:
\r
619 BL PWM_OC123_IRQHandler
\r
622 /*;*******************************************************************************
\r
623 ;* Function Name : PWM_EMIRQHandler
\r
624 ;* Description : This function used to switch to SYS mode before entering
\r
625 ;* the PWM_EM_IRQHandler function located in 75x_it.c.
\r
626 ;* Then to return to IRQ mode after the
\r
627 ;* PWM_EM_IRQHandler function termination.
\r
630 ;*******************************************************************************/
\r
633 BL PWM_EM_IRQHandler
\r
636 /*;*******************************************************************************
\r
637 ;* Function Name : PWM_UPIRQHandler
\r
638 ;* Description : This function used to switch to SYS mode before entering
\r
639 ;* the PWM_UP_IRQHandler function located in 75x_it.c.
\r
640 ;* Then to return to IRQ mode after the
\r
641 ;* PWM_UP_IRQHandler function termination.
\r
644 ;*******************************************************************************/
\r
647 BL PWM_UP_IRQHandler
\r
650 /*;*******************************************************************************
\r
651 ;* Function Name : I2CIRQHandler
\r
652 ;* Description : This function used to switch to SYS mode before entering
\r
653 ;* the I2C_IRQHandler function located in 75x_it.c.
\r
654 ;* Then to return to IRQ mode after the
\r
655 ;* I2C_IRQHandler function termination.
\r
658 ;*******************************************************************************/
\r
664 /*;*******************************************************************************
\r
665 ;* Function Name : SSP1IRQHandler
\r
666 ;* Description : This function used to switch to SYS mode before entering
\r
667 ;* the SSP1_IRQHandler function located in 75x_it.c.
\r
668 ;* Then to return to IRQ mode after the
\r
669 ;* SSP1_IRQHandler function termination.
\r
672 ;*******************************************************************************/
\r
678 /*;*******************************************************************************
\r
679 ;* Function Name : SSP0IRQHandler
\r
680 ;* Description : This function used to switch to SYS mode before entering
\r
681 ;* the SSP0_IRQHandler function located in 75x_it.c.
\r
682 ;* Then to return to IRQ mode after the
\r
683 ;* SSP0_IRQHandler function termination.
\r
686 ;*******************************************************************************/
\r
692 /*;*******************************************************************************
\r
693 ;* Function Name : UART2IRQHandler
\r
694 ;* Description : This function used to switch to SYS mode before entering
\r
695 ;* the UART2_IRQHandler function located in 75x_it.c.
\r
696 ;* Then to return to IRQ mode after the
\r
697 ;* UART2_IRQHandler function termination.
\r
700 ;*******************************************************************************/
\r
703 BL UART2_IRQHandler
\r
706 /*;*******************************************************************************
\r
707 ;* Function Name : UART1IRQHandler
\r
708 ;* Description : This function used to switch to SYS mode before entering
\r
709 ;* the UART1_IRQHandler function located in 75x_it.c.
\r
710 ;* Then to return to IRQ mode after the
\r
711 ;* UART1_IRQHandler function termination.
\r
714 ;*******************************************************************************/
\r
717 BL UART1_IRQHandler
\r
720 /*;*******************************************************************************
\r
721 ;* Function Name : UART0IRQHandler
\r
722 ;* Description : This function used to switch to SYS mode before entering
\r
723 ;* the UART0_IRQHandler function located in 75x_it.c.
\r
724 ;* Then to return to IRQ mode after the
\r
725 ;* UART0_IRQHandler function termination.
\r
728 ;********************************************************************************/
\r
731 BL UART0_IRQHandler
\r
734 /*;*******************************************************************************
\r
735 ;* Function Name : CANIRQHandler
\r
736 ;* Description : This function used to switch to SYS mode before entering
\r
737 ;* the CAN_IRQHandler function located in 75x_it.c.
\r
738 ;* Then to return to IRQ mode after the
\r
739 ;* CAN_IRQHandler function termination.
\r
742 ;********************************************************************************/
\r
748 /*;*******************************************************************************
\r
749 ;* Function Name : USB_LPIRQHandler
\r
750 ;* Description : This function used to switch to SYS mode before entering
\r
751 ;* the USB_LP_IRQHandler function located in 75x_it.c.
\r
752 ;* Then to return to IRQ mode after the
\r
753 ;* USB_LP_IRQHandler function termination.
\r
756 ;********************************************************************************/
\r
759 BL USB_LP_IRQHandler
\r
762 /*;*******************************************************************************
\r
763 ;* Function Name : USB_HPIRQHandler
\r
764 ;* Description : This function used to switch to SYS mode before entering
\r
765 ;* the USB_HP_IRQHandler function located in 75x_it.c.
\r
766 ;* Then to return to IRQ mode after the
\r
767 ;* USB_HP_IRQHandler function termination.
\r
770 ;********************************************************************************/
\r
773 BL USB_HP_IRQHandler
\r
776 /*;*******************************************************************************
\r
777 ;* Function Name : ADCIRQHandler
\r
778 ;* Description : This function used to switch to SYS mode before entering
\r
779 ;* the ADC_IRQHandler function located in 75x_it.c.
\r
780 ;* Then to return to IRQ mode after the
\r
781 ;* ADC_IRQHandler function termination.
\r
784 ;********************************************************************************/
\r
790 /*;*******************************************************************************
\r
791 ;* Function Name : DMAIRQHandler
\r
792 ;* Description : This function used to switch to SYS mode before entering
\r
793 ;* the DMA_IRQHandler function located in 75x_it.c.
\r
794 ;* Then to return to IRQ mode after the
\r
795 ;* DMA_IRQHandler function termination.
\r
798 ;********************************************************************************/
\r
804 /*;*******************************************************************************
\r
805 ;* Function Name : EXTITIRQHandler
\r
806 ;* Description : This function used to switch to SYS mode before entering
\r
807 ;* the EXTIT_IRQHandler function located in 75x_it.c.
\r
808 ;* Then to return to IRQ mode after the
\r
809 ;* EXTIT_IRQHandler function termination.
\r
812 ;********************************************************************************/
\r
815 BL EXTIT_IRQHandler
\r
818 /*;*******************************************************************************
\r
819 ;* Function Name : MRCCIRQHandler
\r
820 ;* Description : This function used to switch to SYS mode before entering
\r
821 ;* the MRCC_IRQHandler function located in 75x_it.c.
\r
822 ;* Then to return to IRQ mode after the
\r
823 ;* MRCC_IRQHandler function termination.
\r
826 ;********************************************************************************/
\r
832 /*;*******************************************************************************
\r
833 ;* Function Name : FLASHSMIIRQHandler
\r
834 ;* Description : This function used to switch to SYS mode before entering
\r
835 ;* the FLASHSMI_IRQHandler function located in 75x_it.c.
\r
836 ;* Then to return to IRQ mode after the
\r
837 ;* FLASHSMI_IRQHandler function termination.
\r
840 ;********************************************************************************/
\r
841 FLASHSMIIRQHandler:
\r
843 BL FLASHSMI_IRQHandler
\r
846 /*;*******************************************************************************
\r
847 ;* Function Name : RTCIRQHandler
\r
848 ;* Description : This function used to switch to SYS mode before entering
\r
849 ;* the RTC_IRQHandler function located in 75x_it.c.
\r
850 ;* Then to return to IRQ mode after the
\r
851 ;* RTC_IRQHandler function termination.
\r
854 ;********************************************************************************/
\r
860 /*;*******************************************************************************
\r
861 ;* Function Name : TBIRQHandler
\r
862 ;* Description : This function used to switch to SYS mode before entering
\r
863 ;* the TB_IRQHandler function located in 75x_it.c.
\r
864 ;* Then to return to IRQ mode after the
\r
865 ;* TB_IRQHandler function termination.
\r
868 ;********************************************************************************/
\r
873 /*;**********************************************************************************/
\r
879 /*; Reset all Peripheral Clocks*/
\r
880 /*; This is usefull only when using debugger to Reset\Run the application*/
\r
883 LDR r0, =0x01000000 /*; Disable peripherals clock (except GPIO)*/
\r
885 LDR r0, =0x00000000 /*; Disable peripherals clock*/
\r
887 LDR r1, =MRCC_PCLKEN_Addr
\r
891 LDR r0, =0x1875623F /*; Peripherals kept under reset (except GPIO)*/
\r
893 LDR r0, =0x1975623F /*; Peripherals kept under reset*/
\r
902 STR r0, [r1,#4] /*; Disable peripherals reset*/
\r
904 /*; Initialize stack pointer registers
\r
905 ; Enter each mode in turn and set up the stack pointer*/
\r
909 MSR CPSR_c, #Mode_FIQ|I_Bit|F_Bit /*; No interrupts*/
\r
912 MSR CPSR_c, #Mode_IRQ|I_Bit|F_Bit /*; No interrupts*/
\r
915 MSR CPSR_c, #Mode_ABT|I_Bit|F_Bit /*; No interrupts*/
\r
918 MSR CPSR_c, #Mode_UNDEF|I_Bit|F_Bit /*; No interrupts*/
\r
919 ldr sp, =UNDEF_Stack
\r
921 MSR CPSR_c, #Mode_SVC|I_Bit|F_Bit /*; No interrupts*/
\r
924 /*; ------------------------------------------------------------------------------
\r
925 ; Description : Enable SMI Bank0: enable GPIOs clock in MRCC_PCLKEN register,
\r
926 ; enable SMI alternate function in GPIO_REMAP register and enable
\r
927 ; Bank0 in SMI_CR1 register.
\r
928 ; ------------------------------------------------------------------------------*/
\r
930 MOV r0, #0x01000000
\r
931 LDR r1, =MRCC_PCLKEN_Addr
\r
932 STR r0, [r1] /*; Enable GPIOs clock*/
\r
934 LDR r1, =GPIOREMAP0R_Addr
\r
935 MOV r0, #SMI_EN_Mask
\r
938 STR r2, [r1] /*; Enable SMI alternate function */
\r
940 LDR r0, =0x251 /*; SMI Bank0 enabled, Prescaler = 2, Deselect Time = 5*/
\r
941 LDR r1, =SMI_CR1_Addr
\r
942 STR r0, [r1] /*; Configure CR1 register */
\r
944 STR r0, [r1,#4] /*; Reset CR2 register */
\r
947 /*; ----------------------------------------------------------------------------
\r
948 ; Description : Remapping SRAM at address 0x00 after the application has
\r
949 ; started executing.
\r
950 ; ----------------------------------------------------------------------------*/
\r
953 LDR r1, =CFG_GLCONF_Addr
\r
954 LDR r2, [r1] /*; Read GLCONF Register*/
\r
955 BIC r2, r2, #0x03 /*; Reset the SW_BOOT bits*/
\r
956 ORR r2, r2, r0 /*; Change the SW_BOOT bits*/
\r
957 STR r2, [r1] /*; Write GLCONF Register*/
\r
960 /*;-------------------------------------------------------------------------------
\r
961 ;Description : Initialize the EIC as following :
\r
964 ; - IVR contains the load PC opcode
\r
965 ; - All channels are disabled
\r
966 ; - All channels priority equal to 0
\r
967 ; - All SIR registers contains offset to the related IRQ table entry
\r
968 ;-------------------------------------------------------------------------------*/
\r
970 LDR r3, =EIC_base_addr
\r
971 LDR r4, =0x00000000
\r
972 STR r4, [r3, #ICR_off_addr] /*; Disable FIQ and IRQ*/
\r
973 STR r4, [r3, #IER_off_addr] /*; Disable all interrupts channels*/
\r
975 LDR r4, =0xFFFFFFFF
\r
976 STR r4, [r3, #IPR_off_addr] /*; Clear all IRQ pending bits*/
\r
979 STR r4, [r3, #FIR_off_addr] /*; Disable FIQ channels and clear FIQ pending bits*/
\r
981 LDR r4, =0x00000000
\r
982 STR r4, [r3, #CIPR_off_addr] /*; Reset the current priority register*/
\r
984 LDR r4, =0xE59F0000 /*; Write the LDR pc,pc,#offset..*/
\r
985 STR r4, [r3, #IVR_off_addr] /*; ..instruction code in IVR[31:16]*/
\r
988 LDR r2,= 32 /*; 32 Channel to initialize*/
\r
989 LDR r0, =WAKUP_Addr /*; Read the address of the IRQs address table*/
\r
990 LDR r1, =0x00000FFF
\r
992 LDR r5,=SIR0_off_addr /*; Read SIR0 address*/
\r
993 SUB r4,r0,#8 /*; subtract 8 for prefetch*/
\r
994 LDR r1, =0xF7E8 /*; add the offset to the 0x00 address..*/
\r
995 /*; ..(IVR address + 7E8 = 0x00)*/
\r
996 /*; 0xF7E8 used to complete the LDR pc,offset opcode*/
\r
997 ADD r1,r4,r1 /*; compute the jump offset*/
\r
999 MOV r4, r1, LSL #16 /*; Left shift the result*/
\r
1000 STR r4, [r3, r5] /*; Store the result in SIRx register*/
\r
1001 ADD r1, r1, #4 /*; Next IRQ address*/
\r
1002 ADD r5, r5, #4 /*; Next SIR*/
\r
1003 SUBS r2, r2, #1 /*; Decrement the number of SIR registers to initialize*/
\r
1004 BNE EIC_INI /*; If more then continue*/
\r
1012 /* ;copy the initial values for .data section from FLASH to RAM */
\r
1016 _reset_inidata_loop:
\r
1018 ldrlO R0, [R1], #4
\r
1019 strlO R0, [R2], #4
\r
1020 blO _reset_inidata_loop
\r
1022 ;/* Clear the .bss section */
\r
1023 mov r0,#0 ;/* get a zero */
\r
1024 ldr r1,=_sbss ;/* point to bss start */
\r
1025 ldr r2,=_ebss ;/* point to bss end */
\r
1026 _reset_inibss_loop:
\r
1027 cmp r1,r2 ;/* check if some data remains to clear */
\r
1028 strlo r0,[r1],#4 ;/* clear 4 bytes */
\r
1029 blo _reset_inibss_loop ;/* loop until done */
\r
1031 /************************************************************************************************/
\r
1033 /*; --- Now enter the C code */
\r
1034 B main /*; Note : use B not BL, because an application will*/
\r
1035 /*; never return this way*/
\r