2 FreeRTOS V5.4.0 - Copyright (C) 2003-2009 Richard Barry.
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4 This file is part of the FreeRTOS distribution.
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6 FreeRTOS is free software; you can redistribute it and/or modify it under
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7 the terms of the GNU General Public License (version 2) as published by the
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8 Free Software Foundation and modified by the FreeRTOS exception.
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9 **NOTE** The exception to the GPL is included to allow you to distribute a
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10 combined work that includes FreeRTOS without being obliged to provide the
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11 source code for proprietary components outside of the FreeRTOS kernel.
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12 Alternative commercial license and support terms are also available upon
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13 request. See the licensing section of http://www.FreeRTOS.org for full
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16 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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18 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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21 You should have received a copy of the GNU General Public License along
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22 with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
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23 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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26 ***************************************************************************
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28 * Looking for a quick start? Then check out the FreeRTOS eBook! *
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29 * See http://www.FreeRTOS.org/Documentation for details *
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31 ***************************************************************************
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35 Please ensure to read the configuration and relevant port sections of the
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36 online documentation.
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38 http://www.FreeRTOS.org - Documentation, latest information, license and
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41 http://www.SafeRTOS.com - A version that is certified for use in safety
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44 http://www.OpenRTOS.com - Commercial support, development, porting,
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45 licensing and training services.
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49 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART1.
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52 /* Library includes. */
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53 #include "91x_lib.h"
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55 /* Scheduler includes. */
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56 #include "FreeRTOS.h"
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60 /* Demo application includes. */
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62 /*-----------------------------------------------------------*/
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65 #define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
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66 #define serNO_BLOCK ( ( portTickType ) 0 )
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67 #define serTX_BLOCK_TIME ( 40 / portTICK_RATE_MS )
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69 /* Interrupt and status bit definitions. */
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70 #define mainTXRIS 0x20
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71 #define mainRXRIS 0x50
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72 #define serTX_FIFO_FULL 0x20
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73 #define serCLEAR_ALL_INTERRUPTS 0x3ff
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74 /*-----------------------------------------------------------*/
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76 /* The queue used to hold received characters. */
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77 static xQueueHandle xRxedChars;
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79 /* The semaphore used to wake a task waiting for space to become available
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81 static xSemaphoreHandle xTxFIFOSemaphore;
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83 /*-----------------------------------------------------------*/
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85 /* UART interrupt handler. */
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86 void UART1_IRQHandler( void );
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88 /* The interrupt service routine - called from the assembly entry point. */
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89 __arm void UART1_IRQHandler( void );
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91 /*-----------------------------------------------------------*/
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93 /* Flag to indicate whether or not a task is blocked waiting for space on
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95 static portLONG lTaskWaiting = pdFALSE;
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98 * See the serial2.h header file.
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100 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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102 xComPortHandle xReturn;
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103 UART_InitTypeDef xUART1_Init;
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104 GPIO_InitTypeDef GPIO_InitStructure;
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106 /* Create the queues used to hold Rx characters. */
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107 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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109 /* Create the semaphore used to wake a task waiting for space to become
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110 available in the FIFO. */
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111 vSemaphoreCreateBinary( xTxFIFOSemaphore );
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113 /* If the queue/semaphore was created correctly then setup the serial port
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115 if( ( xRxedChars != serINVALID_QUEUE ) && ( xTxFIFOSemaphore != serINVALID_QUEUE ) )
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117 /* Pre take the semaphore so a task will block if it tries to access
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119 xSemaphoreTake( xTxFIFOSemaphore, 0 );
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121 /* Configure the UART. */
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122 xUART1_Init.UART_WordLength = UART_WordLength_8D;
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123 xUART1_Init.UART_StopBits = UART_StopBits_1;
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124 xUART1_Init.UART_Parity = UART_Parity_No;
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125 xUART1_Init.UART_BaudRate = ulWantedBaud;
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126 xUART1_Init.UART_HardwareFlowControl = UART_HardwareFlowControl_None;
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127 xUART1_Init.UART_Mode = UART_Mode_Tx_Rx;
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128 xUART1_Init.UART_FIFO = UART_FIFO_Enable;
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130 /* Enable the UART1 Clock */
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131 SCU_APBPeriphClockConfig( __UART1, ENABLE );
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133 /* Enable the GPIO3 Clock */
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134 SCU_APBPeriphClockConfig( __GPIO3, ENABLE );
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136 /* Configure UART1_Rx pin GPIO3.2 */
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137 GPIO_InitStructure.GPIO_Direction = GPIO_PinInput;
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138 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
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139 GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
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140 GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
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141 GPIO_InitStructure.GPIO_Alternate = GPIO_InputAlt1 ;
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142 GPIO_Init( GPIO3, &GPIO_InitStructure );
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144 /* Configure UART1_Tx pin GPIO3.3 */
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145 GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;
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146 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
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147 GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
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148 GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
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149 GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ;
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150 GPIO_Init( GPIO3, &GPIO_InitStructure );
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153 portENTER_CRITICAL();
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155 /* Configure the UART itself. */
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156 UART_DeInit( UART1 );
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157 UART_Init( UART1, &xUART1_Init );
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158 UART_ITConfig( UART1, UART_IT_Receive | UART_IT_Transmit, ENABLE );
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159 UART1->ICR = serCLEAR_ALL_INTERRUPTS;
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160 UART_LoopBackConfig( UART1, DISABLE );
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161 UART_IrDACmd( IrDA1, DISABLE );
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163 /* Configure the VIC for the UART interrupts. */
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164 VIC_Config( UART1_ITLine, VIC_IRQ, 9 );
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165 VIC_ITCmd( UART1_ITLine, ENABLE );
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167 UART_Cmd( UART1, ENABLE );
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168 lTaskWaiting = pdFALSE;
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170 portEXIT_CRITICAL();
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174 xReturn = ( xComPortHandle ) 0;
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177 /* This demo file only supports a single port but we have to return
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178 something to comply with the standard demo header file. */
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181 /*-----------------------------------------------------------*/
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183 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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185 /* The port handle is not required as this driver only supports one port. */
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188 /* Get the next character from the buffer. Return false if no characters
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189 are available, or arrive before xBlockTime expires. */
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190 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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199 /*-----------------------------------------------------------*/
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201 void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
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203 signed portCHAR *pxNext;
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205 /* A couple of parameters that this port does not use. */
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206 ( void ) usStringLength;
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209 /* NOTE: This implementation does not handle the queue being full as no
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210 block time is used! */
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212 /* The port handle is not required as this driver only supports UART1. */
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215 /* Send each character in the string, one at a time. */
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216 pxNext = ( signed portCHAR * ) pcString;
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219 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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223 /*-----------------------------------------------------------*/
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225 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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227 portBASE_TYPE xReturn;
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229 portENTER_CRITICAL();
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231 /* Can we write to the FIFO? */
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232 if( UART1->FR & serTX_FIFO_FULL )
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234 /* Wait for the interrupt letting us know there is space on the
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235 FIFO. It is ok to block in a critical section, interrupts will be
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236 enabled for other tasks once we force a switch. */
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237 lTaskWaiting = pdTRUE;
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239 /* Just to be a bit different this driver uses a semaphore to
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240 block the sending task when the FIFO is full. The standard COMTest
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241 task assumes a queue of adequate length exists so does not use
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242 a block time. For this demo the block time is therefore hard
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244 xReturn = xSemaphoreTake( xTxFIFOSemaphore, serTX_BLOCK_TIME );
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247 UART1->DR = cOutChar;
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252 UART1->DR = cOutChar;
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256 portEXIT_CRITICAL();
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260 /*-----------------------------------------------------------*/
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262 void vSerialClose( xComPortHandle xPort )
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264 /* Not supported as not required by the demo application. */
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266 /*-----------------------------------------------------------*/
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268 void UART1_IRQHandler( void )
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270 signed portCHAR cChar;
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271 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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273 while( UART1->RIS & mainRXRIS )
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275 /* The interrupt was caused by a character being received. Grab the
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276 character from the DR and place it in the queue of received
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279 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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282 if( UART1->RIS & mainTXRIS )
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284 if( lTaskWaiting == pdTRUE )
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286 /* This interrupt was caused by space becoming available on the Tx
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287 FIFO, wake any task that is waiting to post (if any). */
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288 xSemaphoreGiveFromISR( xTxFIFOSemaphore, &xHigherPriorityTaskWoken );
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289 lTaskWaiting = pdFALSE;
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292 UART1->ICR = mainTXRIS;
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295 /* If a task was woken by either a character being received or a character
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296 being transmitted then we may need to switch to another task. */
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297 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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