2 FreeRTOS.org V5.2.0 - Copyright (C) 2003-2009 Richard Barry.
\r
4 This file is part of the FreeRTOS.org distribution.
\r
6 FreeRTOS.org is free software; you can redistribute it and/or modify it
\r
7 under the terms of the GNU General Public License (version 2) as published
\r
8 by the Free Software Foundation and modified by the FreeRTOS exception.
\r
10 FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT
\r
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
\r
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
15 You should have received a copy of the GNU General Public License along
\r
16 with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59
\r
17 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
\r
19 A special exception to the GPL is included to allow you to distribute a
\r
20 combined work that includes FreeRTOS.org without being obliged to provide
\r
21 the source code for any proprietary components. See the licensing section
\r
22 of http://www.FreeRTOS.org for full details.
\r
25 ***************************************************************************
\r
27 * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *
\r
29 * This is a concise, step by step, 'hands on' guide that describes both *
\r
30 * general multitasking concepts and FreeRTOS specifics. It presents and *
\r
31 * explains numerous examples that are written using the FreeRTOS API. *
\r
32 * Full source code for all the examples is provided in an accompanying *
\r
35 ***************************************************************************
\r
39 Please ensure to read the configuration and relevant port sections of the
\r
40 online documentation.
\r
42 http://www.FreeRTOS.org - Documentation, latest information, license and
\r
45 http://www.SafeRTOS.com - A version that is certified for use in safety
\r
48 http://www.OpenRTOS.com - Commercial support, development, porting,
\r
49 licensing and training services.
\r
53 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART1.
\r
56 /* Library includes. */
\r
57 #include "91x_lib.h"
\r
59 /* Scheduler includes. */
\r
60 #include "FreeRTOS.h"
\r
64 /* Demo application includes. */
\r
66 /*-----------------------------------------------------------*/
\r
69 #define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
\r
70 #define serNO_BLOCK ( ( portTickType ) 0 )
\r
71 #define serTX_BLOCK_TIME ( 40 / portTICK_RATE_MS )
\r
73 /* Interrupt and status bit definitions. */
\r
74 #define mainTXRIS 0x20
\r
75 #define mainRXRIS 0x50
\r
76 #define serTX_FIFO_FULL 0x20
\r
77 #define serCLEAR_ALL_INTERRUPTS 0x3ff
\r
78 /*-----------------------------------------------------------*/
\r
80 /* The queue used to hold received characters. */
\r
81 static xQueueHandle xRxedChars;
\r
83 /* The semaphore used to wake a task waiting for space to become available
\r
85 static xSemaphoreHandle xTxFIFOSemaphore;
\r
87 /*-----------------------------------------------------------*/
\r
89 /* UART interrupt handler. */
\r
90 void UART1_IRQHandler( void );
\r
92 /* The interrupt service routine - called from the assembly entry point. */
\r
93 __arm void UART1_IRQHandler( void );
\r
95 /*-----------------------------------------------------------*/
\r
97 /* Flag to indicate whether or not a task is blocked waiting for space on
\r
99 static portLONG lTaskWaiting = pdFALSE;
\r
102 * See the serial2.h header file.
\r
104 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
\r
106 xComPortHandle xReturn;
\r
107 UART_InitTypeDef xUART1_Init;
\r
108 GPIO_InitTypeDef GPIO_InitStructure;
\r
110 /* Create the queues used to hold Rx characters. */
\r
111 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
\r
113 /* Create the semaphore used to wake a task waiting for space to become
\r
114 available in the FIFO. */
\r
115 vSemaphoreCreateBinary( xTxFIFOSemaphore );
\r
117 /* If the queue/semaphore was created correctly then setup the serial port
\r
119 if( ( xRxedChars != serINVALID_QUEUE ) && ( xTxFIFOSemaphore != serINVALID_QUEUE ) )
\r
121 /* Pre take the semaphore so a task will block if it tries to access
\r
123 xSemaphoreTake( xTxFIFOSemaphore, 0 );
\r
125 /* Configure the UART. */
\r
126 xUART1_Init.UART_WordLength = UART_WordLength_8D;
\r
127 xUART1_Init.UART_StopBits = UART_StopBits_1;
\r
128 xUART1_Init.UART_Parity = UART_Parity_No;
\r
129 xUART1_Init.UART_BaudRate = ulWantedBaud;
\r
130 xUART1_Init.UART_HardwareFlowControl = UART_HardwareFlowControl_None;
\r
131 xUART1_Init.UART_Mode = UART_Mode_Tx_Rx;
\r
132 xUART1_Init.UART_FIFO = UART_FIFO_Enable;
\r
134 /* Enable the UART1 Clock */
\r
135 SCU_APBPeriphClockConfig( __UART1, ENABLE );
\r
137 /* Enable the GPIO3 Clock */
\r
138 SCU_APBPeriphClockConfig( __GPIO3, ENABLE );
\r
140 /* Configure UART1_Rx pin GPIO3.2 */
\r
141 GPIO_InitStructure.GPIO_Direction = GPIO_PinInput;
\r
142 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
\r
143 GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
\r
144 GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
\r
145 GPIO_InitStructure.GPIO_Alternate = GPIO_InputAlt1 ;
\r
146 GPIO_Init( GPIO3, &GPIO_InitStructure );
\r
148 /* Configure UART1_Tx pin GPIO3.3 */
\r
149 GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;
\r
150 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
\r
151 GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
\r
152 GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
\r
153 GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ;
\r
154 GPIO_Init( GPIO3, &GPIO_InitStructure );
\r
157 portENTER_CRITICAL();
\r
159 /* Configure the UART itself. */
\r
160 UART_DeInit( UART1 );
\r
161 UART_Init( UART1, &xUART1_Init );
\r
162 UART_ITConfig( UART1, UART_IT_Receive | UART_IT_Transmit, ENABLE );
\r
163 UART1->ICR = serCLEAR_ALL_INTERRUPTS;
\r
164 UART_LoopBackConfig( UART1, DISABLE );
\r
165 UART_IrDACmd( IrDA1, DISABLE );
\r
167 /* Configure the VIC for the UART interrupts. */
\r
168 VIC_Config( UART1_ITLine, VIC_IRQ, 9 );
\r
169 VIC_ITCmd( UART1_ITLine, ENABLE );
\r
171 UART_Cmd( UART1, ENABLE );
\r
172 lTaskWaiting = pdFALSE;
\r
174 portEXIT_CRITICAL();
\r
178 xReturn = ( xComPortHandle ) 0;
\r
181 /* This demo file only supports a single port but we have to return
\r
182 something to comply with the standard demo header file. */
\r
185 /*-----------------------------------------------------------*/
\r
187 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
\r
189 /* The port handle is not required as this driver only supports one port. */
\r
192 /* Get the next character from the buffer. Return false if no characters
\r
193 are available, or arrive before xBlockTime expires. */
\r
194 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
\r
203 /*-----------------------------------------------------------*/
\r
205 void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
\r
207 signed portCHAR *pxNext;
\r
209 /* A couple of parameters that this port does not use. */
\r
210 ( void ) usStringLength;
\r
213 /* NOTE: This implementation does not handle the queue being full as no
\r
214 block time is used! */
\r
216 /* The port handle is not required as this driver only supports UART1. */
\r
219 /* Send each character in the string, one at a time. */
\r
220 pxNext = ( signed portCHAR * ) pcString;
\r
223 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
\r
227 /*-----------------------------------------------------------*/
\r
229 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
\r
231 portBASE_TYPE xReturn;
\r
233 portENTER_CRITICAL();
\r
235 /* Can we write to the FIFO? */
\r
236 if( UART1->FR & serTX_FIFO_FULL )
\r
238 /* Wait for the interrupt letting us know there is space on the
\r
239 FIFO. It is ok to block in a critical section, interrupts will be
\r
240 enabled for other tasks once we force a switch. */
\r
241 lTaskWaiting = pdTRUE;
\r
243 /* Just to be a bit different this driver uses a semaphore to
\r
244 block the sending task when the FIFO is full. The standard COMTest
\r
245 task assumes a queue of adequate length exists so does not use
\r
246 a block time. For this demo the block time is therefore hard
\r
248 xReturn = xSemaphoreTake( xTxFIFOSemaphore, serTX_BLOCK_TIME );
\r
251 UART1->DR = cOutChar;
\r
256 UART1->DR = cOutChar;
\r
260 portEXIT_CRITICAL();
\r
264 /*-----------------------------------------------------------*/
\r
266 void vSerialClose( xComPortHandle xPort )
\r
268 /* Not supported as not required by the demo application. */
\r
270 /*-----------------------------------------------------------*/
\r
272 void UART1_IRQHandler( void )
\r
274 signed portCHAR cChar;
\r
275 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
\r
277 while( UART1->RIS & mainRXRIS )
\r
279 /* The interrupt was caused by a character being received. Grab the
\r
280 character from the DR and place it in the queue of received
\r
283 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
\r
286 if( UART1->RIS & mainTXRIS )
\r
288 if( lTaskWaiting == pdTRUE )
\r
290 /* This interrupt was caused by space becoming available on the Tx
\r
291 FIFO, wake any task that is waiting to post (if any). */
\r
292 xSemaphoreGiveFromISR( xTxFIFOSemaphore, &xHigherPriorityTaskWoken );
\r
293 lTaskWaiting = pdFALSE;
\r
296 UART1->ICR = mainTXRIS;
\r
299 /* If a task was woken by either a character being received or a character
\r
300 being transmitted then we may need to switch to another task. */
\r
301 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
\r