2 FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry.
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4 This file is part of the FreeRTOS distribution.
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6 FreeRTOS is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 See http://www.FreeRTOS.org for documentation, latest information, license
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28 and contact details. Please ensure to read the configuration and relevant
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29 port sections of the online documentation.
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30 ***************************************************************************
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34 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART1.
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37 /* Library includes. */
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38 #include "91x_lib.h"
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40 /* Scheduler includes. */
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41 #include "FreeRTOS.h"
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45 /* Demo application includes. */
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47 /*-----------------------------------------------------------*/
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50 #define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
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51 #define serNO_BLOCK ( ( portTickType ) 0 )
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52 #define serTX_BLOCK_TIME ( 40 / portTICK_RATE_MS )
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54 /* Interrupt and status bit definitions. */
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55 #define mainTXRIS 0x20
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56 #define mainRXRIS 0x50
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57 #define serTX_FIFO_FULL 0x20
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58 #define serCLEAR_ALL_INTERRUPTS 0x3ff
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59 /*-----------------------------------------------------------*/
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61 /* The queue used to hold received characters. */
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62 static xQueueHandle xRxedChars;
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64 /* The semaphore used to wake a task waiting for space to become available
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66 static xSemaphoreHandle xTxFIFOSemaphore;
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68 /*-----------------------------------------------------------*/
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70 /* UART interrupt handler. */
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71 void UART1_IRQHandler( void );
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73 /* The interrupt service routine - called from the assembly entry point. */
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74 __arm void UART1_IRQHandler( void );
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76 /*-----------------------------------------------------------*/
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78 /* Flag to indicate whether or not a task is blocked waiting for space on
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80 static portLONG lTaskWaiting = pdFALSE;
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83 * See the serial2.h header file.
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85 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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87 xComPortHandle xReturn;
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88 UART_InitTypeDef xUART1_Init;
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89 GPIO_InitTypeDef GPIO_InitStructure;
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91 /* Create the queues used to hold Rx characters. */
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92 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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94 /* Create the semaphore used to wake a task waiting for space to become
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95 available in the FIFO. */
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96 vSemaphoreCreateBinary( xTxFIFOSemaphore );
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98 /* If the queue/semaphore was created correctly then setup the serial port
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100 if( ( xRxedChars != serINVALID_QUEUE ) && ( xTxFIFOSemaphore != serINVALID_QUEUE ) )
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102 /* Pre take the semaphore so a task will block if it tries to access
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104 xSemaphoreTake( xTxFIFOSemaphore, 0 );
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106 /* Configure the UART. */
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107 xUART1_Init.UART_WordLength = UART_WordLength_8D;
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108 xUART1_Init.UART_StopBits = UART_StopBits_1;
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109 xUART1_Init.UART_Parity = UART_Parity_No;
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110 xUART1_Init.UART_BaudRate = ulWantedBaud;
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111 xUART1_Init.UART_HardwareFlowControl = UART_HardwareFlowControl_None;
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112 xUART1_Init.UART_Mode = UART_Mode_Tx_Rx;
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113 xUART1_Init.UART_FIFO = UART_FIFO_Enable;
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115 /* Enable the UART1 Clock */
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116 SCU_APBPeriphClockConfig( __UART1, ENABLE );
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118 /* Enable the GPIO3 Clock */
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119 SCU_APBPeriphClockConfig( __GPIO3, ENABLE );
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121 /* Configure UART1_Rx pin GPIO3.2 */
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122 GPIO_InitStructure.GPIO_Direction = GPIO_PinInput;
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123 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
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124 GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
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125 GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
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126 GPIO_InitStructure.GPIO_Alternate = GPIO_InputAlt1 ;
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127 GPIO_Init( GPIO3, &GPIO_InitStructure );
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129 /* Configure UART1_Tx pin GPIO3.3 */
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130 GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;
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131 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
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132 GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
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133 GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
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134 GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ;
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135 GPIO_Init( GPIO3, &GPIO_InitStructure );
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138 portENTER_CRITICAL();
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140 /* Configure the UART itself. */
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141 UART_DeInit( UART1 );
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142 UART_Init( UART1, &xUART1_Init );
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143 UART_ITConfig( UART1, UART_IT_Receive | UART_IT_Transmit, ENABLE );
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144 UART1->ICR = serCLEAR_ALL_INTERRUPTS;
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145 UART_LoopBackConfig( UART1, DISABLE );
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146 UART_IrDACmd( IrDA1, DISABLE );
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148 /* Configure the VIC for the UART interrupts. */
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149 VIC_Config( UART1_ITLine, VIC_IRQ, 9 );
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150 VIC_ITCmd( UART1_ITLine, ENABLE );
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152 UART_Cmd( UART1, ENABLE );
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153 lTaskWaiting = pdFALSE;
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155 portEXIT_CRITICAL();
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159 xReturn = ( xComPortHandle ) 0;
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162 /* This demo file only supports a single port but we have to return
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163 something to comply with the standard demo header file. */
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166 /*-----------------------------------------------------------*/
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168 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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170 /* The port handle is not required as this driver only supports one port. */
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173 /* Get the next character from the buffer. Return false if no characters
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174 are available, or arrive before xBlockTime expires. */
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175 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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184 /*-----------------------------------------------------------*/
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186 void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
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188 signed portCHAR *pxNext;
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190 /* A couple of parameters that this port does not use. */
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191 ( void ) usStringLength;
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194 /* NOTE: This implementation does not handle the queue being full as no
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195 block time is used! */
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197 /* The port handle is not required as this driver only supports UART1. */
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200 /* Send each character in the string, one at a time. */
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201 pxNext = ( signed portCHAR * ) pcString;
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204 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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208 /*-----------------------------------------------------------*/
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210 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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212 portBASE_TYPE xReturn;
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214 portENTER_CRITICAL();
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216 /* Can we write to the FIFO? */
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217 if( UART1->FR & serTX_FIFO_FULL )
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219 /* Wait for the interrupt letting us know there is space on the
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220 FIFO. It is ok to block in a critical section, interrupts will be
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221 enabled for other tasks once we force a switch. */
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222 lTaskWaiting = pdTRUE;
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224 /* Just to be a bit different this driver uses a semaphore to
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225 block the sending task when the FIFO is full. The standard COMTest
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226 task assumes a queue of adequate length exists so does not use
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227 a block time. For this demo the block time is therefore hard
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229 xReturn = xSemaphoreTake( xTxFIFOSemaphore, serTX_BLOCK_TIME );
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232 UART1->DR = cOutChar;
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237 UART1->DR = cOutChar;
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241 portEXIT_CRITICAL();
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245 /*-----------------------------------------------------------*/
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247 void vSerialClose( xComPortHandle xPort )
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249 /* Not supported as not required by the demo application. */
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251 /*-----------------------------------------------------------*/
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253 void UART1_IRQHandler( void )
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255 signed portCHAR cChar;
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256 portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
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258 while( UART1->RIS & mainRXRIS )
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260 /* The interrupt was caused by a character being received. Grab the
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261 character from the DR and place it in the queue of received
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264 xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );
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267 if( UART1->RIS & mainTXRIS )
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269 if( lTaskWaiting == pdTRUE )
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271 /* This interrupt was caused by space becoming available on the Tx
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272 FIFO, wake any task that is waiting to post (if any). */
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273 xTaskWokenByTx = xSemaphoreGiveFromISR( xTxFIFOSemaphore, xTaskWokenByTx );
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274 lTaskWaiting = pdFALSE;
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277 UART1->ICR = mainTXRIS;
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280 /* If a task was woken by either a character being received or a character
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281 being transmitted then we may need to switch to another task. */
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282 portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );
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