1 /* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
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3 /*This file has been prepared for Doxygen automatic documentation generation.*/
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4 /*! \file *********************************************************************
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6 * \brief GPIO driver for AVR32 UC3.
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8 * This file defines a useful set of functions for the GPIO.
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10 * - Compiler: IAR EWAVR32 and GNU GCC for AVR32
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11 * - Supported devices: All AVR32 devices with a GPIO module can be used.
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14 * \author Atmel Corporation: http://www.atmel.com \n
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15 * Support and FAQ: http://support.atmel.no/
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17 *****************************************************************************/
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19 /* Copyright (c) 2009 Atmel Corporation. All rights reserved.
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21 * Redistribution and use in source and binary forms, with or without
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22 * modification, are permitted provided that the following conditions are met:
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24 * 1. Redistributions of source code must retain the above copyright notice, this
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25 * list of conditions and the following disclaimer.
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27 * 2. Redistributions in binary form must reproduce the above copyright notice,
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28 * this list of conditions and the following disclaimer in the documentation
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29 * and/or other materials provided with the distribution.
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31 * 3. The name of Atmel may not be used to endorse or promote products derived
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32 * from this software without specific prior written permission.
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34 * 4. This software may only be redistributed and used in connection with an Atmel
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37 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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38 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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39 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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40 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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41 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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42 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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43 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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44 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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45 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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46 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
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52 //! GPIO module instance.
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53 #define GPIO AVR32_GPIO
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56 /*! \name Peripheral Bus Interface
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61 int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size)
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63 int status = GPIO_SUCCESS;
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66 for (i = 0; i < size; i++)
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68 status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function);
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76 int gpio_enable_module_pin(unsigned int pin, unsigned int function)
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78 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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80 // Enable the correct function.
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83 case 0: // A function.
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84 gpio_port->pmr0c = 1 << (pin & 0x1F);
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85 gpio_port->pmr1c = 1 << (pin & 0x1F);
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86 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
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87 gpio_port->pmr2c = 1 << (pin & 0x1F);
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91 case 1: // B function.
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92 gpio_port->pmr0s = 1 << (pin & 0x1F);
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93 gpio_port->pmr1c = 1 << (pin & 0x1F);
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94 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
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95 gpio_port->pmr2c = 1 << (pin & 0x1F);
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99 case 2: // C function.
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100 gpio_port->pmr0c = 1 << (pin & 0x1F);
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101 gpio_port->pmr1s = 1 << (pin & 0x1F);
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102 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
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103 gpio_port->pmr2c = 1 << (pin & 0x1F);
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107 case 3: // D function.
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108 gpio_port->pmr0s = 1 << (pin & 0x1F);
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109 gpio_port->pmr1s = 1 << (pin & 0x1F);
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110 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
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111 gpio_port->pmr2c = 1 << (pin & 0x1F);
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115 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
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116 case 4: // E function.
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117 gpio_port->pmr0c = 1 << (pin & 0x1F);
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118 gpio_port->pmr1c = 1 << (pin & 0x1F);
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119 gpio_port->pmr2s = 1 << (pin & 0x1F);
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122 case 5: // F function.
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123 gpio_port->pmr0s = 1 << (pin & 0x1F);
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124 gpio_port->pmr1c = 1 << (pin & 0x1F);
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125 gpio_port->pmr2s = 1 << (pin & 0x1F);
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128 case 6: // G function.
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129 gpio_port->pmr0c = 1 << (pin & 0x1F);
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130 gpio_port->pmr1s = 1 << (pin & 0x1F);
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131 gpio_port->pmr2s = 1 << (pin & 0x1F);
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134 case 7: // H function.
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135 gpio_port->pmr0s = 1 << (pin & 0x1F);
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136 gpio_port->pmr1s = 1 << (pin & 0x1F);
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137 gpio_port->pmr2s = 1 << (pin & 0x1F);
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142 return GPIO_INVALID_ARGUMENT;
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145 // Disable GPIO control.
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146 gpio_port->gperc = 1 << (pin & 0x1F);
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148 return GPIO_SUCCESS;
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152 void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size)
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156 for (i = 0; i < size; i++)
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158 gpio_enable_gpio_pin(gpiomap->pin);
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164 void gpio_enable_gpio_pin(unsigned int pin)
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166 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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167 gpio_port->oderc = 1 << (pin & 0x1F);
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168 gpio_port->gpers = 1 << (pin & 0x1F);
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172 // The open-drain mode is not synthesized on the current AVR32 products.
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173 // If one day some AVR32 products have this feature, the corresponding part
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174 // numbers should be listed in the #if below.
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175 // Note that other functions are available in this driver to use pins with open
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176 // drain in GPIO mode. The advantage of the open-drain mode functions over these
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177 // other functions is that they can be used not only in GPIO mode but also in
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182 void gpio_enable_pin_open_drain(unsigned int pin)
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184 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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185 gpio_port->odmers = 1 << (pin & 0x1F);
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189 void gpio_disable_pin_open_drain(unsigned int pin)
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191 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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192 gpio_port->odmerc = 1 << (pin & 0x1F);
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199 void gpio_enable_pin_pull_up(unsigned int pin)
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201 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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202 gpio_port->puers = 1 << (pin & 0x1F);
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203 #if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
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204 gpio_port->pderc = 1 << (pin & 0x1F);
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209 void gpio_disable_pin_pull_up(unsigned int pin)
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211 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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212 gpio_port->puerc = 1 << (pin & 0x1F);
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215 #if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
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216 // Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control.
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218 /*! \brief Enables the pull-down resistor of a pin.
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220 * \param pin The pin number.
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222 void gpio_enable_pin_pull_down(unsigned int pin)
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224 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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225 gpio_port->puerc = 1 << (pin & 0x1F);
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226 gpio_port->pders = 1 << (pin & 0x1F);
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229 /*! \brief Disables the pull-down resistor of a pin.
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231 * \param pin The pin number.
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233 void gpio_disable_pin_pull_down(unsigned int pin)
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235 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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236 gpio_port->pderc = 1 << (pin & 0x1F);
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239 /*! \brief Enables the buskeeper functionality on a pin.
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241 * \param pin The pin number.
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243 void gpio_enable_pin_buskeeper(unsigned int pin)
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245 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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246 gpio_port->puers = 1 << (pin & 0x1F);
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247 gpio_port->pders = 1 << (pin & 0x1F);
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250 /*! \brief Disables the buskeeper functionality on a pin.
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252 * \param pin The pin number.
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254 void gpio_disable_pin_buskeeper(unsigned int pin)
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256 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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257 gpio_port->puerc = 1 << (pin & 0x1F);
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258 gpio_port->pderc = 1 << (pin & 0x1F);
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263 int gpio_get_pin_value(unsigned int pin)
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265 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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266 return (gpio_port->pvr >> (pin & 0x1F)) & 1;
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270 int gpio_get_gpio_pin_output_value(unsigned int pin)
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272 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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273 return (gpio_port->ovr >> (pin & 0x1F)) & 1;
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277 int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin)
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279 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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280 return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1;
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284 void gpio_set_gpio_pin(unsigned int pin)
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286 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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288 gpio_port->ovrs = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1.
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289 gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
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290 gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
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294 void gpio_clr_gpio_pin(unsigned int pin)
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296 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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298 gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
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299 gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
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300 gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
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304 void gpio_tgl_gpio_pin(unsigned int pin)
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306 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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308 gpio_port->ovrt = 1 << (pin & 0x1F); // Toggle the I/O line.
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309 gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
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310 gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
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314 void gpio_set_gpio_open_drain_pin(unsigned int pin)
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316 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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318 gpio_port->oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin.
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319 gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
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323 void gpio_clr_gpio_open_drain_pin(unsigned int pin)
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325 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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327 gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
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328 gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
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329 gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
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333 void gpio_tgl_gpio_open_drain_pin(unsigned int pin)
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335 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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337 gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line if the GPIO output driver is enabled: 0.
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338 gpio_port->odert = 1 << (pin & 0x1F); // The GPIO output driver is toggled for that pin.
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339 gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
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343 void gpio_enable_pin_glitch_filter(unsigned int pin)
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345 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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346 gpio_port->gfers = 1 << (pin & 0x1F);
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350 void gpio_disable_pin_glitch_filter(unsigned int pin)
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352 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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353 gpio_port->gferc = 1 << (pin & 0x1F);
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356 /*! \brief Configure the edge detector of an input pin
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358 * \param pin The pin number.
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359 * \param mode The edge detection mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE
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360 * or \ref GPIO_FALLING_EDGE).
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362 * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
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364 static int gpio_configure_edge_detector(unsigned int pin, unsigned int mode)
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366 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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368 // Configure the edge detector.
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371 case GPIO_PIN_CHANGE:
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372 gpio_port->imr0c = 1 << (pin & 0x1F);
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373 gpio_port->imr1c = 1 << (pin & 0x1F);
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376 case GPIO_RISING_EDGE:
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377 gpio_port->imr0s = 1 << (pin & 0x1F);
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378 gpio_port->imr1c = 1 << (pin & 0x1F);
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381 case GPIO_FALLING_EDGE:
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382 gpio_port->imr0c = 1 << (pin & 0x1F);
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383 gpio_port->imr1s = 1 << (pin & 0x1F);
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387 return GPIO_INVALID_ARGUMENT;
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390 return GPIO_SUCCESS;
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394 int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode)
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396 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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398 // Enable the glitch filter.
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399 gpio_port->gfers = 1 << (pin & 0x1F);
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401 // Configure the edge detector.
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402 if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode))
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403 return(GPIO_INVALID_ARGUMENT);
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405 // Enable interrupt.
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406 gpio_port->iers = 1 << (pin & 0x1F);
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408 return GPIO_SUCCESS;
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412 void gpio_disable_pin_interrupt(unsigned int pin)
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414 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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415 gpio_port->ierc = 1 << (pin & 0x1F);
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419 int gpio_get_pin_interrupt_flag(unsigned int pin)
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421 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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422 return (gpio_port->ifr >> (pin & 0x1F)) & 1;
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426 void gpio_clear_pin_interrupt_flag(unsigned int pin)
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428 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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429 gpio_port->ifrc = 1 << (pin & 0x1F);
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434 //# Peripheral Event System Support.
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437 int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf)
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439 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
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441 if(TRUE == use_igf)
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443 // Enable the glitch filter.
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444 gpio_port->gfers = 1 << (pin & 0x1F);
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448 // Disable the glitch filter.
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449 gpio_port->gferc = 1 << (pin & 0x1F);
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452 // Configure the edge detector.
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453 return(gpio_configure_edge_detector(pin, mode));
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