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9 <h1 align="center" class="whs1">AVR UC3 Series Software Framework: Power Manager Driver<br>
12 <p align="center" class="whs2">Copyright © 2007 Atmel Corporation</p>
15 <h3>UC3A0/1, UC3B, UC3A3</h3>
16 <p>The Power Manager (PM) controls the oscillators and PLLs, and generates the clocks and
17 resets in the device. The PM controls two fast crystal oscillators, as well as two PLLs, which can
18 multiply the clock from either oscillator to provide higher frequencies. Additionally, a low-power
19 32 KHz oscillator is used to generate the real-time counter clock for high accuracy real-time
20 measurements. The PM also contains a low-power RC oscillator with fast start-up time, which
21 can be used to clock the digital logic.</p>
24 <p>The Power Manager (PM) provides synchronous clocks used to clock the main digital logic in the
25 device, namely the CPU, and the modules and peripherals connected to the HSB and PBx buses. The PM also
26 contains advanced power-saving features and a Reset Controller.</p>
31 <h2>Power Manager Driver</h2>
32 <h3>UC3A0/1, UC3B, UC3A3</h3>
33 <p>The driver is composed of <a href="pm.c">pm.c</a> and <a href="pm.h">pm.h</a>.</p>
35 <p>This driver provides interfaces for PM main hardware features:
37 <li>oscillator source setup: external or crystal;
38 <li>oscillator startup;
40 <li>main clock source setup.
43 <p>Two examples are available:<p>
44 <a href=" EXAMPLE1/readme.html">EXAMPLE1:</a> how to configure the Power Manager to use Oscillator 0 as source of main clock, generic clock configuration and switch to a sleep mode<p>
45 <a href=" EXAMPLE2/readme.html">EXAMPLE2:</a> how to configure a PLL and switch the main clock to PLL output and do a generic clock configuration.</p>
49 The file <a href="pm_conf_clocks.c">pm_conf_clocks.c</a> provides functions to simplify the usage of this driver.
50 It is used to configure all clocks at once by specifying frequencies needed.
54 The file <a href="power_clocks_lib.c">power_clocks_lib.c</a> (and <a href="power_clocks_lib.h">power_clocks_lib.h</a>)
55 provides functions to abstract features such as oscillators/pll/dfll configuration, clock configuration, System-sensible
56 parameters configuration, buses clocks configuration, sleep mode, reset.
61 <p>The driver is composed of <a href="pm_uc3l.c">pm_uc3l.c</a> and <a href="pm_uc3l.h">pm_uc3l.h</a>.</p>
63 <p>This driver provides interfaces for PM main hardware features:
64 <li>main clock source setup,
65 <li>clock domains setup,
66 <li>peripheral modules setup,
67 <li>Sleep modes setup,
69 <li>PM interrupts setup.
72 <p>Three examples are available:<p>
73 <a href=" EXAMPLE1/readme.html">EXAMPLE1:</a> how to configure the Power Manager to use Oscillator 0 as source of main clock, generic clock configuration and switch to a sleep mode. This example is not applicable to the AT32UC3L-EK board because no external crystal/clock is connected to OSC0 on that board.<p>
74 <a href=" EXAMPLE2/readme.html">EXAMPLE2:</a> how to configure a DFLL and switch the main clock to the DFLL output and do a generic clock configuration.</p>
75 <a href=" EXAMPLE3/readme.html">EXAMPLE2:</a> how to use the RC120M internal oscillator as main clock source and do a Generic clock configuration.</p>
79 <p>The driver is composed of <a href="pm_uc3c.c">pm_uc3c.c</a> and <a href="pm_uc3c.h">pm_uc3c.h</a>.</p>
81 <p>This driver provides interfaces for PM main hardware features:
82 <li>main clock source setup,
83 <li>clock domains setup,
84 <li>peripheral modules setup,
85 <li>Sleep modes setup,
87 <li>PM interrupts setup.
90 <p>Two examples are available:<p>
91 <a href=" EXAMPLE1/readme.html">EXAMPLE1:</a> how to configure the Power Manager to use Oscillator 0 as source of main clock, generic clock configuration and switch to a sleep mode<p>
92 <a href=" EXAMPLE2/readme.html">EXAMPLE2:</a> how to configure a PLL and switch the main clock to PLL output and do a generic clock configuration.</p>
96 The file <a href="power_clocks_lib.c">power_clocks_lib.c</a> (and <a href="power_clocks_lib.h">power_clocks_lib.h</a>)
97 provides functions to abstract features such as oscillators/pll/dfll configuration, clock configuration, System-sensible
98 parameters configuration, buses clocks configuration, sleep mode, reset.
102 <hr align="center" width="50%" class="whs4">
104 <p class=legalfooter>AVR is a registered trademark of
105 Atmel Corporation.</p>