1 /*******************************************************************************
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2 * (c) Copyright 2009 Actel Corporation. All rights reserved.
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4 * SVN $Revision: 2840 $
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5 * SVN $Date: 2010-07-20 17:00:32 +0100 (Tue, 20 Jul 2010) $
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8 #include "mss_ace_configurator.h"
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9 #include "../../CMSIS/a2fxxxm3.h"
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10 #include "../../CMSIS/mss_assert.h"
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11 #include "../../drivers_config/mss_ace/ace_handles.h"
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12 #include "../../drivers_config/mss_ace/ace_config.h"
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19 #define MAX_FULL_FLAG_NAME_LENGTH (MAX_CHANNEL_NAME_LENGTH + MAX_FLAG_NAME_LENGTH + 1)
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21 /*-------------------------------------------------------------------------*//**
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22 * Number of flag types supported.
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23 * the supported flag types are:
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24 * - BASIC_THRESHOLD_OVER
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25 * - BASIC_THRESHOLD_UNDER
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26 * - STATE_FILTERED_OVER
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27 * - STATE_FILTERED_UNDER
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28 * - DUAL_HYSTERESIS_OVER
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29 * - DUAL_HYSTERESIS_UNDER
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30 * - IPMI_HYSTERESIS_OVER
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31 * - IPMI_HYSTERESIS_UNDER
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33 #define NB_OF_FLAG_TYPES 8
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35 /*-------------------------------------------------------------------------*//**
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38 #define THRESHOLD_FLAG0 0u
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39 #define THRESHOLD_FLAG1 1u
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40 #define THRESHOLD_FLAG2 2u
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41 #define THRESHOLD_FLAG3 3u
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42 #define THRESHOLD_FLAG4 4u
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43 #define THRESHOLD_FLAG5 5u
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44 #define THRESHOLD_FLAG6 6u
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45 #define THRESHOLD_FLAG7 7u
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46 #define THRESHOLD_FLAG8 8u
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47 #define THRESHOLD_FLAG9 9u
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48 #define THRESHOLD_FLAG10 10u
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49 #define THRESHOLD_FLAG11 11u
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50 #define THRESHOLD_FLAG12 12u
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51 #define THRESHOLD_FLAG13 13u
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52 #define THRESHOLD_FLAG14 14u
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53 #define THRESHOLD_FLAG15 15u
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54 #define THRESHOLD_FLAG16 16u
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55 #define THRESHOLD_FLAG17 17u
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56 #define THRESHOLD_FLAG18 18u
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57 #define THRESHOLD_FLAG19 19u
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58 #define THRESHOLD_FLAG20 20u
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59 #define THRESHOLD_FLAG21 21u
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60 #define THRESHOLD_FLAG22 22u
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61 #define THRESHOLD_FLAG23 23u
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62 #define THRESHOLD_FLAG24 24u
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63 #define THRESHOLD_FLAG25 25u
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64 #define THRESHOLD_FLAG26 26u
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65 #define THRESHOLD_FLAG27 27u
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66 #define THRESHOLD_FLAG28 28u
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67 #define THRESHOLD_FLAG29 29u
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68 #define THRESHOLD_FLAG30 30u
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69 #define THRESHOLD_FLAG31 31u
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70 #define NB_OF_THRESHOLD_IRQ 32u
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72 /*-------------------------------------------------------------------------*//**
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75 void ace_init_flags( void );
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77 /*-------------------------------------------------------------------------*//**
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78 * Flag interrupots routines function prototypes
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80 #if defined(__GNUC__)
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81 __attribute__((__interrupt__)) void ACE_PPE_Flag0_IRQHandler( void );
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83 void ACE_PPE_Flag0_IRQHandler( void );
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86 #if defined(__GNUC__)
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87 __attribute__((__interrupt__)) void ACE_PPE_Flag1_IRQHandler( void );
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89 void ACE_PPE_Flag1_IRQHandler( void );
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92 #if defined(__GNUC__)
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93 __attribute__((__interrupt__)) void ACE_PPE_Flag2_IRQHandler( void );
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95 void ACE_PPE_Flag2_IRQHandler( void );
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98 #if defined(__GNUC__)
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99 __attribute__((__interrupt__)) void ACE_PPE_Flag3_IRQHandler( void );
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101 void ACE_PPE_Flag3_IRQHandler( void );
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104 #if defined(__GNUC__)
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105 __attribute__((__interrupt__)) void ACE_PPE_Flag4_IRQHandler( void );
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107 void ACE_PPE_Flag4_IRQHandler( void );
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110 #if defined(__GNUC__)
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111 __attribute__((__interrupt__)) void ACE_PPE_Flag5_IRQHandler( void );
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113 void ACE_PPE_Flag5_IRQHandler( void );
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116 #if defined(__GNUC__)
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117 __attribute__((__interrupt__)) void ACE_PPE_Flag6_IRQHandler( void );
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119 void ACE_PPE_Flag6_IRQHandler( void );
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122 #if defined(__GNUC__)
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123 __attribute__((__interrupt__)) void ACE_PPE_Flag7_IRQHandler( void );
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125 void ACE_PPE_Flag7_IRQHandler( void );
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128 #if defined(__GNUC__)
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129 __attribute__((__interrupt__)) void ACE_PPE_Flag8_IRQHandler( void );
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131 void ACE_PPE_Flag8_IRQHandler( void );
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134 #if defined(__GNUC__)
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135 __attribute__((__interrupt__)) void ACE_PPE_Flag9_IRQHandler( void );
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137 void ACE_PPE_Flag9_IRQHandler( void );
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140 #if defined(__GNUC__)
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141 __attribute__((__interrupt__)) void ACE_PPE_Flag10_IRQHandler( void );
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143 void ACE_PPE_Flag10_IRQHandler( void );
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146 #if defined(__GNUC__)
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147 __attribute__((__interrupt__)) void ACE_PPE_Flag11_IRQHandler( void );
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149 void ACE_PPE_Flag11_IRQHandler( void );
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152 #if defined(__GNUC__)
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153 __attribute__((__interrupt__)) void ACE_PPE_Flag12_IRQHandler( void );
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155 void ACE_PPE_Flag12_IRQHandler( void );
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158 #if defined(__GNUC__)
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159 __attribute__((__interrupt__)) void ACE_PPE_Flag13_IRQHandler( void );
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161 void ACE_PPE_Flag13_IRQHandler( void );
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164 #if defined(__GNUC__)
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165 __attribute__((__interrupt__)) void ACE_PPE_Flag14_IRQHandler( void );
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167 void ACE_PPE_Flag14_IRQHandler( void );
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170 #if defined(__GNUC__)
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171 __attribute__((__interrupt__)) void ACE_PPE_Flag15_IRQHandler( void );
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173 void ACE_PPE_Flag15_IRQHandler( void );
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176 #if defined(__GNUC__)
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177 __attribute__((__interrupt__)) void ACE_PPE_Flag16_IRQHandler( void );
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179 void ACE_PPE_Flag16_IRQHandler( void );
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182 #if defined(__GNUC__)
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183 __attribute__((__interrupt__)) void ACE_PPE_Flag17_IRQHandler( void );
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185 void ACE_PPE_Flag17_IRQHandler( void );
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188 #if defined(__GNUC__)
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189 __attribute__((__interrupt__)) void ACE_PPE_Flag18_IRQHandler( void );
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191 void ACE_PPE_Flag18_IRQHandler( void );
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194 #if defined(__GNUC__)
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195 __attribute__((__interrupt__)) void ACE_PPE_Flag19_IRQHandler( void );
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197 void ACE_PPE_Flag19_IRQHandler( void );
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200 #if defined(__GNUC__)
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201 __attribute__((__interrupt__)) void ACE_PPE_Flag20_IRQHandler( void );
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203 void ACE_PPE_Flag20_IRQHandler( void );
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206 #if defined(__GNUC__)
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207 __attribute__((__interrupt__)) void ACE_PPE_Flag21_IRQHandler( void );
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209 void ACE_PPE_Flag21_IRQHandler( void );
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212 #if defined(__GNUC__)
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213 __attribute__((__interrupt__)) void ACE_PPE_Flag22_IRQHandler( void );
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215 void ACE_PPE_Flag22_IRQHandler( void );
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218 #if defined(__GNUC__)
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219 __attribute__((__interrupt__)) void ACE_PPE_Flag23_IRQHandler( void );
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221 void ACE_PPE_Flag23_IRQHandler( void );
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224 #if defined(__GNUC__)
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225 __attribute__((__interrupt__)) void ACE_PPE_Flag24_IRQHandler( void );
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227 void ACE_PPE_Flag24_IRQHandler( void );
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230 #if defined(__GNUC__)
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231 __attribute__((__interrupt__)) void ACE_PPE_Flag25_IRQHandler( void );
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233 void ACE_PPE_Flag25_IRQHandler( void );
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236 #if defined(__GNUC__)
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237 __attribute__((__interrupt__)) void ACE_PPE_Flag26_IRQHandler( void );
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239 void ACE_PPE_Flag26_IRQHandler( void );
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242 #if defined(__GNUC__)
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243 __attribute__((__interrupt__)) void ACE_PPE_Flag27_IRQHandler( void );
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245 void ACE_PPE_Flag27_IRQHandler( void );
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248 #if defined(__GNUC__)
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249 __attribute__((__interrupt__)) void ACE_PPE_Flag28_IRQHandler( void );
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251 void ACE_PPE_Flag28_IRQHandler( void );
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254 #if defined(__GNUC__)
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255 __attribute__((__interrupt__)) void ACE_PPE_Flag29_IRQHandler( void );
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257 void ACE_PPE_Flag29_IRQHandler( void );
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260 #if defined(__GNUC__)
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261 __attribute__((__interrupt__)) void ACE_PPE_Flag30_IRQHandler( void );
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263 void ACE_PPE_Flag30_IRQHandler( void );
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266 #if defined(__GNUC__)
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267 __attribute__((__interrupt__)) void ACE_PPE_Flag31_IRQHandler( void );
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269 void ACE_PPE_Flag31_IRQHandler( void );
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272 /*-------------------------------------------------------------------------*//**
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275 #if (ACE_NB_OF_PPE_FLAGS > 0)
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276 extern ppe_flag_desc_t g_ppe_flags_desc_table[ACE_NB_OF_PPE_FLAGS];
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279 extern ace_channel_desc_t g_ace_channel_desc_table[ACE_NB_OF_INPUT_CHANNELS];
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281 extern ace_adc_config_t g_ace_adc_config[ACE_NB_OF_ADC];
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283 #if (ACE_NB_OF_PPE_FLAGS > 0)
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284 /*-------------------------------------------------------------------------*//**
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285 Lookup table indexed on flag_id_t of the index of the flag's descriptor index
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286 in the flag descriptors table g_ppe_flags_desc_table[]
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288 static ace_flag_handle_t g_ppe_flag_handles_lut[NB_OF_PPE_FLAGS];
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290 /*-------------------------------------------------------------------------*//**
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293 static flag_isr_t g_ppe_flags_isr_lut[NB_OF_PPE_FLAGS];
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295 /*-------------------------------------------------------------------------*//**
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298 static global_flag_isr_t g_ppe_global_flags_isr;
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300 /*-------------------------------------------------------------------------*//**
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303 static channel_flag_isr_t g_ppe_channel_flags_isr_lut[ACE_NB_OF_INPUT_CHANNELS];
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306 /*-------------------------------------------------------------------------*//**
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307 Intialise the ACE driver's internal data structures used by flag control
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310 void ace_init_flags( void )
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312 /* Ensure the generated ACE configuration files are consistent. */
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313 ASSERT(NB_OF_ACE_FLAG_HANDLES == ACE_NB_OF_PPE_FLAGS);
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315 #if (ACE_NB_OF_PPE_FLAGS > 0)
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318 uint8_t channel_idx;
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320 for ( flag_idx = 0u; flag_idx < (uint8_t)NB_OF_PPE_FLAGS; ++flag_idx )
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322 g_ppe_flags_isr_lut[flag_idx] = 0;
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323 g_ppe_flag_handles_lut[flag_idx] = INVALID_FLAG_HANDLE;
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326 for ( flag_idx = 0u; flag_idx < (uint8_t)ACE_NB_OF_PPE_FLAGS; ++flag_idx )
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328 ASSERT( g_ppe_flags_desc_table[flag_idx].flag_id < NB_OF_PPE_FLAGS );
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329 g_ppe_flag_handles_lut[g_ppe_flags_desc_table[flag_idx].flag_id] = (ace_flag_handle_t)flag_idx;
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332 for ( channel_idx = 0u; channel_idx < (uint8_t)ACE_NB_OF_INPUT_CHANNELS; ++channel_idx )
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334 g_ppe_channel_flags_isr_lut[channel_idx] = 0;
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337 g_ppe_global_flags_isr = 0u;
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342 /*-------------------------------------------------------------------------*//**
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345 uint32_t ACE_is_hysteresis_flag( ace_flag_handle_t flag_handle )
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347 uint32_t hysteresis = 0u;
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349 #if (ACE_NB_OF_PPE_FLAGS > 0)
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350 ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );
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352 if ( g_ppe_flags_desc_table[flag_handle].flag_type >= DUAL_HYSTERESIS_OVER )
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360 /*-------------------------------------------------------------------------*//**
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363 uint32_t ACE_is_under_flag
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365 ace_flag_handle_t flag_handle
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368 uint32_t is_under = 0;
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370 #if (ACE_NB_OF_PPE_FLAGS > 0)
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371 const uint32_t flag_type_lut[NB_OF_FLAG_TYPES] =
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373 0, /* BASIC_THRESHOLD_OVER */
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374 1, /* BASIC_THRESHOLD_UNDER */
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375 0, /* STATE_FILTERED_OVER */
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376 1, /* STATE_FILTERED_UNDER */
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377 0, /* DUAL_HYSTERESIS_OVER */
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378 1, /* DUAL_HYSTERESIS_UNDER */
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379 0, /* IPMI_HYSTERESIS_OVER */
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380 1, /* IPMI_HYSTERESIS_UNDER */
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383 ASSERT(flag_handle < ACE_NB_OF_PPE_FLAGS);
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384 if (flag_handle < ACE_NB_OF_PPE_FLAGS)
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387 flag_type = g_ppe_flags_desc_table[flag_handle].flag_type;
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388 ASSERT(flag_type < NB_OF_FLAG_TYPES);
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389 if (flag_type < NB_OF_FLAG_TYPES)
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391 is_under = flag_type_lut[flag_type];
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398 /*-------------------------------------------------------------------------*//**
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399 Mask of the threshold value bits within a PPE RAM meory location holding the
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400 threshold value for a flag.
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402 #define PPE_RAM_THRESHOLD_MASK 0x0000FFFFuL
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404 /*-------------------------------------------------------------------------*//**
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405 * TODO: handle IPMI hysteresis flags
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407 void ACE_set_flag_threshold
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409 ace_flag_handle_t flag_handle,
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410 uint16_t new_threshold
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413 #if (ACE_NB_OF_PPE_FLAGS > 0)
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414 uint16_t ppe_offset;
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416 ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );
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418 if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )
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421 ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset;
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423 if ( ACE_is_hysteresis_flag( flag_handle ) == 0u )
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425 ACE->PPE_RAM_DATA[ppe_offset] = (ACE->PPE_RAM_DATA[ppe_offset] & (uint32_t)~PPE_RAM_THRESHOLD_MASK) + new_threshold;
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429 uint16_t high_threshold;
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430 uint16_t low_threshold;
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431 ace_channel_handle_t channel_handle;
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432 uint16_t hysteresis;
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434 uint16_t adc_resolution;
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436 high_threshold = (uint16_t)(ACE->PPE_RAM_DATA[ppe_offset] & PPE_RAM_THRESHOLD_MASK);
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437 low_threshold = (uint16_t)(ACE->PPE_RAM_DATA[ppe_offset + 1u] & PPE_RAM_THRESHOLD_MASK);
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438 ASSERT(high_threshold > low_threshold);
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439 hysteresis = (uint16_t)(high_threshold - low_threshold) / 2u;
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441 channel_handle = g_ppe_flags_desc_table[flag_handle].channel_handle;
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442 adc_id = (uint32_t)(g_ace_channel_desc_table[channel_handle].signal_id) >> 4u;
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443 ASSERT( adc_id < (uint32_t)ACE_NB_OF_ADC );
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445 if ( adc_id < (uint32_t)ACE_NB_OF_ADC )
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447 adc_resolution = g_ace_adc_config[adc_id].adc_resolution - 1u;
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449 high_threshold = new_threshold + hysteresis;
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450 if ( high_threshold > adc_resolution )
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452 high_threshold = adc_resolution;
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455 if ( hysteresis > new_threshold )
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457 low_threshold = 1u;
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461 low_threshold = new_threshold - hysteresis;
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464 ACE->PPE_RAM_DATA[ppe_offset] = (ACE->PPE_RAM_DATA[ppe_offset] & ~PPE_RAM_THRESHOLD_MASK) + high_threshold;
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465 ACE->PPE_RAM_DATA[ppe_offset + 1u] = (ACE->PPE_RAM_DATA[ppe_offset + 1u] & (uint32_t)~PPE_RAM_THRESHOLD_MASK) + low_threshold;
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473 /*-------------------------------------------------------------------------*//**
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476 #define FLAG_OVER_UNDER_MASK 0x01u
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477 #define FLAG_OVER 0x00u
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478 #define FLAF_UNDER 0x01
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480 void ACE_set_flag_assertion
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482 ace_flag_handle_t flag_handle,
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483 uint16_t assertion_value
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486 #if (ACE_NB_OF_PPE_FLAGS > 0)
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487 uint16_t ppe_offset;
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489 ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );
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491 if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )
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493 if (ACE_is_hysteresis_flag(flag_handle))
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495 uint8_t flag_direction;
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496 flag_direction = g_ppe_flags_desc_table[flag_handle].flag_type & FLAG_OVER_UNDER_MASK;
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498 if ( FLAG_OVER == flag_direction )
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500 ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset;
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504 ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset + 1u;
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509 ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset;
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511 ACE->PPE_RAM_DATA[ppe_offset] = (ACE->PPE_RAM_DATA[ppe_offset] & ~PPE_RAM_THRESHOLD_MASK) + assertion_value;
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516 /*-------------------------------------------------------------------------*//**
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519 void ACE_set_flag_deassertion
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521 ace_flag_handle_t flag_handle,
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522 uint16_t assertion_value
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525 #if (ACE_NB_OF_PPE_FLAGS > 0)
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526 uint16_t ppe_offset;
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528 ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );
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529 ASSERT(ACE_is_hysteresis_flag(flag_handle));
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531 if ((flag_handle < NB_OF_ACE_FLAG_HANDLES) && (ACE_is_hysteresis_flag(flag_handle)))
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533 uint8_t flag_direction;
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534 flag_direction = g_ppe_flags_desc_table[flag_handle].flag_type & FLAG_OVER_UNDER_MASK;
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536 if ( FLAG_OVER == flag_direction )
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538 ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset + 1u;
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542 ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset;
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545 ACE->PPE_RAM_DATA[ppe_offset] = (ACE->PPE_RAM_DATA[ppe_offset] & ~PPE_RAM_THRESHOLD_MASK) + assertion_value;
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550 /*-------------------------------------------------------------------------*//**
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554 ACE_set_flag_hysteresis
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556 ace_flag_handle_t flag_handle,
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557 uint16_t adc_hysteresis
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560 #if (ACE_NB_OF_PPE_FLAGS > 0)
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561 uint16_t ppe_offset;
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562 uint32_t high_threshold;
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563 uint32_t low_threshold;
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564 uint32_t nominal_threshold;
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565 uint16_t adc_resolution;
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568 ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );
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569 ASSERT(ACE_is_hysteresis_flag(flag_handle));
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571 if ( ( flag_handle < NB_OF_ACE_FLAG_HANDLES ) && ( ACE_is_hysteresis_flag( flag_handle ) ) )
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573 ace_channel_handle_t channel_handle;
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575 ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset;
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577 high_threshold = ACE->PPE_RAM_DATA[ppe_offset] & PPE_RAM_THRESHOLD_MASK;
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578 low_threshold = ACE->PPE_RAM_DATA[ppe_offset + 1u] & PPE_RAM_THRESHOLD_MASK;
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579 ASSERT(high_threshold > low_threshold);
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580 nominal_threshold = (low_threshold + ((high_threshold - low_threshold) / 2u));
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582 channel_handle = g_ppe_flags_desc_table[flag_handle].channel_handle;
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583 adc_id = (uint32_t)((uint32_t)g_ace_channel_desc_table[channel_handle].signal_id >> 4u);
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584 ASSERT( adc_id < (uint32_t)ACE_NB_OF_ADC );
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586 if ( adc_id < (uint32_t)ACE_NB_OF_ADC )
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588 adc_resolution = g_ace_adc_config[adc_id].adc_resolution;
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590 high_threshold = nominal_threshold + adc_hysteresis;
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591 if ( high_threshold > adc_resolution )
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593 high_threshold = (uint32_t)adc_resolution - 1u;
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596 if ( adc_hysteresis > nominal_threshold )
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598 low_threshold = 1u;
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602 low_threshold = nominal_threshold - adc_hysteresis;
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605 ACE->PPE_RAM_DATA[ppe_offset] = (ACE->PPE_RAM_DATA[ppe_offset] & ~PPE_RAM_THRESHOLD_MASK) + high_threshold;
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606 ACE->PPE_RAM_DATA[ppe_offset + 1u] = (ACE->PPE_RAM_DATA[ppe_offset + 1u] & ~PPE_RAM_THRESHOLD_MASK) + low_threshold;
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613 /*-------------------------------------------------------------------------*//**
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617 ACE_set_channel_hysteresis
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619 ace_channel_handle_t channel_handle,
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620 uint16_t adc_hysteresis
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623 #if (ACE_NB_OF_PPE_FLAGS > 0)
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624 ace_flag_handle_t flag_handle;
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626 ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES );
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628 if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES )
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632 for( i = 0u; i < g_ace_channel_desc_table[channel_handle].nb_of_flags; ++i )
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634 flag_handle = (ace_flag_handle_t)g_ace_channel_desc_table[channel_handle].p_flags_array[i];
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635 ACE_set_flag_hysteresis( flag_handle, adc_hysteresis );
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641 /*==============================================================================
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645 /*-------------------------------------------------------------------------*//**
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646 Masking a flag_id with FLAG_BIT_OFFSET_MASK results in the offset of the
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647 flag bit within a PPE__FLAGSn register.
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649 #define FLAG_BIT_OFFSET_MASK 0x0000001FuL
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651 /*-------------------------------------------------------------------------*//**
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652 Shifting right a flag_id by FLAG_PPE_REG_SHIFT results in identifying the
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653 PPE_FLAGSn or PPE_SFFLAGS the flags belongs to.
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655 #define FLAG_PPE_REG_SHIFT 5u
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657 /*-------------------------------------------------------------------------*//**
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658 There is a set of 5 PPE flag registers to control and report status of the PPE
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659 flags resulting in the PPE flags being grouped into 5 separate flag groups at
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660 the register level. Each register provides status or control for 32 flags.
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662 #define NB_OF_FLAG_GROUPS 5u
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663 #define NB_OF_FLAGS_PER_GROUP 32u
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665 #if (ACE_NB_OF_PPE_FLAGS > 0)
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666 /*-------------------------------------------------------------------------*//**
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667 Lookup table of the address PPE_FLAGSn registers for fast reading of PPE
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670 static volatile uint32_t * const g_ppe_flags_regs_lut[NB_OF_FLAG_GROUPS] =
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679 /*-------------------------------------------------------------------------*//**
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680 Lookup table of the address of the PPE flags interrupt enable registers.
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682 static uint32_t volatile * const flags_irq_enable_regs_lut[NB_OF_FLAG_GROUPS] =
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684 &ACE->PPE_FLAGS0_IRQ_EN,
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685 &ACE->PPE_FLAGS1_IRQ_EN,
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686 &ACE->PPE_FLAGS2_IRQ_EN,
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687 &ACE->PPE_FLAGS3_IRQ_EN,
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688 &ACE->PPE_SFFLAGS_IRQ_EN
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691 /*-------------------------------------------------------------------------*//**
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692 Lookup table of the address of the PPE flags interrupt status registers.
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694 static uint32_t volatile const * const flags_irq_status_regs_lut[NB_OF_FLAG_GROUPS] =
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696 &ACE->PPE_FLAGS0_IRQ,
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697 &ACE->PPE_FLAGS1_IRQ,
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698 &ACE->PPE_FLAGS2_IRQ,
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699 &ACE->PPE_FLAGS3_IRQ,
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700 &ACE->PPE_SFFLAGS_IRQ
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703 /*-------------------------------------------------------------------------*//**
\r
704 Lookup table of the address of the PPE flags interrupt clearing registers.
\r
706 static uint32_t volatile * const flags_irq_clear_regs_lut[NB_OF_FLAG_GROUPS] =
\r
708 &ACE->PPE_FLAGS0_IRQ_CLR,
\r
709 &ACE->PPE_FLAGS1_IRQ_CLR,
\r
710 &ACE->PPE_FLAGS2_IRQ_CLR,
\r
711 &ACE->PPE_FLAGS3_IRQ_CLR,
\r
712 &ACE->PPE_SFFLAGS_IRQ_CLR
\r
715 /*-------------------------------------------------------------------------*//**
\r
718 static const IRQn_Type threshold_irqn_lut[NB_OF_THRESHOLD_IRQ] =
\r
720 ACE_PPE_Flag0_IRQn,
\r
721 ACE_PPE_Flag1_IRQn,
\r
722 ACE_PPE_Flag2_IRQn,
\r
723 ACE_PPE_Flag3_IRQn,
\r
724 ACE_PPE_Flag4_IRQn,
\r
725 ACE_PPE_Flag5_IRQn,
\r
726 ACE_PPE_Flag6_IRQn,
\r
727 ACE_PPE_Flag7_IRQn,
\r
728 ACE_PPE_Flag8_IRQn,
\r
729 ACE_PPE_Flag9_IRQn,
\r
730 ACE_PPE_Flag10_IRQn,
\r
731 ACE_PPE_Flag11_IRQn,
\r
732 ACE_PPE_Flag12_IRQn,
\r
733 ACE_PPE_Flag13_IRQn,
\r
734 ACE_PPE_Flag14_IRQn,
\r
735 ACE_PPE_Flag15_IRQn,
\r
736 ACE_PPE_Flag16_IRQn,
\r
737 ACE_PPE_Flag17_IRQn,
\r
738 ACE_PPE_Flag18_IRQn,
\r
739 ACE_PPE_Flag19_IRQn,
\r
740 ACE_PPE_Flag20_IRQn,
\r
741 ACE_PPE_Flag21_IRQn,
\r
742 ACE_PPE_Flag22_IRQn,
\r
743 ACE_PPE_Flag23_IRQn,
\r
744 ACE_PPE_Flag24_IRQn,
\r
745 ACE_PPE_Flag25_IRQn,
\r
746 ACE_PPE_Flag26_IRQn,
\r
747 ACE_PPE_Flag27_IRQn,
\r
748 ACE_PPE_Flag28_IRQn,
\r
749 ACE_PPE_Flag29_IRQn,
\r
750 ACE_PPE_Flag30_IRQn,
\r
751 ACE_PPE_Flag31_IRQn
\r
755 /*-------------------------------------------------------------------------*//**
\r
758 ACE_get_flag_handle
\r
760 const uint8_t * p_sz_full_flag_name
\r
763 ace_flag_handle_t flag_handle = INVALID_FLAG_HANDLE;
\r
764 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
765 ace_flag_handle_t flag_idx;
\r
767 for ( flag_idx = (ace_flag_handle_t)0; flag_idx < NB_OF_ACE_FLAG_HANDLES; ++flag_idx )
\r
769 if ( g_ppe_flags_desc_table[flag_idx].p_sz_flag_name != 0 )
\r
772 diff = strncmp( (const char *)p_sz_full_flag_name, (const char *)g_ppe_flags_desc_table[flag_idx].p_sz_flag_name, (size_t)MAX_FULL_FLAG_NAME_LENGTH );
\r
775 /* flag name found. */
\r
776 flag_handle = (ace_flag_handle_t)flag_idx;
\r
782 return flag_handle;
\r
785 /*-------------------------------------------------------------------------*//**
\r
788 ACE_get_flag_status
\r
790 ace_flag_handle_t flag_handle
\r
793 int32_t flag_state = UNKNOWN_FLAG;
\r
794 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
795 ppe_flag_id_t flag_id;
\r
797 ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );
\r
799 if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )
\r
801 uint32_t flag_bit_offset;
\r
802 uint32_t ppe_flag_group;
\r
803 uint32_t flag_id_mask;
\r
804 uint32_t flag_status;
\r
806 flag_id = g_ppe_flags_desc_table[flag_handle].flag_id;
\r
808 if ( flag_id < NB_OF_PPE_FLAGS )
\r
810 flag_bit_offset = ((uint32_t)flag_id & FLAG_BIT_OFFSET_MASK);
\r
811 ppe_flag_group = ((uint32_t)flag_id >> FLAG_PPE_REG_SHIFT);
\r
812 flag_id_mask = 1uL << flag_bit_offset;
\r
813 flag_status = *(g_ppe_flags_regs_lut[ppe_flag_group]) & flag_id_mask;
\r
814 if ( flag_status > 0u )
\r
816 flag_state = FLAG_ASSERTED;
\r
820 flag_state = FLAG_NOT_ASSERTED;
\r
830 /*-------------------------------------------------------------------------*//**
\r
835 ace_flag_handle_t flag_handle
\r
838 const uint8_t * psz_flag_name = 0;
\r
839 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
840 ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );
\r
842 if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )
\r
844 psz_flag_name = g_ppe_flags_desc_table[flag_handle].p_sz_flag_name;
\r
847 return psz_flag_name;
\r
850 /*-------------------------------------------------------------------------*//**
\r
852 ace_channel_handle_t
\r
853 ACE_get_flag_channel
\r
855 ace_flag_handle_t flag_handle
\r
858 ace_channel_handle_t channel_handle = INVALID_CHANNEL_HANDLE;
\r
859 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
860 ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );
\r
862 if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )
\r
864 channel_handle = g_ppe_flags_desc_table[flag_handle].channel_handle;
\r
867 return channel_handle;
\r
870 /*-------------------------------------------------------------------------*//**
\r
873 ACE_get_channel_flag_count
\r
875 ace_channel_handle_t channel_handle
\r
878 uint32_t flag_count = 0;
\r
879 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
880 ASSERT( channel_handle < ACE_NB_OF_INPUT_CHANNELS );
\r
881 if (channel_handle < ACE_NB_OF_INPUT_CHANNELS)
\r
883 flag_count = g_ace_channel_desc_table[channel_handle].nb_of_flags;
\r
889 /*-------------------------------------------------------------------------*//**
\r
893 ACE_get_channel_first_flag
\r
895 ace_channel_handle_t channel_handle,
\r
896 uint16_t * iterator
\r
899 ace_flag_handle_t flag_handle = INVALID_FLAG_HANDLE;
\r
900 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
901 ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES);
\r
905 if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES)
\r
907 if ( g_ace_channel_desc_table[channel_handle].nb_of_flags > 0u )
\r
909 flag_handle = (ace_flag_handle_t)g_ace_channel_desc_table[channel_handle].p_flags_array[*iterator];
\r
913 return flag_handle;
\r
916 /*-------------------------------------------------------------------------*//**
\r
920 ACE_get_channel_next_flag
\r
922 ace_channel_handle_t channel_handle,
\r
923 uint16_t * iterator
\r
926 ace_flag_handle_t flag_handle = INVALID_FLAG_HANDLE;
\r
927 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
928 ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES);
\r
930 if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES)
\r
934 if ( *iterator >= g_ace_channel_desc_table[channel_handle].nb_of_flags )
\r
939 if ( g_ace_channel_desc_table[channel_handle].nb_of_flags > 0u )
\r
941 flag_handle = (ace_flag_handle_t)g_ace_channel_desc_table[channel_handle].p_flags_array[*iterator];
\r
945 return flag_handle;
\r
949 /*-------------------------------------------------------------------------*//**
\r
952 void ACE_enable_channel_flags_irq
\r
954 ace_channel_handle_t channel_handle
\r
957 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
959 ace_flag_handle_t flag_handle;
\r
961 ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES );
\r
963 if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES )
\r
965 for ( flag_idx = 0u; flag_idx < g_ace_channel_desc_table[channel_handle].nb_of_flags; ++flag_idx )
\r
967 flag_handle = (ace_flag_handle_t)g_ace_channel_desc_table[channel_handle].p_flags_array[flag_idx];
\r
968 ACE_enable_flag_irq( flag_handle );
\r
974 /*-------------------------------------------------------------------------*//**
\r
977 void ACE_disable_channel_flags_irq
\r
979 ace_channel_handle_t channel_handle
\r
982 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
984 ace_flag_handle_t flag_handle;
\r
986 ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES );
\r
988 if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES )
\r
990 for ( flag_idx = 0u; flag_idx < g_ace_channel_desc_table[channel_handle].nb_of_flags; ++flag_idx )
\r
992 flag_handle = (ace_flag_handle_t)g_ace_channel_desc_table[channel_handle].p_flags_array[flag_idx];
\r
993 ACE_disable_flag_irq( flag_handle );
\r
999 /*-------------------------------------------------------------------------*//**
\r
1002 void ACE_clear_channel_flags_irq
\r
1004 ace_channel_handle_t channel_handle
\r
1007 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
1008 uint32_t flag_idx;
\r
1009 ace_flag_handle_t flag_handle;
\r
1011 ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES );
\r
1013 if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES )
\r
1015 for ( flag_idx = 0u; flag_idx < g_ace_channel_desc_table[channel_handle].nb_of_flags; ++flag_idx )
\r
1017 flag_handle = (ace_flag_handle_t)g_ace_channel_desc_table[channel_handle].p_flags_array[flag_idx];
\r
1018 ACE_clear_flag_irq( flag_handle );
\r
1024 /*-------------------------------------------------------------------------*//**
\r
1027 void ACE_enable_flag_irq
\r
1029 ace_flag_handle_t flag_handle
\r
1032 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
1033 ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );
\r
1035 if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )
\r
1037 ppe_flag_id_t flag_id;
\r
1038 uint32_t flag_bit_offset;
\r
1039 uint32_t ppe_flag_group;
\r
1040 uint32_t flag_id_mask;
\r
1042 flag_id = g_ppe_flags_desc_table[flag_handle].flag_id;
\r
1044 ASSERT( flag_id < NB_OF_PPE_FLAGS );
\r
1046 flag_bit_offset = ((uint32_t)flag_id & FLAG_BIT_OFFSET_MASK);
\r
1047 ppe_flag_group = ((uint32_t)flag_id >> FLAG_PPE_REG_SHIFT);
\r
1048 flag_id_mask = 1uL << flag_bit_offset;
\r
1050 ASSERT( ppe_flag_group < NB_OF_FLAG_GROUPS );
\r
1052 if ( ppe_flag_group < NB_OF_FLAG_GROUPS )
\r
1054 *(flags_irq_enable_regs_lut[ppe_flag_group]) |= flag_id_mask;
\r
1057 NVIC_EnableIRQ( threshold_irqn_lut[flag_bit_offset] );
\r
1062 /*-------------------------------------------------------------------------*//**
\r
1065 void ACE_disable_flag_irq
\r
1067 ace_flag_handle_t flag_handle
\r
1070 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
1071 ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );
\r
1073 if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )
\r
1075 ppe_flag_id_t flag_id;
\r
1076 uint32_t flag_bit_offset;
\r
1077 uint32_t ppe_flag_group;
\r
1078 uint32_t flag_id_mask;
\r
1080 flag_id = g_ppe_flags_desc_table[flag_handle].flag_id;
\r
1082 ASSERT( flag_id < NB_OF_PPE_FLAGS );
\r
1084 flag_bit_offset = ((uint32_t)flag_id & FLAG_BIT_OFFSET_MASK);
\r
1085 ppe_flag_group = ((uint32_t)flag_id >> FLAG_PPE_REG_SHIFT);
\r
1086 flag_id_mask = 1uL << flag_bit_offset;
\r
1088 ASSERT( ppe_flag_group < NB_OF_FLAG_GROUPS );
\r
1090 if ( ppe_flag_group < NB_OF_FLAG_GROUPS )
\r
1092 *(flags_irq_enable_regs_lut[ppe_flag_group]) &= (uint32_t)~flag_id_mask;
\r
1098 /*-------------------------------------------------------------------------*//**
\r
1101 void ACE_clear_flag_irq
\r
1103 ace_flag_handle_t flag_handle
\r
1106 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
1107 ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );
\r
1109 if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )
\r
1111 ppe_flag_id_t flag_id;
\r
1112 uint32_t flag_bit_offset;
\r
1113 uint32_t ppe_flag_group;
\r
1114 uint32_t flag_id_mask;
\r
1116 flag_id = g_ppe_flags_desc_table[flag_handle].flag_id;
\r
1118 ASSERT( flag_id < NB_OF_PPE_FLAGS );
\r
1120 flag_bit_offset = ((uint32_t)flag_id & FLAG_BIT_OFFSET_MASK);
\r
1121 ppe_flag_group = ((uint32_t)flag_id >> FLAG_PPE_REG_SHIFT);
\r
1122 flag_id_mask = 1uL << flag_bit_offset;
\r
1124 ASSERT( ppe_flag_group < NB_OF_FLAG_GROUPS );
\r
1126 if ( ppe_flag_group < NB_OF_FLAG_GROUPS )
\r
1128 *(flags_irq_clear_regs_lut[ppe_flag_group]) |= flag_id_mask;
\r
1134 /*-------------------------------------------------------------------------*//**
\r
1137 void ACE_register_flag_isr
\r
1139 ace_flag_handle_t flag_handle,
\r
1140 flag_isr_t flag_isr
\r
1143 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
1144 ppe_flag_id_t flag_id;
\r
1146 ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );
\r
1148 if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )
\r
1150 flag_id = g_ppe_flags_desc_table[flag_handle].flag_id;
\r
1152 ASSERT( flag_id < NB_OF_PPE_FLAGS );
\r
1154 if ( flag_id < NB_OF_PPE_FLAGS )
\r
1156 g_ppe_flags_isr_lut[flag_id] = flag_isr;
\r
1162 /*-------------------------------------------------------------------------*//**
\r
1165 void ACE_register_channel_flags_isr
\r
1167 ace_channel_handle_t channel_handle,
\r
1168 channel_flag_isr_t channel_flag_isr
\r
1171 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
1172 ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES );
\r
1174 if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES )
\r
1176 g_ppe_channel_flags_isr_lut[channel_handle] = channel_flag_isr;
\r
1181 /*-------------------------------------------------------------------------*//**
\r
1184 void ACE_register_global_flags_isr
\r
1186 global_flag_isr_t global_flag_isr
\r
1189 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
1190 g_ppe_global_flags_isr = global_flag_isr;
\r
1195 /*==============================================================================
\r
1199 /*-------------------------------------------------------------------------*//**
\r
1200 * Actual PPE flag interrupt service routines:
\r
1203 static void process_flag_irq( uint8_t threshold_flag_id )
\r
1205 #if (ACE_NB_OF_PPE_FLAGS > 0)
\r
1206 uint8_t flag_group;
\r
1207 uint32_t threshold_flag_mask;
\r
1208 ppe_flag_id_t flag_id;
\r
1209 uint32_t irq_enable_reg;
\r
1210 uint32_t irq_status_reg;
\r
1211 uint32_t irq_active;
\r
1213 threshold_flag_mask = 1uL << threshold_flag_id;
\r
1216 for ( flag_group = 0u; flag_group < NB_OF_FLAG_GROUPS; ++flag_group )
\r
1218 irq_enable_reg = *flags_irq_enable_regs_lut[flag_group];
\r
1219 irq_status_reg = *flags_irq_status_regs_lut[flag_group];
\r
1220 irq_active = threshold_flag_mask & irq_enable_reg & irq_status_reg;
\r
1224 ace_flag_handle_t flag_handle;
\r
1225 ace_channel_handle_t channel_handle;
\r
1227 flag_id = (ppe_flag_id_t)((flag_group * NB_OF_FLAGS_PER_GROUP) + threshold_flag_id);
\r
1228 flag_handle = g_ppe_flag_handles_lut[flag_id];
\r
1230 /* Call individual flag handler */
\r
1231 if ( g_ppe_flags_isr_lut[flag_id] != 0 )
\r
1233 g_ppe_flags_isr_lut[flag_id]( flag_handle );
\r
1236 /* Call the channel flag handler. */
\r
1237 channel_handle = g_ppe_flags_desc_table[flag_handle].channel_handle;
\r
1238 if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES )
\r
1240 if ( g_ppe_channel_flags_isr_lut[channel_handle] != 0 )
\r
1242 g_ppe_channel_flags_isr_lut[channel_handle]( flag_handle );
\r
1246 /* Call the global flag handler. */
\r
1247 if ( g_ppe_global_flags_isr != 0 )
\r
1249 g_ppe_global_flags_isr( flag_handle, channel_handle );
\r
1252 /* Clear the flag interrupt */
\r
1253 *flags_irq_clear_regs_lut[flag_group] |= threshold_flag_mask;
\r
1259 /*-------------------------------------------------------------------------*//**
\r
1262 #if defined(__GNUC__)
\r
1263 __attribute__((__interrupt__)) void ACE_PPE_Flag0_IRQHandler( void )
\r
1265 void ACE_PPE_Flag0_IRQHandler( void )
\r
1268 process_flag_irq( THRESHOLD_FLAG0 );
\r
1269 NVIC_ClearPendingIRQ( ACE_PPE_Flag0_IRQn );
\r
1272 /*-------------------------------------------------------------------------*//**
\r
1275 #if defined(__GNUC__)
\r
1276 __attribute__((__interrupt__)) void ACE_PPE_Flag1_IRQHandler( void )
\r
1278 void ACE_PPE_Flag1_IRQHandler( void )
\r
1281 process_flag_irq( THRESHOLD_FLAG1 );
\r
1282 NVIC_ClearPendingIRQ( ACE_PPE_Flag1_IRQn );
\r
1285 /*-------------------------------------------------------------------------*//**
\r
1288 #if defined(__GNUC__)
\r
1289 __attribute__((__interrupt__)) void ACE_PPE_Flag2_IRQHandler( void )
\r
1291 void ACE_PPE_Flag2_IRQHandler( void )
\r
1294 process_flag_irq( THRESHOLD_FLAG2 );
\r
1295 NVIC_ClearPendingIRQ( ACE_PPE_Flag2_IRQn );
\r
1298 /*-------------------------------------------------------------------------*//**
\r
1301 #if defined(__GNUC__)
\r
1302 __attribute__((__interrupt__)) void ACE_PPE_Flag3_IRQHandler( void )
\r
1304 void ACE_PPE_Flag3_IRQHandler( void )
\r
1307 process_flag_irq( THRESHOLD_FLAG3 );
\r
1308 NVIC_ClearPendingIRQ( ACE_PPE_Flag3_IRQn );
\r
1311 /*-------------------------------------------------------------------------*//**
\r
1314 #if defined(__GNUC__)
\r
1315 __attribute__((__interrupt__)) void ACE_PPE_Flag4_IRQHandler( void )
\r
1317 void ACE_PPE_Flag4_IRQHandler( void )
\r
1320 process_flag_irq( THRESHOLD_FLAG4 );
\r
1321 NVIC_ClearPendingIRQ( ACE_PPE_Flag4_IRQn );
\r
1324 /*-------------------------------------------------------------------------*//**
\r
1327 #if defined(__GNUC__)
\r
1328 __attribute__((__interrupt__)) void ACE_PPE_Flag5_IRQHandler( void )
\r
1330 void ACE_PPE_Flag5_IRQHandler( void )
\r
1333 process_flag_irq( THRESHOLD_FLAG5 );
\r
1334 NVIC_ClearPendingIRQ( ACE_PPE_Flag5_IRQn );
\r
1337 /*-------------------------------------------------------------------------*//**
\r
1340 #if defined(__GNUC__)
\r
1341 __attribute__((__interrupt__)) void ACE_PPE_Flag6_IRQHandler( void )
\r
1343 void ACE_PPE_Flag6_IRQHandler( void )
\r
1346 process_flag_irq( THRESHOLD_FLAG6 );
\r
1347 NVIC_ClearPendingIRQ( ACE_PPE_Flag6_IRQn );
\r
1350 /*-------------------------------------------------------------------------*//**
\r
1353 #if defined(__GNUC__)
\r
1354 __attribute__((__interrupt__)) void ACE_PPE_Flag7_IRQHandler( void )
\r
1356 void ACE_PPE_Flag7_IRQHandler( void )
\r
1359 process_flag_irq( THRESHOLD_FLAG7 );
\r
1360 NVIC_ClearPendingIRQ( ACE_PPE_Flag7_IRQn );
\r
1363 /*-------------------------------------------------------------------------*//**
\r
1366 #if defined(__GNUC__)
\r
1367 __attribute__((__interrupt__)) void ACE_PPE_Flag8_IRQHandler( void )
\r
1369 void ACE_PPE_Flag8_IRQHandler( void )
\r
1372 process_flag_irq( THRESHOLD_FLAG8 );
\r
1373 NVIC_ClearPendingIRQ( ACE_PPE_Flag8_IRQn );
\r
1376 /*-------------------------------------------------------------------------*//**
\r
1379 #if defined(__GNUC__)
\r
1380 __attribute__((__interrupt__)) void ACE_PPE_Flag9_IRQHandler( void )
\r
1382 void ACE_PPE_Flag9_IRQHandler( void )
\r
1385 process_flag_irq( THRESHOLD_FLAG9 );
\r
1386 NVIC_ClearPendingIRQ( ACE_PPE_Flag9_IRQn );
\r
1389 /*-------------------------------------------------------------------------*//**
\r
1392 #if defined(__GNUC__)
\r
1393 __attribute__((__interrupt__)) void ACE_PPE_Flag10_IRQHandler( void )
\r
1395 void ACE_PPE_Flag10_IRQHandler( void )
\r
1398 process_flag_irq( THRESHOLD_FLAG10 );
\r
1399 NVIC_ClearPendingIRQ( ACE_PPE_Flag10_IRQn );
\r
1402 /*-------------------------------------------------------------------------*//**
\r
1405 #if defined(__GNUC__)
\r
1406 __attribute__((__interrupt__)) void ACE_PPE_Flag11_IRQHandler( void )
\r
1408 void ACE_PPE_Flag11_IRQHandler( void )
\r
1411 process_flag_irq( THRESHOLD_FLAG11 );
\r
1412 NVIC_ClearPendingIRQ( ACE_PPE_Flag11_IRQn );
\r
1415 /*-------------------------------------------------------------------------*//**
\r
1418 #if defined(__GNUC__)
\r
1419 __attribute__((__interrupt__)) void ACE_PPE_Flag12_IRQHandler( void )
\r
1421 void ACE_PPE_Flag12_IRQHandler( void )
\r
1424 process_flag_irq( THRESHOLD_FLAG12 );
\r
1425 NVIC_ClearPendingIRQ( ACE_PPE_Flag12_IRQn );
\r
1428 /*-------------------------------------------------------------------------*//**
\r
1431 #if defined(__GNUC__)
\r
1432 __attribute__((__interrupt__)) void ACE_PPE_Flag13_IRQHandler( void )
\r
1434 void ACE_PPE_Flag13_IRQHandler( void )
\r
1437 process_flag_irq( THRESHOLD_FLAG13 );
\r
1438 NVIC_ClearPendingIRQ( ACE_PPE_Flag13_IRQn );
\r
1441 /*-------------------------------------------------------------------------*//**
\r
1444 #if defined(__GNUC__)
\r
1445 __attribute__((__interrupt__)) void ACE_PPE_Flag14_IRQHandler( void )
\r
1447 void ACE_PPE_Flag14_IRQHandler( void )
\r
1450 process_flag_irq( THRESHOLD_FLAG14 );
\r
1451 NVIC_ClearPendingIRQ( ACE_PPE_Flag14_IRQn );
\r
1454 /*-------------------------------------------------------------------------*//**
\r
1457 #if defined(__GNUC__)
\r
1458 __attribute__((__interrupt__)) void ACE_PPE_Flag15_IRQHandler( void )
\r
1460 void ACE_PPE_Flag15_IRQHandler( void )
\r
1463 process_flag_irq( THRESHOLD_FLAG15 );
\r
1464 NVIC_ClearPendingIRQ( ACE_PPE_Flag15_IRQn );
\r
1467 /*-------------------------------------------------------------------------*//**
\r
1470 #if defined(__GNUC__)
\r
1471 __attribute__((__interrupt__)) void ACE_PPE_Flag16_IRQHandler( void )
\r
1473 void ACE_PPE_Flag16_IRQHandler( void )
\r
1476 process_flag_irq( THRESHOLD_FLAG16 );
\r
1477 NVIC_ClearPendingIRQ( ACE_PPE_Flag16_IRQn );
\r
1480 /*-------------------------------------------------------------------------*//**
\r
1483 #if defined(__GNUC__)
\r
1484 __attribute__((__interrupt__)) void ACE_PPE_Flag17_IRQHandler( void )
\r
1486 void ACE_PPE_Flag17_IRQHandler( void )
\r
1489 process_flag_irq( THRESHOLD_FLAG17 );
\r
1490 NVIC_ClearPendingIRQ( ACE_PPE_Flag17_IRQn );
\r
1493 /*-------------------------------------------------------------------------*//**
\r
1496 #if defined(__GNUC__)
\r
1497 __attribute__((__interrupt__)) void ACE_PPE_Flag18_IRQHandler( void )
\r
1499 void ACE_PPE_Flag18_IRQHandler( void )
\r
1502 process_flag_irq( THRESHOLD_FLAG18 );
\r
1503 NVIC_ClearPendingIRQ( ACE_PPE_Flag18_IRQn );
\r
1506 /*-------------------------------------------------------------------------*//**
\r
1509 #if defined(__GNUC__)
\r
1510 __attribute__((__interrupt__)) void ACE_PPE_Flag19_IRQHandler( void )
\r
1512 void ACE_PPE_Flag19_IRQHandler( void )
\r
1515 process_flag_irq( THRESHOLD_FLAG19 );
\r
1516 NVIC_ClearPendingIRQ( ACE_PPE_Flag19_IRQn );
\r
1519 /*-------------------------------------------------------------------------*//**
\r
1522 #if defined(__GNUC__)
\r
1523 __attribute__((__interrupt__)) void ACE_PPE_Flag20_IRQHandler( void )
\r
1525 void ACE_PPE_Flag20_IRQHandler( void )
\r
1528 process_flag_irq( THRESHOLD_FLAG20 );
\r
1529 NVIC_ClearPendingIRQ( ACE_PPE_Flag20_IRQn );
\r
1532 /*-------------------------------------------------------------------------*//**
\r
1535 #if defined(__GNUC__)
\r
1536 __attribute__((__interrupt__)) void ACE_PPE_Flag21_IRQHandler( void )
\r
1538 void ACE_PPE_Flag21_IRQHandler( void )
\r
1541 process_flag_irq( THRESHOLD_FLAG21 );
\r
1542 NVIC_ClearPendingIRQ( ACE_PPE_Flag21_IRQn );
\r
1545 /*-------------------------------------------------------------------------*//**
\r
1548 #if defined(__GNUC__)
\r
1549 __attribute__((__interrupt__)) void ACE_PPE_Flag22_IRQHandler( void )
\r
1551 void ACE_PPE_Flag22_IRQHandler( void )
\r
1554 process_flag_irq( THRESHOLD_FLAG22 );
\r
1555 NVIC_ClearPendingIRQ( ACE_PPE_Flag22_IRQn );
\r
1558 /*-------------------------------------------------------------------------*//**
\r
1561 #if defined(__GNUC__)
\r
1562 __attribute__((__interrupt__)) void ACE_PPE_Flag23_IRQHandler( void )
\r
1564 void ACE_PPE_Flag23_IRQHandler( void )
\r
1567 process_flag_irq( THRESHOLD_FLAG23 );
\r
1568 NVIC_ClearPendingIRQ( ACE_PPE_Flag23_IRQn );
\r
1571 /*-------------------------------------------------------------------------*//**
\r
1574 #if defined(__GNUC__)
\r
1575 __attribute__((__interrupt__)) void ACE_PPE_Flag24_IRQHandler( void )
\r
1577 void ACE_PPE_Flag24_IRQHandler( void )
\r
1580 process_flag_irq( THRESHOLD_FLAG24 );
\r
1581 NVIC_ClearPendingIRQ( ACE_PPE_Flag24_IRQn );
\r
1584 /*-------------------------------------------------------------------------*//**
\r
1587 #if defined(__GNUC__)
\r
1588 __attribute__((__interrupt__)) void ACE_PPE_Flag25_IRQHandler( void )
\r
1590 void ACE_PPE_Flag25_IRQHandler( void )
\r
1593 process_flag_irq( THRESHOLD_FLAG25 );
\r
1594 NVIC_ClearPendingIRQ( ACE_PPE_Flag25_IRQn );
\r
1597 /*-------------------------------------------------------------------------*//**
\r
1600 #if defined(__GNUC__)
\r
1601 __attribute__((__interrupt__)) void ACE_PPE_Flag26_IRQHandler( void )
\r
1603 void ACE_PPE_Flag26_IRQHandler( void )
\r
1606 process_flag_irq( THRESHOLD_FLAG26 );
\r
1607 NVIC_ClearPendingIRQ( ACE_PPE_Flag26_IRQn );
\r
1610 /*-------------------------------------------------------------------------*//**
\r
1613 #if defined(__GNUC__)
\r
1614 __attribute__((__interrupt__)) void ACE_PPE_Flag27_IRQHandler( void )
\r
1616 void ACE_PPE_Flag27_IRQHandler( void )
\r
1619 process_flag_irq( THRESHOLD_FLAG27 );
\r
1620 NVIC_ClearPendingIRQ( ACE_PPE_Flag27_IRQn );
\r
1623 /*-------------------------------------------------------------------------*//**
\r
1626 #if defined(__GNUC__)
\r
1627 __attribute__((__interrupt__)) void ACE_PPE_Flag28_IRQHandler( void )
\r
1629 void ACE_PPE_Flag28_IRQHandler( void )
\r
1632 process_flag_irq( THRESHOLD_FLAG28 );
\r
1633 NVIC_ClearPendingIRQ( ACE_PPE_Flag28_IRQn );
\r
1636 /*-------------------------------------------------------------------------*//**
\r
1639 #if defined(__GNUC__)
\r
1640 __attribute__((__interrupt__)) void ACE_PPE_Flag29_IRQHandler( void )
\r
1642 void ACE_PPE_Flag29_IRQHandler( void )
\r
1645 process_flag_irq( THRESHOLD_FLAG29 );
\r
1646 NVIC_ClearPendingIRQ( ACE_PPE_Flag29_IRQn );
\r
1649 /*-------------------------------------------------------------------------*//**
\r
1652 #if defined(__GNUC__)
\r
1653 __attribute__((__interrupt__)) void ACE_PPE_Flag30_IRQHandler( void )
\r
1655 void ACE_PPE_Flag30_IRQHandler( void )
\r
1658 process_flag_irq( THRESHOLD_FLAG30 );
\r
1659 NVIC_ClearPendingIRQ( ACE_PPE_Flag30_IRQn );
\r
1662 /*-------------------------------------------------------------------------*//**
\r
1665 #if defined(__GNUC__)
\r
1666 __attribute__((__interrupt__)) void ACE_PPE_Flag31_IRQHandler( void )
\r
1668 void ACE_PPE_Flag31_IRQHandler( void )
\r
1671 process_flag_irq( THRESHOLD_FLAG31 );
\r
1672 NVIC_ClearPendingIRQ( ACE_PPE_Flag31_IRQn );
\r
1675 #ifdef __cplusplus
\r