git.sur5r.net Git - freertos/blob - Demo/CORTEX_A2F200_IAR_and_Keil/MicroSemi_Code/drivers/mss_ace/ace_flags.c

   1 /*******************************************************************************\r
   2  * (c) Copyright 2009 Actel Corporation.  All rights reserved.\r
   3  * \r
   4  * SVN $Revision: 2840 $\r
   5  * SVN $Date: 2010-07-20 17:00:32 +0100 (Tue, 20 Jul 2010) $\r
   6  */\r
   7 #include "mss_ace.h"\r
   8 #include "mss_ace_configurator.h"\r
   9 #include "../../CMSIS/a2fxxxm3.h"\r
  10 #include "../../CMSIS/mss_assert.h"\r
  11 #include "../../drivers_config/mss_ace/ace_handles.h"\r
  12 #include "../../drivers_config/mss_ace/ace_config.h"\r
  13 #include <string.h>\r
  14 \r
  15 #ifdef __cplusplus\r
  16 extern "C" {\r
  17 #endif \r
  18 \r
  19 #define MAX_FULL_FLAG_NAME_LENGTH   (MAX_CHANNEL_NAME_LENGTH + MAX_FLAG_NAME_LENGTH + 1)\r
  20 \r
  21 /*-------------------------------------------------------------------------*//**\r
  22  * Number of flag types supported.\r
  23  * the supported flag types are:\r
  24  *  - BASIC_THRESHOLD_OVER\r
  25  *  - BASIC_THRESHOLD_UNDER\r
  26  *  - STATE_FILTERED_OVER\r
  27  *  - STATE_FILTERED_UNDER\r
  28  *  - DUAL_HYSTERESIS_OVER\r
  29  *  - DUAL_HYSTERESIS_UNDER\r
  30  *  - IPMI_HYSTERESIS_OVER\r
  31  *  - IPMI_HYSTERESIS_UNDER\r
  32  */\r
  33 #define NB_OF_FLAG_TYPES    8\r
  34 \r
  35 /*-------------------------------------------------------------------------*//**\r
  36  *\r
  37  */\r
  38 #define THRESHOLD_FLAG0     0u\r
  39 #define THRESHOLD_FLAG1     1u\r
  40 #define THRESHOLD_FLAG2     2u\r
  41 #define THRESHOLD_FLAG3     3u\r
  42 #define THRESHOLD_FLAG4     4u\r
  43 #define THRESHOLD_FLAG5     5u\r
  44 #define THRESHOLD_FLAG6     6u\r
  45 #define THRESHOLD_FLAG7     7u\r
  46 #define THRESHOLD_FLAG8     8u\r
  47 #define THRESHOLD_FLAG9     9u\r
  48 #define THRESHOLD_FLAG10    10u\r
  49 #define THRESHOLD_FLAG11    11u\r
  50 #define THRESHOLD_FLAG12    12u\r
  51 #define THRESHOLD_FLAG13    13u\r
  52 #define THRESHOLD_FLAG14    14u\r
  53 #define THRESHOLD_FLAG15    15u\r
  54 #define THRESHOLD_FLAG16    16u\r
  55 #define THRESHOLD_FLAG17    17u\r
  56 #define THRESHOLD_FLAG18    18u\r
  57 #define THRESHOLD_FLAG19    19u\r
  58 #define THRESHOLD_FLAG20    20u\r
  59 #define THRESHOLD_FLAG21    21u\r
  60 #define THRESHOLD_FLAG22    22u\r
  61 #define THRESHOLD_FLAG23    23u\r
  62 #define THRESHOLD_FLAG24    24u\r
  63 #define THRESHOLD_FLAG25    25u\r
  64 #define THRESHOLD_FLAG26    26u\r
  65 #define THRESHOLD_FLAG27    27u\r
  66 #define THRESHOLD_FLAG28    28u\r
  67 #define THRESHOLD_FLAG29    29u\r
  68 #define THRESHOLD_FLAG30    30u\r
  69 #define THRESHOLD_FLAG31    31u\r
  70 #define NB_OF_THRESHOLD_IRQ 32u\r
  71 \r
  72 /*-------------------------------------------------------------------------*//**\r
  73  *\r
  74  */\r
  75 void ace_init_flags( void );\r
  76 \r
  77 /*-------------------------------------------------------------------------*//**\r
  78  * Flag interrupots routines function prototypes\r
  79  */\r
  80 #if defined(__GNUC__)\r
  81 __attribute__((__interrupt__)) void ACE_PPE_Flag0_IRQHandler( void );\r
  82 #else\r
  83 void ACE_PPE_Flag0_IRQHandler( void );\r
  84 #endif\r
  85 \r
  86 #if defined(__GNUC__)\r
  87 __attribute__((__interrupt__)) void ACE_PPE_Flag1_IRQHandler( void );\r
  88 #else\r
  89 void ACE_PPE_Flag1_IRQHandler( void );\r
  90 #endif\r
  91 \r
  92 #if defined(__GNUC__)\r
  93 __attribute__((__interrupt__)) void ACE_PPE_Flag2_IRQHandler( void );\r
  94 #else\r
  95 void ACE_PPE_Flag2_IRQHandler( void );\r
  96 #endif\r
  97 \r
  98 #if defined(__GNUC__)\r
  99 __attribute__((__interrupt__)) void ACE_PPE_Flag3_IRQHandler( void );\r
 100 #else\r
 101 void ACE_PPE_Flag3_IRQHandler( void );\r
 102 #endif\r
 103 \r
 104 #if defined(__GNUC__)\r
 105 __attribute__((__interrupt__)) void ACE_PPE_Flag4_IRQHandler( void );\r
 106 #else\r
 107 void ACE_PPE_Flag4_IRQHandler( void );\r
 108 #endif\r
 109 \r
 110 #if defined(__GNUC__)\r
 111 __attribute__((__interrupt__)) void ACE_PPE_Flag5_IRQHandler( void );\r
 112 #else\r
 113 void ACE_PPE_Flag5_IRQHandler( void );\r
 114 #endif\r
 115 \r
 116 #if defined(__GNUC__)\r
 117 __attribute__((__interrupt__)) void ACE_PPE_Flag6_IRQHandler( void );\r
 118 #else\r
 119 void ACE_PPE_Flag6_IRQHandler( void );\r
 120 #endif\r
 121 \r
 122 #if defined(__GNUC__)\r
 123 __attribute__((__interrupt__)) void ACE_PPE_Flag7_IRQHandler( void );\r
 124 #else\r
 125 void ACE_PPE_Flag7_IRQHandler( void );\r
 126 #endif\r
 127 \r
 128 #if defined(__GNUC__)\r
 129 __attribute__((__interrupt__)) void ACE_PPE_Flag8_IRQHandler( void );\r
 130 #else\r
 131 void ACE_PPE_Flag8_IRQHandler( void );\r
 132 #endif\r
 133 \r
 134 #if defined(__GNUC__)\r
 135 __attribute__((__interrupt__)) void ACE_PPE_Flag9_IRQHandler( void );\r
 136 #else\r
 137 void ACE_PPE_Flag9_IRQHandler( void );\r
 138 #endif\r
 139 \r
 140 #if defined(__GNUC__)\r
 141 __attribute__((__interrupt__)) void ACE_PPE_Flag10_IRQHandler( void );\r
 142 #else\r
 143 void ACE_PPE_Flag10_IRQHandler( void );\r
 144 #endif\r
 145 \r
 146 #if defined(__GNUC__)\r
 147 __attribute__((__interrupt__)) void ACE_PPE_Flag11_IRQHandler( void );\r
 148 #else\r
 149 void ACE_PPE_Flag11_IRQHandler( void );\r
 150 #endif\r
 151 \r
 152 #if defined(__GNUC__)\r
 153 __attribute__((__interrupt__)) void ACE_PPE_Flag12_IRQHandler( void );\r
 154 #else\r
 155 void ACE_PPE_Flag12_IRQHandler( void );\r
 156 #endif\r
 157 \r
 158 #if defined(__GNUC__)\r
 159 __attribute__((__interrupt__)) void ACE_PPE_Flag13_IRQHandler( void );\r
 160 #else\r
 161 void ACE_PPE_Flag13_IRQHandler( void );\r
 162 #endif\r
 163 \r
 164 #if defined(__GNUC__)\r
 165 __attribute__((__interrupt__)) void ACE_PPE_Flag14_IRQHandler( void );\r
 166 #else\r
 167 void ACE_PPE_Flag14_IRQHandler( void );\r
 168 #endif\r
 169 \r
 170 #if defined(__GNUC__)\r
 171 __attribute__((__interrupt__)) void ACE_PPE_Flag15_IRQHandler( void );\r
 172 #else\r
 173 void ACE_PPE_Flag15_IRQHandler( void );\r
 174 #endif\r
 175 \r
 176 #if defined(__GNUC__)\r
 177 __attribute__((__interrupt__)) void ACE_PPE_Flag16_IRQHandler( void );\r
 178 #else\r
 179 void ACE_PPE_Flag16_IRQHandler( void );\r
 180 #endif\r
 181 \r
 182 #if defined(__GNUC__)\r
 183 __attribute__((__interrupt__)) void ACE_PPE_Flag17_IRQHandler( void );\r
 184 #else\r
 185 void ACE_PPE_Flag17_IRQHandler( void );\r
 186 #endif\r
 187 \r
 188 #if defined(__GNUC__)\r
 189 __attribute__((__interrupt__)) void ACE_PPE_Flag18_IRQHandler( void );\r
 190 #else\r
 191 void ACE_PPE_Flag18_IRQHandler( void );\r
 192 #endif\r
 193 \r
 194 #if defined(__GNUC__)\r
 195 __attribute__((__interrupt__)) void ACE_PPE_Flag19_IRQHandler( void );\r
 196 #else\r
 197 void ACE_PPE_Flag19_IRQHandler( void );\r
 198 #endif\r
 199 \r
 200 #if defined(__GNUC__)\r
 201 __attribute__((__interrupt__)) void ACE_PPE_Flag20_IRQHandler( void );\r
 202 #else\r
 203 void ACE_PPE_Flag20_IRQHandler( void );\r
 204 #endif\r
 205 \r
 206 #if defined(__GNUC__)\r
 207 __attribute__((__interrupt__)) void ACE_PPE_Flag21_IRQHandler( void );\r
 208 #else\r
 209 void ACE_PPE_Flag21_IRQHandler( void );\r
 210 #endif\r
 211 \r
 212 #if defined(__GNUC__)\r
 213 __attribute__((__interrupt__)) void ACE_PPE_Flag22_IRQHandler( void );\r
 214 #else\r
 215 void ACE_PPE_Flag22_IRQHandler( void );\r
 216 #endif\r
 217 \r
 218 #if defined(__GNUC__)\r
 219 __attribute__((__interrupt__)) void ACE_PPE_Flag23_IRQHandler( void );\r
 220 #else\r
 221 void ACE_PPE_Flag23_IRQHandler( void );\r
 222 #endif\r
 223 \r
 224 #if defined(__GNUC__)\r
 225 __attribute__((__interrupt__)) void ACE_PPE_Flag24_IRQHandler( void );\r
 226 #else\r
 227 void ACE_PPE_Flag24_IRQHandler( void );\r
 228 #endif\r
 229 \r
 230 #if defined(__GNUC__)\r
 231 __attribute__((__interrupt__)) void ACE_PPE_Flag25_IRQHandler( void );\r
 232 #else\r
 233 void ACE_PPE_Flag25_IRQHandler( void );\r
 234 #endif\r
 235 \r
 236 #if defined(__GNUC__)\r
 237 __attribute__((__interrupt__)) void ACE_PPE_Flag26_IRQHandler( void );\r
 238 #else\r
 239 void ACE_PPE_Flag26_IRQHandler( void );\r
 240 #endif\r
 241 \r
 242 #if defined(__GNUC__)\r
 243 __attribute__((__interrupt__)) void ACE_PPE_Flag27_IRQHandler( void );\r
 244 #else\r
 245 void ACE_PPE_Flag27_IRQHandler( void );\r
 246 #endif\r
 247 \r
 248 #if defined(__GNUC__)\r
 249 __attribute__((__interrupt__)) void ACE_PPE_Flag28_IRQHandler( void );\r
 250 #else\r
 251 void ACE_PPE_Flag28_IRQHandler( void );\r
 252 #endif\r
 253 \r
 254 #if defined(__GNUC__)\r
 255 __attribute__((__interrupt__)) void ACE_PPE_Flag29_IRQHandler( void );\r
 256 #else\r
 257 void ACE_PPE_Flag29_IRQHandler( void );\r
 258 #endif\r
 259 \r
 260 #if defined(__GNUC__)\r
 261 __attribute__((__interrupt__)) void ACE_PPE_Flag30_IRQHandler( void );\r
 262 #else\r
 263 void ACE_PPE_Flag30_IRQHandler( void );\r
 264 #endif\r
 265 \r
 266 #if defined(__GNUC__)\r
 267 __attribute__((__interrupt__)) void ACE_PPE_Flag31_IRQHandler( void );\r
 268 #else\r
 269 void ACE_PPE_Flag31_IRQHandler( void );\r
 270 #endif\r
 271 \r
 272 /*-------------------------------------------------------------------------*//**\r
 273  *\r
 274  */\r
 275 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 276 extern ppe_flag_desc_t g_ppe_flags_desc_table[ACE_NB_OF_PPE_FLAGS];\r
 277 #endif\r
 278 \r
 279 extern ace_channel_desc_t g_ace_channel_desc_table[ACE_NB_OF_INPUT_CHANNELS];\r
 280 \r
 281 extern ace_adc_config_t g_ace_adc_config[ACE_NB_OF_ADC];\r
 282 \r
 283 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 284 /*-------------------------------------------------------------------------*//**\r
 285   Lookup table indexed on flag_id_t of the index of the flag's descriptor index\r
 286   in the flag descriptors table g_ppe_flags_desc_table[]\r
 287  */\r
 288 static ace_flag_handle_t g_ppe_flag_handles_lut[NB_OF_PPE_FLAGS];\r
 289 \r
 290 /*-------------------------------------------------------------------------*//**\r
 291  *\r
 292  */\r
 293 static flag_isr_t g_ppe_flags_isr_lut[NB_OF_PPE_FLAGS];\r
 294 \r
 295 /*-------------------------------------------------------------------------*//**\r
 296  *\r
 297  */\r
 298 static global_flag_isr_t g_ppe_global_flags_isr;\r
 299 \r
 300 /*-------------------------------------------------------------------------*//**\r
 301  *\r
 302  */\r
 303 static channel_flag_isr_t g_ppe_channel_flags_isr_lut[ACE_NB_OF_INPUT_CHANNELS];\r
 304 #endif\r
 305 \r
 306 /*-------------------------------------------------------------------------*//**\r
 307   Intialise the ACE driver's internal data structures used by flag control\r
 308   functions.\r
 309  */\r
 310 void ace_init_flags( void )\r
 311 {\r
 312     /* Ensure the generated ACE configuration files are consistent. */\r
 313     ASSERT(NB_OF_ACE_FLAG_HANDLES == ACE_NB_OF_PPE_FLAGS);\r
 314     \r
 315 #if (ACE_NB_OF_PPE_FLAGS > 0)    \r
 316     {\r
 317         uint8_t flag_idx;\r
 318         uint8_t channel_idx;\r
 319         \r
 320         for ( flag_idx = 0u; flag_idx < (uint8_t)NB_OF_PPE_FLAGS; ++flag_idx )\r
 321         {\r
 322             g_ppe_flags_isr_lut[flag_idx] = 0;\r
 323             g_ppe_flag_handles_lut[flag_idx] = INVALID_FLAG_HANDLE;\r
 324         }\r
 325     \r
 326         for ( flag_idx = 0u; flag_idx < (uint8_t)ACE_NB_OF_PPE_FLAGS; ++flag_idx )\r
 327         {\r
 328             ASSERT( g_ppe_flags_desc_table[flag_idx].flag_id < NB_OF_PPE_FLAGS );\r
 329             g_ppe_flag_handles_lut[g_ppe_flags_desc_table[flag_idx].flag_id] = (ace_flag_handle_t)flag_idx;\r
 330         }\r
 331         \r
 332         for ( channel_idx = 0u; channel_idx < (uint8_t)ACE_NB_OF_INPUT_CHANNELS; ++channel_idx )\r
 333         {\r
 334             g_ppe_channel_flags_isr_lut[channel_idx] = 0;\r
 335         }\r
 336         \r
 337         g_ppe_global_flags_isr = 0u;\r
 338     }\r
 339 #endif\r
 340 }\r
 341 \r
 342 /*-------------------------------------------------------------------------*//**\r
 343  *\r
 344  */\r
 345 uint32_t ACE_is_hysteresis_flag( ace_flag_handle_t   flag_handle )\r
 346 {\r
 347     uint32_t hysteresis = 0u;\r
 348     \r
 349 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 350     ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );\r
 351     \r
 352     if ( g_ppe_flags_desc_table[flag_handle].flag_type >= DUAL_HYSTERESIS_OVER )\r
 353     {\r
 354         hysteresis = 1u;\r
 355     }\r
 356 #endif\r
 357     return hysteresis;\r
 358 }\r
 359 \r
 360 /*-------------------------------------------------------------------------*//**\r
 361  *\r
 362  */\r
 363 uint32_t ACE_is_under_flag\r
 364 (\r
 365     ace_flag_handle_t   flag_handle\r
 366 )\r
 367 {\r
 368     uint32_t is_under = 0;\r
 369     \r
 370 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 371     const uint32_t flag_type_lut[NB_OF_FLAG_TYPES] =\r
 372     {\r
 373         0,  /* BASIC_THRESHOLD_OVER */\r
 374         1,  /* BASIC_THRESHOLD_UNDER */\r
 375         0,  /* STATE_FILTERED_OVER */\r
 376         1,  /* STATE_FILTERED_UNDER */\r
 377         0,  /* DUAL_HYSTERESIS_OVER */\r
 378         1,  /* DUAL_HYSTERESIS_UNDER */\r
 379         0,  /* IPMI_HYSTERESIS_OVER */\r
 380         1,  /* IPMI_HYSTERESIS_UNDER */\r
 381     };\r
 382     \r
 383     ASSERT(flag_handle < ACE_NB_OF_PPE_FLAGS);\r
 384     if (flag_handle < ACE_NB_OF_PPE_FLAGS)\r
 385     {\r
 386         uint8_t flag_type;\r
 387         flag_type = g_ppe_flags_desc_table[flag_handle].flag_type;\r
 388         ASSERT(flag_type < NB_OF_FLAG_TYPES);\r
 389         if (flag_type < NB_OF_FLAG_TYPES)\r
 390         {\r
 391             is_under = flag_type_lut[flag_type];\r
 392         }\r
 393     }\r
 394 #endif\r
 395     return is_under;\r
 396 }\r
 397 \r
 398 /*-------------------------------------------------------------------------*//**\r
 399   Mask of the threshold value bits within a PPE RAM meory location holding the\r
 400   threshold value for a flag.\r
 401  */\r
 402 #define PPE_RAM_THRESHOLD_MASK      0x0000FFFFuL\r
 403 \r
 404 /*-------------------------------------------------------------------------*//**\r
 405  * TODO: handle IPMI hysteresis flags\r
 406  */\r
 407 void ACE_set_flag_threshold\r
 408 (\r
 409     ace_flag_handle_t   flag_handle,\r
 410     uint16_t            new_threshold\r
 411 )\r
 412 {\r
 413 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 414     uint16_t ppe_offset;\r
 415     \r
 416     ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );\r
 417     \r
 418     if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )\r
 419     {\r
 420     \r
 421         ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset;\r
 422         \r
 423         if ( ACE_is_hysteresis_flag( flag_handle ) == 0u )\r
 424         {\r
 425             ACE->PPE_RAM_DATA[ppe_offset] = (ACE->PPE_RAM_DATA[ppe_offset] & (uint32_t)~PPE_RAM_THRESHOLD_MASK) + new_threshold;\r
 426         }\r
 427         else\r
 428         {\r
 429             uint16_t high_threshold;\r
 430             uint16_t low_threshold;\r
 431             ace_channel_handle_t channel_handle;\r
 432             uint16_t hysteresis;\r
 433             uint32_t adc_id;\r
 434             uint16_t adc_resolution;\r
 435             \r
 436             high_threshold = (uint16_t)(ACE->PPE_RAM_DATA[ppe_offset] & PPE_RAM_THRESHOLD_MASK);\r
 437             low_threshold = (uint16_t)(ACE->PPE_RAM_DATA[ppe_offset + 1u] & PPE_RAM_THRESHOLD_MASK);\r
 438             ASSERT(high_threshold > low_threshold);\r
 439             hysteresis = (uint16_t)(high_threshold - low_threshold) / 2u;\r
 440             \r
 441             channel_handle = g_ppe_flags_desc_table[flag_handle].channel_handle;\r
 442             adc_id = (uint32_t)(g_ace_channel_desc_table[channel_handle].signal_id) >> 4u;\r
 443             ASSERT( adc_id < (uint32_t)ACE_NB_OF_ADC );\r
 444             \r
 445             if ( adc_id < (uint32_t)ACE_NB_OF_ADC )\r
 446             {\r
 447                 adc_resolution = g_ace_adc_config[adc_id].adc_resolution - 1u;\r
 448                 \r
 449                 high_threshold = new_threshold + hysteresis;\r
 450                 if ( high_threshold > adc_resolution )\r
 451                 {\r
 452                     high_threshold = adc_resolution;\r
 453                 }\r
 454                 \r
 455                 if ( hysteresis > new_threshold )\r
 456                 {\r
 457                     low_threshold = 1u;\r
 458                 }\r
 459                 else\r
 460                 {\r
 461                     low_threshold = new_threshold - hysteresis;\r
 462                 }\r
 463                 \r
 464                 ACE->PPE_RAM_DATA[ppe_offset] = (ACE->PPE_RAM_DATA[ppe_offset] & ~PPE_RAM_THRESHOLD_MASK) + high_threshold;\r
 465                 ACE->PPE_RAM_DATA[ppe_offset + 1u] = (ACE->PPE_RAM_DATA[ppe_offset + 1u] & (uint32_t)~PPE_RAM_THRESHOLD_MASK) + low_threshold;\r
 466             }\r
 467         }\r
 468     }\r
 469 #endif\r
 470 }\r
 471 \r
 472 \r
 473 /*-------------------------------------------------------------------------*//**\r
 474  *\r
 475  */\r
 476 #define FLAG_OVER_UNDER_MASK    0x01u\r
 477 #define FLAG_OVER               0x00u\r
 478 #define FLAF_UNDER              0x01\r
 479 \r
 480 void ACE_set_flag_assertion\r
 481 (\r
 482     ace_flag_handle_t   flag_handle,\r
 483     uint16_t            assertion_value\r
 484 )\r
 485 {\r
 486 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 487     uint16_t ppe_offset;\r
 488     \r
 489     ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );\r
 490     \r
 491     if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )\r
 492     {\r
 493         if (ACE_is_hysteresis_flag(flag_handle))\r
 494         {\r
 495             uint8_t flag_direction;\r
 496             flag_direction = g_ppe_flags_desc_table[flag_handle].flag_type & FLAG_OVER_UNDER_MASK;\r
 497             \r
 498             if ( FLAG_OVER == flag_direction )\r
 499             {\r
 500                 ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset;\r
 501             }\r
 502             else\r
 503             {\r
 504                 ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset + 1u;\r
 505             }\r
 506         }\r
 507         else\r
 508         {\r
 509             ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset;\r
 510         }\r
 511         ACE->PPE_RAM_DATA[ppe_offset] = (ACE->PPE_RAM_DATA[ppe_offset] & ~PPE_RAM_THRESHOLD_MASK) + assertion_value;\r
 512     }\r
 513 #endif\r
 514 }\r
 515 \r
 516 /*-------------------------------------------------------------------------*//**\r
 517  *\r
 518  */\r
 519 void ACE_set_flag_deassertion\r
 520 (\r
 521     ace_flag_handle_t   flag_handle,\r
 522     uint16_t            assertion_value\r
 523 )\r
 524 {\r
 525 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 526     uint16_t ppe_offset;\r
 527     \r
 528     ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );\r
 529     ASSERT(ACE_is_hysteresis_flag(flag_handle));\r
 530     \r
 531     if ((flag_handle < NB_OF_ACE_FLAG_HANDLES)  && (ACE_is_hysteresis_flag(flag_handle)))\r
 532     {\r
 533         uint8_t flag_direction;\r
 534         flag_direction = g_ppe_flags_desc_table[flag_handle].flag_type & FLAG_OVER_UNDER_MASK;\r
 535         \r
 536         if ( FLAG_OVER == flag_direction )\r
 537         {\r
 538             ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset + 1u;\r
 539         }\r
 540         else\r
 541         {\r
 542             ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset;\r
 543         }\r
 544         \r
 545         ACE->PPE_RAM_DATA[ppe_offset] = (ACE->PPE_RAM_DATA[ppe_offset] & ~PPE_RAM_THRESHOLD_MASK) + assertion_value;\r
 546     }\r
 547 #endif\r
 548 }\r
 549 \r
 550 /*-------------------------------------------------------------------------*//**\r
 551  *\r
 552  */\r
 553 void\r
 554 ACE_set_flag_hysteresis\r
 555 (\r
 556     ace_flag_handle_t   flag_handle,\r
 557     uint16_t            adc_hysteresis\r
 558 )\r
 559 {\r
 560 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 561     uint16_t ppe_offset;\r
 562     uint32_t high_threshold;\r
 563     uint32_t low_threshold;\r
 564     uint32_t nominal_threshold;\r
 565     uint16_t adc_resolution;\r
 566     uint32_t adc_id;\r
 567     \r
 568     ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );\r
 569     ASSERT(ACE_is_hysteresis_flag(flag_handle));\r
 570     \r
 571     if ( ( flag_handle < NB_OF_ACE_FLAG_HANDLES ) && ( ACE_is_hysteresis_flag( flag_handle ) ) )\r
 572     {\r
 573         ace_channel_handle_t channel_handle;\r
 574         \r
 575         ppe_offset = g_ppe_flags_desc_table[flag_handle].threshold_ppe_offset;\r
 576         \r
 577         high_threshold = ACE->PPE_RAM_DATA[ppe_offset] & PPE_RAM_THRESHOLD_MASK;\r
 578         low_threshold = ACE->PPE_RAM_DATA[ppe_offset + 1u] & PPE_RAM_THRESHOLD_MASK;\r
 579         ASSERT(high_threshold > low_threshold);\r
 580         nominal_threshold = (low_threshold + ((high_threshold - low_threshold) / 2u));\r
 581         \r
 582         channel_handle = g_ppe_flags_desc_table[flag_handle].channel_handle;\r
 583         adc_id = (uint32_t)((uint32_t)g_ace_channel_desc_table[channel_handle].signal_id >> 4u);\r
 584         ASSERT( adc_id < (uint32_t)ACE_NB_OF_ADC );\r
 585         \r
 586         if ( adc_id < (uint32_t)ACE_NB_OF_ADC )\r
 587         {\r
 588             adc_resolution = g_ace_adc_config[adc_id].adc_resolution;\r
 589             \r
 590             high_threshold = nominal_threshold + adc_hysteresis;\r
 591             if ( high_threshold > adc_resolution )\r
 592             {\r
 593                 high_threshold = (uint32_t)adc_resolution - 1u;\r
 594             }\r
 595             \r
 596             if ( adc_hysteresis > nominal_threshold )\r
 597             {\r
 598                 low_threshold = 1u;\r
 599             }\r
 600             else\r
 601             {\r
 602                 low_threshold = nominal_threshold - adc_hysteresis;\r
 603             }\r
 604             \r
 605             ACE->PPE_RAM_DATA[ppe_offset] = (ACE->PPE_RAM_DATA[ppe_offset] & ~PPE_RAM_THRESHOLD_MASK) + high_threshold;\r
 606             ACE->PPE_RAM_DATA[ppe_offset + 1u] = (ACE->PPE_RAM_DATA[ppe_offset + 1u] & ~PPE_RAM_THRESHOLD_MASK) + low_threshold;\r
 607         }\r
 608     }\r
 609 #endif\r
 610 }\r
 611 \r
 612 \r
 613 /*-------------------------------------------------------------------------*//**\r
 614  *\r
 615  */\r
 616 void\r
 617 ACE_set_channel_hysteresis\r
 618 (\r
 619     ace_channel_handle_t    channel_handle,\r
 620     uint16_t                adc_hysteresis\r
 621 )\r
 622 {\r
 623 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 624     ace_flag_handle_t flag_handle;\r
 625     \r
 626     ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES );\r
 627     \r
 628     if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES )\r
 629     {\r
 630         uint16_t i;\r
 631         \r
 632         for( i = 0u; i < g_ace_channel_desc_table[channel_handle].nb_of_flags; ++i )\r
 633         {\r
 634             flag_handle = (ace_flag_handle_t)g_ace_channel_desc_table[channel_handle].p_flags_array[i];\r
 635             ACE_set_flag_hysteresis( flag_handle, adc_hysteresis );\r
 636         }\r
 637     }\r
 638 #endif\r
 639 }\r
 640 \r
 641 /*==============================================================================\r
 642  *\r
 643  */\r
 644 \r
 645 /*-------------------------------------------------------------------------*//**\r
 646   Masking a flag_id with FLAG_BIT_OFFSET_MASK results in the offset of the \r
 647   flag bit within a PPE__FLAGSn register.\r
 648  */\r
 649 #define FLAG_BIT_OFFSET_MASK       0x0000001FuL\r
 650 \r
 651 /*-------------------------------------------------------------------------*//**\r
 652   Shifting right a flag_id by FLAG_PPE_REG_SHIFT results in identifying the\r
 653   PPE_FLAGSn or PPE_SFFLAGS the flags belongs to.\r
 654  */\r
 655 #define FLAG_PPE_REG_SHIFT          5u\r
 656 \r
 657 /*-------------------------------------------------------------------------*//**\r
 658   There is a set of 5 PPE flag registers to control and report status of the PPE\r
 659   flags resulting in the PPE flags being grouped into 5 separate flag groups at\r
 660   the register level. Each register provides status or control for 32 flags.\r
 661  */\r
 662 #define NB_OF_FLAG_GROUPS       5u\r
 663 #define NB_OF_FLAGS_PER_GROUP   32u\r
 664 \r
 665 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 666 /*-------------------------------------------------------------------------*//**\r
 667   Lookup table of the address PPE_FLAGSn registers for fast reading of PPE\r
 668   status.\r
 669  */\r
 670 static volatile uint32_t * const g_ppe_flags_regs_lut[NB_OF_FLAG_GROUPS] =\r
 671 {\r
 672     &ACE->PPE_FLAGS0,\r
 673     &ACE->PPE_FLAGS1,\r
 674     &ACE->PPE_FLAGS2,\r
 675     &ACE->PPE_FLAGS3,\r
 676     &ACE->PPE_SFFLAGS\r
 677 };\r
 678 \r
 679 /*-------------------------------------------------------------------------*//**\r
 680   Lookup table of the address of the PPE flags interrupt enable registers.\r
 681  */\r
 682 static uint32_t volatile * const flags_irq_enable_regs_lut[NB_OF_FLAG_GROUPS] =\r
 683 {\r
 684     &ACE->PPE_FLAGS0_IRQ_EN,\r
 685     &ACE->PPE_FLAGS1_IRQ_EN,\r
 686     &ACE->PPE_FLAGS2_IRQ_EN,\r
 687     &ACE->PPE_FLAGS3_IRQ_EN,\r
 688     &ACE->PPE_SFFLAGS_IRQ_EN\r
 689 };\r
 690 \r
 691 /*-------------------------------------------------------------------------*//**\r
 692   Lookup table of the address of the PPE flags interrupt status registers.\r
 693  */\r
 694 static uint32_t volatile const * const flags_irq_status_regs_lut[NB_OF_FLAG_GROUPS] =\r
 695 {\r
 696     &ACE->PPE_FLAGS0_IRQ,\r
 697     &ACE->PPE_FLAGS1_IRQ,\r
 698     &ACE->PPE_FLAGS2_IRQ,\r
 699     &ACE->PPE_FLAGS3_IRQ,\r
 700     &ACE->PPE_SFFLAGS_IRQ\r
 701 };\r
 702 \r
 703 /*-------------------------------------------------------------------------*//**\r
 704   Lookup table of the address of the PPE flags interrupt clearing registers.\r
 705  */\r
 706 static uint32_t volatile * const flags_irq_clear_regs_lut[NB_OF_FLAG_GROUPS] =\r
 707 {\r
 708     &ACE->PPE_FLAGS0_IRQ_CLR,\r
 709     &ACE->PPE_FLAGS1_IRQ_CLR,\r
 710     &ACE->PPE_FLAGS2_IRQ_CLR,\r
 711     &ACE->PPE_FLAGS3_IRQ_CLR,\r
 712     &ACE->PPE_SFFLAGS_IRQ_CLR\r
 713 };\r
 714 \r
 715 /*-------------------------------------------------------------------------*//**\r
 716  *\r
 717  */\r
 718 static const IRQn_Type threshold_irqn_lut[NB_OF_THRESHOLD_IRQ] =\r
 719 {\r
 720     ACE_PPE_Flag0_IRQn,\r
 721     ACE_PPE_Flag1_IRQn,\r
 722     ACE_PPE_Flag2_IRQn,\r
 723     ACE_PPE_Flag3_IRQn,\r
 724     ACE_PPE_Flag4_IRQn,\r
 725     ACE_PPE_Flag5_IRQn,\r
 726     ACE_PPE_Flag6_IRQn,\r
 727     ACE_PPE_Flag7_IRQn,\r
 728     ACE_PPE_Flag8_IRQn,\r
 729     ACE_PPE_Flag9_IRQn,\r
 730     ACE_PPE_Flag10_IRQn,\r
 731     ACE_PPE_Flag11_IRQn,\r
 732     ACE_PPE_Flag12_IRQn,\r
 733     ACE_PPE_Flag13_IRQn,\r
 734     ACE_PPE_Flag14_IRQn,\r
 735     ACE_PPE_Flag15_IRQn,\r
 736     ACE_PPE_Flag16_IRQn,\r
 737     ACE_PPE_Flag17_IRQn,\r
 738     ACE_PPE_Flag18_IRQn,\r
 739     ACE_PPE_Flag19_IRQn,\r
 740     ACE_PPE_Flag20_IRQn,\r
 741     ACE_PPE_Flag21_IRQn,\r
 742     ACE_PPE_Flag22_IRQn,\r
 743     ACE_PPE_Flag23_IRQn,\r
 744     ACE_PPE_Flag24_IRQn,\r
 745     ACE_PPE_Flag25_IRQn,\r
 746     ACE_PPE_Flag26_IRQn,\r
 747     ACE_PPE_Flag27_IRQn,\r
 748     ACE_PPE_Flag28_IRQn,\r
 749     ACE_PPE_Flag29_IRQn,\r
 750     ACE_PPE_Flag30_IRQn,\r
 751     ACE_PPE_Flag31_IRQn\r
 752 };\r
 753 #endif\r
 754 \r
 755 /*-------------------------------------------------------------------------*//**\r
 756  */\r
 757 ace_flag_handle_t\r
 758 ACE_get_flag_handle\r
 759 (\r
 760     const uint8_t * p_sz_full_flag_name\r
 761 )\r
 762 {\r
 763     ace_flag_handle_t flag_handle = INVALID_FLAG_HANDLE;\r
 764 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 765     ace_flag_handle_t flag_idx;\r
 766     \r
 767     for ( flag_idx = (ace_flag_handle_t)0; flag_idx < NB_OF_ACE_FLAG_HANDLES; ++flag_idx )\r
 768     {\r
 769         if ( g_ppe_flags_desc_table[flag_idx].p_sz_flag_name != 0 )\r
 770         {\r
 771             int32_t diff;\r
 772             diff = strncmp( (const char *)p_sz_full_flag_name, (const char *)g_ppe_flags_desc_table[flag_idx].p_sz_flag_name, (size_t)MAX_FULL_FLAG_NAME_LENGTH );\r
 773             if ( 0 == diff )\r
 774             {\r
 775                 /* flag name found. */\r
 776                 flag_handle = (ace_flag_handle_t)flag_idx;\r
 777                 break;\r
 778             }\r
 779         }\r
 780     }\r
 781 #endif\r
 782     return flag_handle;\r
 783 }\r
 784 \r
 785 /*-------------------------------------------------------------------------*//**\r
 786  */\r
 787 int32_t\r
 788 ACE_get_flag_status\r
 789 (\r
 790     ace_flag_handle_t   flag_handle\r
 791 )\r
 792 {\r
 793     int32_t flag_state = UNKNOWN_FLAG;\r
 794 #if (ACE_NB_OF_PPE_FLAGS > 0)    \r
 795     ppe_flag_id_t flag_id;\r
 796     \r
 797     ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );\r
 798     \r
 799     if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )\r
 800     {\r
 801         uint32_t flag_bit_offset;\r
 802         uint32_t ppe_flag_group;\r
 803         uint32_t flag_id_mask;\r
 804         uint32_t flag_status;\r
 805 \r
 806         flag_id = g_ppe_flags_desc_table[flag_handle].flag_id;\r
 807         \r
 808         if ( flag_id < NB_OF_PPE_FLAGS )\r
 809         {\r
 810             flag_bit_offset = ((uint32_t)flag_id & FLAG_BIT_OFFSET_MASK);\r
 811             ppe_flag_group = ((uint32_t)flag_id >> FLAG_PPE_REG_SHIFT);\r
 812             flag_id_mask = 1uL << flag_bit_offset;\r
 813             flag_status = *(g_ppe_flags_regs_lut[ppe_flag_group]) & flag_id_mask;\r
 814             if ( flag_status > 0u )\r
 815             {\r
 816                 flag_state = FLAG_ASSERTED;\r
 817             }\r
 818             else\r
 819             {\r
 820                 flag_state = FLAG_NOT_ASSERTED;\r
 821             }\r
 822         }\r
 823 \r
 824     }\r
 825 #endif\r
 826     return flag_state;\r
 827 }\r
 828 \r
 829 \r
 830 /*-------------------------------------------------------------------------*//**\r
 831  */\r
 832 const uint8_t *\r
 833 ACE_get_flag_name\r
 834 (\r
 835     ace_flag_handle_t flag_handle\r
 836 )\r
 837 {\r
 838     const uint8_t * psz_flag_name = 0;\r
 839 #if (ACE_NB_OF_PPE_FLAGS > 0)    \r
 840     ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );\r
 841     \r
 842     if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )\r
 843     {\r
 844         psz_flag_name = g_ppe_flags_desc_table[flag_handle].p_sz_flag_name;\r
 845     }\r
 846 #endif\r
 847     return psz_flag_name;\r
 848 }\r
 849 \r
 850 /*-------------------------------------------------------------------------*//**\r
 851  */\r
 852 ace_channel_handle_t\r
 853 ACE_get_flag_channel\r
 854 (\r
 855     ace_flag_handle_t flag_handle\r
 856 )\r
 857 {\r
 858     ace_channel_handle_t channel_handle = INVALID_CHANNEL_HANDLE;\r
 859 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 860     ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );\r
 861     \r
 862     if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )\r
 863     {\r
 864         channel_handle = g_ppe_flags_desc_table[flag_handle].channel_handle;\r
 865     }\r
 866 #endif\r
 867     return channel_handle;\r
 868 }\r
 869 \r
 870 /*-------------------------------------------------------------------------*//**\r
 871  */\r
 872 uint32_t\r
 873 ACE_get_channel_flag_count\r
 874 (\r
 875     ace_channel_handle_t    channel_handle\r
 876 )\r
 877 {\r
 878     uint32_t flag_count = 0;\r
 879 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 880     ASSERT( channel_handle < ACE_NB_OF_INPUT_CHANNELS );\r
 881     if (channel_handle < ACE_NB_OF_INPUT_CHANNELS)\r
 882     {\r
 883         flag_count = g_ace_channel_desc_table[channel_handle].nb_of_flags;\r
 884     }\r
 885 #endif\r
 886     return flag_count;\r
 887 }\r
 888 \r
 889 /*-------------------------------------------------------------------------*//**\r
 890   \r
 891  */\r
 892 ace_flag_handle_t\r
 893 ACE_get_channel_first_flag\r
 894 (\r
 895     ace_channel_handle_t    channel_handle,\r
 896     uint16_t *              iterator\r
 897 )\r
 898 {\r
 899     ace_flag_handle_t flag_handle = INVALID_FLAG_HANDLE;\r
 900 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 901     ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES);\r
 902     \r
 903     *iterator = 0u;\r
 904     \r
 905     if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES)\r
 906     {\r
 907         if ( g_ace_channel_desc_table[channel_handle].nb_of_flags > 0u )\r
 908         {\r
 909             flag_handle = (ace_flag_handle_t)g_ace_channel_desc_table[channel_handle].p_flags_array[*iterator];\r
 910         }\r
 911     }\r
 912 #endif    \r
 913     return flag_handle;\r
 914 }\r
 915 \r
 916 /*-------------------------------------------------------------------------*//**\r
 917   \r
 918  */\r
 919 ace_flag_handle_t\r
 920 ACE_get_channel_next_flag\r
 921 (\r
 922     ace_channel_handle_t    channel_handle,\r
 923     uint16_t *              iterator\r
 924 )\r
 925 {\r
 926     ace_flag_handle_t flag_handle = INVALID_FLAG_HANDLE;\r
 927 #if (ACE_NB_OF_PPE_FLAGS > 0)    \r
 928     ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES);\r
 929 \r
 930     if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES)\r
 931     {\r
 932         ++(*iterator);\r
 933         \r
 934         if ( *iterator >= g_ace_channel_desc_table[channel_handle].nb_of_flags )\r
 935         {\r
 936             *iterator = 0u;\r
 937         }\r
 938     \r
 939         if ( g_ace_channel_desc_table[channel_handle].nb_of_flags > 0u )\r
 940         {\r
 941             flag_handle = (ace_flag_handle_t)g_ace_channel_desc_table[channel_handle].p_flags_array[*iterator];\r
 942         }\r
 943     }\r
 944 #endif\r
 945     return flag_handle;\r
 946 }\r
 947 \r
 948 \r
 949 /*-------------------------------------------------------------------------*//**\r
 950  *\r
 951  */\r
 952 void ACE_enable_channel_flags_irq\r
 953 (\r
 954     ace_channel_handle_t channel_handle\r
 955 )\r
 956 {\r
 957 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 958     uint32_t flag_idx;\r
 959     ace_flag_handle_t flag_handle;\r
 960     \r
 961     ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES );\r
 962     \r
 963     if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES )\r
 964     {\r
 965         for ( flag_idx = 0u; flag_idx < g_ace_channel_desc_table[channel_handle].nb_of_flags; ++flag_idx )\r
 966         {\r
 967             flag_handle = (ace_flag_handle_t)g_ace_channel_desc_table[channel_handle].p_flags_array[flag_idx];\r
 968             ACE_enable_flag_irq( flag_handle );\r
 969         }\r
 970     }\r
 971 #endif\r
 972 }\r
 973 \r
 974 /*-------------------------------------------------------------------------*//**\r
 975  *\r
 976  */\r
 977 void ACE_disable_channel_flags_irq\r
 978 (\r
 979     ace_channel_handle_t channel_handle\r
 980 )\r
 981 {\r
 982 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
 983     uint32_t flag_idx;\r
 984     ace_flag_handle_t flag_handle;\r
 985     \r
 986     ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES );\r
 987     \r
 988     if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES )\r
 989     {\r
 990         for ( flag_idx = 0u; flag_idx < g_ace_channel_desc_table[channel_handle].nb_of_flags; ++flag_idx )\r
 991         {\r
 992             flag_handle = (ace_flag_handle_t)g_ace_channel_desc_table[channel_handle].p_flags_array[flag_idx];\r
 993             ACE_disable_flag_irq( flag_handle );\r
 994         }\r
 995     }\r
 996 #endif\r
 997 }\r
 998 \r
 999 /*-------------------------------------------------------------------------*//**\r
1000  *\r
1001  */\r
1002 void ACE_clear_channel_flags_irq\r
1003 (\r
1004     ace_channel_handle_t channel_handle\r
1005 )\r
1006 {\r
1007 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
1008     uint32_t flag_idx;\r
1009     ace_flag_handle_t flag_handle;\r
1010     \r
1011     ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES );\r
1012     \r
1013     if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES )\r
1014     {\r
1015         for ( flag_idx = 0u; flag_idx < g_ace_channel_desc_table[channel_handle].nb_of_flags; ++flag_idx )\r
1016         {\r
1017             flag_handle = (ace_flag_handle_t)g_ace_channel_desc_table[channel_handle].p_flags_array[flag_idx];\r
1018             ACE_clear_flag_irq( flag_handle );\r
1019         }\r
1020     }\r
1021 #endif\r
1022 }\r
1023 \r
1024 /*-------------------------------------------------------------------------*//**\r
1025  *\r
1026  */\r
1027 void ACE_enable_flag_irq\r
1028 (\r
1029     ace_flag_handle_t flag_handle\r
1030 )\r
1031 {\r
1032 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
1033     ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );\r
1034     \r
1035     if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )\r
1036     {\r
1037         ppe_flag_id_t flag_id;\r
1038         uint32_t flag_bit_offset;\r
1039         uint32_t ppe_flag_group;\r
1040         uint32_t flag_id_mask;\r
1041         \r
1042         flag_id = g_ppe_flags_desc_table[flag_handle].flag_id;\r
1043         \r
1044         ASSERT( flag_id < NB_OF_PPE_FLAGS );\r
1045     \r
1046         flag_bit_offset = ((uint32_t)flag_id & FLAG_BIT_OFFSET_MASK);\r
1047         ppe_flag_group = ((uint32_t)flag_id >> FLAG_PPE_REG_SHIFT);\r
1048         flag_id_mask = 1uL << flag_bit_offset;\r
1049         \r
1050         ASSERT( ppe_flag_group < NB_OF_FLAG_GROUPS );\r
1051         \r
1052         if ( ppe_flag_group < NB_OF_FLAG_GROUPS )\r
1053         {\r
1054             *(flags_irq_enable_regs_lut[ppe_flag_group]) |= flag_id_mask;\r
1055         }\r
1056         \r
1057         NVIC_EnableIRQ( threshold_irqn_lut[flag_bit_offset] );\r
1058     }\r
1059 #endif\r
1060 }\r
1061 \r
1062 /*-------------------------------------------------------------------------*//**\r
1063  *\r
1064  */\r
1065 void ACE_disable_flag_irq\r
1066 (\r
1067     ace_flag_handle_t flag_handle\r
1068 )\r
1069 {\r
1070 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
1071     ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );\r
1072     \r
1073     if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )\r
1074     {\r
1075         ppe_flag_id_t flag_id;\r
1076         uint32_t flag_bit_offset;\r
1077         uint32_t ppe_flag_group;\r
1078         uint32_t flag_id_mask;\r
1079         \r
1080         flag_id = g_ppe_flags_desc_table[flag_handle].flag_id;\r
1081         \r
1082         ASSERT( flag_id < NB_OF_PPE_FLAGS );\r
1083     \r
1084         flag_bit_offset = ((uint32_t)flag_id & FLAG_BIT_OFFSET_MASK);\r
1085         ppe_flag_group = ((uint32_t)flag_id >> FLAG_PPE_REG_SHIFT);\r
1086         flag_id_mask = 1uL << flag_bit_offset;\r
1087         \r
1088         ASSERT( ppe_flag_group < NB_OF_FLAG_GROUPS );\r
1089         \r
1090         if ( ppe_flag_group < NB_OF_FLAG_GROUPS )\r
1091         {\r
1092             *(flags_irq_enable_regs_lut[ppe_flag_group]) &= (uint32_t)~flag_id_mask;\r
1093         }\r
1094     }\r
1095 #endif\r
1096 }\r
1097 \r
1098 /*-------------------------------------------------------------------------*//**\r
1099  *\r
1100  */\r
1101 void ACE_clear_flag_irq\r
1102 (\r
1103     ace_flag_handle_t flag_handle\r
1104 )\r
1105 {\r
1106 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
1107     ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );\r
1108     \r
1109     if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )\r
1110     {\r
1111         ppe_flag_id_t flag_id;\r
1112         uint32_t flag_bit_offset;\r
1113         uint32_t ppe_flag_group;\r
1114         uint32_t flag_id_mask;\r
1115         \r
1116         flag_id = g_ppe_flags_desc_table[flag_handle].flag_id;\r
1117         \r
1118         ASSERT( flag_id < NB_OF_PPE_FLAGS );\r
1119     \r
1120         flag_bit_offset = ((uint32_t)flag_id & FLAG_BIT_OFFSET_MASK);\r
1121         ppe_flag_group = ((uint32_t)flag_id >> FLAG_PPE_REG_SHIFT);\r
1122         flag_id_mask = 1uL << flag_bit_offset;\r
1123         \r
1124         ASSERT( ppe_flag_group < NB_OF_FLAG_GROUPS );\r
1125         \r
1126         if ( ppe_flag_group < NB_OF_FLAG_GROUPS )\r
1127         {\r
1128             *(flags_irq_clear_regs_lut[ppe_flag_group]) |= flag_id_mask;\r
1129         }\r
1130     }\r
1131 #endif\r
1132 }\r
1133 \r
1134 /*-------------------------------------------------------------------------*//**\r
1135  *\r
1136  */\r
1137 void ACE_register_flag_isr\r
1138 (\r
1139     ace_flag_handle_t   flag_handle,\r
1140     flag_isr_t          flag_isr\r
1141 )\r
1142 {\r
1143 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
1144     ppe_flag_id_t flag_id;\r
1145     \r
1146     ASSERT( flag_handle < NB_OF_ACE_FLAG_HANDLES );\r
1147     \r
1148     if ( flag_handle < NB_OF_ACE_FLAG_HANDLES )\r
1149     {\r
1150         flag_id = g_ppe_flags_desc_table[flag_handle].flag_id;\r
1151         \r
1152         ASSERT( flag_id < NB_OF_PPE_FLAGS );\r
1153         \r
1154         if ( flag_id < NB_OF_PPE_FLAGS )\r
1155         {\r
1156             g_ppe_flags_isr_lut[flag_id] = flag_isr;\r
1157         }\r
1158     }\r
1159 #endif\r
1160 }\r
1161 \r
1162 /*-------------------------------------------------------------------------*//**\r
1163  *\r
1164  */\r
1165 void ACE_register_channel_flags_isr\r
1166 (\r
1167     ace_channel_handle_t    channel_handle,\r
1168     channel_flag_isr_t      channel_flag_isr\r
1169 )\r
1170 {\r
1171 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
1172     ASSERT( channel_handle < NB_OF_ACE_CHANNEL_HANDLES );\r
1173     \r
1174     if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES )\r
1175     {\r
1176         g_ppe_channel_flags_isr_lut[channel_handle] = channel_flag_isr;\r
1177     }\r
1178 #endif\r
1179 }\r
1180 \r
1181 /*-------------------------------------------------------------------------*//**\r
1182  *\r
1183  */\r
1184 void ACE_register_global_flags_isr\r
1185 (\r
1186     global_flag_isr_t  global_flag_isr\r
1187 )\r
1188 {\r
1189 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
1190     g_ppe_global_flags_isr = global_flag_isr;\r
1191 #endif\r
1192 }\r
1193 \r
1194 \r
1195 /*==============================================================================\r
1196  *\r
1197  */\r
1198  \r
1199 /*-------------------------------------------------------------------------*//**\r
1200  * Actual PPE flag interrupt service routines:\r
1201  */\r
1202 \r
1203 static void process_flag_irq( uint8_t threshold_flag_id )\r
1204 {\r
1205 #if (ACE_NB_OF_PPE_FLAGS > 0)\r
1206     uint8_t flag_group;\r
1207     uint32_t threshold_flag_mask;\r
1208     ppe_flag_id_t flag_id;\r
1209     uint32_t irq_enable_reg;\r
1210     uint32_t irq_status_reg;\r
1211     uint32_t irq_active;\r
1212     \r
1213     threshold_flag_mask = 1uL << threshold_flag_id;\r
1214     \r
1215     \r
1216     for ( flag_group = 0u; flag_group < NB_OF_FLAG_GROUPS; ++flag_group )\r
1217     {\r
1218         irq_enable_reg = *flags_irq_enable_regs_lut[flag_group];\r
1219         irq_status_reg = *flags_irq_status_regs_lut[flag_group];\r
1220         irq_active = threshold_flag_mask & irq_enable_reg & irq_status_reg;\r
1221         \r
1222         if ( irq_active )\r
1223         {\r
1224             ace_flag_handle_t flag_handle;\r
1225             ace_channel_handle_t channel_handle;\r
1226             \r
1227             flag_id = (ppe_flag_id_t)((flag_group * NB_OF_FLAGS_PER_GROUP) + threshold_flag_id);\r
1228             flag_handle = g_ppe_flag_handles_lut[flag_id];\r
1229             \r
1230             /* Call individual flag handler */\r
1231             if ( g_ppe_flags_isr_lut[flag_id] != 0 ) \r
1232             {\r
1233                 g_ppe_flags_isr_lut[flag_id]( flag_handle );\r
1234             }\r
1235             \r
1236             /* Call the channel flag handler. */\r
1237             channel_handle = g_ppe_flags_desc_table[flag_handle].channel_handle;\r
1238             if ( channel_handle < NB_OF_ACE_CHANNEL_HANDLES )\r
1239             {\r
1240                 if ( g_ppe_channel_flags_isr_lut[channel_handle] != 0 )\r
1241                 {\r
1242                     g_ppe_channel_flags_isr_lut[channel_handle]( flag_handle );\r
1243                 }\r
1244             }\r
1245             \r
1246             /* Call the global flag handler. */\r
1247             if ( g_ppe_global_flags_isr != 0 )\r
1248             {\r
1249                 g_ppe_global_flags_isr( flag_handle, channel_handle );\r
1250             }\r
1251             \r
1252             /* Clear the flag interrupt */\r
1253             *flags_irq_clear_regs_lut[flag_group] |= threshold_flag_mask;\r
1254         }\r
1255     }\r
1256 #endif\r
1257 }\r
1258 \r
1259 /*-------------------------------------------------------------------------*//**\r
1260  *\r
1261  */\r
1262 #if defined(__GNUC__)\r
1263 __attribute__((__interrupt__)) void ACE_PPE_Flag0_IRQHandler( void )\r
1264 #else\r
1265 void ACE_PPE_Flag0_IRQHandler( void )\r
1266 #endif\r
1267 {\r
1268     process_flag_irq( THRESHOLD_FLAG0 );\r
1269     NVIC_ClearPendingIRQ( ACE_PPE_Flag0_IRQn );\r
1270 }\r
1271 \r
1272 /*-------------------------------------------------------------------------*//**\r
1273  *\r
1274  */\r
1275 #if defined(__GNUC__)\r
1276 __attribute__((__interrupt__)) void ACE_PPE_Flag1_IRQHandler( void )\r
1277 #else\r
1278 void ACE_PPE_Flag1_IRQHandler( void )\r
1279 #endif\r
1280 {\r
1281     process_flag_irq( THRESHOLD_FLAG1 );\r
1282     NVIC_ClearPendingIRQ( ACE_PPE_Flag1_IRQn );\r
1283 }\r
1284 \r
1285 /*-------------------------------------------------------------------------*//**\r
1286  *\r
1287  */\r
1288 #if defined(__GNUC__)\r
1289 __attribute__((__interrupt__)) void ACE_PPE_Flag2_IRQHandler( void )\r
1290 #else\r
1291 void ACE_PPE_Flag2_IRQHandler( void )\r
1292 #endif\r
1293 {\r
1294     process_flag_irq( THRESHOLD_FLAG2 );\r
1295     NVIC_ClearPendingIRQ( ACE_PPE_Flag2_IRQn );\r
1296 }\r
1297 \r
1298 /*-------------------------------------------------------------------------*//**\r
1299  *\r
1300  */\r
1301 #if defined(__GNUC__)\r
1302 __attribute__((__interrupt__)) void ACE_PPE_Flag3_IRQHandler( void )\r
1303 #else\r
1304 void ACE_PPE_Flag3_IRQHandler( void )\r
1305 #endif\r
1306 {\r
1307     process_flag_irq( THRESHOLD_FLAG3 );\r
1308     NVIC_ClearPendingIRQ( ACE_PPE_Flag3_IRQn );\r
1309 }\r
1310 \r
1311 /*-------------------------------------------------------------------------*//**\r
1312  *\r
1313  */\r
1314 #if defined(__GNUC__)\r
1315 __attribute__((__interrupt__)) void ACE_PPE_Flag4_IRQHandler( void )\r
1316 #else\r
1317 void ACE_PPE_Flag4_IRQHandler( void )\r
1318 #endif\r
1319 {\r
1320     process_flag_irq( THRESHOLD_FLAG4 );\r
1321     NVIC_ClearPendingIRQ( ACE_PPE_Flag4_IRQn );\r
1322 }\r
1323 \r
1324 /*-------------------------------------------------------------------------*//**\r
1325  *\r
1326  */\r
1327 #if defined(__GNUC__)\r
1328 __attribute__((__interrupt__)) void ACE_PPE_Flag5_IRQHandler( void )\r
1329 #else\r
1330 void ACE_PPE_Flag5_IRQHandler( void )\r
1331 #endif\r
1332 {\r
1333     process_flag_irq( THRESHOLD_FLAG5 );\r
1334     NVIC_ClearPendingIRQ( ACE_PPE_Flag5_IRQn );\r
1335 }\r
1336 \r
1337 /*-------------------------------------------------------------------------*//**\r
1338  *\r
1339  */\r
1340 #if defined(__GNUC__)\r
1341 __attribute__((__interrupt__)) void ACE_PPE_Flag6_IRQHandler( void )\r
1342 #else\r
1343 void ACE_PPE_Flag6_IRQHandler( void )\r
1344 #endif\r
1345 {\r
1346     process_flag_irq( THRESHOLD_FLAG6 );\r
1347     NVIC_ClearPendingIRQ( ACE_PPE_Flag6_IRQn );\r
1348 }\r
1349 \r
1350 /*-------------------------------------------------------------------------*//**\r
1351  *\r
1352  */\r
1353 #if defined(__GNUC__)\r
1354 __attribute__((__interrupt__)) void ACE_PPE_Flag7_IRQHandler( void )\r
1355 #else\r
1356 void ACE_PPE_Flag7_IRQHandler( void )\r
1357 #endif\r
1358 {\r
1359     process_flag_irq( THRESHOLD_FLAG7 );\r
1360     NVIC_ClearPendingIRQ( ACE_PPE_Flag7_IRQn );\r
1361 }\r
1362 \r
1363 /*-------------------------------------------------------------------------*//**\r
1364  *\r
1365  */\r
1366 #if defined(__GNUC__)\r
1367 __attribute__((__interrupt__)) void ACE_PPE_Flag8_IRQHandler( void )\r
1368 #else\r
1369 void ACE_PPE_Flag8_IRQHandler( void )\r
1370 #endif\r
1371 {\r
1372     process_flag_irq( THRESHOLD_FLAG8 );\r
1373     NVIC_ClearPendingIRQ( ACE_PPE_Flag8_IRQn );\r
1374 }\r
1375 \r
1376 /*-------------------------------------------------------------------------*//**\r
1377  *\r
1378  */\r
1379 #if defined(__GNUC__)\r
1380 __attribute__((__interrupt__)) void ACE_PPE_Flag9_IRQHandler( void )\r
1381 #else\r
1382 void ACE_PPE_Flag9_IRQHandler( void )\r
1383 #endif\r
1384 {\r
1385     process_flag_irq( THRESHOLD_FLAG9 );\r
1386     NVIC_ClearPendingIRQ( ACE_PPE_Flag9_IRQn );\r
1387 }\r
1388 \r
1389 /*-------------------------------------------------------------------------*//**\r
1390  *\r
1391  */\r
1392 #if defined(__GNUC__)\r
1393 __attribute__((__interrupt__)) void ACE_PPE_Flag10_IRQHandler( void )\r
1394 #else\r
1395 void ACE_PPE_Flag10_IRQHandler( void )\r
1396 #endif\r
1397 {\r
1398     process_flag_irq( THRESHOLD_FLAG10 );\r
1399     NVIC_ClearPendingIRQ( ACE_PPE_Flag10_IRQn );\r
1400 }\r
1401 \r
1402 /*-------------------------------------------------------------------------*//**\r
1403  *\r
1404  */\r
1405 #if defined(__GNUC__)\r
1406 __attribute__((__interrupt__)) void ACE_PPE_Flag11_IRQHandler( void )\r
1407 #else\r
1408 void ACE_PPE_Flag11_IRQHandler( void )\r
1409 #endif\r
1410 {\r
1411     process_flag_irq( THRESHOLD_FLAG11 );\r
1412     NVIC_ClearPendingIRQ( ACE_PPE_Flag11_IRQn );\r
1413 }\r
1414 \r
1415 /*-------------------------------------------------------------------------*//**\r
1416  *\r
1417  */\r
1418 #if defined(__GNUC__)\r
1419 __attribute__((__interrupt__)) void ACE_PPE_Flag12_IRQHandler( void )\r
1420 #else\r
1421 void ACE_PPE_Flag12_IRQHandler( void )\r
1422 #endif\r
1423 {\r
1424     process_flag_irq( THRESHOLD_FLAG12 );\r
1425     NVIC_ClearPendingIRQ( ACE_PPE_Flag12_IRQn );\r
1426 }\r
1427 \r
1428 /*-------------------------------------------------------------------------*//**\r
1429  *\r
1430  */\r
1431 #if defined(__GNUC__)\r
1432 __attribute__((__interrupt__)) void ACE_PPE_Flag13_IRQHandler( void )\r
1433 #else\r
1434 void ACE_PPE_Flag13_IRQHandler( void )\r
1435 #endif\r
1436 {\r
1437     process_flag_irq( THRESHOLD_FLAG13 );\r
1438     NVIC_ClearPendingIRQ( ACE_PPE_Flag13_IRQn );\r
1439 }\r
1440 \r
1441 /*-------------------------------------------------------------------------*//**\r
1442  *\r
1443  */\r
1444 #if defined(__GNUC__)\r
1445 __attribute__((__interrupt__)) void ACE_PPE_Flag14_IRQHandler( void )\r
1446 #else\r
1447 void ACE_PPE_Flag14_IRQHandler( void )\r
1448 #endif\r
1449 {\r
1450     process_flag_irq( THRESHOLD_FLAG14 );\r
1451     NVIC_ClearPendingIRQ( ACE_PPE_Flag14_IRQn );\r
1452 }\r
1453 \r
1454 /*-------------------------------------------------------------------------*//**\r
1455  *\r
1456  */\r
1457 #if defined(__GNUC__)\r
1458 __attribute__((__interrupt__)) void ACE_PPE_Flag15_IRQHandler( void )\r
1459 #else\r
1460 void ACE_PPE_Flag15_IRQHandler( void )\r
1461 #endif\r
1462 {\r
1463     process_flag_irq( THRESHOLD_FLAG15 );\r
1464     NVIC_ClearPendingIRQ( ACE_PPE_Flag15_IRQn );\r
1465 }\r
1466 \r
1467 /*-------------------------------------------------------------------------*//**\r
1468  *\r
1469  */\r
1470 #if defined(__GNUC__)\r
1471 __attribute__((__interrupt__)) void ACE_PPE_Flag16_IRQHandler( void )\r
1472 #else\r
1473 void ACE_PPE_Flag16_IRQHandler( void )\r
1474 #endif\r
1475 {\r
1476     process_flag_irq( THRESHOLD_FLAG16 );\r
1477     NVIC_ClearPendingIRQ( ACE_PPE_Flag16_IRQn );\r
1478 }\r
1479 \r
1480 /*-------------------------------------------------------------------------*//**\r
1481  *\r
1482  */\r
1483 #if defined(__GNUC__)\r
1484 __attribute__((__interrupt__)) void ACE_PPE_Flag17_IRQHandler( void )\r
1485 #else\r
1486 void ACE_PPE_Flag17_IRQHandler( void )\r
1487 #endif\r
1488 {\r
1489     process_flag_irq( THRESHOLD_FLAG17 );\r
1490     NVIC_ClearPendingIRQ( ACE_PPE_Flag17_IRQn );\r
1491 }\r
1492 \r
1493 /*-------------------------------------------------------------------------*//**\r
1494  *\r
1495  */\r
1496 #if defined(__GNUC__)\r
1497 __attribute__((__interrupt__)) void ACE_PPE_Flag18_IRQHandler( void )\r
1498 #else\r
1499 void ACE_PPE_Flag18_IRQHandler( void )\r
1500 #endif\r
1501 {\r
1502     process_flag_irq( THRESHOLD_FLAG18 );\r
1503     NVIC_ClearPendingIRQ( ACE_PPE_Flag18_IRQn );\r
1504 }\r
1505 \r
1506 /*-------------------------------------------------------------------------*//**\r
1507  *\r
1508  */\r
1509 #if defined(__GNUC__)\r
1510 __attribute__((__interrupt__)) void ACE_PPE_Flag19_IRQHandler( void )\r
1511 #else\r
1512 void ACE_PPE_Flag19_IRQHandler( void )\r
1513 #endif\r
1514 {\r
1515     process_flag_irq( THRESHOLD_FLAG19 );\r
1516     NVIC_ClearPendingIRQ( ACE_PPE_Flag19_IRQn );\r
1517 }\r
1518 \r
1519 /*-------------------------------------------------------------------------*//**\r
1520  *\r
1521  */\r
1522 #if defined(__GNUC__)\r
1523 __attribute__((__interrupt__)) void ACE_PPE_Flag20_IRQHandler( void )\r
1524 #else\r
1525 void ACE_PPE_Flag20_IRQHandler( void )\r
1526 #endif\r
1527 {\r
1528     process_flag_irq( THRESHOLD_FLAG20 );\r
1529     NVIC_ClearPendingIRQ( ACE_PPE_Flag20_IRQn );\r
1530 }\r
1531 \r
1532 /*-------------------------------------------------------------------------*//**\r
1533  *\r
1534  */\r
1535 #if defined(__GNUC__)\r
1536 __attribute__((__interrupt__)) void ACE_PPE_Flag21_IRQHandler( void )\r
1537 #else\r
1538 void ACE_PPE_Flag21_IRQHandler( void )\r
1539 #endif\r
1540 {\r
1541     process_flag_irq( THRESHOLD_FLAG21 );\r
1542     NVIC_ClearPendingIRQ( ACE_PPE_Flag21_IRQn );\r
1543 }\r
1544 \r
1545 /*-------------------------------------------------------------------------*//**\r
1546  *\r
1547  */\r
1548 #if defined(__GNUC__)\r
1549 __attribute__((__interrupt__)) void ACE_PPE_Flag22_IRQHandler( void )\r
1550 #else\r
1551 void ACE_PPE_Flag22_IRQHandler( void )\r
1552 #endif\r
1553 {\r
1554     process_flag_irq( THRESHOLD_FLAG22 );\r
1555     NVIC_ClearPendingIRQ( ACE_PPE_Flag22_IRQn );\r
1556 }\r
1557 \r
1558 /*-------------------------------------------------------------------------*//**\r
1559  *\r
1560  */\r
1561 #if defined(__GNUC__)\r
1562 __attribute__((__interrupt__)) void ACE_PPE_Flag23_IRQHandler( void )\r
1563 #else\r
1564 void ACE_PPE_Flag23_IRQHandler( void )\r
1565 #endif\r
1566 {\r
1567     process_flag_irq( THRESHOLD_FLAG23 );\r
1568     NVIC_ClearPendingIRQ( ACE_PPE_Flag23_IRQn );\r
1569 }\r
1570 \r
1571 /*-------------------------------------------------------------------------*//**\r
1572  *\r
1573  */\r
1574 #if defined(__GNUC__)\r
1575 __attribute__((__interrupt__)) void ACE_PPE_Flag24_IRQHandler( void )\r
1576 #else\r
1577 void ACE_PPE_Flag24_IRQHandler( void )\r
1578 #endif\r
1579 {\r
1580     process_flag_irq( THRESHOLD_FLAG24 );\r
1581     NVIC_ClearPendingIRQ( ACE_PPE_Flag24_IRQn );\r
1582 }\r
1583 \r
1584 /*-------------------------------------------------------------------------*//**\r
1585  *\r
1586  */\r
1587 #if defined(__GNUC__)\r
1588 __attribute__((__interrupt__)) void ACE_PPE_Flag25_IRQHandler( void )\r
1589 #else\r
1590 void ACE_PPE_Flag25_IRQHandler( void )\r
1591 #endif\r
1592 {\r
1593     process_flag_irq( THRESHOLD_FLAG25 );\r
1594     NVIC_ClearPendingIRQ( ACE_PPE_Flag25_IRQn );\r
1595 }\r
1596 \r
1597 /*-------------------------------------------------------------------------*//**\r
1598  *\r
1599  */\r
1600 #if defined(__GNUC__)\r
1601 __attribute__((__interrupt__)) void ACE_PPE_Flag26_IRQHandler( void )\r
1602 #else\r
1603 void ACE_PPE_Flag26_IRQHandler( void )\r
1604 #endif\r
1605 {\r
1606     process_flag_irq( THRESHOLD_FLAG26 );\r
1607     NVIC_ClearPendingIRQ( ACE_PPE_Flag26_IRQn );\r
1608 }\r
1609 \r
1610 /*-------------------------------------------------------------------------*//**\r
1611  *\r
1612  */\r
1613 #if defined(__GNUC__)\r
1614 __attribute__((__interrupt__)) void ACE_PPE_Flag27_IRQHandler( void )\r
1615 #else\r
1616 void ACE_PPE_Flag27_IRQHandler( void )\r
1617 #endif\r
1618 {\r
1619     process_flag_irq( THRESHOLD_FLAG27 );\r
1620     NVIC_ClearPendingIRQ( ACE_PPE_Flag27_IRQn );\r
1621 }\r
1622 \r
1623 /*-------------------------------------------------------------------------*//**\r
1624  *\r
1625  */\r
1626 #if defined(__GNUC__)\r
1627 __attribute__((__interrupt__)) void ACE_PPE_Flag28_IRQHandler( void )\r
1628 #else\r
1629 void ACE_PPE_Flag28_IRQHandler( void )\r
1630 #endif\r
1631 {\r
1632     process_flag_irq( THRESHOLD_FLAG28 );\r
1633     NVIC_ClearPendingIRQ( ACE_PPE_Flag28_IRQn );\r
1634 }\r
1635 \r
1636 /*-------------------------------------------------------------------------*//**\r
1637  *\r
1638  */\r
1639 #if defined(__GNUC__)\r
1640 __attribute__((__interrupt__)) void ACE_PPE_Flag29_IRQHandler( void )\r
1641 #else\r
1642 void ACE_PPE_Flag29_IRQHandler( void )\r
1643 #endif\r
1644 {\r
1645     process_flag_irq( THRESHOLD_FLAG29 );\r
1646     NVIC_ClearPendingIRQ( ACE_PPE_Flag29_IRQn );\r
1647 }\r
1648 \r
1649 /*-------------------------------------------------------------------------*//**\r
1650  *\r
1651  */\r
1652 #if defined(__GNUC__)\r
1653 __attribute__((__interrupt__)) void ACE_PPE_Flag30_IRQHandler( void )\r
1654 #else\r
1655 void ACE_PPE_Flag30_IRQHandler( void )\r
1656 #endif\r
1657 {\r
1658     process_flag_irq( THRESHOLD_FLAG30 );\r
1659     NVIC_ClearPendingIRQ( ACE_PPE_Flag30_IRQn );\r
1660 }\r
1661 \r
1662 /*-------------------------------------------------------------------------*//**\r
1663  *\r
1664  */\r
1665 #if defined(__GNUC__)\r
1666 __attribute__((__interrupt__)) void ACE_PPE_Flag31_IRQHandler( void )\r
1667 #else\r
1668 void ACE_PPE_Flag31_IRQHandler( void )\r
1669 #endif\r
1670 {\r
1671     process_flag_irq( THRESHOLD_FLAG31 );\r
1672     NVIC_ClearPendingIRQ( ACE_PPE_Flag31_IRQn );\r
1673 }\r
1674 \r
1675 #ifdef __cplusplus\r
1676 }\r
1677 #endif\r
1678 \r