1 /*******************************************************************************
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2 * (c) Copyright 2007-2008 Actel Corporation. All rights reserved.
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4 * SmartFusion microcontroller subsystem I2C bare metal software driver public
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7 * SVN $Revision: 2150 $
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8 * SVN $Date: 2010-02-11 14:39:24 +0000 (Thu, 11 Feb 2010) $
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10 /*=========================================================================*//**
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11 @mainpage SmartFusion MSS I2C Bare Metal Driver.
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13 @section intro_sec Introduction
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14 The SmartFusion™ microcontroller subsystem (MSS) includes two I2C peripherals
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15 for serial communication. This driver provides a set of functions for
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16 controlling the MSS I2Cs as part of a bare metal system where no operating
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17 system is available. These drivers can be adapted for use as part of an
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18 operating system, but the implementation of the adaptation layer between this
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19 driver and the operating system's driver model is outside the scope of this
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22 @section hw_dependencies Hardware Flow Dependencies
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23 The configuration of all features of the MSS I2Cs is covered by this driver
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24 with the exception of the SmartFusion IOMUX configuration. SmartFusion allows
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25 multiple non-concurrent uses of some external pins through IOMUX configuration.
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26 This feature allows optimization of external pin usage by assigning external
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27 pins for use by either the microcontroller subsystem or the FPGA fabric. The
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28 MSS I2Cs serial signals are routed through IOMUXes to the SmartFusion device
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29 external pins. These IOMUXes are automatically configured correctly by the MSS
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30 configurator tool in the hardware flow when the MSS I2Cs are enabled in that
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31 tool. You must ensure that the MSS I2Cs are enabled by the MSS configurator
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32 tool in the hardware flow; otherwise the serial inputs and outputs will not be
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33 connected to the chip's external pins. For more information on IOMUX, refer to
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34 the IOMUX section of the SmartFusion Datasheet.
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35 The base address, register addresses and interrupt number assignment for the
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36 MSS I2C blocks are defined as constants in the SmartFusion CMSIS-PAL. You must
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37 ensure that the SmartFusion CMSIS-PAL is either included in the software tool
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38 chain used to build your project or is included in your project.
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40 @section theory_op Theory of Operation
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41 The MSS I2C driver functions are grouped into the following categories:
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42 • Initialization and configuration functions
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44 • I2C master operations – functions to handle write, read and write-read transactions
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45 • I2C slave operations – functions to handle write, read and write-read transactions
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47 Initialization and Configuration
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48 The MSS I2C driver is initialized through a call to the MSS_I2C_init()
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49 function. This function takes the MSS I2C's configuration as parameters. The
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50 MSS_I2C_init() function must be called before any other MSS I2C driver
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51 functions can be called. The first parameter of the MSS_I2C_init() function
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52 is a pointer to one of two global data structures used by the driver to
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53 store state information for each MSS I2C. A pointer to these data structures
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54 is also used as first parameter to any of the driver functions to identify
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55 which MSS I2C will be used by the called function. The names of these two
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56 data structures are g_mss_i2c0 and g_mss_i2c1. Therefore any call to an MSS
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57 I2C driver function should be of the form MSS_I2C_function_name( &g_mss_i2c0, ... )
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58 or MSS_I2C_function_name( &g_mss_i2c1, ... ).
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59 The MSS_I2C_init() function call for each MSS I2C also takes the I2C serial
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60 address assigned to the MSS I2C and the serial clock divider to be used to
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61 generate its I2C clock as configuration parameters.
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64 The MSS I2C driver is interrupt driven and it enables and disables the
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65 generation of interrupts by MSS I2C at various times when it is operating.
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66 The driver automatically handles MSS I2C interrupts internally, including
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67 enabling disabling and clearing MSS I2C interrupts in the Cortex-M3
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68 interrupt controller when required.
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69 The function MSS_I2C_register_write_handler() is used to register a write
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70 handler function with the MSS I2C driver that it will call on completion of
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71 an I2C write transaction by the MSS I2C slave. It is your responsibility to
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72 create and register the implementation of this handler function that will
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73 process or trigger the processing of the received data.
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75 The MSS I2C driver is designed to handle three types of I2C transaction:
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76 • Write transactions
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78 • Write-read transactions
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81 The master I2C device initiates a write transaction by sending a START bit
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82 as soon as the bus becomes free. The START bit is followed by the 7-bit
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83 serial address of the target slave device followed by the read/write bit
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84 indicating the direction of the transaction. The slave acknowledges receipt
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85 of it’s address with an acknowledge bit. The master sends data one byte at
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86 a time to the slave, which must acknowledge receipt of each byte for the
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87 next byte to be sent. The master sends a STOP bit to complete the transaction.
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88 The slave can abort the transaction by replying with a non-acknowledge bit
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89 instead of an acknowledge.
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90 The application programmer can choose not to send a STOP bit at the end of
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91 the transaction causing the next transaction to begin with a repeated START bit.
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94 The master I2C device initiates a read transaction by sending a START bit
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95 as soon as the bus becomes free. The START bit is followed by the 7-bit
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96 serial address of the target slave device followed by the read/write bit
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97 indicating the direction of the transaction. The slave acknowledges receipt
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98 of it’s slave address with an acknowledge bit. The slave sends data one byte
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99 at a time to the master, which must acknowledge receipt of each byte for the
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100 next byte to be sent. The master sends a non-acknowledge bit following the
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101 last byte it wishes to read followed by a STOP bit.
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102 The application programmer can choose not to send a STOP bit at the end of
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103 the transaction causing the next transaction to begin with a repeated START bit.
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105 Write-read transaction
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106 The write-read transaction is a combination of a write transaction
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107 immediately followed by a read transaction. There is no STOP bit between
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108 the write and read phases of a write-read transaction. A repeated START
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109 bit is sent between the write and read phases.
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110 The write-read transaction is typically used to send a command or offset
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111 in the write transaction specifying the logical data to be transferred
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112 during the read phase.
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113 The application programmer can choose not to send a STOP bit at the end of
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114 the transaction causing the next transaction to begin with a repeated START bit.
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117 The application can use the MSS_I2C_write(), MSS_I2C_read() and MSS_I2C_write_read()
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118 functions to initiate an I2C bus transaction. The application can then wait
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119 for the transaction to complete using the MSS_I2C_wait_complete() function
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120 or poll the status of the I2C transaction using the MSS_I2C_get_status()
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121 function until it returns a value different from MSS_I2C_IN_PROGRESS.
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124 The configuration of the MSS I2C driver to operate as an I2C slave requires
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125 the use of the following functions:
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126 • MSS_I2C_set_slave_tx_buffer()
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127 • MSS_I2C_set_slave_rx_buffer()
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128 • MSS_I2C_set_slave_mem_offset_length()
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129 • MSS_I2C_register_write_handler()
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130 • MSS_I2C_enable_slave_rx()
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131 Use of all functions is not required if the slave I2C does not need to support
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132 all types of I2C read transactions. The subsequent sections list the functions
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133 that must be used to support each transaction type.
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135 Responding to read transactions
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136 The following functions are used to configure the MSS I2C driver to respond
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137 to I2C read transactions:
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138 • MSS_I2C_set_slave_tx_buffer()
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139 • MSS_I2C_enable_slave_rx()
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140 The function MSS_I2C_set_slave_tx_buffer() specifies the data buffer that
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141 will be transmitted when the I2C slave is the target of an I2C read
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142 transaction. It is then up to the application to manage the content of that
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143 buffer to control the data that will be transmitted to the I2C master as a
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144 result of the read transaction.
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145 The function MSS_I2C_enable_slave_rx() enables the MSS I2C hardware instance
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146 to respond to I2C transactions. It must be called after the MSS I2C driver
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147 has been configured to respond to the required transaction types.
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149 Responding to write transactions
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150 The following functions are used to configure the MSS I2C driver to respond
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151 to I2C write transactions:
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152 • MSS_I2C_set_slave_rx_buffer()
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153 • MSS_I2C_register_write_handler()
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154 • MSS_I2C_enable_slave_rx()
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155 The function MSS_I2C_set_slave_rx_buffer() specifies the data buffer that
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156 will be used to store the data received by the I2C slave when it is the
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157 target an I2C write transaction.
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158 The function MSS_I2C_register_write_handler() specifies the handler function
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159 that must be called on completion of the I2C write transaction. It is this
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160 handler function that will process or trigger the processing of the received
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162 The function MSS_I2C_enable_slave_rx() enables the MSS I2C hardware instance
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163 to respond to I2C transactions. It must be called after the MSS I2C driver
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164 has been configured to respond to the required transaction types.
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166 Responding to write-read transactions
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167 The following functions are used to configure the MSS I2C driver to respond
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168 to write-read transactions:
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169 • MSS_I2C_set_slave_tx_buffer()
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170 • MSS_I2C_set_slave_rx_buffer()
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171 • MSS_I2C_set_slave_mem_offset_length()
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172 • MSS_I2C_enable_slave_rx()
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173 The function MSS_I2C_set_slave_mem_offset_length() specifies the number of
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174 bytes expected by the I2C slave during the write phase of the write-read
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176 The function MSS_I2C_set_slave_tx_buffer() specifies the data that will be
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177 transmitted to the I2C master during the read phase of the write-read
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178 transaction. The value received by the I2C slave during the write phase of
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179 the transaction will be used as an index into the transmit buffer specified
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180 by this function to decide which part of the transmit buffer will be
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181 transmitted to the I2C master as part of the read phase of the write-read
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183 The function MSS_I2C_set_slave_rx_buffer() specifies the data buffer that
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184 will be used to store the data received by the I2C slave during the write
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185 phase of the write-read transaction. This buffer must be at least large
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186 enough to accommodate the number of bytes specified through the
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187 MSS_I2C_set_slave_mem_offset_length() function.
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188 The function MSS_I2C_enable_slave_rx() enables the MSS I2C hardware
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189 instance to respond to I2C transactions. It must be called after the MSS
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190 I2C driver has been configured to respond to the required transaction types.
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191 *//*=========================================================================*/
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195 #include "../../CMSIS/a2fxxxm3.h"
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201 /*-------------------------------------------------------------------------*//**
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202 The mss_i2c_clock_divider_t type is used to specify the divider to be applied
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203 to the MSS I2C BCLK signal in order to generate the I2C clock.
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205 typedef enum mss_i2c_clock_divider {
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206 MSS_I2C_PCLK_DIV_256 = 0,
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207 MSS_I2C_PCLK_DIV_224,
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208 MSS_I2C_PCLK_DIV_192,
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209 MSS_I2C_PCLK_DIV_160,
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210 MSS_I2C_PCLK_DIV_960,
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211 MSS_I2C_PCLK_DIV_120,
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212 MSS_I2C_PCLK_DIV_60,
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214 } mss_i2c_clock_divider_t;
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216 /*-------------------------------------------------------------------------*//**
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217 The MSS_I2C_RELEASE_BUS constant is used to specify the options parameter to
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218 functions MSS_I2C_read(), MSS_I2C_write() and MSS_I2C_write_read() to indicate
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219 that a STOP bit must be generated at the end of the I2C transaction to release
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222 #define MSS_I2C_RELEASE_BUS 0x00
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224 /*-------------------------------------------------------------------------*//**
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225 The MSS_I2C_HOLD_BUS constant is used to specify the options parameter to
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226 functions MSS_I2C_read(), MSS_I2C_write() and MSS_I2C_write_read() to indicate
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227 that a STOP bit must not be generated at the end of the I2C transaction in
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228 order to retain the bus ownership. This will cause the next transaction to
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229 begin with a repeated START bit and no STOP bit between the transactions.
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231 #define MSS_I2C_HOLD_BUS 0x01
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233 /*-------------------------------------------------------------------------*//**
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234 The mss_i2c_status_t type is used to report the status of I2C transactions.
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236 typedef enum mss_i2c_status
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238 MSS_I2C_SUCCESS = 0,
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239 MSS_I2C_IN_PROGRESS,
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241 } mss_i2c_status_t;
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243 /*-------------------------------------------------------------------------*//**
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244 The mss_i2c_slave_handler_ret_t type is used by slave write handler functions
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245 to indicate whether the received data buffer should be released or not.
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247 typedef enum mss_i2c_slave_handler_ret {
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248 MSS_I2C_REENABLE_SLAVE_RX = 0,
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249 MSS_I2C_PAUSE_SLAVE_RX = 1
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250 } mss_i2c_slave_handler_ret_t;
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252 /*-------------------------------------------------------------------------*//**
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253 Slave write handler functions prototype.
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254 ------------------------------------------------------------------------------
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255 This defines the function prototype that must be followed by MSS I2C slave
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256 write handler functions. These functions are registered with the MSS I2C driver
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257 through the MSS_I2C_register_write_handler() function.
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259 Declaring and Implementing Slave Write Handler Functions:
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260 Slave write handler functions should follow the following prototype:
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261 mss_i2c_slave_handler_ret_t write_handler( uint8_t * data, uint16_t size );
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263 The data parameter is a pointer to a buffer (received data buffer) holding
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264 the data written to the MSS I2C slave.
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265 The size parameter is the number of bytes held in the received data buffer.
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266 Handler functions must return one of the following values:
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267 • MSS_I2C_REENABLE_SLAVE_RX
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268 • MSS_I2C_PAUSE_SLAVE_RX.
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269 If the handler function returns MSS_I2C_REENABLE_SLAVE_RX, the driver will
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270 release the received data buffer and allow further I2C write transactions to
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271 the MSS I2C slave to take place.
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272 If the handler function returns MSS_I2C_PAUSE_SLAVE_RX, the MSS I2C slave
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273 will respond to subsequent write requests with a non-acknowledge bit (NACK),
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274 until the received data buffer content has been processed by some other part
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275 of the software application.
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276 A call to MSS_I2C_enable_slave_rx() is required at some point after
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277 returning MSS_I2C_PAUSE_SLAVE_RX in order to release the received data
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278 buffer so it can be used to store data received by subsequent I2C write
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281 typedef mss_i2c_slave_handler_ret_t (*mss_i2c_slave_wr_handler_t)( uint8_t *, uint16_t );
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283 /*-------------------------------------------------------------------------*//**
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285 ------------------------------------------------------------------------------
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286 There is one instance of this structure for each of the microcontroller
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287 subsystem's I2Cs. Instances of this structure are used to identify a specific
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288 I2C. A pointer to an instance of the mss_i2c_instance_t structure is passed as
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289 the first parameter to MSS I2C driver functions to identify which I2C should
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290 perform the requested operation.
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292 typedef struct mss_i2c_instance
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294 uint_fast8_t ser_address;
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295 /* Transmit related info:*/
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296 uint_fast8_t target_addr;
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298 /* Current transaction type (WRITE, READ, RANDOM_READ)*/
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299 uint8_t transaction;
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301 uint_fast16_t random_read_addr;
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305 /* I2C hardware instance identification */
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307 I2C_TypeDef * hw_reg;
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308 I2C_BitBand_TypeDef * hw_reg_bit;
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311 const uint8_t * tx_buffer;
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312 uint_fast16_t tx_size;
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313 uint_fast16_t tx_idx;
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317 uint8_t * rx_buffer;
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318 uint_fast16_t rx_size;
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319 uint_fast16_t rx_idx;
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321 /* status variable: */
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322 volatile mss_i2c_status_t status;
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325 uint_fast8_t slave_mem_offset_length;
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326 mss_i2c_slave_wr_handler_t slave_write_handler;
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328 } mss_i2c_instance_t;
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330 /*-------------------------------------------------------------------------*//**
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331 This instance of mss_i2c_instance_t holds all data related to the operations
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332 performed by MSS I2C 0. A pointer to g_mss_i2c0 is passed as the first
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333 parameter to MSS I2C driver functions to indicate that MSS I2C 0 should
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334 perform the requested operation.
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336 extern mss_i2c_instance_t g_mss_i2c0;
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338 /*-------------------------------------------------------------------------*//**
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339 This instance of mss_i2c_instance_t holds all data related to the operations
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340 performed by MSS I2C 1. A pointer to g_mss_i2c1 is passed as the first
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341 parameter to MSS I2C driver functions to indicate that MSS I2C 1 should
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342 perform the requested operation.
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344 extern mss_i2c_instance_t g_mss_i2c1;
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346 /*-------------------------------------------------------------------------*//**
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347 MSS I2C initialisation routine.
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348 ------------------------------------------------------------------------------
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349 The MSS_I2C_init() function initializes and configures hardware and data
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350 structures of one of the SmartFusion MSS I2Cs.
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351 ------------------------------------------------------------------------------
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353 The this_i2c parameter is a pointer to an mss_i2c_instance_t structure
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354 identifying the MSS I2C hardware block to be initialized. There are two such
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355 data structures, g_mss_i2c0 and g_mss_i2c1, associated with MSS I2C 0 and
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356 MSS I2C 1 respectively. This parameter must point to either the g_mss_i2c0
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357 or g_mss_i2c1 global data structure defined within the I2C driver.
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359 @param ser_address:
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360 This parameter sets the I2C serial address being initialized. It is the I2C
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361 bus address to which the MSS I2C instance will respond. Any 8 bit address is
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364 @param ser_clock_speed:
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365 This parameter sets the I2C serial clock frequency. It selects the divider
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366 that will be used to generate the serial clock from the APB clock. It can be
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367 one of the following:
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368 • MSS_I2C_PCLK_DIV_256
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369 • MSS_I2C_PCLK_DIV_224
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370 • MSS_I2C_PCLK_DIV_192
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371 • MSS_I2C_PCLK_DIV_160
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372 • MSS_I2C_PCLK_DIV_960
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373 • MSS_I2C_PCLK_DIV_120
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374 • MSS_I2C_PCLK_DIV_60
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375 • MSS_I2C_BCLK_DIV_8
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379 mss_i2c_instance_t * this_i2c,
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380 uint8_t ser_address,
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381 mss_i2c_clock_divider_t ser_clock_speed
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384 /*******************************************************************************
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385 *******************************************************************************
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387 * Master specific functions
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389 * The following functions are only used within an I2C master's implementation.
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392 /*-------------------------------------------------------------------------*//**
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393 I2C master write function.
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394 ------------------------------------------------------------------------------
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395 This function initiates an I2C master write transaction. This function returns
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396 immediately after initiating the transaction. The content of the write buffer
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397 passed as parameter should not be modified until the write transaction
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398 completes. It also means that the memory allocated for the write buffer should
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399 not be freed or go out of scope before the write completes. You can check for
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400 the write transaction completion using the MSS_I2C_status() function.
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401 ------------------------------------------------------------------------------
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403 The this_i2c parameter is a pointer to an mss_i2c_instance_t structure
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404 identifying the MSS I2C hardware block that will perform the requested
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405 function. There are two such data structures, g_mss_i2c0 and g_mss_i2c1,
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406 associated with MSS I2C 0 and MSS I2C 1 respectively. This parameter must
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407 point to either the g_mss_i2c0 or g_mss_i2c1 global data structure defined
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408 within the I2C driver.
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410 @param serial_addr:
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411 This parameter specifies the serial address of the target I2C device.
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413 @param write_buffer:
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414 This parameter is a pointer to a buffer holding the data to be written to
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415 the target I2C device.
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416 Care must be taken not to release the memory used by this buffer before the
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417 write transaction completes. For example, it is not appropriate to return
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418 from a function allocating this buffer as an array variable before the write
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419 transaction completes as this would result in the buffer's memory being
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420 de-allocated from the stack when the function returns. This memory could
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421 then be subsequently reused and modified causing unexpected data to be
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422 written to the target I2C device.
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425 Number of bytes held in the write_buffer to be written to the target I2C
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429 The options parameter is used to indicate if the I2C bus should be released
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430 on completion of the write transaction. Using the MSS_I2C_RELEASE_BUS
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431 constant for the options parameter causes a STOP bit to be generated at the
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432 end of the write transaction causing the bus to be released for other I2C
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433 devices to use. Using the MSS_I2C_HOLD_BUS constant as options parameter
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434 prevents a STOP bit from being generated at the end of the write
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435 transaction, preventing other I2C devices from initiating a bus transaction.
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439 mss_i2c_instance_t * this_i2c,
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440 uint8_t serial_addr,
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441 const uint8_t * write_buffer,
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442 uint16_t write_size,
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446 /*-------------------------------------------------------------------------*//**
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448 ------------------------------------------------------------------------------
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449 This function initiates an I2C master read transaction. This function returns
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450 immediately after initiating the transaction.
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451 The content of the read buffer passed as parameter should not be modified
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452 until the read transaction completes. It also means that the memory allocated
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453 for the read buffer should not be freed or go out of scope before the read
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454 completes. You can check for the read transaction completion using the
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455 MSS_I2C_status() function.
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456 ------------------------------------------------------------------------------
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458 The this_i2c parameter is a pointer to an mss_i2c_instance_t structure
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459 identifying the MSS I2C hardware block that will perform the requested
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460 function. There are two such data structures, g_mss_i2c0 and g_mss_i2c1,
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461 associated with MSS I2C 0 and MSS I2C 1 respectively. This parameter must
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462 point to either the g_mss_i2c0 or g_mss_i2c1 global data structure defined
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463 within the I2C driver.
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465 @param serial_addr:
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466 This parameter specifies the serial address of the target I2C device.
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469 Pointer to a buffer where the data received from the target device will be
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471 Care must be taken not to release the memory used by this buffer before the
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472 read transaction completes. For example, it is not appropriate to return
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473 from a function allocating this buffer as an array variable before the read
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474 transaction completes as this would result in the buffer's memory being
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475 de-allocated from the stack when the function returns. This memory could
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476 then be subsequently reallocated resulting in the read transaction
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477 corrupting the newly allocated memory.
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480 This parameter is the number of bytes to read from the target device. This
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481 size must not exceed the size of the read_buffer buffer.
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484 The options parameter is used to indicate if the I2C bus should be released
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485 on completion of the read transaction. Using the MSS_I2C_RELEASE_BUS
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486 constant for the options parameter causes a STOP bit to be generated at the
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487 end of the read transaction causing the bus to be released for other I2C
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488 devices to use. Using the MSS_I2C_HOLD_BUS constant as options parameter
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489 prevents a STOP bit from being generated at the end of the read transaction,
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490 preventing other I2C devices from initiating a bus transaction.
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494 mss_i2c_instance_t * this_i2c,
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495 uint8_t serial_addr,
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496 uint8_t * read_buffer,
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497 uint16_t read_size,
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501 /*-------------------------------------------------------------------------*//**
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502 I2C master write-read
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503 ------------------------------------------------------------------------------
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504 This function initiates an I2C write-read transaction where data is first
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505 written to the target device before issuing a restart condition and changing
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506 the direction of the I2C transaction in order to read from the target device.
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507 ------------------------------------------------------------------------------
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509 The this_i2c parameter is a pointer to an mss_i2c_instance_t structure
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510 identifying the MSS I2C hardware block that will perform the requested
\r
511 function. There are two such data structures, g_mss_i2c0 and g_mss_i2c1,
\r
512 associated with MSS I2C 0 and MSS I2C 1 respectively. This parameter must
\r
513 point to either the g_mss_i2c0 or g_mss_i2c1 global data structure defined
\r
514 within the I2C driver.
\r
516 @param serial_addr:
\r
517 This parameter specifies the serial address of the target I2C device.
\r
519 @param addr_offset:
\r
520 This parameter is a pointer to the buffer containing the data that will be
\r
521 sent to the slave during the write phase of the write-read transaction. This
\r
522 data is typically used to specify an address offset specifying to the I2C
\r
523 slave device what data it must return during the read phase of the
\r
524 write-read transaction.
\r
526 @param offset_size:
\r
527 This parameter specifies the number of offset bytes to be written during the
\r
528 write phase of the write-read transaction. This is typically the size of the
\r
529 buffer pointed to by the addr_offset parameter.
\r
531 @param read_buffer:
\r
532 This parameter is a pointer to the buffer where the data read from the I2C
\r
533 slave will be stored.
\r
536 This parameter specifies the number of bytes to read from the target I2C
\r
537 slave device. This size must not exceed the size of the buffer pointed to by
\r
538 the read_buffer parameter.
\r
541 The options parameter is used to indicate if the I2C bus should be released
\r
542 on completion of the write-read transaction. Using the MSS_I2C_RELEASE_BUS
\r
543 constant for the options parameter causes a STOP bit to be generated at the
\r
544 end of the write-read transaction causing the bus to be released for other
\r
545 I2C devices to use. Using the MSS_I2C_HOLD_BUS constant as options parameter
\r
546 prevents a STOP bit from being generated at the end of the write-read
\r
547 transaction, preventing other I2C devices from initiating a bus transaction.
\r
549 void MSS_I2C_write_read
\r
551 mss_i2c_instance_t * this_i2c,
\r
552 uint8_t serial_addr,
\r
553 const uint8_t * addr_offset,
\r
554 uint16_t offset_size,
\r
555 uint8_t * read_buffer,
\r
556 uint16_t read_size,
\r
560 /*-------------------------------------------------------------------------*//**
\r
562 ------------------------------------------------------------------------------
\r
563 This function indicates the current state of a MSS I2C instance.
\r
564 ------------------------------------------------------------------------------
\r
566 The this_i2c parameter is a pointer to an mss_i2c_instance_t structure
\r
567 identifying the MSS I2C hardware block that will perform the requested
\r
568 function. There are two such data structures, g_mss_i2c0 and g_mss_i2c1,
\r
569 associated with MSS I2C 0 and MSS I2C 1 respectively. This parameter must
\r
570 point to either the g_mss_i2c0 or g_mss_i2c1 global data structure defined
\r
571 within the I2C driver.
\r
572 ------------------------------------------------------------------------------
\r
574 The return value indicates the current state of a MSS I2C instance or the
\r
575 outcome of the previous transaction if no transaction is in progress.
\r
576 Possible return values are:
\r
578 The last I2C transaction has completed successfully.
\r
580 There is an I2C transaction in progress.
\r
582 The last I2C transaction failed.
\r
585 mss_i2c_status_t MSS_I2C_get_status
\r
587 mss_i2c_instance_t * this_i2c
\r
590 /*-------------------------------------------------------------------------*//**
\r
591 Wait for I2C transaction completion.
\r
592 ------------------------------------------------------------------------------
\r
593 This function waits for the current I2C transaction to complete. The return
\r
594 value indicates whether the last I2C transaction was successful, or is still
\r
595 in progress, or failed.
\r
596 ------------------------------------------------------------------------------
\r
598 The this_i2c parameter is a pointer to an mss_i2c_instance_t structure
\r
599 identifying the MSS I2C hardware block that will perform the requested
\r
600 function. There are two such data structures, g_mss_i2c0 and g_mss_i2c1,
\r
601 associated with MSS I2C 0 and MSS I2C 1 respectively. This parameter must
\r
602 point to either the g_mss_i2c0 or g_mss_i2c1 global data structure defined
\r
603 within the I2C driver.
\r
604 ------------------------------------------------------------------------------
\r
606 The return value indicates the outcome of the last I2C transaction. It can
\r
607 be one of the following:
\r
609 The last I2C transaction has completed successfully.
\r
610 MSS_I2C_IN_PROGRESS
\r
611 The current I2C transaction is still in progress.
\r
613 The last I2C transaction failed.
\r
615 mss_i2c_status_t MSS_I2C_wait_complete
\r
617 mss_i2c_instance_t * this_i2c
\r
621 /*******************************************************************************
\r
622 *******************************************************************************
\r
624 * Slave specific functions
\r
626 * The following functions are only used within the implementation of an I2C
\r
630 /*-------------------------------------------------------------------------*//**
\r
631 I2C slave transmit buffer configuration.
\r
632 ------------------------------------------------------------------------------
\r
633 This function specifies the memory buffer holding the data that will be sent
\r
634 to the I2C master when this MSS I2C instance is the target of an I2C read or
\r
635 write-read transaction.
\r
636 ------------------------------------------------------------------------------
\r
638 The this_i2c parameter is a pointer to an mss_i2c_instance_t structure
\r
639 identifying the MSS I2C hardware block that will perform the requested
\r
640 function. There are two such data structures, g_mss_i2c0 and g_mss_i2c1,
\r
641 associated with MSS I2C 0 and MSS I2C 1 respectively. This parameter must
\r
642 point to either the g_mss_i2c0 or g_mss_i2c1 global data structure defined
\r
643 within the I2C driver.
\r
646 This parameter is a pointer to the memory buffer holding the data to be
\r
647 returned to the I2C master when this MSS I2C instance is the target of an
\r
648 I2C read or write-read transaction.
\r
651 Size of the transmit buffer pointed to by the tx_buffer parameter.
\r
653 void MSS_I2C_set_slave_tx_buffer
\r
655 mss_i2c_instance_t * this_i2c,
\r
656 uint8_t * tx_buffer,
\r
660 /*-------------------------------------------------------------------------*//**
\r
661 I2C slave receive buffer configuration.
\r
662 ------------------------------------------------------------------------------
\r
663 This function specifies the memory buffer that will be used by the MSS I2C
\r
664 instance to receive data when it is a slave. This buffer is the memory where
\r
665 data will be stored when the MSS I2C is the target of an I2C master write
\r
666 transaction (i.e. when it is the slave).
\r
667 ------------------------------------------------------------------------------
\r
669 The this_i2c parameter is a pointer to an mss_i2c_instance_t structure
\r
670 identifying the MSS I2C hardware block that will perform the requested
\r
671 function. There are two such data structures, g_mss_i2c0 and g_mss_i2c1,
\r
672 associated with MSS I2C 0 and MSS I2C 1 respectively. This parameter must
\r
673 point to either the g_mss_i2c0 or g_mss_i2c1 global data structure defined
\r
674 within the I2C driver.
\r
677 This parameter is a pointer to the memory buffer allocated by the caller
\r
678 software to be used as a slave receive buffer.
\r
681 Size of the slave receive buffer. This is the amount of memory that is
\r
682 allocated to the buffer pointed to by rx_buffer.
\r
683 Note: This buffer size will indirectly specify the maximum I2C write
\r
684 transaction length this MSS I2C instance can be the target of. This
\r
685 is because this MSS I2C instance will respond to further received
\r
686 bytes with a non-acknowledge bit (NACK) as soon as its receive
\r
687 buffer is full. This will cause the write transaction to fail.
\r
689 void MSS_I2C_set_slave_rx_buffer
\r
691 mss_i2c_instance_t * this_i2c,
\r
692 uint8_t * rx_buffer,
\r
696 /*-------------------------------------------------------------------------*//**
\r
697 I2C slave memory offset length configuration.
\r
698 ------------------------------------------------------------------------------
\r
699 This function is used as part of the configuration of a MSS I2C instance for
\r
700 operation as a slave supporting write-read transactions. It specifies the
\r
701 number of bytes expected as part of the write phase of a write-read
\r
702 transaction. The bytes received during the write phase of a write-read
\r
703 transaction will be interpreted as an offset into the slave’s transmit buffer.
\r
704 This allows random access into the I2C slave transmit buffer from a remote
\r
706 ------------------------------------------------------------------------------
\r
708 The this_i2c parameter is a pointer to an mss_i2c_instance_t structure
\r
709 identifying the MSS I2C hardware block that will perform the requested
\r
710 function. There are two such data structures, g_mss_i2c0 and g_mss_i2c1,
\r
711 associated with MSS I2C 0 and MSS I2C 1 respectively. This parameter must
\r
712 point to either the g_mss_i2c0 or g_mss_i2c1 global data structure defined
\r
713 within the I2C driver.
\r
715 @param offset_length:
\r
716 The offset_length parameter configures the number of bytes to be interpreted
\r
717 by the MSS I2C slave as a memory offset value during the write phase of
\r
718 write-read transactions.
\r
720 void MSS_I2C_set_slave_mem_offset_length
\r
722 mss_i2c_instance_t * this_i2c,
\r
723 uint8_t offset_length
\r
726 /*-------------------------------------------------------------------------*//**
\r
727 I2C write handler registration.
\r
728 ------------------------------------------------------------------------------
\r
729 Register the function that will be called to process the data written to this
\r
730 MSS I2C instance when it is the slave in an I2C write transaction.
\r
731 Note: The write handler is not called as a result of a write-read transaction.
\r
732 The write data of a write read transaction is interpreted as an offset
\r
733 into the slave’s transmit buffer and handled by the driver.
\r
734 ------------------------------------------------------------------------------
\r
736 The this_i2c parameter is a pointer to an mss_i2c_instance_t structure
\r
737 identifying the MSS I2C hardware block that will perform the requested
\r
738 function. There are two such data structures, g_mss_i2c0 and g_mss_i2c1,
\r
739 associated with MSS I2C 0 and MSS I2C 1 respectively. This parameter must
\r
740 point to either the g_mss_i2c0 or g_mss_i2c1 global data structure defined
\r
741 within the I2C driver.
\r
744 Pointer to the function that will process the I2C write request.
\r
746 void MSS_I2C_register_write_handler
\r
748 mss_i2c_instance_t * this_i2c,
\r
749 mss_i2c_slave_wr_handler_t handler
\r
752 /*-------------------------------------------------------------------------*//**
\r
753 I2C slave receive enable.
\r
754 ------------------------------------------------------------------------------
\r
755 Enables the MSS I2C instance identified through the this_i2c parameter to
\r
756 receive data when it is the target of an I2C write or write-read transaction.
\r
757 ------------------------------------------------------------------------------
\r
759 The this_i2c parameter is a pointer to an mss_i2c_instance_t structure
\r
760 identifying the MSS I2C hardware block that will perform the requested
\r
761 function. There are two such data structures, g_mss_i2c0 and g_mss_i2c1,
\r
762 associated with MSS I2C 0 and MSS I2C 1 respectively. This parameter must
\r
763 point to either the g_mss_i2c0 or g_mss_i2c1 global data structure defined
\r
764 within the I2C driver.
\r
766 void MSS_I2C_enable_slave_rx
\r
768 mss_i2c_instance_t * this_i2c
\r
775 #endif /*MSS_I2C_H_*/
\r