1 //*****************************************************************************
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3 // sysctl.h - Prototypes for the system control driver.
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5 // Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
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7 // Software License Agreement
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9 // Luminary Micro, Inc. (LMI) is supplying this software for use solely and
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10 // exclusively on LMI's Stellaris Family of microcontroller products.
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12 // The software is owned by LMI and/or its suppliers, and is protected under
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13 // applicable copyright laws. All rights are reserved. Any use in violation
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14 // of the foregoing restrictions may subject the user to criminal sanctions
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15 // under applicable laws, as well as to civil liability for the breach of the
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16 // terms and conditions of this license.
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18 // THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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19 // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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20 // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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21 // LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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22 // CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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24 // This is part of revision 523 of the Stellaris Driver Library.
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26 //*****************************************************************************
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28 #ifndef __SYSCTL_H__
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29 #define __SYSCTL_H__
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36 //*****************************************************************************
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38 // The following are values that can be passed to the
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39 // SysCtlPeripheralPresent(), SysCtlPeripheralEnable(),
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40 // SysCtlPeripheralDisable(), and SysCtlPeripheralReset() APIs as the
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41 // ulPeripheral parameter. The peripherals in the fourth group (upper nibble
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42 // is 3) can only be used with the SysCtlPeripheralPresent() API.
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44 //*****************************************************************************
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45 #define SYSCTL_PERIPH_WDOG 0x00000008 // Watchdog
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46 #define SYSCTL_PERIPH_UART0 0x10000001 // UART 0
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47 #define SYSCTL_PERIPH_SSI 0x10000010 // SSI
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48 #define SYSCTL_PERIPH_I2C 0x10001000 // I2C
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49 #define SYSCTL_PERIPH_TIMER0 0x10010000 // Timer 0
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50 #define SYSCTL_PERIPH_TIMER1 0x10020000 // Timer 1
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51 #define SYSCTL_PERIPH_COMP0 0x11000000 // Analog comparator 0
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52 #define SYSCTL_PERIPH_COMP1 0x12000000 // Analog comparator 1
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53 #define SYSCTL_PERIPH_GPIOA 0x20000001 // GPIO A
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54 #define SYSCTL_PERIPH_GPIOB 0x20000002 // GPIO B
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55 #define SYSCTL_PERIPH_GPIOC 0x20000004 // GPIO C
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56 #define SYSCTL_PERIPH_PLL 0x30000010 // PLL
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58 //*****************************************************************************
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60 // The following are values that can be passed to the SysCtlPinPresent() API
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61 // as the ulPin parameter.
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63 //*****************************************************************************
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64 #define SYSCTL_PIN_C0MINUS 0x00000040 // C0- pin
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65 #define SYSCTL_PIN_C0PLUS 0x00000080 // C0+ pin
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66 #define SYSCTL_PIN_C0O 0x00000100 // C0o pin
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67 #define SYSCTL_PIN_C1MINUS 0x00000200 // C1- pin
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68 #define SYSCTL_PIN_CCP0 0x01000000 // CCP0 pin
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69 #define SYSCTL_PIN_CCP1 0x02000000 // CCP1 pin
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70 #define SYSCTL_PIN_32KHZ 0x80000000 // 32kHz pin
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72 //*****************************************************************************
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74 // The following are values that can be passed to the SysCtlLDOSet() API as
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75 // the ulVoltage value, or returned by the SysCtlLDOGet() API.
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77 //*****************************************************************************
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78 #define SYSCTL_LDO_2_25V 0x00000005 // LDO output of 2.25V
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79 #define SYSCTL_LDO_2_30V 0x00000004 // LDO output of 2.30V
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80 #define SYSCTL_LDO_2_35V 0x00000003 // LDO output of 2.35V
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81 #define SYSCTL_LDO_2_40V 0x00000002 // LDO output of 2.40V
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82 #define SYSCTL_LDO_2_45V 0x00000001 // LDO output of 2.45V
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83 #define SYSCTL_LDO_2_50V 0x00000000 // LDO output of 2.50V
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84 #define SYSCTL_LDO_2_55V 0x0000001f // LDO output of 2.55V
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85 #define SYSCTL_LDO_2_60V 0x0000001e // LDO output of 2.60V
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86 #define SYSCTL_LDO_2_65V 0x0000001d // LDO output of 2.65V
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87 #define SYSCTL_LDO_2_70V 0x0000001c // LDO output of 2.70V
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88 #define SYSCTL_LDO_2_75V 0x0000001b // LDO output of 2.75V
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90 //*****************************************************************************
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92 // The following are values that can be passed to the SysCtlLDOConfigSet() API.
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94 //*****************************************************************************
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95 #define SYSCTL_LDOCFG_ARST 0x00000001 // Allow LDO failure to reset
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96 #define SYSCTL_LDOCFG_NORST 0x00000000 // Do not reset on LDO failure
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98 //*****************************************************************************
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100 // The following are values that can be passed to the SysCtlIntEnable(),
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101 // SysCtlIntDisable(), and SysCtlIntClear() APIs, or returned in the bit mask
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102 // by the SysCtlIntStatus() API.
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104 //*****************************************************************************
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105 #define SYSCTL_INT_PLL_LOCK 0x00000040 // PLL lock interrupt
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106 #define SYSCTL_INT_CUR_LIMIT 0x00000020 // Current limit interrupt
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107 #define SYSCTL_INT_BOSC_FAIL 0x00000010 // Boot oscillator failure int
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108 #define SYSCTL_INT_MOSC_FAIL 0x00000008 // Main oscillator failure int
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109 #define SYSCTL_INT_POR 0x00000004 // Power on reset interrupt
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110 #define SYSCTL_INT_BOR 0x00000002 // Brown out interrupt
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111 #define SYSCTL_INT_PLL_FAIL 0x00000001 // PLL failure interrupt
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113 //*****************************************************************************
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115 // The following are values that can be passed to the SysCtlResetCauseClear()
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116 // API or returned by the SysCtlResetCauseGet() API.
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118 //*****************************************************************************
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119 #define SYSCTL_CAUSE_LDO 0x00000020 // LDO power not OK reset
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120 #define SYSCTL_CAUSE_SW 0x00000010 // Software reset
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121 #define SYSCTL_CAUSE_WDOG 0x00000008 // Watchdog reset
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122 #define SYSCTL_CAUSE_BOR 0x00000004 // Brown-out reset
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123 #define SYSCTL_CAUSE_POR 0x00000002 // Power on reset
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124 #define SYSCTL_CAUSE_EXT 0x00000001 // External reset
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126 //*****************************************************************************
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128 // The following are values that can be passed to the SysCtlBrownOutConfigSet()
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129 // API as the ulConfig parameter.
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131 //*****************************************************************************
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132 #define SYSCTL_BOR_RESET 0x00000002 // Reset instead of interrupting
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133 #define SYSCTL_BOR_RESAMPLE 0x00000001 // Resample BOR before asserting
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135 //*****************************************************************************
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137 // The following are values that can be passed to the SysCtlClockSet() API as
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138 // the ulConfig parameter.
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140 //*****************************************************************************
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141 #define SYSCTL_SYSDIV_1 0x07800000 // Processor clock is osc/pll /1
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142 #define SYSCTL_SYSDIV_2 0x00C00000 // Processor clock is osc/pll /2
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143 #define SYSCTL_SYSDIV_3 0x01400000 // Processor clock is osc/pll /3
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144 #define SYSCTL_SYSDIV_4 0x01C00000 // Processor clock is osc/pll /4
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145 #define SYSCTL_SYSDIV_5 0x02400000 // Processor clock is osc/pll /5
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146 #define SYSCTL_SYSDIV_6 0x02C00000 // Processor clock is osc/pll /6
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147 #define SYSCTL_SYSDIV_7 0x03400000 // Processor clock is osc/pll /7
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148 #define SYSCTL_SYSDIV_8 0x03C00000 // Processor clock is osc/pll /8
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149 #define SYSCTL_SYSDIV_9 0x04400000 // Processor clock is osc/pll /9
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150 #define SYSCTL_SYSDIV_10 0x04C00000 // Processor clock is osc/pll /10
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151 #define SYSCTL_SYSDIV_11 0x05400000 // Processor clock is osc/pll /11
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152 #define SYSCTL_SYSDIV_12 0x05C00000 // Processor clock is osc/pll /12
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153 #define SYSCTL_SYSDIV_13 0x06400000 // Processor clock is osc/pll /13
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154 #define SYSCTL_SYSDIV_14 0x06C00000 // Processor clock is osc/pll /14
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155 #define SYSCTL_SYSDIV_15 0x07400000 // Processor clock is osc/pll /15
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156 #define SYSCTL_SYSDIV_16 0x07C00000 // Processor clock is osc/pll /16
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157 #define SYSCTL_USE_PLL 0x00000000 // System clock is the PLL clock
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158 #define SYSCTL_USE_OSC 0x00003800 // System clock is the osc clock
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159 #define SYSCTL_XTAL_3_57MHZ 0x00000100 // External crystal is 3.579545MHz
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160 #define SYSCTL_XTAL_3_68MHZ 0x00000140 // External crystal is 3.6864MHz
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161 #define SYSCTL_XTAL_4MHZ 0x00000180 // External crystal is 4MHz
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162 #define SYSCTL_XTAL_4_09MHZ 0x000001C0 // External crystal is 4.096MHz
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163 #define SYSCTL_XTAL_4_91MHZ 0x00000200 // External crystal is 4.9152MHz
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164 #define SYSCTL_XTAL_5MHZ 0x00000240 // External crystal is 5MHz
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165 #define SYSCTL_XTAL_5_12MHZ 0x00000280 // External crystal is 5.12MHz
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166 #define SYSCTL_XTAL_6MHZ 0x000002C0 // External crystal is 6MHz
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167 #define SYSCTL_XTAL_6_14MHZ 0x00000300 // External crystal is 6.144MHz
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168 #define SYSCTL_XTAL_7_37MHZ 0x00000340 // External crystal is 7.3728MHz
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169 #define SYSCTL_XTAL_8MHZ 0x00000380 // External crystal is 8MHz
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170 #define SYSCTL_XTAL_8_19MHZ 0x000003C0 // External crystal is 8.192MHz
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171 #define SYSCTL_OSC_MAIN 0x00000000 // Oscillator source is main osc
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172 #define SYSCTL_OSC_BOOT 0x00000010 // Oscillator source is boot osc
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173 #define SYSCTL_OSC_BOOT4 0x00000020 // Oscillator source is boot osc /4
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174 #define SYSCTL_BOOT_OSC_DIS 0x00000002 // Disable boot oscillator
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175 #define SYSCTL_MAIN_OSC_DIS 0x00000001 // Disable main oscillator
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177 //*****************************************************************************
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179 // Prototypes for the APIs.
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181 //*****************************************************************************
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182 extern unsigned long SysCtlSRAMSizeGet(void);
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183 extern unsigned long SysCtlFlashSizeGet(void);
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184 extern tBoolean SysCtlPinPresent(unsigned long ulPin);
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185 extern tBoolean SysCtlPeripheralPresent(unsigned long ulPeripheral);
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186 extern void SysCtlPeripheralReset(unsigned long ulPeripheral);
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187 extern void SysCtlPeripheralEnable(unsigned long ulPeripheral);
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188 extern void SysCtlPeripheralDisable(unsigned long ulPeripheral);
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189 extern void SysCtlPeripheralSleepEnable(unsigned long ulPeripheral);
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190 extern void SysCtlPeripheralSleepDisable(unsigned long ulPeripheral);
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191 extern void SysCtlPeripheralDeepSleepEnable(unsigned long ulPeripheral);
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192 extern void SysCtlPeripheralDeepSleepDisable(unsigned long ulPeripheral);
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193 extern void SysCtlPeripheralClockGating(tBoolean bEnable);
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194 extern void SysCtlIntRegister(void (*pfnHandler)(void));
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195 extern void SysCtlIntUnregister(void);
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196 extern void SysCtlIntEnable(unsigned long ulInts);
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197 extern void SysCtlIntDisable(unsigned long ulInts);
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198 extern void SysCtlIntClear(unsigned long ulInts);
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199 extern unsigned long SysCtlIntStatus(tBoolean bMasked);
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200 extern void SysCtlLDOSet(unsigned long ulVoltage);
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201 extern unsigned long SysCtlLDOGet(void);
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202 extern void SysCtlLDOConfigSet(unsigned long ulConfig);
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203 extern void SysCtlReset(void);
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204 extern void SysCtlSleep(void);
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205 extern void SysCtlDeepSleep(void);
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206 extern unsigned long SysCtlResetCauseGet(void);
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207 extern void SysCtlResetCauseClear(unsigned long ulCauses);
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208 extern void SysCtlBrownOutConfigSet(unsigned long ulConfig,
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209 unsigned long ulDelay);
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210 extern void SysCtlClockSet(unsigned long ulConfig);
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211 extern unsigned long SysCtlClockGet(void);
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212 extern void SysCtlBOSCVerificationSet(tBoolean bEnable);
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213 extern void SysCtlMOSCVerificationSet(tBoolean bEnable);
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214 extern void SysCtlPLLVerificationSet(tBoolean bEnable);
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215 extern void SysCtlClkVerificationClear(void);
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221 #endif // __SYSCTL_H__
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