1 //*****************************************************************************
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3 // interrupt.c - Driver for the NVIC Interrupt Controller.
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5 // Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
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7 // Software License Agreement
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9 // Luminary Micro, Inc. (LMI) is supplying this software for use solely and
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10 // exclusively on LMI's Stellaris Family of microcontroller products.
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12 // The software is owned by LMI and/or its suppliers, and is protected under
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13 // applicable copyright laws. All rights are reserved. Any use in violation
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14 // of the foregoing restrictions may subject the user to criminal sanctions
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15 // under applicable laws, as well as to civil liability for the breach of the
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16 // terms and conditions of this license.
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18 // THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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19 // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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20 // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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21 // LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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22 // CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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24 // This is part of revision 991 of the Stellaris Driver Library.
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26 //*****************************************************************************
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28 //*****************************************************************************
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30 //! \addtogroup interrupt_api
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33 //*****************************************************************************
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35 #include "../hw_ints.h"
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36 #include "../hw_nvic.h"
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37 #include "../hw_types.h"
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40 #include "interrupt.h"
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42 //*****************************************************************************
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44 // This is a mapping between priority grouping encodings and the number of
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45 // preemption priority bits.
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47 //*****************************************************************************
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48 #if defined(GROUP_pulpriority) || defined(BUILD_ALL)
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49 const unsigned long g_pulPriority[] =
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51 NVIC_APINT_PRIGROUP_0_8, NVIC_APINT_PRIGROUP_1_7, NVIC_APINT_PRIGROUP_2_6,
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52 NVIC_APINT_PRIGROUP_3_5, NVIC_APINT_PRIGROUP_4_4, NVIC_APINT_PRIGROUP_5_3,
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53 NVIC_APINT_PRIGROUP_6_2, NVIC_APINT_PRIGROUP_7_1
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56 extern const unsigned long g_pulPriority[];
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59 //*****************************************************************************
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61 // This is a mapping between interrupt number and the register that contains
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62 // the priority encoding for that interrupt.
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64 //*****************************************************************************
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65 #if defined(GROUP_pulregs) || defined(BUILD_ALL)
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66 const unsigned long g_pulRegs[12] =
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68 0, NVIC_SYS_PRI1, NVIC_SYS_PRI2, NVIC_SYS_PRI3, NVIC_PRI0, NVIC_PRI1,
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69 NVIC_PRI2, NVIC_PRI3, NVIC_PRI4, NVIC_PRI5, NVIC_PRI6, NVIC_PRI7
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72 extern const unsigned long g_pulRegs[12];
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75 //*****************************************************************************
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78 //! The default interrupt handler.
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80 //! This is the default interrupt handler for all interrupts. It simply loops
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81 //! forever so that the system state is preserved for observation by a
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82 //! debugger. Since interrupts should be disabled before unregistering the
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83 //! corresponding handler, this should never be called.
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87 //*****************************************************************************
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88 #if defined(GROUP_defaulthandler) || defined(BUILD_ALL)
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90 IntDefaultHandler(void)
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93 // Go into an infinite loop.
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100 extern void IntDefaultHandler(void);
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103 //*****************************************************************************
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105 // The processor vector table.
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107 // This contains a list of the handlers for the various interrupt sources in
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108 // the system. The layout of this list is defined by the hardware; assertion
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109 // of an interrupt causes the processor to start executing directly at the
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110 // address given in the corresponding location in this list.
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112 //*****************************************************************************
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113 #if defined(GROUP_vtable) || defined(BUILD_ALL)
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115 __no_init void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void) @ "VTABLE";
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117 __attribute__((section("vtable")))
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118 void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void);
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121 extern void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void);
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124 //*****************************************************************************
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126 //! Enables the processor interrupt.
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128 //! Allows the processor to respond to interrupts. This does not affect the
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129 //! set of interrupts enabled in the interrupt controller; it just gates the
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130 //! single interrupt from the controller to the processor.
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134 //*****************************************************************************
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135 #if defined(GROUP_masterenable) || defined(BUILD_ALL) || defined(DOXYGEN)
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137 IntMasterEnable(void)
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140 // Enable processor interrupts.
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146 //*****************************************************************************
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148 //! Disables the processor interrupt.
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150 //! Prevents the processor from receiving interrupts. This does not affect the
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151 //! set of interrupts enabled in the interrupt controller; it just gates the
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152 //! single interrupt from the controller to the processor.
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156 //*****************************************************************************
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157 #if defined(GROUP_masterdisable) || defined(BUILD_ALL) || defined(DOXYGEN)
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159 IntMasterDisable(void)
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162 // Disable processor interrupts.
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168 //*****************************************************************************
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170 //! Registers a function to be called when an interrupt occurs.
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172 //! \param ulInterrupt specifies the interrupt in question.
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173 //! \param pfnHandler is a pointer to the function to be called.
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175 //! This function is used to specify the handler function to be called when the
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176 //! given interrupt is asserted to the processor. When the interrupt occurs,
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177 //! if it is enabled (via IntEnable()), the handler function will be called in
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178 //! interrupt context. Since the handler function can preempt other code, care
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179 //! must be taken to protect memory or peripherals that are accessed by the
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180 //! handler and other non-handler code.
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182 //! \note The use of this function (directly or indirectly via a peripheral
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183 //! driver interrupt register function) moves the interrupt vector table from
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184 //! flash to SRAM. Therefore, care must be taken when linking the application
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185 //! to ensure that the SRAM vector table is located at the beginning of SRAM;
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186 //! otherwise NVIC will not look in the correct portion of memory for the
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187 //! vector table (it requires the vector table be on a 1 kB memory alignment).
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188 //! Normally, the SRAM vector table is so placed via the use of linker scripts;
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189 //! some tool chains, such as the evaluation version of RV-MDK, do not support
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190 //! linker scripts and therefore will not produce a valid executable. See the
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191 //! discussion of compile-time versus run-time interrupt handler registration
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192 //! in the introduction to this chapter.
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196 //*****************************************************************************
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197 #if defined(GROUP_register) || defined(BUILD_ALL) || defined(DOXYGEN)
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199 IntRegister(unsigned long ulInterrupt, void (*pfnHandler)(void))
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201 unsigned long ulIdx;
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204 // Check the arguments.
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206 ASSERT(ulInterrupt < NUM_INTERRUPTS);
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209 // Make sure that the RAM vector table is correctly aligned.
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211 ASSERT(((unsigned long)g_pfnRAMVectors & 0x000003ff) == 0);
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214 // See if the RAM vector table has been initialized.
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216 if(HWREG(NVIC_VTABLE) != (unsigned long)g_pfnRAMVectors)
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219 // Copy the vector table from the beginning of FLASH to the RAM vector
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222 for(ulIdx = 0; ulIdx < NUM_INTERRUPTS; ulIdx++)
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224 g_pfnRAMVectors[ulIdx] = (void (*)(void))HWREG(ulIdx * 4);
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228 // Point NVIC at the RAM vector table.
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230 HWREG(NVIC_VTABLE) = (unsigned long)g_pfnRAMVectors;
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234 // Save the interrupt handler.
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236 g_pfnRAMVectors[ulInterrupt] = pfnHandler;
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240 //*****************************************************************************
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242 //! Unregisters the function to be called when an interrupt occurs.
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244 //! \param ulInterrupt specifies the interrupt in question.
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246 //! This function is used to indicate that no handler should be called when the
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247 //! given interrupt is asserted to the processor. The interrupt source will be
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248 //! automatically disabled (via IntDisable()) if necessary.
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250 //! \sa IntRegister() for important information about registering interrupt
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255 //*****************************************************************************
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256 #if defined(GROUP_unregister) || defined(BUILD_ALL) || defined(DOXYGEN)
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258 IntUnregister(unsigned long ulInterrupt)
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261 // Check the arguments.
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263 ASSERT(ulInterrupt < NUM_INTERRUPTS);
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266 // Reset the interrupt handler.
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268 g_pfnRAMVectors[ulInterrupt] = IntDefaultHandler;
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272 //*****************************************************************************
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274 //! Sets the priority grouping of the interrupt controller.
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276 //! \param ulBits specifies the number of bits of preemptable priority.
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278 //! This function specifies the split between preemptable priority levels and
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279 //! subpriority levels in the interrupt priority specification. The range of
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280 //! the grouping values are dependent upon the hardware implementation; on
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281 //! the Stellaris family it can range from 0 to 3.
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285 //*****************************************************************************
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286 #if defined(GROUP_prioritygroupingset) || defined(BUILD_ALL) || \
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289 IntPriorityGroupingSet(unsigned long ulBits)
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292 // Check the arguments.
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294 ASSERT(ulBits < NUM_PRIORITY_BITS);
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297 // Set the priority grouping.
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299 HWREG(NVIC_APINT) = NVIC_APINT_VECTKEY | g_pulPriority[ulBits];
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303 //*****************************************************************************
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305 //! Gets the priority grouping of the interrupt controller.
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307 //! This function returns the split between preemptable priority levels and
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308 //! subpriority levels in the interrupt priority specification.
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310 //! \return The number of bits of preemptable priority.
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312 //*****************************************************************************
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313 #if defined(GROUP_prioritygroupingget) || defined(BUILD_ALL) || \
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316 IntPriorityGroupingGet(void)
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318 unsigned long ulLoop, ulValue;
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321 // Read the priority grouping.
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323 ulValue = HWREG(NVIC_APINT) & NVIC_APINT_PRIGROUP_M;
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326 // Loop through the priority grouping values.
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328 for(ulLoop = 0; ulLoop < 8; ulLoop++)
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331 // Stop looping if this value matches.
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333 if(ulValue == g_pulPriority[ulLoop])
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340 // Return the number of priority bits.
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346 //*****************************************************************************
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348 //! Sets the priority of an interrupt.
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350 //! \param ulInterrupt specifies the interrupt in question.
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351 //! \param ucPriority specifies the priority of the interrupt.
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353 //! This function is used to set the priority of an interrupt. When multiple
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354 //! interrupts are asserted simultaneously, the ones with the highest priority
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355 //! are processed before the lower priority interrupts. Smaller numbers
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356 //! correspond to higher interrupt priorities; priority 0 is the highest
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357 //! interrupt priority.
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359 //! The hardware priority mechanism will only look at the upper N bits of the
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360 //! priority level (where N is 3 for the Stellaris family), so any
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361 //! prioritization must be performed in those bits. The remaining bits can be
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362 //! used to sub-prioritize the interrupt sources, and may be used by the
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363 //! hardware priority mechanism on a future part. This arrangement allows
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364 //! priorities to migrate to different NVIC implementations without changing
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365 //! the gross prioritization of the interrupts.
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369 //*****************************************************************************
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370 #if defined(GROUP_priorityset) || defined(BUILD_ALL) || defined(DOXYGEN)
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372 IntPrioritySet(unsigned long ulInterrupt, unsigned char ucPriority)
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374 unsigned long ulTemp;
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377 // Check the arguments.
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379 ASSERT((ulInterrupt >= 4) && (ulInterrupt < NUM_INTERRUPTS));
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382 // Set the interrupt priority.
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384 ulTemp = HWREG(g_pulRegs[ulInterrupt >> 2]);
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385 ulTemp &= ~(0xFF << (8 * (ulInterrupt & 3)));
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386 ulTemp |= ucPriority << (8 * (ulInterrupt & 3));
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387 HWREG(g_pulRegs[ulInterrupt >> 2]) = ulTemp;
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391 //*****************************************************************************
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393 //! Gets the priority of an interrupt.
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395 //! \param ulInterrupt specifies the interrupt in question.
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397 //! This function gets the priority of an interrupt. See IntPrioritySet() for
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398 //! a definition of the priority value.
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400 //! \return Returns the interrupt priority, or -1 if an invalid interrupt was
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403 //*****************************************************************************
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404 #if defined(GROUP_priorityget) || defined(BUILD_ALL) || defined(DOXYGEN)
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406 IntPriorityGet(unsigned long ulInterrupt)
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409 // Check the arguments.
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411 ASSERT((ulInterrupt >= 4) && (ulInterrupt < NUM_INTERRUPTS));
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414 // Return the interrupt priority.
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416 return((HWREG(g_pulRegs[ulInterrupt >> 2]) >> (8 * (ulInterrupt & 3))) &
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421 //*****************************************************************************
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423 //! Enables an interrupt.
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425 //! \param ulInterrupt specifies the interrupt to be enabled.
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427 //! The specified interrupt is enabled in the interrupt controller. Other
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428 //! enables for the interrupt (such as at the peripheral level) are unaffected
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429 //! by this function.
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433 //*****************************************************************************
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434 #if defined(GROUP_enable) || defined(BUILD_ALL) || defined(DOXYGEN)
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436 IntEnable(unsigned long ulInterrupt)
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439 // Check the arguments.
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441 ASSERT(ulInterrupt < NUM_INTERRUPTS);
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444 // Determine the interrupt to enable.
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446 if(ulInterrupt == FAULT_MPU)
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449 // Enable the MemManage interrupt.
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451 HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_MEM;
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453 else if(ulInterrupt == FAULT_BUS)
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456 // Enable the bus fault interrupt.
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458 HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_BUS;
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460 else if(ulInterrupt == FAULT_USAGE)
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463 // Enable the usage fault interrupt.
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465 HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_USAGE;
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467 else if(ulInterrupt == FAULT_SYSTICK)
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470 // Enable the System Tick interrupt.
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472 HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN;
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474 else if(ulInterrupt >= INT_GPIOA)
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477 // Enable the general interrupt.
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479 HWREG(NVIC_EN0) = 1 << (ulInterrupt - INT_GPIOA);
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484 //*****************************************************************************
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486 //! Disables an interrupt.
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488 //! \param ulInterrupt specifies the interrupt to be disabled.
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490 //! The specified interrupt is disabled in the interrupt controller. Other
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491 //! enables for the interrupt (such as at the peripheral level) are unaffected
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492 //! by this function.
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496 //*****************************************************************************
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497 #if defined(GROUP_disable) || defined(BUILD_ALL) || defined(DOXYGEN)
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499 IntDisable(unsigned long ulInterrupt)
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502 // Check the arguments.
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504 ASSERT(ulInterrupt < NUM_INTERRUPTS);
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507 // Determine the interrupt to disable.
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509 if(ulInterrupt == FAULT_MPU)
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512 // Disable the MemManage interrupt.
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514 HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_MEM);
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516 else if(ulInterrupt == FAULT_BUS)
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519 // Disable the bus fault interrupt.
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521 HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_BUS);
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523 else if(ulInterrupt == FAULT_USAGE)
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526 // Disable the usage fault interrupt.
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528 HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_USAGE);
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530 else if(ulInterrupt == FAULT_SYSTICK)
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533 // Disable the System Tick interrupt.
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535 HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN);
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537 else if(ulInterrupt >= INT_GPIOA)
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540 // Disable the general interrupt.
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542 HWREG(NVIC_DIS0) = 1 << (ulInterrupt - INT_GPIOA);
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547 //*****************************************************************************
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549 // Close the Doxygen group.
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552 //*****************************************************************************
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