1 //*****************************************************************************
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3 // startup_ewarm.c - Boot code for Stellaris.
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5 // Copyright (c) 2006-2007 Luminary Micro, Inc. All rights reserved.
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7 // Software License Agreement
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9 // Luminary Micro, Inc. (LMI) is supplying this software for use solely and
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10 // exclusively on LMI's microcontroller products.
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12 // The software is owned by LMI and/or its suppliers, and is protected under
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13 // applicable copyright laws. All rights are reserved. Any use in violation
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14 // of the foregoing restrictions may subject the user to criminal sanctions
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15 // under applicable laws, as well as to civil liability for the breach of the
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16 // terms and conditions of this license.
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18 // THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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19 // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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20 // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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21 // LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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22 // CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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24 // This is part of revision 100 of the Stellaris Ethernet
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25 // Applications Library.
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27 //*****************************************************************************
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29 //*****************************************************************************
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31 // Enable the IAR extensions for this source file.
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33 //*****************************************************************************
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34 #pragma language=extended
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36 //*****************************************************************************
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38 // Forward declaration of the default fault handlers.
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40 //*****************************************************************************
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41 void ResetISR(void);
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42 static void NmiSR(void);
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43 static void FaultISR(void);
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44 static void IntDefaultHandler(void);
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46 //*****************************************************************************
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48 // External declaration for the interrupt handler used by the application.
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50 //*****************************************************************************
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53 //*****************************************************************************
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55 // The entry point for the application.
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57 //*****************************************************************************
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58 extern int main(void);
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59 extern void xPortPendSVHandler(void);
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60 extern void xPortSysTickHandler(void);
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61 extern void vEMAC_ISR( void );
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62 extern Timer0IntHandler( void );
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64 //*****************************************************************************
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66 // Reserve space for the system stack.
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68 //*****************************************************************************
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70 #define STACK_SIZE 64
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72 static unsigned long pulStack[STACK_SIZE];
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74 //*****************************************************************************
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76 // A union that describes the entries of the vector table. The union is needed
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77 // since the first entry is the stack pointer and the remainder are function
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80 //*****************************************************************************
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83 void (*pfnHandler)(void);
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84 unsigned long ulPtr;
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88 //*****************************************************************************
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90 // The minimal vector table for a Cortex M3. Note that the proper constructs
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91 // must be placed on this to ensure that it ends up at physical address
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94 //*****************************************************************************
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95 __root const uVectorEntry g_pfnVectors[] @ "INTVEC" =
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97 { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) },
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98 // The initial stack pointer
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99 ResetISR, // The reset handler
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100 NmiSR, // The NMI handler
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101 FaultISR, // The hard fault handler
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102 IntDefaultHandler, // The MPU fault handler
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103 IntDefaultHandler, // The bus fault handler
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104 IntDefaultHandler, // The usage fault handler
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109 IntDefaultHandler, // SVCall handler
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110 IntDefaultHandler, // Debug monitor handler
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112 xPortPendSVHandler, // The PendSV handler
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113 xPortSysTickHandler, // The SysTick handler
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114 IntDefaultHandler, // GPIO Port A
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115 IntDefaultHandler, // GPIO Port B
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116 IntDefaultHandler, // GPIO Port C
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117 IntDefaultHandler, // GPIO Port D
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118 IntDefaultHandler, // GPIO Port E
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119 IntDefaultHandler, // UART0 Rx and Tx
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120 IntDefaultHandler, // UART1 Rx and Tx
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121 IntDefaultHandler, // SSI Rx and Tx
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122 IntDefaultHandler, // I2C Master and Slave
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123 IntDefaultHandler, // PWM Fault
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124 IntDefaultHandler, // PWM Generator 0
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125 IntDefaultHandler, // PWM Generator 1
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126 IntDefaultHandler, // PWM Generator 2
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127 IntDefaultHandler, // Quadrature Encoder
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128 IntDefaultHandler, // ADC Sequence 0
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129 IntDefaultHandler, // ADC Sequence 1
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130 IntDefaultHandler, // ADC Sequence 2
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131 IntDefaultHandler, // ADC Sequence 3
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132 IntDefaultHandler, // Watchdog timer
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133 Timer0IntHandler, // Timer 0 subtimer A
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134 IntDefaultHandler, // Timer 0 subtimer B
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135 IntDefaultHandler, // Timer 1 subtimer A
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136 IntDefaultHandler, // Timer 1 subtimer B
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137 IntDefaultHandler, // Timer 2 subtimer A
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138 IntDefaultHandler, // Timer 2 subtimer B
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139 IntDefaultHandler, // Analog Comparator 0
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140 IntDefaultHandler, // Analog Comparator 1
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141 IntDefaultHandler, // Analog Comparator 2
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142 IntDefaultHandler, // System Control (PLL, OSC, BO)
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143 IntDefaultHandler, // FLASH Control
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144 IntDefaultHandler, // GPIO Port F
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145 IntDefaultHandler, // GPIO Port G
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146 IntDefaultHandler, // GPIO Port H
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147 IntDefaultHandler, // UART2 Rx and Tx
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148 IntDefaultHandler, // SSI1 Rx and Tx
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149 IntDefaultHandler, // Timer 3 subtimer A
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150 IntDefaultHandler, // Timer 3 subtimer B
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151 IntDefaultHandler, // I2C1 Master and Slave
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152 IntDefaultHandler, // Quadrature Encoder 1
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153 IntDefaultHandler, // CAN0
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154 IntDefaultHandler, // CAN1
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155 IntDefaultHandler, // CAN2
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156 vEMAC_ISR, // Ethernet
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157 IntDefaultHandler // Power Island
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160 //*****************************************************************************
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162 // The following are constructs created by the linker, indicating where the
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163 // the "data" and "bss" segments reside in memory. The initializers for the
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164 // for the "data" segment resides immediately following the "text" segment.
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166 //*****************************************************************************
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167 #pragma segment="DATA_ID"
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168 #pragma segment="DATA_I"
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169 #pragma segment="DATA_Z"
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171 //*****************************************************************************
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173 // This is the code that gets called when the processor first starts execution
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174 // following a reset event. Only the absolutely necessary set is performed,
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175 // after which the application supplied entry() routine is called. Any fancy
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176 // actions (such as making decisions based on the reset cause register, and
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177 // resetting the bits in that register) are left solely in the hands of the
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180 //*****************************************************************************
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184 unsigned long *pulSrc, *pulDest, *pulEnd;
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187 // Copy the data segment initializers from flash to SRAM.
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189 pulSrc = __segment_begin("DATA_ID");
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190 pulDest = __segment_begin("DATA_I");
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191 pulEnd = __segment_end("DATA_I");
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192 while(pulDest < pulEnd)
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194 *pulDest++ = *pulSrc++;
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198 // Zero fill the bss segment.
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200 pulDest = __segment_begin("DATA_Z");
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201 pulEnd = __segment_end("DATA_Z");
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202 while(pulDest < pulEnd)
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208 // Call the application's entry point.
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213 //*****************************************************************************
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215 // This is the code that gets called when the processor receives a NMI. This
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216 // simply enters an infinite loop, preserving the system state for examination
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219 //*****************************************************************************
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224 // Enter an infinite loop.
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231 //*****************************************************************************
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233 // This is the code that gets called when the processor receives a fault
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234 // interrupt. This simply enters an infinite loop, preserving the system state
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235 // for examination by a debugger.
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237 //*****************************************************************************
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242 // Enter an infinite loop.
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249 //*****************************************************************************
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251 // This is the code that gets called when the processor receives an unexpected
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252 // interrupt. This simply enters an infinite loop, preserving the system state
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253 // for examination by a debugger.
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255 //*****************************************************************************
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257 IntDefaultHandler(void)
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260 // Go into an infinite loop.
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