2 FreeRTOS.org V4.6.0 - Copyright (C) 2003-2007 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS.org is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS.org; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS.org, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 See http://www.FreeRTOS.org for documentation, latest information, license
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28 and contact details. Please ensure to read the configuration and relevant
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29 port sections of the online documentation.
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30 ***************************************************************************
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33 /* Kernel includes. */
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34 #include "FreeRTOS.h"
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38 /* Demo includes. */
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44 /* Hardware library includes. */
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45 #include "hw_types.h"
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46 #include "hw_memmap.h"
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47 #include "hw_ints.h"
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48 #include "hw_ethernet.h"
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49 #include "ethernet.h"
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50 #include "interrupt.h"
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52 #define emacNUM_RX_BUFFERS 5
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53 #define emacFRAM_SIZE_BYTES 2
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54 #define macNEGOTIATE_DELAY 2000
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55 #define macWAIT_SEND_TIME ( 10 )
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57 /* The task that handles the MAC peripheral. This is created at a high
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58 priority and is effectively a deferred interrupt handler. The peripheral
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59 handling is deferred to a task to prevent the entire FIFO having to be read
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60 from within an ISR. */
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61 void vMACHandleTask( void *pvParameters );
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63 /*-----------------------------------------------------------*/
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65 /* The semaphore used to wake the uIP task when data arrives. */
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66 xSemaphoreHandle xEMACSemaphore = NULL;
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68 /* The semaphore used to wake the interrupt handler task. The peripheral
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69 is processed at the task level to prevent the need to read the entire FIFO from
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70 within the ISR itself. */
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71 xSemaphoreHandle xMACInterruptSemaphore = NULL;
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73 /* The buffer used by the uIP stack. In this case the pointer is used to
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74 point to one of the Rx buffers. */
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75 unsigned portCHAR *uip_buf;
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77 /* Buffers into which Rx data is placed. */
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78 static unsigned portCHAR ucRxBuffers[ emacNUM_RX_BUFFERS ][ UIP_BUFSIZE + ( 4 * emacFRAM_SIZE_BYTES ) ];
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80 /* The length of the data within each of the Rx buffers. */
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81 static unsigned portLONG ulRxLength[ emacNUM_RX_BUFFERS ];
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83 /* Used to keep a track of the number of bytes to transmit. */
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84 static unsigned portLONG ulNextTxSpace;
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86 /*-----------------------------------------------------------*/
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88 portBASE_TYPE vInitEMAC( void )
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90 unsigned long ulTemp;
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91 portBASE_TYPE xReturn;
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93 /* Ensure all interrupts are disabled. */
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94 EthernetIntDisable( ETH_BASE, ( ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER | ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));
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96 /* Clear any interrupts that were already pending. */
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97 ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );
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98 EthernetIntClear( ETH_BASE, ulTemp );
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100 /* Initialise the MAC and connect. */
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101 EthernetInit( ETH_BASE );
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102 EthernetConfigSet( ETH_BASE, ( ETH_CFG_TX_DPLXEN | ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN ) );
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103 EthernetEnable( ETH_BASE );
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105 /* Mark each Rx buffer as empty. */
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106 for( ulTemp = 0; ulTemp < emacNUM_RX_BUFFERS; ulTemp++ )
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108 ulRxLength[ ulTemp ] = 0;
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111 /* Create the queue and task used to defer the MAC processing to the
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113 vSemaphoreCreateBinary( xMACInterruptSemaphore );
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114 xSemaphoreTake( xMACInterruptSemaphore, 0 );
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115 xReturn = xTaskCreate( vMACHandleTask, ( signed portCHAR * ) "MAC", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );
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116 vTaskDelay( macNEGOTIATE_DELAY );
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118 /* We are only interested in Rx interrupts. */
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119 IntPrioritySet( INT_ETH, configKERNEL_INTERRUPT_PRIORITY );
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120 IntEnable( INT_ETH );
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121 EthernetIntEnable(ETH_BASE, ETH_INT_RX);
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125 /*-----------------------------------------------------------*/
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127 unsigned int uiGetEMACRxData( unsigned char *ucBuffer )
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129 static unsigned long ulNextRxBuffer = 0;
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132 iLen = ulRxLength[ ulNextRxBuffer ];
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136 /* Leave room for the size at the start of the buffer. */
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137 uip_buf = &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );
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139 ulRxLength[ ulNextRxBuffer ] = 0;
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142 if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )
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144 ulNextRxBuffer = 0;
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150 /*-----------------------------------------------------------*/
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152 void vInitialiseSend( void )
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154 /* Set the index to the first byte to send - skipping over the size
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158 /*-----------------------------------------------------------*/
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160 void vIncrementTxLength( unsigned portLONG ulLength )
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162 ulNextTxSpace += ulLength;
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164 /*-----------------------------------------------------------*/
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166 void vSendBufferToMAC( void )
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168 unsigned long *pulSource;
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169 unsigned portSHORT * pus;
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170 unsigned portLONG ulNextWord;
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172 /* Locate the data to be send. */
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173 pus = ( unsigned portSHORT * ) uip_buf;
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175 /* Add in the size of the data. */
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177 *pus = ulNextTxSpace;
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179 /* Wait for data to be sent if there is no space immediately. */
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180 while( !EthernetSpaceAvail( ETH_BASE ) )
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182 vTaskDelay( macWAIT_SEND_TIME );
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185 pulSource = ( unsigned portLONG * ) pus;
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187 for( ulNextWord = 0; ulNextWord < ulNextTxSpace; ulNextWord += sizeof( unsigned portLONG ) )
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189 HWREG(ETH_BASE + MAC_O_DATA) = *pulSource;
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194 HWREG( ETH_BASE + MAC_O_TR ) = MAC_TR_NEWTX;
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196 /*-----------------------------------------------------------*/
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198 void vEMAC_ISR( void )
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200 portBASE_TYPE xSwitchRequired = pdFALSE;
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201 unsigned portLONG ulTemp;
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203 /* Clear the interrupt. */
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204 ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );
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205 EthernetIntClear( ETH_BASE, ulTemp );
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207 /* Was it an Rx interrupt? */
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208 if( ulTemp & ETH_INT_RX )
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210 xSwitchRequired = pdTRUE;
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211 xSemaphoreGiveFromISR( xMACInterruptSemaphore, pdFALSE );
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212 EthernetIntDisable( ETH_BASE, ETH_INT_RX );
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215 /* Switch to the uIP task. */
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216 portEND_SWITCHING_ISR( xSwitchRequired );
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218 /*-----------------------------------------------------------*/
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220 void vMACHandleTask( void *pvParameters )
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222 unsigned long ulLen = 0, i;
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223 unsigned portLONG ulLength, ulInt;
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224 unsigned long *pulBuffer;
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225 static unsigned portLONG ulNextRxBuffer = 0;
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226 portBASE_TYPE xSwitchRequired = pdFALSE;
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230 /* Wait for something to do. */
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231 xSemaphoreTake( xMACInterruptSemaphore, portMAX_DELAY );
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233 while( ( ulInt = ( EthernetIntStatus( ETH_BASE, pdFALSE ) & ETH_INT_RX ) ) != 0 )
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235 ulLength = HWREG( ETH_BASE + MAC_O_DATA );
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237 /* Leave room at the start of the buffer for the size. */
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238 pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );
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239 *pulBuffer = ( ulLength >> 16 );
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241 /* Get the size of the data. */
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242 pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 4 ] );
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243 ulLength &= 0xFFFF;
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249 if( ulLength >= UIP_BUFSIZE )
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251 /* The data won't fit in our buffer. Ensure we don't
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252 try to write into the buffer. */
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256 /* Read out the data into our buffer. */
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257 for( i = 0; i < ulLength; i += sizeof( unsigned portLONG ) )
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259 *pulBuffer = HWREG( ETH_BASE + MAC_O_DATA );
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263 /* Store the length of the data into the separate array. */
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264 ulRxLength[ ulNextRxBuffer ] = ulLength;
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266 /* Use the next buffer the next time through. */
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268 if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )
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270 ulNextRxBuffer = 0;
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273 /* Ensure the uIP task is not blocked as data has arrived. */
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274 xSemaphoreGive( xEMACSemaphore );
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278 EthernetIntEnable( ETH_BASE, ETH_INT_RX );
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