2 LPCUSB, an USB device driver for LPC microcontrollers
3 Copyright (C) 2006 Bertrik Sikken (bertrik@sikken.nl)
5 Redistribution and use in source and binary forms, with or without
6 modification, are permitted provided that the following conditions are met:
8 1. Redistributions of source code must retain the above copyright
9 notice, this list of conditions and the following disclaimer.
10 2. Redistributions in binary form must reproduce the above copyright
11 notice, this list of conditions and the following disclaimer in the
12 documentation and/or other materials provided with the distribution.
13 3. The name of the author may not be used to endorse or promote products
14 derived from this software without specific prior written permission.
16 THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 Hardware definitions for the LPC176x USB controller
32 These are private to the usbhw module
35 // CodeRed - pull in defines from NXP header file
36 //#include "NXP\LPC17xx\LPC17xx.h"
40 // CodeRed - these registers have been renamed on LPC176x
41 #define USBReEP USBReEp
42 #define OTG_CLK_CTRL USBClkCtrl
43 #define OTG_CLK_STAT USBClkSt
46 #define USB_INT_REQ_LP (1<<0)
47 #define USB_INT_REQ_HP (1<<1)
48 #define USB_INT_REQ_DMA (1<<2)
49 #define USB_need_clock (1<<8)
50 #define EN_USB_BITS (1<<31)
52 /* USBDevInt... bits */
54 #define EP_FAST (1<<1)
55 #define EP_SLOW (1<<2)
56 #define DEV_STAT (1<<3)
59 #define RxENDPKT (1<<6)
60 #define TxENDPKT (1<<7)
61 #define EP_RLZED (1<<8)
62 #define ERR_INT (1<<9)
65 #define PKT_LNGTH (1<<0)
66 #define PKT_LNGTH_MASK 0x3FF
68 #define PKT_RDY (1<<11)
73 #define LOG_ENDPOINT (1<<2)
75 /* protocol engine command codes */
77 #define CMD_DEV_SET_ADDRESS 0xD0
78 #define CMD_DEV_CONFIG 0xD8
79 #define CMD_DEV_SET_MODE 0xF3
80 #define CMD_DEV_READ_CUR_FRAME_NR 0xF5
81 #define CMD_DEV_READ_TEST_REG 0xFD
82 #define CMD_DEV_STATUS 0xFE /* read/write */
83 #define CMD_DEV_GET_ERROR_CODE 0xFF
84 #define CMD_DEV_READ_ERROR_STATUS 0xFB
85 /* endpoint commands */
86 #define CMD_EP_SELECT 0x00
87 #define CMD_EP_SELECT_CLEAR 0x40
88 #define CMD_EP_SET_STATUS 0x40
89 #define CMD_EP_CLEAR_BUFFER 0xF2
90 #define CMD_EP_VALIDATE_BUFFER 0xFA
92 /* set address command */
93 #define DEV_ADDR (1<<0)
96 /* configure device command */
97 #define CONF_DEVICE (1<<0)
99 /* set mode command */
100 #define AP_CLK (1<<0)
101 #define INAK_CI (1<<1)
102 #define INAK_CO (1<<2)
103 #define INAK_II (1<<3)
104 #define INAK_IO (1<<4)
105 #define INAK_BI (1<<5)
106 #define INAK_BO (1<<6)
108 /* set get device status command */
110 #define CON_CH (1<<1)
112 #define SUS_CH (1<<3)
115 /* get error code command */
118 /* Select Endpoint command read bits */
119 #define EPSTAT_FE (1<<0)
120 #define EPSTAT_ST (1<<1)
121 #define EPSTAT_STP (1<<2)
122 #define EPSTAT_PO (1<<3)
123 #define EPSTAT_EPN (1<<4)
124 #define EPSTAT_B1FULL (1<<5)
125 #define EPSTAT_B2FULL (1<<6)
127 /* CMD_EP_SET_STATUS command */
130 #define EP_RF_MO (1<<6)
131 #define EP_CND_ST (1<<7)
133 /* read error status command */
134 #define PID_ERR (1<<0)
137 #define TIMEOUT (1<<3)
139 #define B_OVRN (1<<5)
141 #define TGL_ERR (1<<7)