git.sur5r.net Git - freertos/blob - Demo/CORTEX_LPC1768_IAR/LPCUSB/usbhw_lpc.h

   1 /*\r
   2         LPCUSB, an USB device driver for LPC microcontrollers   \r
   3         Copyright (C) 2006 Bertrik Sikken (bertrik@sikken.nl)\r
   4 \r
   5         Redistribution and use in source and binary forms, with or without\r
   6         modification, are permitted provided that the following conditions are met:\r
   7 \r
   8         1. Redistributions of source code must retain the above copyright\r
   9            notice, this list of conditions and the following disclaimer.\r
  10         2. Redistributions in binary form must reproduce the above copyright\r
  11            notice, this list of conditions and the following disclaimer in the\r
  12            documentation and/or other materials provided with the distribution.\r
  13         3. The name of the author may not be used to endorse or promote products\r
  14            derived from this software without specific prior written permission.\r
  15 \r
  16         THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR\r
  17         IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES\r
  18         OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.\r
  19         IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,\r
  20         INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT\r
  21         NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
  22         DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
  23         THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
  24         (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
  25         THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
  26 */\r
  27 \r
  28 \r
  29 /**\r
  30         Hardware definitions for the LPC176x USB controller\r
  31 \r
  32         These are private to the usbhw module\r
  33 */\r
  34 \r
  35 // CodeRed - pull in defines from NXP header file\r
  36 //#include "NXP\LPC17xx\LPC17xx.h"\r
  37 #include "LPC17xx.h"\r
  38 \r
  39 \r
  40 // CodeRed - these registers have been renamed on LPC176x\r
  41 #define USBReEP USBReEp\r
  42 #define OTG_CLK_CTRL USBClkCtrl\r
  43 #define OTG_CLK_STAT USBClkSt\r
  44 \r
  45 /* USBIntSt bits */\r
  46 #define USB_INT_REQ_LP                          (1<<0)\r
  47 #define USB_INT_REQ_HP                          (1<<1)\r
  48 #define USB_INT_REQ_DMA                         (1<<2)\r
  49 #define USB_need_clock                          (1<<8)\r
  50 #define EN_USB_BITS                                     (1<<31)\r
  51 \r
  52 /* USBDevInt... bits */\r
  53 #define FRAME                                           (1<<0)\r
  54 #define EP_FAST                                         (1<<1)\r
  55 #define EP_SLOW                                         (1<<2)\r
  56 #define DEV_STAT                                        (1<<3)\r
  57 #define CCEMTY                                          (1<<4)\r
  58 #define CDFULL                                          (1<<5)\r
  59 #define RxENDPKT                                        (1<<6)\r
  60 #define TxENDPKT                                        (1<<7)\r
  61 #define EP_RLZED                                        (1<<8)\r
  62 #define ERR_INT                                         (1<<9)\r
  63 \r
  64 /* USBRxPLen bits */\r
  65 #define PKT_LNGTH                                       (1<<0)\r
  66 #define PKT_LNGTH_MASK                          0x3FF\r
  67 #define DV                                                      (1<<10)\r
  68 #define PKT_RDY                                         (1<<11)\r
  69 \r
  70 /* USBCtrl bits */\r
  71 #define RD_EN                                           (1<<0)\r
  72 #define WR_EN                                           (1<<1)\r
  73 #define LOG_ENDPOINT                            (1<<2)\r
  74 \r
  75 /* protocol engine command codes */\r
  76         /* device commands */\r
  77 #define CMD_DEV_SET_ADDRESS                     0xD0\r
  78 #define CMD_DEV_CONFIG                          0xD8\r
  79 #define CMD_DEV_SET_MODE                        0xF3\r
  80 #define CMD_DEV_READ_CUR_FRAME_NR       0xF5\r
  81 #define CMD_DEV_READ_TEST_REG           0xFD\r
  82 #define CMD_DEV_STATUS                          0xFE            /* read/write */\r
  83 #define CMD_DEV_GET_ERROR_CODE          0xFF\r
  84 #define CMD_DEV_READ_ERROR_STATUS       0xFB\r
  85         /* endpoint commands */\r
  86 #define CMD_EP_SELECT                           0x00\r
  87 #define CMD_EP_SELECT_CLEAR                     0x40\r
  88 #define CMD_EP_SET_STATUS                       0x40\r
  89 #define CMD_EP_CLEAR_BUFFER                     0xF2\r
  90 #define CMD_EP_VALIDATE_BUFFER          0xFA\r
  91 \r
  92 /* set address command */\r
  93 #define DEV_ADDR                                        (1<<0)\r
  94 #define DEV_EN                                          (1<<7)\r
  95 \r
  96 /* configure device command */\r
  97 #define CONF_DEVICE                                     (1<<0)\r
  98 \r
  99 /* set mode command */\r
 100 #define AP_CLK                                          (1<<0)\r
 101 #define INAK_CI                                         (1<<1)\r
 102 #define INAK_CO                                         (1<<2)\r
 103 #define INAK_II                                         (1<<3)\r
 104 #define INAK_IO                                         (1<<4)\r
 105 #define INAK_BI                                         (1<<5)\r
 106 #define INAK_BO                                         (1<<6)\r
 107 \r
 108 /* set get device status command */\r
 109 #define CON                                                     (1<<0)\r
 110 #define CON_CH                                          (1<<1)\r
 111 #define SUS                                                     (1<<2)\r
 112 #define SUS_CH                                          (1<<3)\r
 113 #define RST                                                     (1<<4)\r
 114 \r
 115 /* get error code command */\r
 116 // ...\r
 117 \r
 118 /* Select Endpoint command read bits */\r
 119 #define EPSTAT_FE                                       (1<<0)\r
 120 #define EPSTAT_ST                                       (1<<1)\r
 121 #define EPSTAT_STP                                      (1<<2)\r
 122 #define EPSTAT_PO                                       (1<<3)\r
 123 #define EPSTAT_EPN                                      (1<<4)\r
 124 #define EPSTAT_B1FULL                           (1<<5)\r
 125 #define EPSTAT_B2FULL                           (1<<6)\r
 126 \r
 127 /* CMD_EP_SET_STATUS command */\r
 128 #define EP_ST                                           (1<<0)\r
 129 #define EP_DA                                           (1<<5)\r
 130 #define EP_RF_MO                                        (1<<6)\r
 131 #define EP_CND_ST                                       (1<<7)\r
 132 \r
 133 /* read error status command */\r
 134 #define PID_ERR                                         (1<<0)\r
 135 #define UEPKT                                           (1<<1)\r
 136 #define DCRC                                            (1<<2)\r
 137 #define TIMEOUT                                         (1<<3)\r
 138 #define EOP                                                     (1<<4)\r
 139 #define B_OVRN                                          (1<<5)\r
 140 #define BTSTF                                           (1<<6)\r
 141 #define TGL_ERR                                         (1<<7)\r
 142 \r
 143 \r
 144 \r
 145 \r
 146 \r
 147 \r
 148 \r
 149 \r