2 ******************************************************************************
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3 * @file stm32f0xx_pwr.c
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4 * @author MCD Application Team
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6 * @date 27-January-2012
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7 * @brief This file provides firmware functions to manage the following
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8 * functionalities of the Power Controller (PWR) peripheral:
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9 * + Backup Domain Access
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10 * + PVD configuration
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11 * + WakeUp pins configuration
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12 * + Low Power modes configuration
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13 * + Flags management
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15 ******************************************************************************
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18 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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19 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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20 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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21 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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22 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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23 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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25 * FOR MORE INFORMATION PLEASE READ CAREFULLY THE LICENSE AGREEMENT FILE
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26 * LOCATED IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE.
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28 * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
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29 ******************************************************************************
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32 /* Includes ------------------------------------------------------------------*/
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33 #include "stm32f0xx_pwr.h"
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34 #include "stm32f0xx_rcc.h"
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36 /** @addtogroup STM32F0xx_StdPeriph_Driver
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41 * @brief PWR driver modules
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45 /* Private typedef -----------------------------------------------------------*/
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46 /* Private define ------------------------------------------------------------*/
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48 /* ------------------ PWR registers bit mask ------------------------ */
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50 /* CR register bit mask */
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51 #define CR_DS_MASK ((uint32_t)0xFFFFFFFC)
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52 #define CR_PLS_MASK ((uint32_t)0xFFFFFF1F)
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54 /* Private macro -------------------------------------------------------------*/
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55 /* Private variables ---------------------------------------------------------*/
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56 /* Private function prototypes -----------------------------------------------*/
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57 /* Private functions ---------------------------------------------------------*/
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59 /** @defgroup PWR_Private_Functions
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63 /** @defgroup PWR_Group1 Backup Domain Access function
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64 * @brief Backup Domain Access function
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67 ==============================================================================
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68 ##### Backup Domain Access function #####
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69 ==============================================================================
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71 [..] After reset, the Backup Domain Registers (RCC BDCR Register, RTC registers
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72 and RTC backup registers) are protected against possible stray write accesses.
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73 [..] To enable access to Backup domain use the PWR_BackupAccessCmd(ENABLE) function.
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80 * @brief Deinitializes the PWR peripheral registers to their default reset values.
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84 void PWR_DeInit(void)
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86 RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
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87 RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
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91 * @brief Enables or disables access to the Backup domain registers.
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92 * @note If the HSE divided by 32 is used as the RTC clock, the
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93 * Backup Domain Access should be kept enabled.
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94 * @param NewState: new state of the access to the Backup domain registers.
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95 * This parameter can be: ENABLE or DISABLE.
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98 void PWR_BackupAccessCmd(FunctionalState NewState)
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100 /* Check the parameters */
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101 assert_param(IS_FUNCTIONAL_STATE(NewState));
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103 if (NewState != DISABLE)
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105 /* Enable the Backup Domain Access */
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106 PWR->CR |= PWR_CR_DBP;
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110 /* Disable the Backup Domain Access */
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111 PWR->CR &= (uint32_t)~((uint32_t)PWR_CR_DBP);
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119 /** @defgroup PWR_Group2 PVD configuration functions
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120 * @brief PVD configuration functions
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123 ==============================================================================
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124 ##### PVD configuration functions #####
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125 ==============================================================================
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127 (+) The PVD is used to monitor the VDD power supply by comparing it to a threshold
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128 selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
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129 (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower than the
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130 PVD threshold. This event is internally connected to the EXTI line16
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131 and can generate an interrupt if enabled through the EXTI registers.
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132 (+) The PVD is stopped in Standby mode.
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139 * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
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140 * @param PWR_PVDLevel: specifies the PVD detection level
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141 * This parameter can be one of the following values:
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142 * @arg PWR_PVDLevel_0: PVD detection level set to 1.9V
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143 * @arg PWR_PVDLevel_1: PVD detection level set to 2.1V
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144 * @arg PWR_PVDLevel_2: PVD detection level set to 2.3V
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145 * @arg PWR_PVDLevel_3: PVD detection level set to 2.5V
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146 * @arg PWR_PVDLevel_4: PVD detection level set to 2.7V
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147 * @arg PWR_PVDLevel_5: PVD detection level set to 2.9V
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148 * @arg PWR_PVDLevel_6: PVD detection level set to 3.1V
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149 * @arg PWR_PVDLevel_7: PVD detection level set to 3.3V
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152 void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
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154 uint32_t tmpreg = 0;
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156 /* Check the parameters */
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157 assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel));
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161 /* Clear PLS[7:5] bits */
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162 tmpreg &= CR_PLS_MASK;
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164 /* Set PLS[7:5] bits according to PWR_PVDLevel value */
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165 tmpreg |= PWR_PVDLevel;
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167 /* Store the new value */
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172 * @brief Enables or disables the Power Voltage Detector(PVD).
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173 * @param NewState: new state of the PVD.
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174 * This parameter can be: ENABLE or DISABLE.
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177 void PWR_PVDCmd(FunctionalState NewState)
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179 /* Check the parameters */
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180 assert_param(IS_FUNCTIONAL_STATE(NewState));
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182 if (NewState != DISABLE)
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184 /* Enable the PVD */
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185 PWR->CR |= PWR_CR_PVDE;
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189 /* Disable the PVD */
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190 PWR->CR &= (uint32_t)~((uint32_t)PWR_CR_PVDE);
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198 /** @defgroup PWR_Group3 WakeUp pins configuration functions
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199 * @brief WakeUp pins configuration functions
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202 ==============================================================================
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203 ##### WakeUp pin configuration functions #####
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204 ==============================================================================
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206 (+) WakeUp pins are used to wakeup the system from Standby mode. These pins are
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207 forced in input pull down configuration and are active on rising edges.
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208 (+) There are three WakeUp pins: WakeUp Pin 1 on PA.00 and WakeUp Pin 2 on PC.13.
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215 * @brief Enables or disables the WakeUp Pin functionality.
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216 * @param PWR_WakeUpPin: specifies the WakeUpPin.
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217 * This parameter can be: PWR_WakeUpPin_1 or PWR_WakeUpPin_2.
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218 * @param NewState: new state of the WakeUp Pin functionality.
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219 * This parameter can be: ENABLE or DISABLE.
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222 void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState)
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224 /* Check the parameters */
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225 assert_param(IS_PWR_WAKEUP_PIN(PWR_WakeUpPin));
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226 assert_param(IS_FUNCTIONAL_STATE(NewState));
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228 if (NewState != DISABLE)
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230 /* Enable the EWUPx pin */
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231 PWR->CSR |= PWR_WakeUpPin;
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235 /* Disable the EWUPx pin */
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236 PWR->CSR &= ~PWR_WakeUpPin;
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245 /** @defgroup PWR_Group4 Low Power modes configuration functions
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246 * @brief Low Power modes configuration functions
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249 ==============================================================================
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250 ##### Low Power modes configuration functions #####
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251 ==============================================================================
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253 [..] The devices feature three low-power modes:
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254 (+) Sleep mode: Cortex-M0 core stopped, peripherals kept running.
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255 (+) Stop mode: all clocks are stopped, regulator running, regulator in low power mode
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256 (+) Standby mode: VCORE domain powered off
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258 *** Sleep mode ***
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262 (++) The Sleep mode is entered by executing the WFE() or WFI() instructions.
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264 (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
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265 controller (NVIC) can wake up the device from Sleep mode.
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269 [..] In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the HSI,
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270 the HSI14 and the HSE RC oscillators are disabled. Internal SRAM and register
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271 contents are preserved.
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272 The voltage regulator can be configured either in normal or low-power mode.
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275 (++) The Stop mode is entered using the PWR_EnterSTOPMode(PWR_Regulator_LowPower,)
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276 function with regulator in LowPower or with Regulator ON.
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278 (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode
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279 or any internal IPs (I2C, UASRT or CEC) wakeup event.
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281 *** Standby mode ***
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282 ====================
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283 [..] The Standby mode allows to achieve the lowest power consumption. It is based
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284 on the Cortex-M0 deepsleep mode, with the voltage regulator disabled.
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285 The VCORE domain is consequently powered off. The PLL, the HSI, the HSI14
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286 oscillator and the HSE oscillator are also switched off. SRAM and register
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287 contents are lost except for the Backup domain (RTC registers, RTC backup
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288 registers and Standby circuitry).
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290 [..] The voltage regulator is OFF.
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293 (++) The Standby mode is entered using the PWR_EnterSTANDBYMode() function.
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295 (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
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296 tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
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298 *** Auto-wakeup (AWU) from low-power mode ***
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299 =============================================
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300 [..] The MCU can be woken up from low-power mode by an RTC Alarm event, a tamper
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301 event, a time-stamp event, or a comparator event, without depending on an
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302 external interrupt (Auto-wakeup mode).
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304 (+) RTC auto-wakeup (AWU) from the Stop mode
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305 (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
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306 (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt
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307 or Event modes) using the EXTI_Init() function.
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308 (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function
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309 (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
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310 and RTC_AlarmCmd() functions.
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311 (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
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313 (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt
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314 or Event modes) using the EXTI_Init() function.
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315 (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
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317 (+++) Configure the RTC to detect the tamper or time stamp event using the
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318 RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
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321 (+) RTC auto-wakeup (AWU) from the Standby mode
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322 (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
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323 (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function.
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324 (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
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325 and RTC_AlarmCmd() functions.
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326 (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it
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328 (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
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330 (+++) Configure the RTC to detect the tamper or time stamp event using the
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331 RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
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334 (+) Comparator auto-wakeup (AWU) from the Stop mode
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335 (++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup
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336 event, it is necessary to:
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337 (+++) Configure the EXTI Line 21 for comparator 1 or EXTI Line 22 for comparator 2
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338 to be sensitive to to the selected edges (falling, rising or falling
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339 and rising) (Interrupt or Event modes) using the EXTI_Init() function.
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340 (+++) Configure the comparator to generate the event.
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347 * @brief Enters Sleep mode.
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348 * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
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349 * @param PWR_SLEEPEntry: specifies if SLEEP mode in entered with WFI or WFE instruction.
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350 * This parameter can be one of the following values:
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351 * @arg PWR_SLEEPEntry_WFI: enter SLEEP mode with WFI instruction
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352 * @arg PWR_SLEEPEntry_WFE: enter SLEEP mode with WFE instruction
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355 void PWR_EnterSleepMode(uint8_t PWR_SLEEPEntry)
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357 /* Check the parameters */
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358 assert_param(IS_PWR_SLEEP_ENTRY(PWR_SLEEPEntry));
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360 /* Clear SLEEPDEEP bit of Cortex-M0 System Control Register */
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361 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
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363 /* Select SLEEP mode entry -------------------------------------------------*/
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364 if(PWR_SLEEPEntry == PWR_SLEEPEntry_WFI)
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366 /* Request Wait For Interrupt */
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371 /* Request Wait For Event */
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377 * @brief Enters STOP mode.
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378 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
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379 * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
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380 * the HSI RC oscillator is selected as system clock.
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381 * @note When the voltage regulator operates in low power mode, an additional
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382 * startup delay is incurred when waking up from Stop mode.
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383 * By keeping the internal regulator ON during Stop mode, the consumption
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384 * is higher although the startup time is reduced.
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385 * @param PWR_Regulator: specifies the regulator state in STOP mode.
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386 * This parameter can be one of the following values:
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387 * @arg PWR_Regulator_ON: STOP mode with regulator ON
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388 * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
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389 * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
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390 * This parameter can be one of the following values:
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391 * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
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392 * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
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395 void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
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397 uint32_t tmpreg = 0;
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399 /* Check the parameters */
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400 assert_param(IS_PWR_REGULATOR(PWR_Regulator));
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401 assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
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403 /* Select the regulator state in STOP mode ---------------------------------*/
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405 /* Clear PDDS and LPDSR bits */
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406 tmpreg &= CR_DS_MASK;
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408 /* Set LPDSR bit according to PWR_Regulator value */
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409 tmpreg |= PWR_Regulator;
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411 /* Store the new value */
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414 /* Set SLEEPDEEP bit of Cortex-M0 System Control Register */
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415 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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417 /* Select STOP mode entry --------------------------------------------------*/
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418 if(PWR_STOPEntry == PWR_STOPEntry_WFI)
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420 /* Request Wait For Interrupt */
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425 /* Request Wait For Event */
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428 /* Reset SLEEPDEEP bit of Cortex System Control Register */
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429 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
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433 * @brief Enters STANDBY mode.
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434 * @note In Standby mode, all I/O pins are high impedance except for:
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435 * Reset pad (still available)
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436 * RTC_AF1 pin (PC13) if configured for Wakeup pin 2 (WKUP2), tamper,
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437 * time-stamp, RTC Alarm out, or RTC clock calibration out.
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438 * WKUP pin 1 (PA0) if enabled.
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442 void PWR_EnterSTANDBYMode(void)
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444 /* Clear Wakeup flag */
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445 PWR->CR |= PWR_CR_CWUF;
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447 /* Select STANDBY mode */
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448 PWR->CR |= PWR_CR_PDDS;
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450 /* Set SLEEPDEEP bit of Cortex-M0 System Control Register */
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451 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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453 /* Request Wait For Interrupt */
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461 /** @defgroup PWR_Group5 Flags management functions
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462 * @brief Flags management functions
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465 ==============================================================================
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466 ##### Flags management functions #####
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467 ==============================================================================
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474 * @brief Checks whether the specified PWR flag is set or not.
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475 * @param PWR_FLAG: specifies the flag to check.
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476 * This parameter can be one of the following values:
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477 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup
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478 * event was received from the WKUP pin or from the RTC alarm
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479 * (Alarm A or Alarm B), RTC Tamper event or RTC TimeStamp event.
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480 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the
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481 * system was resumed from StandBy mode.
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482 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD
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483 * is enabled by the PWR_PVDCmd() function.
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484 * @arg PWR_FLAG_VREFINTRDY: Internal Voltage Reference Ready flag.
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485 * This flag indicates the state of the internal voltage
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486 * reference, VREFINT.
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487 * @retval The new state of PWR_FLAG (SET or RESET).
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489 FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
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491 FlagStatus bitstatus = RESET;
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492 /* Check the parameters */
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493 assert_param(IS_PWR_GET_FLAG(PWR_FLAG));
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495 if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET)
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503 /* Return the flag status */
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508 * @brief Clears the PWR's pending flags.
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509 * @param PWR_FLAG: specifies the flag to clear.
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510 * This parameter can be one of the following values:
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511 * @arg PWR_FLAG_WU: Wake Up flag
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512 * @arg PWR_FLAG_SB: StandBy flag
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515 void PWR_ClearFlag(uint32_t PWR_FLAG)
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517 /* Check the parameters */
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518 assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG));
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520 PWR->CR |= PWR_FLAG << 2;
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539 /******************* (C) COPYRIGHT 2012 STMicroelectronics *****END OF FILE****/
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