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   1 /**********************************************************************
   2 * $Id: lpc43xx_emc.h 8765 2011-12-08 00:51:21Z nxp21346 $               lpc43xx_emc.h           2011-12-07
   3 *//**
   4 * @file         lpc43xx_emc.h
   5 * @brief        Contains all functions support for Clock Generation and Control
   6 *                       firmware library on lpc43xx
   7 * @version      1.0
   8 * @date         07. December. 2011
   9 * @author       NXP MCU SW Application Team
  10 *
  11 * Copyright(C) 2011, NXP Semiconductor
  12 * All rights reserved.
  13 *
  14 ***********************************************************************
  15 * Software that is described herein is for illustrative purposes only
  16 * which provides customers with programming information regarding the
  17 * products. This software is supplied "AS IS" without any warranties.
  18 * NXP Semiconductors assumes no responsibility or liability for the
  19 * use of the software, conveys no license or title under any patent,
  20 * copyright, or mask work right to the product. NXP Semiconductors
  21 * reserves the right to make changes in the software without
  22 * notification. NXP Semiconductors also make no representation or
  23 * warranty that such application will be suitable for the specified
  24 * use without further testing or modification.
  25 **********************************************************************/
  26
  27 #define __CRYSTAL        (12000000UL)    /* Crystal Oscillator frequency          */
  28 #define __PLLMULT                (15)
  29 #define __PLLOUTHZ               (__CRYSTAL * __PLLMULT)
  30 #define __EMCDIV                 (2)
  31 #define __EMCHZ                  (__PLLOUTHZ / __EMCDIV)
  32
  33 void MemoryPinInit(void);
  34 void EMCFlashInit(void);
  35
  36 /* SDRAM Address Base for DYCS0*/
  37 #define SDRAM_BASE_ADDR 0x28000000
  38 #define FLASH_BASE_ADDR 0x1C000000
  39
  40 #define EMC_SDRAM_WIDTH_8_BITS          0
  41 #define EMC_SDRAM_WIDTH_16_BITS         1
  42 #define EMC_SDRAM_WIDTH_32_BITS         2
  43
  44 #define EMC_SDRAM_SIZE_16_MBITS         0
  45 #define EMC_SDRAM_SIZE_64_MBITS         1
  46 #define EMC_SDRAM_SIZE_128_MBITS        2
  47 #define EMC_SDRAM_SIZE_256_MBITS        3
  48 #define EMC_SDRAM_SIZE_512_MBITS        4
  49
  50 #define EMC_SDRAM_DATA_BUS_16_BITS      0
  51 #define EMC_SDRAM_DATA_BUS_32_BITS      1
  52
  53 #define EMC_B_ENABLE                                    (1 << 19)
  54 #define EMC_ENABLE                                              (1 << 0)
  55 #define EMC_CE_ENABLE                                   (1 << 0)
  56 #define EMC_CS_ENABLE                                   (1 << 1)
  57 #define EMC_CLOCK_DELAYED_STRATEGY              (0 << 0)
  58 #define EMC_COMMAND_DELAYED_STRATEGY    (1 << 0)
  59 #define EMC_COMMAND_DELAYED_STRATEGY2   (2 << 0)
  60 #define EMC_COMMAND_DELAYED_STRATEGY3   (3 << 0)
  61 #define EMC_INIT(i)                                     ((i) << 7)
  62 #define EMC_NORMAL                                              (0)
  63 #define EMC_MODE                                                (1)
  64 #define EMC_PRECHARGE_ALL                               (2)
  65 #define EMC_NOP                                                 (3)
  66
  67 /* The Hitex LPC18xx Evaluation board contains a 64Mb SDRAM with a 16-bit data bus */
  68 #define SDRAM_SIZE_BYTES                (1024UL * 1024UL * 8UL)
  69 #define SDRAM_WIDTH                             EMC_SDRAM_WIDTH_16_BITS
  70 #define SDRAM_SIZE_MBITS                EMC_SDRAM_SIZE_64_MBITS
  71 #define SDRAM_DATA_BUS_BITS             EMC_SDRAM_DATA_BUS_16_BITS
  72 #define SDRAM_COL_ADDR_BITS             8
  73 #define CLK0_DELAY     0
  74
  75 void vEMC_InitSRDRAM(uint32_t u32BaseAddr, uint32_t u32Width, uint32_t u32Size, uint32_t u32DataBus, uint32_t u32ColAddrBits);
  76 void emc_WaitUS(volatile uint32_t us);
  77 void emc_WaitMS(uint32_t ms);
  78
  79