1 /***********************************************************************
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2 * $Id: scu.h 8389 2011-10-19 13:53:14Z nxp28536 $
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4 * Project: LPC43xx Common
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7 * Header file for PINMUX configuration
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9 ***********************************************************************
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10 * Software that is described herein is for illustrative purposes only
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11 * which provides customers with programming information regarding the
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12 * products. This software is supplied "AS IS" without any warranties.
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13 * NXP Semiconductors assumes no responsibility or liability for the
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14 * use of the software, conveys no license or title under any patent,
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15 * copyright, or mask work right to the product. NXP Semiconductors
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16 * reserves the right to make changes in the software without
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17 * notification. NXP Semiconductors also make no representation or
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18 * warranty that such application will be suitable for the specified
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19 * use without further testing or modification.
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20 **********************************************************************/
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24 #define PORT_OFFSET 0x80
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25 #define PIN_OFFSET 0x04
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28 #define MD_PUP (0x0<<3)
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29 #define MD_BUK (0x1<<3)
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30 #define MD_PLN (0x2<<3)
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31 #define MD_PDN (0x3<<3)
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32 #define MD_EHS (0x1<<5)
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33 #define MD_EZI (0x1<<6)
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34 #define MD_ZI (0x1<<7)
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35 #define MD_EHD0 (0x1<<8)
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36 #define MD_EHD1 (0x1<<8)
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37 #define MD_PLN_FAST (MD_PLN | MD_EHS | MD_EZI | MD_ZI)
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41 * The EPUN and EPD bits in the SFS registers allow the selection of weak on-chip
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42 * pull-up or pull-down resistors with a typical value of 50 kOhm for each pin or the
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43 * selection of the repeater mode.
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44 * The possible on-chip resistor configurations are pull-up enabled, pull-down enabled, or no
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45 * pull-up/pull-down. The default value is pull-up enabled.
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47 * The repeater mode enables the pull-up resistor if the pin is at a logic HIGH and enables
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48 * the pull-down resistor if the pin is at a logic LOW. This causes the pin to retain its last
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49 * known state if it is configured as an input and is not driven externally. Repeater mode may
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50 * typically be used to prevent a pin from floating (and potentially using significant power if it
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51 * floats to an indeterminate state) if it is temporarily not driven.
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53 * To be able to receive a digital signal, the input buffer must be enabled through bit EZI in
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54 * the pin configuration registers. By default, the input buffer is disabled.
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55 * For pads that support both a digital and an analog function, the input buffer must be
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56 * disabled before enabling the analog function
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58 * All digital pins support a programmable glitch filter (bit ZIF), which can be switched on or
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59 * off. By default, the glitch filter is on. The glitch filter should be disabled for
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60 * clocking signals with frequencies higher than 30 MHz.
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62 * Normal-drive and high-speed pins support a programmable slew rate (bit EHS) to select
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63 * between lower noise and low speed or higher noise and high speed . The typical
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64 * frequencies supported are 50 MHz/80 MHz for normal-drive pins and 75 MHz/180 MHz for
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68 /* these definitions allow to set or clear single configuration bits */
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69 #define PDN_SET (1 << 3)
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72 #define PUP_CLR (1 << 4)
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74 /* these definitions allow to configure the port in one specific mode */
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75 /* within scu_pinmux() function */
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76 #define PDN_ENABLE (0x3 << 3) /* pull down */
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77 #define PUP_ENABLE (0x0 << 3) /* pull up */
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78 #define REPEATER_ENABLE (0x1 << 3) /* repeater */
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79 #define PLAIN_ENABLE (0x2 << 3) /* no pull up, no pull down (plain) */
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81 #define SLEWRATE_SLOW (0)
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82 #define SLEWRATE_FAST (1 << 5)
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84 /* enable / disable the input buffer */
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85 #define INBUF_ENABLE (1 << 6)
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86 #define INBUF_DISABLE (0)
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88 /* enable / disable the filter */
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89 #define FILTER_ENABLE (0)
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90 #define FILTER_DISABLE (1 << 7)
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92 /* define the drive strenght */
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93 #define DRIVE_8MA (0x1 << 8) // Drive strength of 8mA
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94 #define DRIVE_14MA (0x1 << 9) // Drive strength of 14mA
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95 #define DRIVE_20MA (0x3 << 8) // Drive strength of 20mA
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99 // Configuration examples for external memory bus pins
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100 #define EMC_OUT (PUP_CLR | SLEWRATE_FAST | FILTER_DISABLE)
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101 #define EMC_IO (PUP_CLR | SLEWRATE_FAST | INBUF_ENABLE | FILTER_DISABLE)
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103 // Configuration examples
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104 #define CLK_OUT (PUP_CLR | SLEWRATE_FAST | FILTER_DISABLE)
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105 #define CLK_IN (PUP_CLR | SLEWRATE_FAST | INBUF_ENABLE | FILTER_DISABLE)
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107 /* Pin functions */
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117 extern void scu_pinmux(unsigned port, unsigned pin, unsigned mode, unsigned func);
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119 #define LPC_SCU_PIN(po, pi) (*(volatile int *) (LPC_SCU_BASE + ((po) * 0x80) + ((pi) * 0x4)) )
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120 #define LPC_SCU_CLK(c) (*(volatile int *) (LPC_SCU_BASE + 0xC00 + ((c) * 0x4)) )
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123 #endif /* end __SCU_H */
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124 /*****************************************************************************
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126 ******************************************************************************/
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