1 /************************************************************************/
\r
2 /* (C) Fujitsu Semiconductor Europe GmbH (FSEU) */
\r
4 /* The following software deliverable is intended for and must only be */
\r
5 /* used for reference and in an evaluation laboratory environment. */
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6 /* It is provided on an as-is basis without charge and is subject to */
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8 /* It is the user's obligation to fully test the software in its */
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9 /* environment and to ensure proper functionality, qualification and */
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10 /* compliance with component specifications. */
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12 /* In the event the software deliverable includes the use of open */
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13 /* source components, the provisions of the governing open source */
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14 /* license agreement shall apply with respect to such software */
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16 /* FSEU does not warrant that the deliverables do not infringe any */
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17 /* third party intellectual property right (IPR). In the event that */
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18 /* the deliverables infringe a third party IPR it is the sole */
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19 /* responsibility of the customer to obtain necessary licenses to */
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20 /* continue the usage of the deliverable. */
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22 /* To the maximum extent permitted by applicable law FSEU disclaims all */
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23 /* warranties, whether express or implied, in particular, but not */
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24 /* limited to, warranties of merchantability and fitness for a */
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25 /* particular purpose for which the deliverable is not designated. */
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27 /* To the maximum extent permitted by applicable law, FSEU's liability */
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28 /* is restricted to intentional misconduct and gross negligence. */
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29 /* FSEU is not liable for consequential damages. */
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32 /************************************************************************/
\r
34 /* Header File for Device MB9BF506N */
\r
36 /* Date 2011-01-21 */
\r
38 /************************************************************************/
\r
40 #ifndef _MB9BF506N_H_
\r
41 #define _MB9BF506N_H_
\r
48 /******************************************************************************
\r
49 * Configuration of the Cortex-M3 Processor and Core Peripherals
\r
50 ******************************************************************************/
\r
51 #define __MPU_PRESENT 1 /* FM3 provide an MPU */
\r
52 #define __NVIC_PRIO_BITS 4 /* FM3 uses 4 Bits for the Priority Levels */
\r
53 #define __Vendor_SysTickConfig 0 /* Set to 1 if different SysTick Config is used */
\r
56 /******************************************************************************
\r
57 * Interrupt Number Definition
\r
58 ******************************************************************************/
\r
61 NMI_IRQn = -14, /* 2 Non Maskable */
\r
62 HardFault_IRQn = -13, /* 3 Hard Fault */
\r
63 MemManage_IRQn = -12, /* 4 Memory Management */
\r
64 BusFault_IRQn = -11, /* 5 Bus Fault */
\r
65 UsageFault_IRQn = -10, /* 6 Usage Fault */
\r
66 SVC_IRQn = -5, /* 11 SV Call */
\r
67 DebugMonitor_IRQn = -4, /* 12 Debug Monitor */
\r
68 PendSVC_IRQn = -2, /* 14 Pend SV */
\r
69 SysTick_IRQn = -1, /* 15 System Tick */
\r
71 CSV_IRQn = 0, /* Clock Super Visor */
\r
72 SWDT_IRQn = 1, /* Software Watchdog Timer */
\r
73 LVD_IRQn = 2, /* Low Voltage Detector */
\r
74 WFG_IRQn = 3, /* Wave Form Generator */
\r
75 EXINT0_7_IRQn = 4, /* External Interrupt Request ch.0 to ch.7 */
\r
76 EXINT8_15_IRQn = 5, /* External Interrupt Request ch.8 to ch.15 */
\r
77 DTIM_QDU_IRQn = 6, /* Dual Timer / Quad Decoder */
\r
78 MFS0RX_IRQn = 7, /* MultiFunction Serial ch.0 */
\r
79 MFS0TX_IRQn = 8, /* MultiFunction Serial ch.0 */
\r
80 MFS1RX_IRQn = 9, /* MultiFunction Serial ch.1 */
\r
81 MFS1TX_IRQn = 10, /* MultiFunction Serial ch.1 */
\r
82 MFS2RX_IRQn = 11, /* MultiFunction Serial ch.2 */
\r
83 MFS2TX_IRQn = 12, /* MultiFunction Serial ch.2 */
\r
84 MFS3RX_IRQn = 13, /* MultiFunction Serial ch.3 */
\r
85 MFS3TX_IRQn = 14, /* MultiFunction Serial ch.3 */
\r
86 MFS4RX_IRQn = 15, /* MultiFunction Serial ch.4 */
\r
87 MFS4TX_IRQn = 16, /* MultiFunction Serial ch.4 */
\r
88 MFS5RX_IRQn = 17, /* MultiFunction Serial ch.5 */
\r
89 MFS5TX_IRQn = 18, /* MultiFunction Serial ch.5 */
\r
90 MFS6RX_IRQn = 19, /* MultiFunction Serial ch.6 */
\r
91 MFS6TX_IRQn = 20, /* MultiFunction Serial ch.6 */
\r
92 MFS7RX_IRQn = 21, /* MultiFunction Serial ch.7 */
\r
93 MFS7TX_IRQn = 22, /* MultiFunction Serial ch.7 */
\r
94 PPG_IRQn = 23, /* PPG */
\r
95 OSC_PLL_WC_IRQn = 24, /* OSC / PLL / Watch Counter */
\r
96 ADC0_IRQn = 25, /* ADC0 */
\r
97 ADC1_IRQn = 26, /* ADC1 */
\r
98 ADC2_IRQn = 27, /* ADC2 */
\r
99 FRTIM_IRQn = 28, /* Free-run Timer */
\r
100 INCAP_IRQn = 29, /* Input Capture */
\r
101 OUTCOMP_IRQn = 30, /* Output Compare */
\r
102 BTIM_IRQn = 31, /* Base Timer ch.0 to ch.7 */
\r
103 CAN0_IRQn = 32, /* CAN ch.0 */
\r
104 CAN1_IRQn = 33, /* CAN ch.1 */
\r
105 USBF_IRQn = 34, /* USB Function */
\r
106 USBF_USBH_IRQn = 35, /* USB Function / USB HOST */
\r
107 /* Reserved = 36, */
\r
108 /* Reserved = 37, */
\r
109 DMAC0_IRQn = 38, /* DMAC ch.0 */
\r
110 DMAC1_IRQn = 39, /* DMAC ch.1 */
\r
111 DMAC2_IRQn = 40, /* DMAC ch.2 */
\r
112 DMAC3_IRQn = 41, /* DMAC ch.3 */
\r
113 DMAC4_IRQn = 42, /* DMAC ch.4 */
\r
114 DMAC5_IRQn = 43, /* DMAC ch.5 */
\r
115 DMAC6_IRQn = 44, /* DMAC ch.6 */
\r
116 DMAC7_IRQn = 45, /* DMAC ch.7 */
\r
117 /* Reserved = 46, */
\r
118 /* Reserved = 47, */
\r
122 #include "core_cm3.h"
\r
123 #include "system_mb9bf50x.h"
\r
124 #include <stdint.h>
\r
134 /******************************************************************************/
\r
135 /* Device Specific Peripheral Registers structures */
\r
136 /******************************************************************************/
\r
138 #if defined ( __CC_ARM )
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139 #pragma anon_unions
\r
142 /******************************************************************************
\r
144 ******************************************************************************/
\r
145 /* Flash interface registers */
\r
148 __IO uint32_t FASZR;
\r
149 __IO uint32_t FRWTR;
\r
150 __IO uint32_t FSTR;
\r
151 uint8_t RESERVED0[4];
\r
152 __IO uint32_t FSYNDN;
\r
153 uint8_t RESERVED1[236];
\r
154 __IO uint32_t CRTRMM;
\r
157 /******************************************************************************
\r
158 * Clock_Reset_MODULE
\r
159 ******************************************************************************/
\r
160 /* Clock and reset registers */
\r
163 __IO uint8_t SCM_CTL;
\r
164 uint8_t RESERVED0[3];
\r
165 __IO uint8_t SCM_STR;
\r
166 uint8_t RESERVED1[3];
\r
167 __IO uint32_t STB_CTL;
\r
168 __IO uint16_t RST_STR;
\r
169 uint8_t RESERVED2[2];
\r
170 __IO uint8_t BSC_PSR;
\r
171 uint8_t RESERVED3[3];
\r
172 __IO uint8_t APBC0_PSR;
\r
173 uint8_t RESERVED4[3];
\r
174 __IO uint8_t APBC1_PSR;
\r
175 uint8_t RESERVED5[3];
\r
176 __IO uint8_t APBC2_PSR;
\r
177 uint8_t RESERVED6[3];
\r
178 __IO uint8_t SWC_PSR;
\r
179 uint8_t RESERVED7[7];
\r
180 __IO uint8_t TTC_PSR;
\r
181 uint8_t RESERVED8[7];
\r
182 __IO uint8_t CSW_TMR;
\r
183 uint8_t RESERVED9[3];
\r
184 __IO uint8_t PSW_TMR;
\r
185 uint8_t RESERVED10[3];
\r
186 __IO uint8_t PLL_CTL1;
\r
187 uint8_t RESERVED11[3];
\r
188 __IO uint8_t PLL_CTL2;
\r
189 uint8_t RESERVED12[3];
\r
190 __IO uint16_t CSV_CTL;
\r
191 uint8_t RESERVED13[2];
\r
192 __IO uint8_t CSV_STR;
\r
193 uint8_t RESERVED14[3];
\r
194 __IO uint16_t FCSWH_CTL;
\r
195 uint8_t RESERVED15[2];
\r
196 __IO uint16_t FCSWL_CTL;
\r
197 uint8_t RESERVED16[2];
\r
198 __IO uint16_t FCSWD_CTL;
\r
199 uint8_t RESERVED17[2];
\r
200 __IO uint8_t DBWDT_CTL;
\r
201 uint8_t RESERVED18[11];
\r
202 __IO uint8_t INT_ENR;
\r
203 uint8_t RESERVED19[3];
\r
204 __IO uint8_t INT_STR;
\r
205 uint8_t RESERVED20[3];
\r
206 __IO uint8_t INT_CLR;
\r
209 /******************************************************************************
\r
211 ******************************************************************************/
\r
212 /* Hardware watchdog registers */
\r
215 __IO uint32_t WDG_LDR;
\r
216 __IO uint32_t WDG_VLR;
\r
217 __IO uint8_t WDG_CTL;
\r
218 uint8_t RESERVED0[3];
\r
219 __IO uint8_t WDG_ICL;
\r
220 uint8_t RESERVED1[3];
\r
221 __IO uint8_t WDG_RIS;
\r
222 uint8_t RESERVED2[3055];
\r
223 __IO uint32_t WDG_LCK;
\r
224 }FM3_HWWDT_TypeDef;
\r
226 /******************************************************************************
\r
228 ******************************************************************************/
\r
229 /* Software watchdog registers */
\r
232 __IO uint32_t WDOGLOAD;
\r
233 __IO uint32_t WDOGVALUE;
\r
234 __IO uint8_t WDOGCONTROL;
\r
235 uint8_t RESERVED0[3];
\r
236 __IO uint32_t WDOGINTCLR;
\r
237 __IO uint8_t WDOGRIS;
\r
238 uint8_t RESERVED1[3055];
\r
239 __IO uint32_t WDOGLOCK;
\r
240 }FM3_SWWDT_TypeDef;
\r
242 /******************************************************************************
\r
244 ******************************************************************************/
\r
245 /* Dual timer 1/2 registers */
\r
248 __IO uint32_t TIMER1LOAD;
\r
249 __IO uint32_t TIMER1VALUE;
\r
250 __IO uint32_t TIMER1CONTROL;
\r
251 __IO uint32_t TIMER1INTCLR;
\r
252 __IO uint32_t TIMER1RIS;
\r
253 __IO uint32_t TIMER1MIS;
\r
254 __IO uint32_t TIMER1BGLOAD;
\r
255 uint8_t RESERVED0[4];
\r
256 __IO uint32_t TIMER2LOAD;
\r
257 __IO uint32_t TIMER2VALUE;
\r
258 __IO uint32_t TIMER2CONTROL;
\r
259 __IO uint32_t TIMER2INTCLR;
\r
260 __IO uint32_t TIMER2RIS;
\r
261 __IO uint32_t TIMER2MIS;
\r
262 __IO uint32_t TIMER2BGLOAD;
\r
265 /******************************************************************************
\r
267 ******************************************************************************/
\r
268 /* Multifunction Timer unit 0 Free Running Timer registers */
\r
271 uint8_t RESERVED0[40];
\r
272 __IO uint16_t TCCP0;
\r
273 uint8_t RESERVED1[2];
\r
274 __IO uint16_t TCDT0;
\r
275 uint8_t RESERVED2[2];
\r
276 __IO uint16_t TCSA0;
\r
277 uint8_t RESERVED3[2];
\r
278 __IO uint16_t TCSB0;
\r
279 uint8_t RESERVED4[2];
\r
280 __IO uint16_t TCCP1;
\r
281 uint8_t RESERVED5[2];
\r
282 __IO uint16_t TCDT1;
\r
283 uint8_t RESERVED6[2];
\r
284 __IO uint16_t TCSA1;
\r
285 uint8_t RESERVED7[2];
\r
286 __IO uint16_t TCSB1;
\r
287 uint8_t RESERVED8[2];
\r
288 __IO uint16_t TCCP2;
\r
289 uint8_t RESERVED9[2];
\r
290 __IO uint16_t TCDT2;
\r
291 uint8_t RESERVED10[2];
\r
292 __IO uint16_t TCSA2;
\r
293 uint8_t RESERVED11[2];
\r
294 __IO uint16_t TCSB2;
\r
295 }FM3_MFT_FRT_TypeDef;
\r
297 /******************************************************************************
\r
299 ******************************************************************************/
\r
300 /* Multifunction Timer unit 0 Output Compare Unit registers */
\r
303 __IO uint16_t OCCP0;
\r
304 uint8_t RESERVED0[2];
\r
305 __IO uint16_t OCCP1;
\r
306 uint8_t RESERVED1[2];
\r
307 __IO uint16_t OCCP2;
\r
308 uint8_t RESERVED2[2];
\r
309 __IO uint16_t OCCP3;
\r
310 uint8_t RESERVED3[2];
\r
311 __IO uint16_t OCCP4;
\r
312 uint8_t RESERVED4[2];
\r
313 __IO uint16_t OCCP5;
\r
314 uint8_t RESERVED5[2];
\r
315 __IO uint8_t OCSA10;
\r
316 __IO uint8_t OCSB10;
\r
317 uint8_t RESERVED6[2];
\r
318 __IO uint8_t OCSA32;
\r
319 __IO uint8_t OCSB32;
\r
320 uint8_t RESERVED7[2];
\r
321 __IO uint8_t OCSA54;
\r
322 __IO uint8_t OCSB54;
\r
323 uint8_t RESERVED8[3];
\r
325 uint8_t RESERVED9[50];
\r
326 __IO uint8_t OCFS10;
\r
327 __IO uint8_t OCFS32;
\r
328 uint8_t RESERVED10[2];
\r
329 __IO uint8_t OCFS54;
\r
330 }FM3_MFT_OCU_TypeDef;
\r
332 /******************************************************************************
\r
334 ******************************************************************************/
\r
335 /* Multifunction Timer unit 0 Waveform Generator and Noise Canceler registers */
\r
338 uint8_t RESERVED0[128];
\r
339 __IO uint16_t WFTM10;
\r
340 uint8_t RESERVED1[2];
\r
341 __IO uint16_t WFTM32;
\r
342 uint8_t RESERVED2[2];
\r
343 __IO uint16_t WFTM54;
\r
344 uint8_t RESERVED3[2];
\r
345 __IO uint16_t WFSA10;
\r
346 uint8_t RESERVED4[2];
\r
347 __IO uint16_t WFSA32;
\r
348 uint8_t RESERVED5[2];
\r
349 __IO uint16_t WFSA54;
\r
350 uint8_t RESERVED6[2];
\r
351 __IO uint16_t WFIR;
\r
352 uint8_t RESERVED7[2];
\r
353 __IO uint16_t NZCL;
\r
354 }FM3_MFT_WFG_TypeDef;
\r
356 /******************************************************************************
\r
358 ******************************************************************************/
\r
359 /* Multifunction Timer unit 0 Input Capture Unit registers */
\r
362 uint8_t RESERVED0[96];
\r
363 __IO uint8_t ICFS10;
\r
364 __IO uint8_t ICFS32;
\r
365 uint8_t RESERVED1[6];
\r
366 __IO uint16_t ICCP0;
\r
367 uint8_t RESERVED2[2];
\r
368 __IO uint16_t ICCP1;
\r
369 uint8_t RESERVED3[2];
\r
370 __IO uint16_t ICCP2;
\r
371 uint8_t RESERVED4[2];
\r
372 __IO uint16_t ICCP3;
\r
373 uint8_t RESERVED5[2];
\r
374 __IO uint8_t ICSA10;
\r
375 __IO uint8_t ICSB10;
\r
376 uint8_t RESERVED6[2];
\r
377 __IO uint8_t ICSA32;
\r
378 __IO uint8_t ICSB32;
\r
379 }FM3_MFT_ICU_TypeDef;
\r
381 /******************************************************************************
\r
383 ******************************************************************************/
\r
384 /* Multifunction Timer unit 0 ADC Start Compare Unit registers */
\r
387 uint8_t RESERVED0[160];
\r
388 __IO uint16_t ACCP0;
\r
389 uint8_t RESERVED1[2];
\r
390 __IO uint16_t ACCPDN0;
\r
391 uint8_t RESERVED2[2];
\r
392 __IO uint16_t ACCP1;
\r
393 uint8_t RESERVED3[2];
\r
394 __IO uint16_t ACCPDN1;
\r
395 uint8_t RESERVED4[2];
\r
396 __IO uint16_t ACCP2;
\r
397 uint8_t RESERVED5[2];
\r
398 __IO uint16_t ACCPDN2;
\r
399 uint8_t RESERVED6[2];
\r
401 uint8_t RESERVED7[3];
\r
402 __IO uint16_t ACSA;
\r
403 uint8_t RESERVED8[2];
\r
404 __IO uint16_t ATSA;
\r
405 }FM3_MFT_ADCMP_TypeDef;
\r
407 /******************************************************************************
\r
409 ******************************************************************************/
\r
410 /* Multifunction Timer PPG registers */
\r
414 __IO uint8_t TTCR0;
\r
415 uint8_t RESERVED1[7];
\r
416 __IO uint8_t COMP0;
\r
417 uint8_t RESERVED2[2];
\r
418 __IO uint8_t COMP2;
\r
419 uint8_t RESERVED3[4];
\r
420 __IO uint8_t COMP4;
\r
421 uint8_t RESERVED4[2];
\r
422 __IO uint8_t COMP6;
\r
423 uint8_t RESERVED5[12];
\r
424 __IO uint8_t TTCR1;
\r
425 uint8_t RESERVED6[7];
\r
426 __IO uint8_t COMP1;
\r
427 uint8_t RESERVED7[2];
\r
428 __IO uint8_t COMP3;
\r
429 uint8_t RESERVED8[4];
\r
430 __IO uint8_t COMP5;
\r
431 uint8_t RESERVED9[2];
\r
432 __IO uint8_t COMP7;
\r
433 uint8_t RESERVED10[203];
\r
435 uint8_t RESERVED11[2];
\r
436 __IO uint16_t REVC;
\r
437 uint8_t RESERVED12[250];
\r
438 __IO uint8_t PPGC1;
\r
439 __IO uint8_t PPGC0;
\r
440 uint8_t RESERVED13[2];
\r
441 __IO uint8_t PPGC3;
\r
442 __IO uint8_t PPGC2;
\r
443 uint8_t RESERVED14[2];
\r
445 __IO uint16_t PRL0;
\r
447 __IO uint8_t PRLL0;
\r
448 __IO uint8_t PRLH0;
\r
451 uint8_t RESERVED15[2];
\r
453 __IO uint16_t PRL1;
\r
455 __IO uint8_t PRLL1;
\r
456 __IO uint8_t PRLH1;
\r
459 uint8_t RESERVED16[2];
\r
461 __IO uint16_t PRL2;
\r
463 __IO uint8_t PRLL2;
\r
464 __IO uint8_t PRLH2;
\r
467 uint8_t RESERVED17[2];
\r
469 __IO uint16_t PRL3;
\r
471 __IO uint8_t PRLL3;
\r
472 __IO uint8_t PRLH3;
\r
475 uint8_t RESERVED18[2];
\r
476 __IO uint8_t GATEC0;
\r
477 uint8_t RESERVED19[39];
\r
478 __IO uint8_t PPGC5;
\r
479 __IO uint8_t PPGC4;
\r
480 uint8_t RESERVED20[2];
\r
481 __IO uint8_t PPGC7;
\r
482 __IO uint8_t PPGC6;
\r
483 uint8_t RESERVED21[2];
\r
485 __IO uint16_t PRL4;
\r
487 __IO uint8_t PRLL4;
\r
488 __IO uint8_t PRLH4;
\r
491 uint8_t RESERVED22[2];
\r
493 __IO uint16_t PRL5;
\r
495 __IO uint8_t PRLL5;
\r
496 __IO uint8_t PRLH5;
\r
499 uint8_t RESERVED23[2];
\r
501 __IO uint16_t PRL6;
\r
503 __IO uint8_t PRLL6;
\r
504 __IO uint8_t PRLH6;
\r
507 uint8_t RESERVED24[2];
\r
509 __IO uint16_t PRL7;
\r
511 __IO uint8_t PRLL7;
\r
512 __IO uint8_t PRLH7;
\r
515 uint8_t RESERVED25[2];
\r
516 __IO uint8_t GATEC4;
\r
517 uint8_t RESERVED26[39];
\r
518 __IO uint8_t PPGC9;
\r
519 __IO uint8_t PPGC8;
\r
520 uint8_t RESERVED27[2];
\r
521 __IO uint8_t PPGC11;
\r
522 __IO uint8_t PPGC10;
\r
523 uint8_t RESERVED28[2];
\r
525 __IO uint16_t PRL8;
\r
527 __IO uint8_t PRLL8;
\r
528 __IO uint8_t PRLH8;
\r
531 uint8_t RESERVED29[2];
\r
533 __IO uint16_t PRL9;
\r
535 __IO uint8_t PRLL9;
\r
536 __IO uint8_t PRLH9;
\r
539 uint8_t RESERVED30[2];
\r
541 __IO uint16_t PRL10;
\r
543 __IO uint8_t PRLL10;
\r
544 __IO uint8_t PRLH10;
\r
547 uint8_t RESERVED31[2];
\r
549 __IO uint16_t PRL11;
\r
551 __IO uint8_t PRLL11;
\r
552 __IO uint8_t PRLH11;
\r
555 uint8_t RESERVED32[2];
\r
556 __IO uint8_t GATEC8;
\r
557 uint8_t RESERVED33[39];
\r
558 __IO uint8_t PPGC13;
\r
559 __IO uint8_t PPGC12;
\r
560 uint8_t RESERVED34[2];
\r
561 __IO uint8_t PPGC15;
\r
562 __IO uint8_t PPGC14;
\r
563 uint8_t RESERVED35[2];
\r
565 __IO uint16_t PRL12;
\r
567 __IO uint8_t PRLL12;
\r
568 __IO uint8_t PRLH12;
\r
571 uint8_t RESERVED36[2];
\r
573 __IO uint16_t PRL13;
\r
575 __IO uint8_t PRLL13;
\r
576 __IO uint8_t PRLH13;
\r
579 uint8_t RESERVED37[2];
\r
581 __IO uint16_t PRL14;
\r
583 __IO uint8_t PRLL14;
\r
584 __IO uint8_t PRLH14;
\r
587 uint8_t RESERVED38[2];
\r
589 __IO uint16_t PRL15;
\r
591 __IO uint8_t PRLL15;
\r
592 __IO uint8_t PRLH15;
\r
595 uint8_t RESERVED39[2];
\r
596 __IO uint8_t GATEC12;
\r
597 }FM3_MFT_PPG_TypeDef;
\r
599 /******************************************************************************
\r
601 ******************************************************************************/
\r
602 /* Base Timer 0 PPG registers */
\r
605 __IO uint16_t PRLL;
\r
606 uint8_t RESERVED0[2];
\r
607 __IO uint16_t PRLH;
\r
608 uint8_t RESERVED1[2];
\r
610 uint8_t RESERVED2[2];
\r
611 __IO uint16_t TMCR;
\r
612 uint8_t RESERVED3[2];
\r
614 __IO uint8_t TMCR2;
\r
615 }FM3_BT_PPG_TypeDef;
\r
617 /******************************************************************************
\r
619 ******************************************************************************/
\r
620 /* Base Timer 0 PWM registers */
\r
623 __IO uint16_t PCSR;
\r
624 uint8_t RESERVED0[2];
\r
625 __IO uint16_t PDUT;
\r
626 uint8_t RESERVED1[2];
\r
628 uint8_t RESERVED2[2];
\r
629 __IO uint16_t TMCR;
\r
630 uint8_t RESERVED3[2];
\r
632 __IO uint8_t TMCR2;
\r
633 }FM3_BT_PWM_TypeDef;
\r
635 /******************************************************************************
\r
637 ******************************************************************************/
\r
638 /* Base Timer 0 RT registers */
\r
641 __IO uint16_t PCSR;
\r
642 uint8_t RESERVED0[6];
\r
644 uint8_t RESERVED1[2];
\r
645 __IO uint16_t TMCR;
\r
646 uint8_t RESERVED2[2];
\r
648 __IO uint8_t TMCR2;
\r
649 }FM3_BT_RT_TypeDef;
\r
651 /******************************************************************************
\r
653 ******************************************************************************/
\r
654 /* Base Timer 0 PWC registers */
\r
657 uint8_t RESERVED0[4];
\r
658 __IO uint16_t DTBF;
\r
659 uint8_t RESERVED1[6];
\r
660 __IO uint16_t TMCR;
\r
661 uint8_t RESERVED2[2];
\r
663 __IO uint8_t TMCR2;
\r
664 }FM3_BT_PWC_TypeDef;
\r
666 /******************************************************************************
\r
668 ******************************************************************************/
\r
669 /* Base Timer I/O selector channel 0 - channel 3 registers */
\r
673 __IO uint8_t BTSEL0123;
\r
674 }FM3_BTIOSEL03_TypeDef;
\r
676 /******************************************************************************
\r
678 ******************************************************************************/
\r
679 /* Base Timer I/O selector channel 4 - channel 7 registers */
\r
683 __IO uint8_t BTSEL4567;
\r
684 }FM3_BTIOSEL47_TypeDef;
\r
686 /******************************************************************************
\r
688 ******************************************************************************/
\r
689 /* Software based Simulation Startup (Base Timer) register */
\r
692 __IO uint16_t BTSSSR;
\r
693 }FM3_SBSSR_TypeDef;
\r
695 /******************************************************************************
\r
697 ******************************************************************************/
\r
698 /* Quad position and revolution counter channel 0 registers */
\r
701 __IO uint16_t QPCR;
\r
702 uint8_t RESERVED0[2];
\r
703 __IO uint16_t QRCR;
\r
704 uint8_t RESERVED1[2];
\r
705 __IO uint16_t QPCCR;
\r
706 uint8_t RESERVED2[2];
\r
707 __IO uint16_t QPRCR;
\r
708 uint8_t RESERVED3[2];
\r
709 __IO uint16_t QMPR;
\r
710 uint8_t RESERVED4[2];
\r
712 __IO uint16_t QICR;
\r
714 __IO uint8_t QICRL;
\r
715 __IO uint8_t QICRH;
\r
718 uint8_t RESERVED5[2];
\r
726 uint8_t RESERVED6[2];
\r
727 __IO uint16_t QECR;
\r
730 /******************************************************************************
\r
732 ******************************************************************************/
\r
733 /* 12-bit ADC unit 0 registers */
\r
738 uint8_t RESERVED0[6];
\r
741 uint8_t RESERVED1[2];
\r
743 __IO uint32_t SCFD;
\r
745 __IO uint16_t SCFDL;
\r
746 __IO uint16_t SCFDH;
\r
750 __IO uint16_t SCIS23;
\r
752 __IO uint8_t SCIS2;
\r
753 __IO uint8_t SCIS3;
\r
756 uint8_t RESERVED2[2];
\r
758 __IO uint16_t SCIS01;
\r
760 __IO uint8_t SCIS0;
\r
761 __IO uint8_t SCIS1;
\r
764 uint8_t RESERVED3[2];
\r
767 uint8_t RESERVED4[2];
\r
769 __IO uint32_t PCFD;
\r
771 __IO uint16_t PCFDL;
\r
772 __IO uint16_t PCFDH;
\r
776 uint8_t RESERVED5[3];
\r
777 __IO uint8_t CMPCR;
\r
779 __IO uint16_t CMPD;
\r
781 __IO uint16_t ADSS23;
\r
783 __IO uint8_t ADSS2;
\r
784 __IO uint8_t ADSS3;
\r
787 uint8_t RESERVED7[2];
\r
789 __IO uint16_t ADSS01;
\r
791 __IO uint8_t ADSS0;
\r
792 __IO uint8_t ADSS1;
\r
795 uint8_t RESERVED8[2];
\r
797 __IO uint16_t ADST01;
\r
799 __IO uint8_t ADST1;
\r
800 __IO uint8_t ADST0;
\r
803 uint8_t RESERVED9[2];
\r
805 uint8_t RESERVED10[3];
\r
806 __IO uint8_t PRTSL;
\r
807 __IO uint8_t SCTSL;
\r
808 uint8_t RESERVED11[2];
\r
809 __IO uint8_t ADCEN;
\r
812 /******************************************************************************
\r
814 ******************************************************************************/
\r
815 /* CR trimming registers */
\r
818 __IO uint8_t MCR_PSR;
\r
819 uint8_t RESERVED0[3];
\r
820 __IO uint16_t MCR_FTRM;
\r
821 uint8_t RESERVED1[6];
\r
822 __IO uint32_t MCR_RLR;
\r
823 }FM3_CRTRIM_TypeDef;
\r
825 /******************************************************************************
\r
827 ******************************************************************************/
\r
828 /* External interrupt registers */
\r
831 __IO uint16_t ENIR;
\r
832 uint8_t RESERVED0[2];
\r
833 __IO uint16_t EIRR;
\r
834 uint8_t RESERVED1[2];
\r
835 __IO uint16_t EICL;
\r
836 uint8_t RESERVED2[2];
\r
837 __IO uint32_t ELVR;
\r
838 uint8_t RESERVED3[4];
\r
839 __IO uint8_t NMIRR;
\r
840 uint8_t RESERVED4[3];
\r
841 __IO uint8_t NMICL;
\r
844 /******************************************************************************
\r
846 ******************************************************************************/
\r
847 /* Interrupt request read registers */
\r
850 __IO uint32_t DRQSEL;
\r
851 uint8_t RESERVED0[12];
\r
852 __IO uint32_t EXC02MON;
\r
853 __IO uint32_t IRQ00MON;
\r
854 __IO uint32_t IRQ01MON;
\r
855 __IO uint32_t IRQ02MON;
\r
856 __IO uint32_t IRQ03MON;
\r
857 __IO uint32_t IRQ04MON;
\r
858 __IO uint32_t IRQ05MON;
\r
859 __IO uint32_t IRQ06MON;
\r
860 __IO uint32_t IRQ07MON;
\r
861 __IO uint32_t IRQ08MON;
\r
862 __IO uint32_t IRQ09MON;
\r
863 __IO uint32_t IRQ10MON;
\r
864 __IO uint32_t IRQ11MON;
\r
865 __IO uint32_t IRQ12MON;
\r
866 __IO uint32_t IRQ13MON;
\r
867 __IO uint32_t IRQ14MON;
\r
868 __IO uint32_t IRQ15MON;
\r
869 __IO uint32_t IRQ16MON;
\r
870 __IO uint32_t IRQ17MON;
\r
871 __IO uint32_t IRQ18MON;
\r
872 __IO uint32_t IRQ19MON;
\r
873 __IO uint32_t IRQ20MON;
\r
874 __IO uint32_t IRQ21MON;
\r
875 __IO uint32_t IRQ22MON;
\r
876 __IO uint32_t IRQ23MON;
\r
877 __IO uint32_t IRQ24MON;
\r
878 __IO uint32_t IRQ25MON;
\r
879 __IO uint32_t IRQ26MON;
\r
880 __IO uint32_t IRQ27MON;
\r
881 __IO uint32_t IRQ28MON;
\r
882 __IO uint32_t IRQ29MON;
\r
883 __IO uint32_t IRQ30MON;
\r
884 __IO uint32_t IRQ31MON;
\r
885 __IO uint32_t IRQ32MON;
\r
886 __IO uint32_t IRQ33MON;
\r
887 __IO uint32_t IRQ34MON;
\r
888 __IO uint32_t IRQ35MON;
\r
889 __IO uint32_t IRQ36MON;
\r
890 __IO uint32_t IRQ37MON;
\r
891 __IO uint32_t IRQ38MON;
\r
892 __IO uint32_t IRQ39MON;
\r
893 __IO uint32_t IRQ40MON;
\r
894 __IO uint32_t IRQ41MON;
\r
895 __IO uint32_t IRQ42MON;
\r
896 __IO uint32_t IRQ43MON;
\r
897 __IO uint32_t IRQ44MON;
\r
898 __IO uint32_t IRQ45MON;
\r
899 __IO uint32_t IRQ46MON;
\r
900 __IO uint32_t IRQ47MON;
\r
901 }FM3_INTREQ_TypeDef;
\r
903 /******************************************************************************
\r
905 ******************************************************************************/
\r
906 /* General purpose I/O registers */
\r
909 __IO uint32_t PFR0;
\r
910 __IO uint32_t PFR1;
\r
911 __IO uint32_t PFR2;
\r
912 __IO uint32_t PFR3;
\r
913 __IO uint32_t PFR4;
\r
914 __IO uint32_t PFR5;
\r
915 __IO uint32_t PFR6;
\r
916 uint8_t RESERVED0[4];
\r
917 __IO uint32_t PFR8;
\r
918 uint8_t RESERVED1[220];
\r
919 __IO uint32_t PCR0;
\r
920 __IO uint32_t PCR1;
\r
921 __IO uint32_t PCR2;
\r
922 __IO uint32_t PCR3;
\r
923 __IO uint32_t PCR4;
\r
924 __IO uint32_t PCR5;
\r
925 __IO uint32_t PCR6;
\r
926 uint8_t RESERVED2[228];
\r
927 __IO uint32_t DDR0;
\r
928 __IO uint32_t DDR1;
\r
929 __IO uint32_t DDR2;
\r
930 __IO uint32_t DDR3;
\r
931 __IO uint32_t DDR4;
\r
932 __IO uint32_t DDR5;
\r
933 __IO uint32_t DDR6;
\r
934 uint8_t RESERVED3[4];
\r
935 __IO uint32_t DDR8;
\r
936 uint8_t RESERVED4[220];
\r
937 __IO uint32_t PDIR0;
\r
938 __IO uint32_t PDIR1;
\r
939 __IO uint32_t PDIR2;
\r
940 __IO uint32_t PDIR3;
\r
941 __IO uint32_t PDIR4;
\r
942 __IO uint32_t PDIR5;
\r
943 __IO uint32_t PDIR6;
\r
944 uint8_t RESERVED5[4];
\r
945 __IO uint32_t PDIR8;
\r
946 uint8_t RESERVED6[220];
\r
947 __IO uint32_t PDOR0;
\r
948 __IO uint32_t PDOR1;
\r
949 __IO uint32_t PDOR2;
\r
950 __IO uint32_t PDOR3;
\r
951 __IO uint32_t PDOR4;
\r
952 __IO uint32_t PDOR5;
\r
953 __IO uint32_t PDOR6;
\r
954 uint8_t RESERVED7[4];
\r
955 __IO uint32_t PDOR8;
\r
956 uint8_t RESERVED8[220];
\r
958 uint8_t RESERVED9[124];
\r
959 __IO uint32_t SPSR;
\r
960 uint8_t RESERVED10[124];
\r
961 __IO uint32_t EPFR00;
\r
962 __IO uint32_t EPFR01;
\r
963 __IO uint32_t EPFR02;
\r
964 uint8_t RESERVED11[4];
\r
965 __IO uint32_t EPFR04;
\r
966 __IO uint32_t EPFR05;
\r
967 __IO uint32_t EPFR06;
\r
968 __IO uint32_t EPFR07;
\r
969 __IO uint32_t EPFR08;
\r
970 __IO uint32_t EPFR09;
\r
971 __IO uint32_t EPFR10;
\r
974 /******************************************************************************
\r
976 ******************************************************************************/
\r
977 /* Low voltage detection registers */
\r
980 __IO uint8_t LVD_CTL;
\r
981 uint8_t RESERVED0[3];
\r
982 __IO uint8_t LVD_STR;
\r
983 uint8_t RESERVED1[3];
\r
984 __IO uint8_t LVD_CLR;
\r
985 uint8_t RESERVED2[3];
\r
986 __IO uint32_t LVD_RLR;
\r
987 __IO uint8_t LVD_STR2;
\r
990 /******************************************************************************
\r
992 ******************************************************************************/
\r
993 /* USB clock registers */
\r
997 uint8_t RESERVED0[3];
\r
998 __IO uint8_t UPCR1;
\r
999 uint8_t RESERVED1[3];
\r
1000 __IO uint8_t UPCR2;
\r
1001 uint8_t RESERVED2[3];
\r
1002 __IO uint8_t UPCR3;
\r
1003 uint8_t RESERVED3[3];
\r
1004 __IO uint8_t UPCR4;
\r
1005 uint8_t RESERVED4[3];
\r
1006 __IO uint8_t UP_STR;
\r
1007 uint8_t RESERVED5[3];
\r
1008 __IO uint8_t UPINT_ENR;
\r
1009 uint8_t RESERVED6[3];
\r
1010 __IO uint8_t UPINT_CLR;
\r
1011 uint8_t RESERVED7[3];
\r
1012 __IO uint8_t UPINT_STR;
\r
1013 uint8_t RESERVED8[15];
\r
1014 __IO uint8_t USBEN;
\r
1015 }FM3_USBCLK_TypeDef;
\r
1017 /******************************************************************************
\r
1019 ******************************************************************************/
\r
1020 /* CAN prescaler register */
\r
1023 __IO uint8_t CANPRE;
\r
1024 }FM3_CANPRE_TypeDef;
\r
1026 /******************************************************************************
\r
1027 * MFS03_UART_MODULE
\r
1028 ******************************************************************************/
\r
1029 /* UART asynchronous channel 0 registers */
\r
1034 uint8_t RESERVED0[2];
\r
1035 __IO uint8_t ESCR;
\r
1037 uint8_t RESERVED1[2];
\r
1039 __IO uint16_t RDR;
\r
1040 __IO uint16_t TDR;
\r
1042 uint8_t RESERVED2[2];
\r
1044 __IO uint16_t BGR;
\r
1046 __IO uint8_t BGR0;
\r
1047 __IO uint8_t BGR1;
\r
1050 }FM3_MFS03_UART_TypeDef;
\r
1052 /******************************************************************************
\r
1053 * MFS03_CSIO_MODULE
\r
1054 ******************************************************************************/
\r
1055 /* UART synchronous channel 0 registers */
\r
1060 uint8_t RESERVED0[2];
\r
1061 __IO uint8_t ESCR;
\r
1063 uint8_t RESERVED1[2];
\r
1065 __IO uint16_t RDR;
\r
1066 __IO uint16_t TDR;
\r
1068 uint8_t RESERVED2[2];
\r
1070 __IO uint16_t BGR;
\r
1072 __IO uint8_t BGR0;
\r
1073 __IO uint8_t BGR1;
\r
1076 }FM3_MFS03_CSIO_TypeDef;
\r
1078 /******************************************************************************
\r
1079 * MFS03_LIN_MODULE
\r
1080 ******************************************************************************/
\r
1081 /* UART LIN channel 0 registers */
\r
1086 uint8_t RESERVED0[2];
\r
1087 __IO uint8_t ESCR;
\r
1089 uint8_t RESERVED1[2];
\r
1091 __IO uint16_t RDR;
\r
1092 __IO uint16_t TDR;
\r
1094 uint8_t RESERVED2[2];
\r
1096 __IO uint16_t BGR;
\r
1098 __IO uint8_t BGR0;
\r
1099 __IO uint8_t BGR1;
\r
1102 }FM3_MFS03_LIN_TypeDef;
\r
1104 /******************************************************************************
\r
1105 * MFS03_I2C_MODULE
\r
1106 ******************************************************************************/
\r
1107 /* I2C channel 0 registers */
\r
1111 __IO uint8_t IBCR;
\r
1112 uint8_t RESERVED0[2];
\r
1113 __IO uint8_t IBSR;
\r
1115 uint8_t RESERVED1[2];
\r
1117 __IO uint16_t RDR;
\r
1118 __IO uint16_t TDR;
\r
1120 uint8_t RESERVED2[2];
\r
1122 __IO uint16_t BGR;
\r
1124 __IO uint8_t BGR0;
\r
1125 __IO uint8_t BGR1;
\r
1128 uint8_t RESERVED3[2];
\r
1129 __IO uint8_t ISBA;
\r
1130 __IO uint8_t ISMK;
\r
1131 }FM3_MFS03_I2C_TypeDef;
\r
1133 /******************************************************************************
\r
1134 * MFS47_UART_MODULE
\r
1135 ******************************************************************************/
\r
1136 /* UART asynchronous channel 4 registers */
\r
1141 uint8_t RESERVED0[2];
\r
1142 __IO uint8_t ESCR;
\r
1144 uint8_t RESERVED1[2];
\r
1146 __IO uint16_t RDR;
\r
1147 __IO uint16_t TDR;
\r
1149 uint8_t RESERVED2[2];
\r
1151 __IO uint16_t BGR;
\r
1153 __IO uint8_t BGR0;
\r
1154 __IO uint8_t BGR1;
\r
1157 uint8_t RESERVED3[6];
\r
1159 __IO uint16_t FCR;
\r
1161 __IO uint8_t FCR0;
\r
1162 __IO uint8_t FCR1;
\r
1165 uint8_t RESERVED4[2];
\r
1167 __IO uint16_t FBYTE;
\r
1169 __IO uint8_t FBYTE1;
\r
1170 __IO uint8_t FBYTE2;
\r
1173 }FM3_MFS47_UART_TypeDef;
\r
1175 /******************************************************************************
\r
1176 * MFS47_CSIO_MODULE
\r
1177 ******************************************************************************/
\r
1178 /* UART synchronous channel 4 registers */
\r
1183 uint8_t RESERVED0[2];
\r
1184 __IO uint8_t ESCR;
\r
1186 uint8_t RESERVED1[2];
\r
1188 __IO uint16_t RDR;
\r
1189 __IO uint16_t TDR;
\r
1191 uint8_t RESERVED2[2];
\r
1193 __IO uint16_t BGR;
\r
1195 __IO uint8_t BGR0;
\r
1196 __IO uint8_t BGR1;
\r
1199 uint8_t RESERVED3[6];
\r
1201 __IO uint16_t FCR;
\r
1203 __IO uint8_t FCR0;
\r
1204 __IO uint8_t FCR1;
\r
1207 uint8_t RESERVED4[2];
\r
1209 __IO uint16_t FBYTE;
\r
1211 __IO uint8_t FBYTE1;
\r
1212 __IO uint8_t FBYTE2;
\r
1215 }FM3_MFS47_CSIO_TypeDef;
\r
1217 /******************************************************************************
\r
1218 * MFS47_LIN_MODULE
\r
1219 ******************************************************************************/
\r
1220 /* UART LIN channel 4 registers */
\r
1225 uint8_t RESERVED0[2];
\r
1226 __IO uint8_t ESCR;
\r
1228 uint8_t RESERVED1[2];
\r
1230 __IO uint16_t RDR;
\r
1231 __IO uint16_t TDR;
\r
1233 uint8_t RESERVED2[2];
\r
1235 __IO uint16_t BGR;
\r
1237 __IO uint8_t BGR0;
\r
1238 __IO uint8_t BGR1;
\r
1241 uint8_t RESERVED3[6];
\r
1243 __IO uint16_t FCR;
\r
1245 __IO uint8_t FCR0;
\r
1246 __IO uint8_t FCR1;
\r
1249 uint8_t RESERVED4[2];
\r
1251 __IO uint16_t FBYTE;
\r
1253 __IO uint8_t FBYTE1;
\r
1254 __IO uint8_t FBYTE2;
\r
1257 }FM3_MFS47_LIN_TypeDef;
\r
1259 /******************************************************************************
\r
1260 * MFS47_I2C_MODULE
\r
1261 ******************************************************************************/
\r
1262 /* I2C channel 4 registers */
\r
1266 __IO uint8_t IBCR;
\r
1267 uint8_t RESERVED0[2];
\r
1268 __IO uint8_t IBSR;
\r
1270 uint8_t RESERVED1[2];
\r
1272 __IO uint16_t RDR;
\r
1273 __IO uint16_t TDR;
\r
1275 uint8_t RESERVED2[2];
\r
1277 __IO uint16_t BGR;
\r
1279 __IO uint8_t BGR0;
\r
1280 __IO uint8_t BGR1;
\r
1283 uint8_t RESERVED3[2];
\r
1284 __IO uint8_t ISBA;
\r
1285 __IO uint8_t ISMK;
\r
1286 uint8_t RESERVED4[2];
\r
1288 __IO uint16_t FCR;
\r
1290 __IO uint8_t FCR0;
\r
1291 __IO uint8_t FCR1;
\r
1294 uint8_t RESERVED5[2];
\r
1296 __IO uint16_t FBYTE;
\r
1298 __IO uint8_t FBYTE1;
\r
1299 __IO uint8_t FBYTE2;
\r
1302 }FM3_MFS47_I2C_TypeDef;
\r
1304 /******************************************************************************
\r
1306 ******************************************************************************/
\r
1307 /* CRC registers */
\r
1310 __IO uint8_t CRCCR;
\r
1311 uint8_t RESERVED0[3];
\r
1312 __IO uint32_t CRCINIT;
\r
1314 __IO uint32_t CRCIN;
\r
1317 __IO uint16_t CRCINL;
\r
1319 __IO uint8_t CRCINLL;
\r
1320 __IO uint8_t CRCINLH;
\r
1324 __IO uint16_t CRCINH;
\r
1326 __IO uint8_t CRCINHL;
\r
1327 __IO uint8_t CRCINHH;
\r
1332 __IO uint32_t CRCR;
\r
1335 /******************************************************************************
\r
1337 ******************************************************************************/
\r
1338 /* Watch counter registers */
\r
1341 __IO uint8_t WCRD;
\r
1342 __IO uint8_t WCRL;
\r
1343 __IO uint8_t WCCR;
\r
1344 uint8_t RESERVED0[13];
\r
1345 __IO uint16_t CLK_SEL;
\r
1346 uint8_t RESERVED1[2];
\r
1347 __IO uint8_t CLK_EN;
\r
1350 /******************************************************************************
\r
1352 ******************************************************************************/
\r
1353 /* External bus interface registers */
\r
1356 __IO uint32_t MODE0;
\r
1357 __IO uint32_t MODE1;
\r
1358 __IO uint32_t MODE2;
\r
1359 __IO uint32_t MODE3;
\r
1360 uint8_t RESERVED0[12];
\r
1361 __IO uint32_t MODE7;
\r
1362 __IO uint32_t TIM0;
\r
1363 __IO uint32_t TIM1;
\r
1364 __IO uint32_t TIM2;
\r
1365 __IO uint32_t TIM3;
\r
1366 uint8_t RESERVED1[12];
\r
1367 __IO uint32_t TIM7;
\r
1368 __IO uint32_t AREA0;
\r
1369 __IO uint32_t AREA1;
\r
1370 __IO uint32_t AREA2;
\r
1371 __IO uint32_t AREA3;
\r
1372 uint8_t RESERVED2[12];
\r
1373 __IO uint32_t AREA7;
\r
1374 }FM3_EXBUS_TypeDef;
\r
1376 /******************************************************************************
\r
1378 ******************************************************************************/
\r
1379 /* USB channel 0 registers */
\r
1383 __IO uint16_t HCNT;
\r
1385 __IO uint8_t HCNT0;
\r
1386 __IO uint8_t HCNT1;
\r
1389 uint8_t RESERVED0[2];
\r
1390 __IO uint8_t HIRQ;
\r
1391 __IO uint8_t HERR;
\r
1392 uint8_t RESERVED1[2];
\r
1393 __IO uint8_t HSTATE;
\r
1394 __IO uint8_t HFCOMP;
\r
1395 uint8_t RESERVED2[2];
\r
1397 __IO uint16_t HRTIMER;
\r
1399 __IO uint8_t HRTIMER0;
\r
1400 __IO uint8_t HRTIMER1;
\r
1403 uint8_t RESERVED3[2];
\r
1404 __IO uint8_t HRTIMER2;
\r
1405 __IO uint8_t HADR;
\r
1406 uint8_t RESERVED4[2];
\r
1408 __IO uint16_t HEOF;
\r
1410 __IO uint8_t HEOF0;
\r
1411 __IO uint8_t HEOF1;
\r
1414 uint8_t RESERVED5[2];
\r
1416 __IO uint16_t HFRAME;
\r
1418 __IO uint8_t HFRAME0;
\r
1419 __IO uint8_t HFRAME1;
\r
1422 uint8_t RESERVED6[2];
\r
1423 __IO uint8_t HTOKEN;
\r
1424 uint8_t RESERVED7[3];
\r
1425 __IO uint16_t UDCC;
\r
1426 uint8_t RESERVED8[2];
\r
1427 __IO uint16_t EP0C;
\r
1428 uint8_t RESERVED9[2];
\r
1429 __IO uint16_t EP1C;
\r
1430 uint8_t RESERVED10[2];
\r
1431 __IO uint16_t EP2C;
\r
1432 uint8_t RESERVED11[2];
\r
1433 __IO uint16_t EP3C;
\r
1434 uint8_t RESERVED12[2];
\r
1435 __IO uint16_t EP4C;
\r
1436 uint8_t RESERVED13[2];
\r
1437 __IO uint16_t EP5C;
\r
1438 uint8_t RESERVED14[2];
\r
1439 __IO uint16_t TMSP;
\r
1440 uint8_t RESERVED15[2];
\r
1441 __IO uint8_t UDCS;
\r
1442 __IO uint8_t UDCIE;
\r
1443 uint8_t RESERVED16[2];
\r
1444 __IO uint16_t EP0IS;
\r
1445 uint8_t RESERVED17[2];
\r
1446 __IO uint16_t EP0OS;
\r
1447 uint8_t RESERVED18[2];
\r
1448 __IO uint16_t EP1S;
\r
1449 uint8_t RESERVED19[2];
\r
1450 __IO uint16_t EP2S;
\r
1451 uint8_t RESERVED20[2];
\r
1452 __IO uint16_t EP3S;
\r
1453 uint8_t RESERVED21[2];
\r
1454 __IO uint16_t EP4S;
\r
1455 uint8_t RESERVED22[2];
\r
1456 __IO uint16_t EP5S;
\r
1457 uint8_t RESERVED23[2];
\r
1459 __IO uint16_t EP0DT;
\r
1461 __IO uint8_t EP0DTL;
\r
1462 __IO uint8_t EP0DTH;
\r
1465 uint8_t RESERVED24[2];
\r
1467 __IO uint16_t EP1DT;
\r
1469 __IO uint8_t EP1DTL;
\r
1470 __IO uint8_t EP1DTH;
\r
1473 uint8_t RESERVED25[2];
\r
1475 __IO uint16_t EP2DT;
\r
1477 __IO uint8_t EP2DTL;
\r
1478 __IO uint8_t EP2DTH;
\r
1481 uint8_t RESERVED26[2];
\r
1483 __IO uint16_t EP3DT;
\r
1485 __IO uint8_t EP3DTL;
\r
1486 __IO uint8_t EP3DTH;
\r
1489 uint8_t RESERVED27[2];
\r
1491 __IO uint16_t EP4DT;
\r
1493 __IO uint8_t EP4DTL;
\r
1494 __IO uint8_t EP4DTH;
\r
1497 uint8_t RESERVED28[2];
\r
1499 __IO uint16_t EP5DT;
\r
1501 __IO uint8_t EP5DTL;
\r
1502 __IO uint8_t EP5DTH;
\r
1507 /******************************************************************************
\r
1509 ******************************************************************************/
\r
1510 /* DMA controller */
\r
1513 __IO uint32_t DMACR;
\r
1514 uint8_t RESERVED0[12];
\r
1515 __IO uint32_t DMACA0;
\r
1516 __IO uint32_t DMACB0;
\r
1517 __IO uint32_t DMACSA0;
\r
1518 __IO uint32_t DMACDA0;
\r
1519 __IO uint32_t DMACA1;
\r
1520 __IO uint32_t DMACB1;
\r
1521 __IO uint32_t DMACSA1;
\r
1522 __IO uint32_t DMACDA1;
\r
1523 __IO uint32_t DMACA2;
\r
1524 __IO uint32_t DMACB2;
\r
1525 __IO uint32_t DMACSA2;
\r
1526 __IO uint32_t DMACDA2;
\r
1527 __IO uint32_t DMACA3;
\r
1528 __IO uint32_t DMACB3;
\r
1529 __IO uint32_t DMACSA3;
\r
1530 __IO uint32_t DMACDA3;
\r
1531 __IO uint32_t DMACA4;
\r
1532 __IO uint32_t DMACB4;
\r
1533 __IO uint32_t DMACSA4;
\r
1534 __IO uint32_t DMACDA4;
\r
1535 __IO uint32_t DMACA5;
\r
1536 __IO uint32_t DMACB5;
\r
1537 __IO uint32_t DMACSA5;
\r
1538 __IO uint32_t DMACDA5;
\r
1539 __IO uint32_t DMACA6;
\r
1540 __IO uint32_t DMACB6;
\r
1541 __IO uint32_t DMACSA6;
\r
1542 __IO uint32_t DMACDA6;
\r
1543 __IO uint32_t DMACA7;
\r
1544 __IO uint32_t DMACB7;
\r
1545 __IO uint32_t DMACSA7;
\r
1546 __IO uint32_t DMACDA7;
\r
1547 }FM3_DMAC_TypeDef;
\r
1549 /******************************************************************************
\r
1551 ******************************************************************************/
\r
1552 /* CAN channel 0 registers */
\r
1555 __IO uint16_t CTRLR;
\r
1556 __IO uint16_t STATR;
\r
1557 __IO uint16_t ERRCNT;
\r
1558 __IO uint16_t BTR;
\r
1559 __IO uint16_t INTR;
\r
1560 __IO uint16_t TESTR;
\r
1561 __IO uint16_t BRPER;
\r
1562 uint8_t RESERVED0[2];
\r
1563 __IO uint16_t IF1CREQ;
\r
1564 __IO uint16_t IF1CMSK;
\r
1566 __IO uint32_t IF1MSK;
\r
1568 __IO uint16_t IF1MSK1;
\r
1569 __IO uint16_t IF1MSK2;
\r
1573 __IO uint32_t IF1ARB;
\r
1575 __IO uint16_t IF1ARB1;
\r
1576 __IO uint16_t IF1ARB2;
\r
1579 __IO uint16_t IF1MCTR;
\r
1580 uint8_t RESERVED1[2];
\r
1582 __IO uint32_t IF1DTA_L;
\r
1584 __IO uint16_t IF1DTA1_L;
\r
1585 __IO uint16_t IF1DTA2_L;
\r
1589 __IO uint32_t IF1DTB_L;
\r
1591 __IO uint16_t IF1DTB1_L;
\r
1592 __IO uint16_t IF1DTB2_L;
\r
1595 uint8_t RESERVED2[8];
\r
1597 __IO uint32_t IF1DTA_B;
\r
1599 __IO uint16_t IF1DTA2_B;
\r
1600 __IO uint16_t IF1DTA1_B;
\r
1604 __IO uint32_t IF1DTB_B;
\r
1606 __IO uint16_t IF1DTB2_B;
\r
1607 __IO uint16_t IF1DTB1_B;
\r
1610 uint8_t RESERVED3[8];
\r
1611 __IO uint16_t IF2CREQ;
\r
1612 __IO uint16_t IF2CMSK;
\r
1614 __IO uint32_t IF2MSK;
\r
1616 __IO uint16_t IF2MSK1;
\r
1617 __IO uint16_t IF2MSK2;
\r
1621 __IO uint32_t IF2ARB;
\r
1623 __IO uint16_t IF2ARB1;
\r
1624 __IO uint16_t IF2ARB2;
\r
1627 __IO uint16_t IF2MCTR;
\r
1628 uint8_t RESERVED4[2];
\r
1630 __IO uint32_t IF2DTA_L;
\r
1632 __IO uint16_t IF2DTA1_L;
\r
1633 __IO uint16_t IF2DTA2_L;
\r
1637 __IO uint32_t IF2DTB_L;
\r
1639 __IO uint16_t IF2DTB1_L;
\r
1640 __IO uint16_t IF2DTB2_L;
\r
1643 uint8_t RESERVED5[8];
\r
1645 __IO uint32_t IF2DTA_B;
\r
1647 __IO uint16_t IF2DTA2_B;
\r
1648 __IO uint16_t IF2DTA1_B;
\r
1652 __IO uint32_t IF2DTB_B;
\r
1654 __IO uint16_t IF2DTB2_B;
\r
1655 __IO uint16_t IF2DTB1_B;
\r
1658 uint8_t RESERVED6[24];
\r
1660 __IO uint32_t TREQR;
\r
1662 __IO uint16_t TREQR1;
\r
1663 __IO uint16_t TREQR2;
\r
1666 uint8_t RESERVED7[12];
\r
1668 __IO uint32_t NEWDT;
\r
1670 __IO uint16_t NEWDT1;
\r
1671 __IO uint16_t NEWDT2;
\r
1674 uint8_t RESERVED8[12];
\r
1676 __IO uint32_t INTPND;
\r
1678 __IO uint16_t INTPND1;
\r
1679 __IO uint16_t INTPND2;
\r
1682 uint8_t RESERVED9[12];
\r
1684 __IO uint32_t MSGVAL;
\r
1686 __IO uint16_t MSGVAL1;
\r
1687 __IO uint16_t MSGVAL2;
\r
1693 /******************************************************************************
\r
1694 * Peripheral memory map
\r
1695 ******************************************************************************/
\r
1696 #define FM3_FLASH_BASE (0x00000000UL) /* Flash Base */
\r
1697 #define FM3_PERIPH_BASE (0x40000000UL) /* Peripheral Base */
\r
1698 #define FM3_CM3_BASE (0xE0100000UL) /* CM3 Private */
\r
1700 #define FM3_FLASH_IF_BASE (FM3_PERIPH_BASE + 0x00000UL) /* Flash interface registers */
\r
1701 #define FM3_CRG_BASE (FM3_PERIPH_BASE + 0x10000UL) /* Clock and reset registers */
\r
1702 #define FM3_HWWDT_BASE (FM3_PERIPH_BASE + 0x11000UL) /* Hardware watchdog registers */
\r
1703 #define FM3_SWWDT_BASE (FM3_PERIPH_BASE + 0x12000UL) /* Software watchdog registers */
\r
1704 #define FM3_DTIM_BASE (FM3_PERIPH_BASE + 0x15000UL) /* Dual timer 1/2 registers */
\r
1705 #define FM3_MFT0_FRT_BASE (FM3_PERIPH_BASE + 0x20000UL) /* Multifunction Timer unit 0 Free Running Timer registers */
\r
1706 #define FM3_MFT0_OCU_BASE (FM3_PERIPH_BASE + 0x20000UL) /* Multifunction Timer unit 0 Output Compare Unit registers */
\r
1707 #define FM3_MFT0_WFG_BASE (FM3_PERIPH_BASE + 0x20000UL) /* Multifunction Timer unit 0 Waveform Generator and Noise Canceler registers */
\r
1708 #define FM3_MFT0_ICU_BASE (FM3_PERIPH_BASE + 0x20000UL) /* Multifunction Timer unit 0 Input Capture Unit registers */
\r
1709 #define FM3_MFT0_ADCMP_BASE (FM3_PERIPH_BASE + 0x20000UL) /* Multifunction Timer unit 0 ADC Start Compare Unit registers */
\r
1710 #define FM3_MFT1_FRT_BASE (FM3_PERIPH_BASE + 0x21000UL) /* Multifunction Timer unit 1 Free Running Timer registers */
\r
1711 #define FM3_MFT1_OCU_BASE (FM3_PERIPH_BASE + 0x21000UL) /* Multifunction Timer unit 1 Output Compare Unit registers */
\r
1712 #define FM3_MFT1_WFG_BASE (FM3_PERIPH_BASE + 0x21000UL) /* Multifunction Timer unit 1 Waveform Generator and Noise Canceler registers */
\r
1713 #define FM3_MFT1_ICU_BASE (FM3_PERIPH_BASE + 0x21000UL) /* Multifunction Timer unit 1 Input Capture Unit registers */
\r
1714 #define FM3_MFT1_ADCMP_BASE (FM3_PERIPH_BASE + 0x21000UL) /* Multifunction Timer unit 1 ADC Start Compare Unit registers */
\r
1715 #define FM3_MFT_PPG_BASE (FM3_PERIPH_BASE + 0x24000UL) /* Multifunction Timer PPG registers */
\r
1716 #define FM3_BT0_PPG_BASE (FM3_PERIPH_BASE + 0x25000UL) /* Base Timer 0 PPG registers */
\r
1717 #define FM3_BT0_PWM_BASE (FM3_PERIPH_BASE + 0x25000UL) /* Base Timer 0 PWM registers */
\r
1718 #define FM3_BT0_RT_BASE (FM3_PERIPH_BASE + 0x25000UL) /* Base Timer 0 RT registers */
\r
1719 #define FM3_BT0_PWC_BASE (FM3_PERIPH_BASE + 0x25000UL) /* Base Timer 0 PWC registers */
\r
1720 #define FM3_BT1_PPG_BASE (FM3_PERIPH_BASE + 0x25040UL) /* Base Timer 1 PPG registers */
\r
1721 #define FM3_BT1_PWM_BASE (FM3_PERIPH_BASE + 0x25040UL) /* Base Timer 1 PWM registers */
\r
1722 #define FM3_BT1_RT_BASE (FM3_PERIPH_BASE + 0x25040UL) /* Base Timer 1 RT registers */
\r
1723 #define FM3_BT1_PWC_BASE (FM3_PERIPH_BASE + 0x25040UL) /* Base Timer 1 PWC registers */
\r
1724 #define FM3_BT2_PPG_BASE (FM3_PERIPH_BASE + 0x25080UL) /* Base Timer 2 PPG registers */
\r
1725 #define FM3_BT2_PWM_BASE (FM3_PERIPH_BASE + 0x25080UL) /* Base Timer 2 PWM registers */
\r
1726 #define FM3_BT2_RT_BASE (FM3_PERIPH_BASE + 0x25080UL) /* Base Timer 2 RT registers */
\r
1727 #define FM3_BT2_PWC_BASE (FM3_PERIPH_BASE + 0x25080UL) /* Base Timer 2 PWC registers */
\r
1728 #define FM3_BT3_PPG_BASE (FM3_PERIPH_BASE + 0x250C0UL) /* Base Timer 3 PPG registers */
\r
1729 #define FM3_BT3_PWM_BASE (FM3_PERIPH_BASE + 0x250C0UL) /* Base Timer 3 PWM registers */
\r
1730 #define FM3_BT3_RT_BASE (FM3_PERIPH_BASE + 0x250C0UL) /* Base Timer 3 RT registers */
\r
1731 #define FM3_BT3_PWC_BASE (FM3_PERIPH_BASE + 0x250C0UL) /* Base Timer 3 PWC registers */
\r
1732 #define FM3_BT4_PPG_BASE (FM3_PERIPH_BASE + 0x25200UL) /* Base Timer 4 PPG registers */
\r
1733 #define FM3_BT4_PWM_BASE (FM3_PERIPH_BASE + 0x25200UL) /* Base Timer 4 PWM registers */
\r
1734 #define FM3_BT4_RT_BASE (FM3_PERIPH_BASE + 0x25200UL) /* Base Timer 4 RT registers */
\r
1735 #define FM3_BT4_PWC_BASE (FM3_PERIPH_BASE + 0x25200UL) /* Base Timer 4 PWC registers */
\r
1736 #define FM3_BT5_PPG_BASE (FM3_PERIPH_BASE + 0x25240UL) /* Base Timer 5 PPG registers */
\r
1737 #define FM3_BT5_PWM_BASE (FM3_PERIPH_BASE + 0x25240UL) /* Base Timer 5 PWM registers */
\r
1738 #define FM3_BT5_RT_BASE (FM3_PERIPH_BASE + 0x25240UL) /* Base Timer 5 RT registers */
\r
1739 #define FM3_BT5_PWC_BASE (FM3_PERIPH_BASE + 0x25240UL) /* Base Timer 5 PWC registers */
\r
1740 #define FM3_BT6_PPG_BASE (FM3_PERIPH_BASE + 0x25280UL) /* Base Timer 6 PPG registers */
\r
1741 #define FM3_BT6_PWM_BASE (FM3_PERIPH_BASE + 0x25280UL) /* Base Timer 6 PWM registers */
\r
1742 #define FM3_BT6_RT_BASE (FM3_PERIPH_BASE + 0x25280UL) /* Base Timer 6 RT registers */
\r
1743 #define FM3_BT6_PWC_BASE (FM3_PERIPH_BASE + 0x25280UL) /* Base Timer 6 PWC registers */
\r
1744 #define FM3_BT7_PPG_BASE (FM3_PERIPH_BASE + 0x252C0UL) /* Base Timer 7 PPG registers */
\r
1745 #define FM3_BT7_PWM_BASE (FM3_PERIPH_BASE + 0x252C0UL) /* Base Timer 7 PWM registers */
\r
1746 #define FM3_BT7_RT_BASE (FM3_PERIPH_BASE + 0x252C0UL) /* Base Timer 7 RT registers */
\r
1747 #define FM3_BT7_PWC_BASE (FM3_PERIPH_BASE + 0x252C0UL) /* Base Timer 7 PWC registers */
\r
1748 #define FM3_BTIOSEL03_BASE (FM3_PERIPH_BASE + 0x25100UL) /* Base Timer I/O selector channel 0 - channel 3 registers */
\r
1749 #define FM3_BTIOSEL47_BASE (FM3_PERIPH_BASE + 0x25300UL) /* Base Timer I/O selector channel 4 - channel 7 registers */
\r
1750 #define FM3_SBSSR_BASE (FM3_PERIPH_BASE + 0x25FFCUL) /* Software based Simulation Startup (Base Timer) register */
\r
1751 #define FM3_QPRC0_BASE (FM3_PERIPH_BASE + 0x26000UL) /* Quad position and revolution counter channel 0 registers */
\r
1752 #define FM3_QPRC1_BASE (FM3_PERIPH_BASE + 0x26040UL) /* Quad position and revolution counter channel 1 registers */
\r
1753 #define FM3_ADC0_BASE (FM3_PERIPH_BASE + 0x27000UL) /* 12-bit ADC unit 0 registers */
\r
1754 #define FM3_ADC1_BASE (FM3_PERIPH_BASE + 0x27100UL) /* 12-bit ADC unit 1 registers */
\r
1755 #define FM3_ADC2_BASE (FM3_PERIPH_BASE + 0x27200UL) /* 12-bit ADC unit 2 registers */
\r
1756 #define FM3_CRTRIM_BASE (FM3_PERIPH_BASE + 0x2E000UL) /* CR trimming registers */
\r
1757 #define FM3_EXTI_BASE (FM3_PERIPH_BASE + 0x30000UL) /* External interrupt registers */
\r
1758 #define FM3_INTREQ_BASE (FM3_PERIPH_BASE + 0x31000UL) /* Interrupt request read registers */
\r
1759 #define FM3_GPIO_BASE (FM3_PERIPH_BASE + 0x33000UL) /* General purpose I/O registers */
\r
1760 #define FM3_LVD_BASE (FM3_PERIPH_BASE + 0x35000UL) /* Low voltage detection registers */
\r
1761 #define FM3_USBCLK_BASE (FM3_PERIPH_BASE + 0x36000UL) /* USB clock registers */
\r
1762 #define FM3_CANPRES_BASE (FM3_PERIPH_BASE + 0x37000UL) /* CAN prescaler register */
\r
1763 #define FM3_MFS0_UART_BASE (FM3_PERIPH_BASE + 0x38000UL) /* UART asynchronous channel 0 registers */
\r
1764 #define FM3_MFS0_CSIO_BASE (FM3_PERIPH_BASE + 0x38000UL) /* UART synchronous channel 0 registers */
\r
1765 #define FM3_MFS0_LIN_BASE (FM3_PERIPH_BASE + 0x38000UL) /* UART LIN channel 0 registers */
\r
1766 #define FM3_MFS0_I2C_BASE (FM3_PERIPH_BASE + 0x38000UL) /* I2C channel 0 registers */
\r
1767 #define FM3_MFS1_UART_BASE (FM3_PERIPH_BASE + 0x38100UL) /* UART asynchronous channel 1 registers */
\r
1768 #define FM3_MFS1_CSIO_BASE (FM3_PERIPH_BASE + 0x38100UL) /* UART synchronous channel 1 registers */
\r
1769 #define FM3_MFS1_LIN_BASE (FM3_PERIPH_BASE + 0x38100UL) /* UART LIN channel 1 registers */
\r
1770 #define FM3_MFS1_I2C_BASE (FM3_PERIPH_BASE + 0x38100UL) /* I2C channel 1 registers */
\r
1771 #define FM3_MFS2_UART_BASE (FM3_PERIPH_BASE + 0x38200UL) /* UART asynchronous channel 2 registers */
\r
1772 #define FM3_MFS2_CSIO_BASE (FM3_PERIPH_BASE + 0x38200UL) /* UART synchronous channel 2 registers */
\r
1773 #define FM3_MFS2_LIN_BASE (FM3_PERIPH_BASE + 0x38200UL) /* UART LIN channel 2 registers */
\r
1774 #define FM3_MFS2_I2C_BASE (FM3_PERIPH_BASE + 0x38200UL) /* I2C channel 2 registers */
\r
1775 #define FM3_MFS3_UART_BASE (FM3_PERIPH_BASE + 0x38300UL) /* UART asynchronous channel 3 registers */
\r
1776 #define FM3_MFS3_CSIO_BASE (FM3_PERIPH_BASE + 0x38300UL) /* UART synchronous channel 3 registers */
\r
1777 #define FM3_MFS3_LIN_BASE (FM3_PERIPH_BASE + 0x38300UL) /* UART LIN channel 3 registers */
\r
1778 #define FM3_MFS3_I2C_BASE (FM3_PERIPH_BASE + 0x38300UL) /* I2C channel 3 registers */
\r
1779 #define FM3_MFS4_UART_BASE (FM3_PERIPH_BASE + 0x38400UL) /* UART asynchronous channel 4 registers */
\r
1780 #define FM3_MFS4_CSIO_BASE (FM3_PERIPH_BASE + 0x38400UL) /* UART synchronous channel 4 registers */
\r
1781 #define FM3_MFS4_LIN_BASE (FM3_PERIPH_BASE + 0x38400UL) /* UART LIN channel 4 registers */
\r
1782 #define FM3_MFS4_I2C_BASE (FM3_PERIPH_BASE + 0x38400UL) /* I2C channel 4 registers */
\r
1783 #define FM3_MFS5_UART_BASE (FM3_PERIPH_BASE + 0x38500UL) /* UART asynchronous channel 5 registers */
\r
1784 #define FM3_MFS5_CSIO_BASE (FM3_PERIPH_BASE + 0x38500UL) /* UART synchronous channel 5 registers */
\r
1785 #define FM3_MFS5_LIN_BASE (FM3_PERIPH_BASE + 0x38500UL) /* UART LIN channel 5 registers */
\r
1786 #define FM3_MFS5_I2C_BASE (FM3_PERIPH_BASE + 0x38500UL) /* I2C channel 5 registers */
\r
1787 #define FM3_MFS6_UART_BASE (FM3_PERIPH_BASE + 0x38600UL) /* UART asynchronous channel 6 registers */
\r
1788 #define FM3_MFS6_CSIO_BASE (FM3_PERIPH_BASE + 0x38600UL) /* UART synchronous channel 6 registers */
\r
1789 #define FM3_MFS6_LIN_BASE (FM3_PERIPH_BASE + 0x38600UL) /* UART LIN channel 6 registers */
\r
1790 #define FM3_MFS6_I2C_BASE (FM3_PERIPH_BASE + 0x38600UL) /* I2C channel 6 registers */
\r
1791 #define FM3_MFS7_UART_BASE (FM3_PERIPH_BASE + 0x38700UL) /* UART asynchronous channel 7 registers */
\r
1792 #define FM3_MFS7_CSIO_BASE (FM3_PERIPH_BASE + 0x38700UL) /* UART synchronous channel 7 registers */
\r
1793 #define FM3_MFS7_LIN_BASE (FM3_PERIPH_BASE + 0x38700UL) /* UART LIN channel 7 registers */
\r
1794 #define FM3_MFS7_I2C_BASE (FM3_PERIPH_BASE + 0x38700UL) /* I2C channel 7 registers */
\r
1795 #define FM3_CRC_BASE (FM3_PERIPH_BASE + 0x39000UL) /* CRC registers */
\r
1796 #define FM3_WC_BASE (FM3_PERIPH_BASE + 0x3A000UL) /* Watch counter registers */
\r
1797 #define FM3_EXBUS_BASE (FM3_PERIPH_BASE + 0x3F000UL) /* External bus interface registers */
\r
1798 #define FM3_USB0_BASE (FM3_PERIPH_BASE + 0x42100UL) /* USB channel 0 registers */
\r
1799 #define FM3_DMAC_BASE (FM3_PERIPH_BASE + 0x60000UL) /* DMA controller */
\r
1800 #define FM3_CAN0_BASE (FM3_PERIPH_BASE + 0x62000UL) /* CAN channel 0 registers */
\r
1801 #define FM3_CAN1_BASE (FM3_PERIPH_BASE + 0x63000UL) /* CAN channel 1 registers */
\r
1803 /******************************************************************************
\r
1804 * Peripheral declaration
\r
1805 ******************************************************************************/
\r
1806 #define FM3_FLASH_IF ((FM3_FIF_TypeDef *)FM3_FLASH_IF_BASE)
\r
1807 #define FM3_CRG ((FM3_CRG_TypeDef *)FM3_CRG_BASE)
\r
1808 #define FM3_HWWDT ((FM3_HWWDT_TypeDef *)FM3_HWWDT_BASE)
\r
1809 #define FM3_SWWDT ((FM3_SWWDT_TypeDef *)FM3_SWWDT_BASE)
\r
1810 #define FM3_DTIM ((FM3_DTIM_TypeDef *)FM3_DTIM_BASE)
\r
1811 #define FM3_MFT0_FRT ((FM3_MFT_FRT_TypeDef *)FM3_MFT0_FRT_BASE)
\r
1812 #define FM3_MFT0_OCU ((FM3_MFT_OCU_TypeDef *)FM3_MFT0_OCU_BASE)
\r
1813 #define FM3_MFT0_WFG ((FM3_MFT_WFG_TypeDef *)FM3_MFT0_WFG_BASE)
\r
1814 #define FM3_MFT0_ICU ((FM3_MFT_ICU_TypeDef *)FM3_MFT0_ICU_BASE)
\r
1815 #define FM3_MFT0_ADCMP ((FM3_MFT_ADCMP_TypeDef *)FM3_MFT0_ADCMP_BASE)
\r
1816 #define FM3_MFT1_FRT ((FM3_MFT_FRT_TypeDef *)FM3_MFT1_FRT_BASE)
\r
1817 #define FM3_MFT1_OCU ((FM3_MFT_OCU_TypeDef *)FM3_MFT1_OCU_BASE)
\r
1818 #define FM3_MFT1_WFG ((FM3_MFT_WFG_TypeDef *)FM3_MFT1_WFG_BASE)
\r
1819 #define FM3_MFT1_ICU ((FM3_MFT_ICU_TypeDef *)FM3_MFT1_ICU_BASE)
\r
1820 #define FM3_MFT1_ADCMP ((FM3_MFT_ADCMP_TypeDef *)FM3_MFT1_ADCMP_BASE)
\r
1821 #define FM3_MFT_PPG ((FM3_MFT_PPG_TypeDef *)FM3_MFT_PPG_BASE)
\r
1822 #define FM3_BT0_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT0_PPG_BASE)
\r
1823 #define FM3_BT0_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT0_PWM_BASE)
\r
1824 #define FM3_BT0_RT ((FM3_BT_RT_TypeDef *)FM3_BT0_RT_BASE)
\r
1825 #define FM3_BT0_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT0_PWC_BASE)
\r
1826 #define FM3_BT1_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT1_PPG_BASE)
\r
1827 #define FM3_BT1_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT1_PWM_BASE)
\r
1828 #define FM3_BT1_RT ((FM3_BT_RT_TypeDef *)FM3_BT1_RT_BASE)
\r
1829 #define FM3_BT1_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT1_PWC_BASE)
\r
1830 #define FM3_BT2_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT2_PPG_BASE)
\r
1831 #define FM3_BT2_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT2_PWM_BASE)
\r
1832 #define FM3_BT2_RT ((FM3_BT_RT_TypeDef *)FM3_BT2_RT_BASE)
\r
1833 #define FM3_BT2_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT2_PWC_BASE)
\r
1834 #define FM3_BT3_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT3_PPG_BASE)
\r
1835 #define FM3_BT3_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT3_PWM_BASE)
\r
1836 #define FM3_BT3_RT ((FM3_BT_RT_TypeDef *)FM3_BT3_RT_BASE)
\r
1837 #define FM3_BT3_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT3_PWC_BASE)
\r
1838 #define FM3_BT4_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT4_PPG_BASE)
\r
1839 #define FM3_BT4_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT4_PWM_BASE)
\r
1840 #define FM3_BT4_RT ((FM3_BT_RT_TypeDef *)FM3_BT4_RT_BASE)
\r
1841 #define FM3_BT4_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT4_PWC_BASE)
\r
1842 #define FM3_BT5_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT5_PPG_BASE)
\r
1843 #define FM3_BT5_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT5_PWM_BASE)
\r
1844 #define FM3_BT5_RT ((FM3_BT_RT_TypeDef *)FM3_BT5_RT_BASE)
\r
1845 #define FM3_BT5_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT5_PWC_BASE)
\r
1846 #define FM3_BT6_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT6_PPG_BASE)
\r
1847 #define FM3_BT6_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT6_PWM_BASE)
\r
1848 #define FM3_BT6_RT ((FM3_BT_RT_TypeDef *)FM3_BT6_RT_BASE)
\r
1849 #define FM3_BT6_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT6_PWC_BASE)
\r
1850 #define FM3_BT7_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT7_PPG_BASE)
\r
1851 #define FM3_BT7_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT7_PWM_BASE)
\r
1852 #define FM3_BT7_RT ((FM3_BT_RT_TypeDef *)FM3_BT7_RT_BASE)
\r
1853 #define FM3_BT7_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT7_PWC_BASE)
\r
1854 #define FM3_BTIOSEL03 ((FM3_BTIOSEL03_TypeDef *)FM3_BTIOSEL03_BASE)
\r
1855 #define FM3_BTIOSEL47 ((FM3_BTIOSEL47_TypeDef *)FM3_BTIOSEL47_BASE)
\r
1856 #define FM3_SBSSR ((FM3_SBSSR_TypeDef *)FM3_SBSSR_BASE)
\r
1857 #define FM3_QPRC0 ((FM3_QPRC_TypeDef *)FM3_QPRC0_BASE)
\r
1858 #define FM3_QPRC1 ((FM3_QPRC_TypeDef *)FM3_QPRC1_BASE)
\r
1859 #define FM3_ADC0 ((FM3_ADC_TypeDef *)FM3_ADC0_BASE)
\r
1860 #define FM3_ADC1 ((FM3_ADC_TypeDef *)FM3_ADC1_BASE)
\r
1861 #define FM3_ADC2 ((FM3_ADC_TypeDef *)FM3_ADC2_BASE)
\r
1862 #define FM3_CRTRIM ((FM3_CRTRIM_TypeDef *)FM3_CRTRIM_BASE)
\r
1863 #define FM3_EXTI ((FM3_EXTI_TypeDef *)FM3_EXTI_BASE)
\r
1864 #define FM3_INTREQ ((FM3_INTREQ_TypeDef *)FM3_INTREQ_BASE)
\r
1865 #define FM3_GPIO ((FM3_GPIO_TypeDef *)FM3_GPIO_BASE)
\r
1866 #define FM3_LVD ((FM3_LVD_TypeDef *)FM3_LVD_BASE)
\r
1867 #define FM3_USBCLK ((FM3_USBCLK_TypeDef *)FM3_USBCLK_BASE)
\r
1868 #define FM3_CANPRES ((FM3_CANPRE_TypeDef *)FM3_CANPRES_BASE)
\r
1869 #define FM3_MFS0_UART ((FM3_MFS03_UART_TypeDef *)FM3_MFS0_UART_BASE)
\r
1870 #define FM3_MFS0_CSIO ((FM3_MFS03_CSIO_TypeDef *)FM3_MFS0_CSIO_BASE)
\r
1871 #define FM3_MFS0_LIN ((FM3_MFS03_LIN_TypeDef *)FM3_MFS0_LIN_BASE)
\r
1872 #define FM3_MFS0_I2C ((FM3_MFS03_I2C_TypeDef *)FM3_MFS0_I2C_BASE)
\r
1873 #define FM3_MFS1_UART ((FM3_MFS03_UART_TypeDef *)FM3_MFS1_UART_BASE)
\r
1874 #define FM3_MFS1_CSIO ((FM3_MFS03_CSIO_TypeDef *)FM3_MFS1_CSIO_BASE)
\r
1875 #define FM3_MFS1_LIN ((FM3_MFS03_LIN_TypeDef *)FM3_MFS1_LIN_BASE)
\r
1876 #define FM3_MFS1_I2C ((FM3_MFS03_I2C_TypeDef *)FM3_MFS1_I2C_BASE)
\r
1877 #define FM3_MFS2_UART ((FM3_MFS03_UART_TypeDef *)FM3_MFS2_UART_BASE)
\r
1878 #define FM3_MFS2_CSIO ((FM3_MFS03_CSIO_TypeDef *)FM3_MFS2_CSIO_BASE)
\r
1879 #define FM3_MFS2_LIN ((FM3_MFS03_LIN_TypeDef *)FM3_MFS2_LIN_BASE)
\r
1880 #define FM3_MFS2_I2C ((FM3_MFS03_I2C_TypeDef *)FM3_MFS2_I2C_BASE)
\r
1881 #define FM3_MFS3_UART ((FM3_MFS03_UART_TypeDef *)FM3_MFS3_UART_BASE)
\r
1882 #define FM3_MFS3_CSIO ((FM3_MFS03_CSIO_TypeDef *)FM3_MFS3_CSIO_BASE)
\r
1883 #define FM3_MFS3_LIN ((FM3_MFS03_LIN_TypeDef *)FM3_MFS3_LIN_BASE)
\r
1884 #define FM3_MFS3_I2C ((FM3_MFS03_I2C_TypeDef *)FM3_MFS3_I2C_BASE)
\r
1885 #define FM3_MFS4_UART ((FM3_MFS47_UART_TypeDef *)FM3_MFS4_UART_BASE)
\r
1886 #define FM3_MFS4_CSIO ((FM3_MFS47_CSIO_TypeDef *)FM3_MFS4_CSIO_BASE)
\r
1887 #define FM3_MFS4_LIN ((FM3_MFS47_LIN_TypeDef *)FM3_MFS4_LIN_BASE)
\r
1888 #define FM3_MFS4_I2C ((FM3_MFS47_I2C_TypeDef *)FM3_MFS4_I2C_BASE)
\r
1889 #define FM3_MFS5_UART ((FM3_MFS47_UART_TypeDef *)FM3_MFS5_UART_BASE)
\r
1890 #define FM3_MFS5_CSIO ((FM3_MFS47_CSIO_TypeDef *)FM3_MFS5_CSIO_BASE)
\r
1891 #define FM3_MFS5_LIN ((FM3_MFS47_LIN_TypeDef *)FM3_MFS5_LIN_BASE)
\r
1892 #define FM3_MFS5_I2C ((FM3_MFS47_I2C_TypeDef *)FM3_MFS5_I2C_BASE)
\r
1893 #define FM3_MFS6_UART ((FM3_MFS47_UART_TypeDef *)FM3_MFS6_UART_BASE)
\r
1894 #define FM3_MFS6_CSIO ((FM3_MFS47_CSIO_TypeDef *)FM3_MFS6_CSIO_BASE)
\r
1895 #define FM3_MFS6_LIN ((FM3_MFS47_LIN_TypeDef *)FM3_MFS6_LIN_BASE)
\r
1896 #define FM3_MFS6_I2C ((FM3_MFS47_I2C_TypeDef *)FM3_MFS6_I2C_BASE)
\r
1897 #define FM3_MFS7_UART ((FM3_MFS47_UART_TypeDef *)FM3_MFS7_UART_BASE)
\r
1898 #define FM3_MFS7_CSIO ((FM3_MFS47_CSIO_TypeDef *)FM3_MFS7_CSIO_BASE)
\r
1899 #define FM3_MFS7_LIN ((FM3_MFS47_LIN_TypeDef *)FM3_MFS7_LIN_BASE)
\r
1900 #define FM3_MFS7_I2C ((FM3_MFS47_I2C_TypeDef *)FM3_MFS7_I2C_BASE)
\r
1901 #define FM3_CRC ((FM3_CRC_TypeDef *)FM3_CRC_BASE)
\r
1902 #define FM3_WC ((FM3_WC_TypeDef *)FM3_WC_BASE)
\r
1903 #define FM3_EXBUS ((FM3_EXBUS_TypeDef *)FM3_EXBUS_BASE)
\r
1904 #define FM3_USB0 ((FM3_USB_TypeDef *)FM3_USB0_BASE)
\r
1905 #define FM3_DMAC ((FM3_DMAC_TypeDef *)FM3_DMAC_BASE)
\r
1906 #define FM3_CAN0 ((FM3_CAN_TypeDef *)FM3_CAN0_BASE)
\r
1907 #define FM3_CAN1 ((FM3_CAN_TypeDef *)FM3_CAN1_BASE)
\r
1909 /******************************************************************************
\r
1910 * Peripheral Bit Band Alias declaration
\r
1911 ******************************************************************************/
\r
1913 /* Flash interface registers */
\r
1914 #define bFM3_FLASH_IF_FASZR_ASZ0 *((volatile unsigned int*)(0x42000000UL))
\r
1915 #define bFM3_FLASH_IF_FASZR_ASZ1 *((volatile unsigned int*)(0x42000004UL))
\r
1916 #define bFM3_FLASH_IF_FRWTR_RWT0 *((volatile unsigned int*)(0x42000080UL))
\r
1917 #define bFM3_FLASH_IF_FRWTR_RWT1 *((volatile unsigned int*)(0x42000084UL))
\r
1918 #define bFM3_FLASH_IF_FSTR_RDY *((volatile unsigned int*)(0x42000100UL))
\r
1919 #define bFM3_FLASH_IF_FSTR_HNG *((volatile unsigned int*)(0x42000104UL))
\r
1920 #define bFM3_FLASH_IF_FSYNDN_SD0 *((volatile unsigned int*)(0x42000200UL))
\r
1921 #define bFM3_FLASH_IF_FSYNDN_SD1 *((volatile unsigned int*)(0x42000204UL))
\r
1922 #define bFM3_FLASH_IF_FSYNDN_SD2 *((volatile unsigned int*)(0x42000208UL))
\r
1923 #define bFM3_FLASH_IF_CRTRMM_TRMM0 *((volatile unsigned int*)(0x42002000UL))
\r
1924 #define bFM3_FLASH_IF_CRTRMM_TRMM1 *((volatile unsigned int*)(0x42002004UL))
\r
1925 #define bFM3_FLASH_IF_CRTRMM_TRMM2 *((volatile unsigned int*)(0x42002008UL))
\r
1926 #define bFM3_FLASH_IF_CRTRMM_TRMM3 *((volatile unsigned int*)(0x4200200CUL))
\r
1927 #define bFM3_FLASH_IF_CRTRMM_TRMM4 *((volatile unsigned int*)(0x42002010UL))
\r
1928 #define bFM3_FLASH_IF_CRTRMM_TRMM5 *((volatile unsigned int*)(0x42002014UL))
\r
1929 #define bFM3_FLASH_IF_CRTRMM_TRMM6 *((volatile unsigned int*)(0x42002018UL))
\r
1930 #define bFM3_FLASH_IF_CRTRMM_TRMM7 *((volatile unsigned int*)(0x4200201CUL))
\r
1931 #define bFM3_FLASH_IF_CRTRMM_TRMM8 *((volatile unsigned int*)(0x42002020UL))
\r
1932 #define bFM3_FLASH_IF_CRTRMM_TRMM9 *((volatile unsigned int*)(0x42002024UL))
\r
1934 /* Clock and reset registers */
\r
1935 #define bFM3_CRG_SCM_CTL_MOSCE *((volatile unsigned int*)(0x42200004UL))
\r
1936 #define bFM3_CRG_SCM_CTL_SOSCE *((volatile unsigned int*)(0x4220000CUL))
\r
1937 #define bFM3_CRG_SCM_CTL_PLLE *((volatile unsigned int*)(0x42200010UL))
\r
1938 #define bFM3_CRG_SCM_CTL_RCS0 *((volatile unsigned int*)(0x42200014UL))
\r
1939 #define bFM3_CRG_SCM_CTL_RCS1 *((volatile unsigned int*)(0x42200018UL))
\r
1940 #define bFM3_CRG_SCM_CTL_RCS2 *((volatile unsigned int*)(0x4220001CUL))
\r
1941 #define bFM3_CRG_SCM_STR_MORDY *((volatile unsigned int*)(0x42200084UL))
\r
1942 #define bFM3_CRG_SCM_STR_SORDY *((volatile unsigned int*)(0x4220008CUL))
\r
1943 #define bFM3_CRG_SCM_STR_PLRDY *((volatile unsigned int*)(0x42200090UL))
\r
1944 #define bFM3_CRG_SCM_STR_RCM0 *((volatile unsigned int*)(0x42200094UL))
\r
1945 #define bFM3_CRG_SCM_STR_RCM1 *((volatile unsigned int*)(0x42200098UL))
\r
1946 #define bFM3_CRG_SCM_STR_RCM2 *((volatile unsigned int*)(0x4220009CUL))
\r
1947 #define bFM3_CRG_RST_STR_PONR *((volatile unsigned int*)(0x42200180UL))
\r
1948 #define bFM3_CRG_RST_STR_INITX *((volatile unsigned int*)(0x42200184UL))
\r
1949 #define bFM3_CRG_RST_STR_SWDT *((volatile unsigned int*)(0x42200190UL))
\r
1950 #define bFM3_CRG_RST_STR_HWDT *((volatile unsigned int*)(0x42200194UL))
\r
1951 #define bFM3_CRG_RST_STR_CSVR *((volatile unsigned int*)(0x42200198UL))
\r
1952 #define bFM3_CRG_RST_STR_FCSR *((volatile unsigned int*)(0x4220019CUL))
\r
1953 #define bFM3_CRG_RST_STR_SRST *((volatile unsigned int*)(0x422001A0UL))
\r
1954 #define bFM3_CRG_BSC_PSR_BSR0 *((volatile unsigned int*)(0x42200200UL))
\r
1955 #define bFM3_CRG_BSC_PSR_BSR1 *((volatile unsigned int*)(0x42200204UL))
\r
1956 #define bFM3_CRG_BSC_PSR_BSR2 *((volatile unsigned int*)(0x42200208UL))
\r
1957 #define bFM3_CRG_APBC0_PSR_APBC00 *((volatile unsigned int*)(0x42200280UL))
\r
1958 #define bFM3_CRG_APBC0_PSR_APBC01 *((volatile unsigned int*)(0x42200284UL))
\r
1959 #define bFM3_CRG_APBC1_PSR_APBC10 *((volatile unsigned int*)(0x42200300UL))
\r
1960 #define bFM3_CRG_APBC1_PSR_APBC11 *((volatile unsigned int*)(0x42200304UL))
\r
1961 #define bFM3_CRG_APBC1_PSR_APBC1RST *((volatile unsigned int*)(0x42200310UL))
\r
1962 #define bFM3_CRG_APBC1_PSR_APBC1EN *((volatile unsigned int*)(0x4220031CUL))
\r
1963 #define bFM3_CRG_APBC2_PSR_APBC20 *((volatile unsigned int*)(0x42200380UL))
\r
1964 #define bFM3_CRG_APBC2_PSR_APBC21 *((volatile unsigned int*)(0x42200384UL))
\r
1965 #define bFM3_CRG_APBC2_PSR_APBC2RST *((volatile unsigned int*)(0x42200390UL))
\r
1966 #define bFM3_CRG_APBC2_PSR_APBC2EN *((volatile unsigned int*)(0x4220039CUL))
\r
1967 #define bFM3_CRG_SWC_PSR_SWDS0 *((volatile unsigned int*)(0x42200400UL))
\r
1968 #define bFM3_CRG_SWC_PSR_SWDS1 *((volatile unsigned int*)(0x42200404UL))
\r
1969 #define bFM3_CRG_SWC_PSR_TESTB *((volatile unsigned int*)(0x4220041CUL))
\r
1970 #define bFM3_CRG_TTC_PSR_TTC *((volatile unsigned int*)(0x42200500UL))
\r
1971 #define bFM3_CRG_CSW_TMR_MOWT0 *((volatile unsigned int*)(0x42200600UL))
\r
1972 #define bFM3_CRG_CSW_TMR_MOWT1 *((volatile unsigned int*)(0x42200604UL))
\r
1973 #define bFM3_CRG_CSW_TMR_MOWT2 *((volatile unsigned int*)(0x42200608UL))
\r
1974 #define bFM3_CRG_CSW_TMR_MOWT3 *((volatile unsigned int*)(0x4220060CUL))
\r
1975 #define bFM3_CRG_CSW_TMR_SOWT0 *((volatile unsigned int*)(0x42200610UL))
\r
1976 #define bFM3_CRG_CSW_TMR_SOWT1 *((volatile unsigned int*)(0x42200614UL))
\r
1977 #define bFM3_CRG_CSW_TMR_SOWT2 *((volatile unsigned int*)(0x42200618UL))
\r
1978 #define bFM3_CRG_PSW_TMR_POWT0 *((volatile unsigned int*)(0x42200680UL))
\r
1979 #define bFM3_CRG_PSW_TMR_POWT1 *((volatile unsigned int*)(0x42200684UL))
\r
1980 #define bFM3_CRG_PSW_TMR_POWT2 *((volatile unsigned int*)(0x42200688UL))
\r
1981 #define bFM3_CRG_PSW_TMR_PINC *((volatile unsigned int*)(0x42200690UL))
\r
1982 #define bFM3_CRG_PLL_CTL1_PLLM0 *((volatile unsigned int*)(0x42200700UL))
\r
1983 #define bFM3_CRG_PLL_CTL1_PLLM1 *((volatile unsigned int*)(0x42200704UL))
\r
1984 #define bFM3_CRG_PLL_CTL1_PLLM2 *((volatile unsigned int*)(0x42200708UL))
\r
1985 #define bFM3_CRG_PLL_CTL1_PLLM3 *((volatile unsigned int*)(0x4220070CUL))
\r
1986 #define bFM3_CRG_PLL_CTL1_PLLK0 *((volatile unsigned int*)(0x42200710UL))
\r
1987 #define bFM3_CRG_PLL_CTL1_PLLK1 *((volatile unsigned int*)(0x42200714UL))
\r
1988 #define bFM3_CRG_PLL_CTL1_PLLK2 *((volatile unsigned int*)(0x42200718UL))
\r
1989 #define bFM3_CRG_PLL_CTL1_PLLK3 *((volatile unsigned int*)(0x4220071CUL))
\r
1990 #define bFM3_CRG_PLL_CTL2_PLLN0 *((volatile unsigned int*)(0x42200780UL))
\r
1991 #define bFM3_CRG_PLL_CTL2_PLLN1 *((volatile unsigned int*)(0x42200784UL))
\r
1992 #define bFM3_CRG_PLL_CTL2_PLLN2 *((volatile unsigned int*)(0x42200788UL))
\r
1993 #define bFM3_CRG_PLL_CTL2_PLLN3 *((volatile unsigned int*)(0x4220078CUL))
\r
1994 #define bFM3_CRG_PLL_CTL2_PLLN4 *((volatile unsigned int*)(0x42200790UL))
\r
1995 #define bFM3_CRG_CSV_CTL_MCSVE *((volatile unsigned int*)(0x42200800UL))
\r
1996 #define bFM3_CRG_CSV_CTL_SCSVE *((volatile unsigned int*)(0x42200804UL))
\r
1997 #define bFM3_CRG_CSV_CTL_FCSDE *((volatile unsigned int*)(0x42200820UL))
\r
1998 #define bFM3_CRG_CSV_CTL_FCSRE *((volatile unsigned int*)(0x42200824UL))
\r
1999 #define bFM3_CRG_CSV_CTL_FCD0 *((volatile unsigned int*)(0x42200830UL))
\r
2000 #define bFM3_CRG_CSV_CTL_FCD1 *((volatile unsigned int*)(0x42200834UL))
\r
2001 #define bFM3_CRG_CSV_CTL_FCD2 *((volatile unsigned int*)(0x42200838UL))
\r
2002 #define bFM3_CRG_CSV_STR_MCMF *((volatile unsigned int*)(0x42200880UL))
\r
2003 #define bFM3_CRG_CSV_STR_SCMF *((volatile unsigned int*)(0x42200884UL))
\r
2004 #define bFM3_CRG_DBWDT_CTL_DPSWBE *((volatile unsigned int*)(0x42200A94UL))
\r
2005 #define bFM3_CRG_DBWDT_CTL_DPHWBE *((volatile unsigned int*)(0x42200A9CUL))
\r
2006 #define bFM3_CRG_INT_ENR_MCSE *((volatile unsigned int*)(0x42200C00UL))
\r
2007 #define bFM3_CRG_INT_ENR_SCSE *((volatile unsigned int*)(0x42200C04UL))
\r
2008 #define bFM3_CRG_INT_ENR_PCSE *((volatile unsigned int*)(0x42200C08UL))
\r
2009 #define bFM3_CRG_INT_ENR_FCSE *((volatile unsigned int*)(0x42200C14UL))
\r
2010 #define bFM3_CRG_INT_STR_MCSI *((volatile unsigned int*)(0x42200C80UL))
\r
2011 #define bFM3_CRG_INT_STR_SCSI *((volatile unsigned int*)(0x42200C84UL))
\r
2012 #define bFM3_CRG_INT_STR_PCSI *((volatile unsigned int*)(0x42200C88UL))
\r
2013 #define bFM3_CRG_INT_STR_FCSI *((volatile unsigned int*)(0x42200C94UL))
\r
2014 #define bFM3_CRG_INT_CLR_MCSC *((volatile unsigned int*)(0x42200D00UL))
\r
2015 #define bFM3_CRG_INT_CLR_SCSC *((volatile unsigned int*)(0x42200D04UL))
\r
2016 #define bFM3_CRG_INT_CLR_PCSC *((volatile unsigned int*)(0x42200D08UL))
\r
2017 #define bFM3_CRG_INT_CLR_FCSC *((volatile unsigned int*)(0x42200D14UL))
\r
2019 /* Hardware watchdog registers */
\r
2020 #define bFM3_HWWDT_WDG_CTL_INTEN *((volatile unsigned int*)(0x42220100UL))
\r
2021 #define bFM3_HWWDT_WDG_CTL_RESEN *((volatile unsigned int*)(0x42220104UL))
\r
2022 #define bFM3_HWWDT_WDG_RIS_RIS *((volatile unsigned int*)(0x42220200UL))
\r
2024 /* Software watchdog registers */
\r
2025 #define bFM3_SWWDT_WDOGCONTROL_INTEN *((volatile unsigned int*)(0x42240100UL))
\r
2026 #define bFM3_SWWDT_WDOGCONTROL_RESEN *((volatile unsigned int*)(0x42240104UL))
\r
2027 #define bFM3_SWWDT_WDOGRIS_RIS *((volatile unsigned int*)(0x42240200UL))
\r
2029 /* Dual timer 1/2 registers */
\r
2030 #define bFM3_DTIM_TIMER1CONTROL_ONESHOT *((volatile unsigned int*)(0x422A0100UL))
\r
2031 #define bFM3_DTIM_TIMER1CONTROL_TIMERSIZE *((volatile unsigned int*)(0x422A0104UL))
\r
2032 #define bFM3_DTIM_TIMER1CONTROL_TIMERPRE0 *((volatile unsigned int*)(0x422A0108UL))
\r
2033 #define bFM3_DTIM_TIMER1CONTROL_TIMERPRE1 *((volatile unsigned int*)(0x422A010CUL))
\r
2034 #define bFM3_DTIM_TIMER1CONTROL_INTENABLE *((volatile unsigned int*)(0x422A0114UL))
\r
2035 #define bFM3_DTIM_TIMER1CONTROL_TIMERMODE *((volatile unsigned int*)(0x422A0118UL))
\r
2036 #define bFM3_DTIM_TIMER1CONTROL_TIMEREN *((volatile unsigned int*)(0x422A011CUL))
\r
2037 #define bFM3_DTIM_TIMER1RIS_TIMERXRIS *((volatile unsigned int*)(0x422A0200UL))
\r
2038 #define bFM3_DTIM_TIMER1MIS_TIMERXRIS *((volatile unsigned int*)(0x422A0280UL))
\r
2039 #define bFM3_DTIM_TIMER2CONTROL_ONESHOT *((volatile unsigned int*)(0x422A0500UL))
\r
2040 #define bFM3_DTIM_TIMER2CONTROL_TIMERSIZE *((volatile unsigned int*)(0x422A0504UL))
\r
2041 #define bFM3_DTIM_TIMER2CONTROL_TIMERPRE0 *((volatile unsigned int*)(0x422A0508UL))
\r
2042 #define bFM3_DTIM_TIMER2CONTROL_TIMERPRE1 *((volatile unsigned int*)(0x422A050CUL))
\r
2043 #define bFM3_DTIM_TIMER2CONTROL_INTENABLE *((volatile unsigned int*)(0x422A0514UL))
\r
2044 #define bFM3_DTIM_TIMER2CONTROL_TIMERMODE *((volatile unsigned int*)(0x422A0518UL))
\r
2045 #define bFM3_DTIM_TIMER2CONTROL_TIMEREN *((volatile unsigned int*)(0x422A051CUL))
\r
2046 #define bFM3_DTIM_TIMER2RIS_TIMERXRIS *((volatile unsigned int*)(0x422A0600UL))
\r
2047 #define bFM3_DTIM_TIMER2MIS_TIMERXRIS *((volatile unsigned int*)(0x422A0680UL))
\r
2049 /* Multifunction Timer unit 0 Free Running Timer registers */
\r
2050 #define bFM3_MFT0_FRT_TCSA0_CLK0 *((volatile unsigned int*)(0x42400600UL))
\r
2051 #define bFM3_MFT0_FRT_TCSA0_CLK1 *((volatile unsigned int*)(0x42400604UL))
\r
2052 #define bFM3_MFT0_FRT_TCSA0_CLK2 *((volatile unsigned int*)(0x42400608UL))
\r
2053 #define bFM3_MFT0_FRT_TCSA0_CLK3 *((volatile unsigned int*)(0x4240060CUL))
\r
2054 #define bFM3_MFT0_FRT_TCSA0_SCLR *((volatile unsigned int*)(0x42400610UL))
\r
2055 #define bFM3_MFT0_FRT_TCSA0_MODE *((volatile unsigned int*)(0x42400614UL))
\r
2056 #define bFM3_MFT0_FRT_TCSA0_STOP *((volatile unsigned int*)(0x42400618UL))
\r
2057 #define bFM3_MFT0_FRT_TCSA0_BFE *((volatile unsigned int*)(0x4240061CUL))
\r
2058 #define bFM3_MFT0_FRT_TCSA0_ICRE *((volatile unsigned int*)(0x42400620UL))
\r
2059 #define bFM3_MFT0_FRT_TCSA0_ICLR *((volatile unsigned int*)(0x42400624UL))
\r
2060 #define bFM3_MFT0_FRT_TCSA0_IRQZE *((volatile unsigned int*)(0x42400634UL))
\r
2061 #define bFM3_MFT0_FRT_TCSA0_IRQZF *((volatile unsigned int*)(0x42400638UL))
\r
2062 #define bFM3_MFT0_FRT_TCSA0_ECKE *((volatile unsigned int*)(0x4240063CUL))
\r
2063 #define bFM3_MFT0_FRT_TCSB0_AD0E *((volatile unsigned int*)(0x42400680UL))
\r
2064 #define bFM3_MFT0_FRT_TCSB0_AD1E *((volatile unsigned int*)(0x42400684UL))
\r
2065 #define bFM3_MFT0_FRT_TCSB0_AD2E *((volatile unsigned int*)(0x42400688UL))
\r
2066 #define bFM3_MFT0_FRT_TCSA1_CLK0 *((volatile unsigned int*)(0x42400800UL))
\r
2067 #define bFM3_MFT0_FRT_TCSA1_CLK1 *((volatile unsigned int*)(0x42400804UL))
\r
2068 #define bFM3_MFT0_FRT_TCSA1_CLK2 *((volatile unsigned int*)(0x42400808UL))
\r
2069 #define bFM3_MFT0_FRT_TCSA1_CLK3 *((volatile unsigned int*)(0x4240080CUL))
\r
2070 #define bFM3_MFT0_FRT_TCSA1_SCLR *((volatile unsigned int*)(0x42400810UL))
\r
2071 #define bFM3_MFT0_FRT_TCSA1_MODE *((volatile unsigned int*)(0x42400814UL))
\r
2072 #define bFM3_MFT0_FRT_TCSA1_STOP *((volatile unsigned int*)(0x42400818UL))
\r
2073 #define bFM3_MFT0_FRT_TCSA1_BFE *((volatile unsigned int*)(0x4240081CUL))
\r
2074 #define bFM3_MFT0_FRT_TCSA1_ICRE *((volatile unsigned int*)(0x42400820UL))
\r
2075 #define bFM3_MFT0_FRT_TCSA1_ICLR *((volatile unsigned int*)(0x42400824UL))
\r
2076 #define bFM3_MFT0_FRT_TCSA1_IRQZE *((volatile unsigned int*)(0x42400834UL))
\r
2077 #define bFM3_MFT0_FRT_TCSA1_IRQZF *((volatile unsigned int*)(0x42400838UL))
\r
2078 #define bFM3_MFT0_FRT_TCSA1_ECKE *((volatile unsigned int*)(0x4240083CUL))
\r
2079 #define bFM3_MFT0_FRT_TCSB1_AD0E *((volatile unsigned int*)(0x42400880UL))
\r
2080 #define bFM3_MFT0_FRT_TCSB1_AD1E *((volatile unsigned int*)(0x42400884UL))
\r
2081 #define bFM3_MFT0_FRT_TCSB1_AD2E *((volatile unsigned int*)(0x42400888UL))
\r
2082 #define bFM3_MFT0_FRT_TCSA2_CLK0 *((volatile unsigned int*)(0x42400A00UL))
\r
2083 #define bFM3_MFT0_FRT_TCSA2_CLK1 *((volatile unsigned int*)(0x42400A04UL))
\r
2084 #define bFM3_MFT0_FRT_TCSA2_CLK2 *((volatile unsigned int*)(0x42400A08UL))
\r
2085 #define bFM3_MFT0_FRT_TCSA2_CLK3 *((volatile unsigned int*)(0x42400A0CUL))
\r
2086 #define bFM3_MFT0_FRT_TCSA2_SCLR *((volatile unsigned int*)(0x42400A10UL))
\r
2087 #define bFM3_MFT0_FRT_TCSA2_MODE *((volatile unsigned int*)(0x42400A14UL))
\r
2088 #define bFM3_MFT0_FRT_TCSA2_STOP *((volatile unsigned int*)(0x42400A18UL))
\r
2089 #define bFM3_MFT0_FRT_TCSA2_BFE *((volatile unsigned int*)(0x42400A1CUL))
\r
2090 #define bFM3_MFT0_FRT_TCSA2_ICRE *((volatile unsigned int*)(0x42400A20UL))
\r
2091 #define bFM3_MFT0_FRT_TCSA2_ICLR *((volatile unsigned int*)(0x42400A24UL))
\r
2092 #define bFM3_MFT0_FRT_TCSA2_IRQZE *((volatile unsigned int*)(0x42400A34UL))
\r
2093 #define bFM3_MFT0_FRT_TCSA2_IRQZF *((volatile unsigned int*)(0x42400A38UL))
\r
2094 #define bFM3_MFT0_FRT_TCSA2_ECKE *((volatile unsigned int*)(0x42400A3CUL))
\r
2095 #define bFM3_MFT0_FRT_TCSB2_AD0E *((volatile unsigned int*)(0x42400A80UL))
\r
2096 #define bFM3_MFT0_FRT_TCSB2_AD1E *((volatile unsigned int*)(0x42400A84UL))
\r
2097 #define bFM3_MFT0_FRT_TCSB2_AD2E *((volatile unsigned int*)(0x42400A88UL))
\r
2099 /* Multifunction Timer unit 0 Output Compare Unit registers */
\r
2100 #define bFM3_MFT0_OCU_OCSA10_CST0 *((volatile unsigned int*)(0x42400300UL))
\r
2101 #define bFM3_MFT0_OCU_OCSA10_CST1 *((volatile unsigned int*)(0x42400304UL))
\r
2102 #define bFM3_MFT0_OCU_OCSA10_BDIS0 *((volatile unsigned int*)(0x42400308UL))
\r
2103 #define bFM3_MFT0_OCU_OCSA10_BDIS1 *((volatile unsigned int*)(0x4240030CUL))
\r
2104 #define bFM3_MFT0_OCU_OCSA10_IOE0 *((volatile unsigned int*)(0x42400310UL))
\r
2105 #define bFM3_MFT0_OCU_OCSA10_IOE1 *((volatile unsigned int*)(0x42400314UL))
\r
2106 #define bFM3_MFT0_OCU_OCSA10_IOP0 *((volatile unsigned int*)(0x42400318UL))
\r
2107 #define bFM3_MFT0_OCU_OCSA10_IOP1 *((volatile unsigned int*)(0x4240031CUL))
\r
2108 #define bFM3_MFT0_OCU_OCSB10_OTD0 *((volatile unsigned int*)(0x42400320UL))
\r
2109 #define bFM3_MFT0_OCU_OCSB10_OTD1 *((volatile unsigned int*)(0x42400324UL))
\r
2110 #define bFM3_MFT0_OCU_OCSB10_CMOD *((volatile unsigned int*)(0x42400330UL))
\r
2111 #define bFM3_MFT0_OCU_OCSB10_BTS0 *((volatile unsigned int*)(0x42400334UL))
\r
2112 #define bFM3_MFT0_OCU_OCSB10_BTS1 *((volatile unsigned int*)(0x42400338UL))
\r
2113 #define bFM3_MFT0_OCU_OCSA32_CST2 *((volatile unsigned int*)(0x42400380UL))
\r
2114 #define bFM3_MFT0_OCU_OCSA32_CST3 *((volatile unsigned int*)(0x42400384UL))
\r
2115 #define bFM3_MFT0_OCU_OCSA32_BDIS2 *((volatile unsigned int*)(0x42400388UL))
\r
2116 #define bFM3_MFT0_OCU_OCSA32_BDIS3 *((volatile unsigned int*)(0x4240038CUL))
\r
2117 #define bFM3_MFT0_OCU_OCSA32_IOE2 *((volatile unsigned int*)(0x42400390UL))
\r
2118 #define bFM3_MFT0_OCU_OCSA32_IOE3 *((volatile unsigned int*)(0x42400394UL))
\r
2119 #define bFM3_MFT0_OCU_OCSA32_IOP2 *((volatile unsigned int*)(0x42400398UL))
\r
2120 #define bFM3_MFT0_OCU_OCSA32_IOP3 *((volatile unsigned int*)(0x4240039CUL))
\r
2121 #define bFM3_MFT0_OCU_OCSB32_OTD2 *((volatile unsigned int*)(0x424003A0UL))
\r
2122 #define bFM3_MFT0_OCU_OCSB32_OTD3 *((volatile unsigned int*)(0x424003A4UL))
\r
2123 #define bFM3_MFT0_OCU_OCSB32_CMOD *((volatile unsigned int*)(0x424003B0UL))
\r
2124 #define bFM3_MFT0_OCU_OCSB32_BTS2 *((volatile unsigned int*)(0x424003B4UL))
\r
2125 #define bFM3_MFT0_OCU_OCSB32_BTS3 *((volatile unsigned int*)(0x424003B8UL))
\r
2126 #define bFM3_MFT0_OCU_OCSA54_CST4 *((volatile unsigned int*)(0x42400400UL))
\r
2127 #define bFM3_MFT0_OCU_OCSA54_CST5 *((volatile unsigned int*)(0x42400404UL))
\r
2128 #define bFM3_MFT0_OCU_OCSA54_BDIS4 *((volatile unsigned int*)(0x42400408UL))
\r
2129 #define bFM3_MFT0_OCU_OCSA54_BDIS5 *((volatile unsigned int*)(0x4240040CUL))
\r
2130 #define bFM3_MFT0_OCU_OCSA54_IOE4 *((volatile unsigned int*)(0x42400410UL))
\r
2131 #define bFM3_MFT0_OCU_OCSA54_IOE5 *((volatile unsigned int*)(0x42400414UL))
\r
2132 #define bFM3_MFT0_OCU_OCSA54_IOP4 *((volatile unsigned int*)(0x42400418UL))
\r
2133 #define bFM3_MFT0_OCU_OCSA54_IOP5 *((volatile unsigned int*)(0x4240041CUL))
\r
2134 #define bFM3_MFT0_OCU_OCSB54_OTD4 *((volatile unsigned int*)(0x42400420UL))
\r
2135 #define bFM3_MFT0_OCU_OCSB54_OTD5 *((volatile unsigned int*)(0x42400424UL))
\r
2136 #define bFM3_MFT0_OCU_OCSB54_CMOD *((volatile unsigned int*)(0x42400430UL))
\r
2137 #define bFM3_MFT0_OCU_OCSB54_BTS4 *((volatile unsigned int*)(0x42400434UL))
\r
2138 #define bFM3_MFT0_OCU_OCSB54_BTS5 *((volatile unsigned int*)(0x42400438UL))
\r
2139 #define bFM3_MFT0_OCU_OCSC_MOD0 *((volatile unsigned int*)(0x424004A0UL))
\r
2140 #define bFM3_MFT0_OCU_OCSC_MOD1 *((volatile unsigned int*)(0x424004A4UL))
\r
2141 #define bFM3_MFT0_OCU_OCSC_MOD2 *((volatile unsigned int*)(0x424004A8UL))
\r
2142 #define bFM3_MFT0_OCU_OCSC_MOD3 *((volatile unsigned int*)(0x424004ACUL))
\r
2143 #define bFM3_MFT0_OCU_OCSC_MOD4 *((volatile unsigned int*)(0x424004B0UL))
\r
2144 #define bFM3_MFT0_OCU_OCSC_MOD5 *((volatile unsigned int*)(0x424004B4UL))
\r
2145 #define bFM3_MFT0_OCU_OCFS10_FSO00 *((volatile unsigned int*)(0x42400B00UL))
\r
2146 #define bFM3_MFT0_OCU_OCFS10_FSO01 *((volatile unsigned int*)(0x42400B04UL))
\r
2147 #define bFM3_MFT0_OCU_OCFS10_FSO02 *((volatile unsigned int*)(0x42400B08UL))
\r
2148 #define bFM3_MFT0_OCU_OCFS10_FSO03 *((volatile unsigned int*)(0x42400B0CUL))
\r
2149 #define bFM3_MFT0_OCU_OCFS10_FSO10 *((volatile unsigned int*)(0x42400B10UL))
\r
2150 #define bFM3_MFT0_OCU_OCFS10_FSO11 *((volatile unsigned int*)(0x42400B14UL))
\r
2151 #define bFM3_MFT0_OCU_OCFS10_FSO12 *((volatile unsigned int*)(0x42400B18UL))
\r
2152 #define bFM3_MFT0_OCU_OCFS10_FSO13 *((volatile unsigned int*)(0x42400B1CUL))
\r
2153 #define bFM3_MFT0_OCU_OCFS32_FSO20 *((volatile unsigned int*)(0x42400B20UL))
\r
2154 #define bFM3_MFT0_OCU_OCFS32_FSO21 *((volatile unsigned int*)(0x42400B24UL))
\r
2155 #define bFM3_MFT0_OCU_OCFS32_FSO22 *((volatile unsigned int*)(0x42400B28UL))
\r
2156 #define bFM3_MFT0_OCU_OCFS32_FSO23 *((volatile unsigned int*)(0x42400B2CUL))
\r
2157 #define bFM3_MFT0_OCU_OCFS32_FSO30 *((volatile unsigned int*)(0x42400B30UL))
\r
2158 #define bFM3_MFT0_OCU_OCFS32_FSO31 *((volatile unsigned int*)(0x42400B34UL))
\r
2159 #define bFM3_MFT0_OCU_OCFS32_FSO32 *((volatile unsigned int*)(0x42400B38UL))
\r
2160 #define bFM3_MFT0_OCU_OCFS32_FSO33 *((volatile unsigned int*)(0x42400B3CUL))
\r
2161 #define bFM3_MFT0_OCU_OCFS54_FSO40 *((volatile unsigned int*)(0x42400B80UL))
\r
2162 #define bFM3_MFT0_OCU_OCFS54_FSO41 *((volatile unsigned int*)(0x42400B84UL))
\r
2163 #define bFM3_MFT0_OCU_OCFS54_FSO42 *((volatile unsigned int*)(0x42400B88UL))
\r
2164 #define bFM3_MFT0_OCU_OCFS54_FSO43 *((volatile unsigned int*)(0x42400B8CUL))
\r
2165 #define bFM3_MFT0_OCU_OCFS54_FSO50 *((volatile unsigned int*)(0x42400B90UL))
\r
2166 #define bFM3_MFT0_OCU_OCFS54_FSO51 *((volatile unsigned int*)(0x42400B94UL))
\r
2167 #define bFM3_MFT0_OCU_OCFS54_FSO52 *((volatile unsigned int*)(0x42400B98UL))
\r
2168 #define bFM3_MFT0_OCU_OCFS54_FSO53 *((volatile unsigned int*)(0x42400B9CUL))
\r
2170 /* Multifunction Timer unit 0 Waveform Generator and Noise Canceler registers */
\r
2171 #define bFM3_MFT0_WFG_WFSA10_DCK0 *((volatile unsigned int*)(0x42401180UL))
\r
2172 #define bFM3_MFT0_WFG_WFSA10_DCK1 *((volatile unsigned int*)(0x42401184UL))
\r
2173 #define bFM3_MFT0_WFG_WFSA10_DCK2 *((volatile unsigned int*)(0x42401188UL))
\r
2174 #define bFM3_MFT0_WFG_WFSA10_TMD0 *((volatile unsigned int*)(0x4240118CUL))
\r
2175 #define bFM3_MFT0_WFG_WFSA10_TMD1 *((volatile unsigned int*)(0x42401190UL))
\r
2176 #define bFM3_MFT0_WFG_WFSA10_TMD2 *((volatile unsigned int*)(0x42401194UL))
\r
2177 #define bFM3_MFT0_WFG_WFSA10_GTEN0 *((volatile unsigned int*)(0x42401198UL))
\r
2178 #define bFM3_MFT0_WFG_WFSA10_GTEN1 *((volatile unsigned int*)(0x4240119CUL))
\r
2179 #define bFM3_MFT0_WFG_WFSA10_PSEL0 *((volatile unsigned int*)(0x424011A0UL))
\r
2180 #define bFM3_MFT0_WFG_WFSA10_PSEL1 *((volatile unsigned int*)(0x424011A4UL))
\r
2181 #define bFM3_MFT0_WFG_WFSA10_PGEN0 *((volatile unsigned int*)(0x424011A8UL))
\r
2182 #define bFM3_MFT0_WFG_WFSA10_PGEN1 *((volatile unsigned int*)(0x424011ACUL))
\r
2183 #define bFM3_MFT0_WFG_WFSA10_DMOD *((volatile unsigned int*)(0x424011B0UL))
\r
2184 #define bFM3_MFT0_WFG_WFSA32_DCK0 *((volatile unsigned int*)(0x42401200UL))
\r
2185 #define bFM3_MFT0_WFG_WFSA32_DCK1 *((volatile unsigned int*)(0x42401204UL))
\r
2186 #define bFM3_MFT0_WFG_WFSA32_DCK2 *((volatile unsigned int*)(0x42401208UL))
\r
2187 #define bFM3_MFT0_WFG_WFSA32_TMD0 *((volatile unsigned int*)(0x4240120CUL))
\r
2188 #define bFM3_MFT0_WFG_WFSA32_TMD1 *((volatile unsigned int*)(0x42401210UL))
\r
2189 #define bFM3_MFT0_WFG_WFSA32_TMD2 *((volatile unsigned int*)(0x42401214UL))
\r
2190 #define bFM3_MFT0_WFG_WFSA32_GTEN0 *((volatile unsigned int*)(0x42401218UL))
\r
2191 #define bFM3_MFT0_WFG_WFSA32_GTEN1 *((volatile unsigned int*)(0x4240121CUL))
\r
2192 #define bFM3_MFT0_WFG_WFSA32_PSEL0 *((volatile unsigned int*)(0x42401220UL))
\r
2193 #define bFM3_MFT0_WFG_WFSA32_PSEL1 *((volatile unsigned int*)(0x42401224UL))
\r
2194 #define bFM3_MFT0_WFG_WFSA32_PGEN0 *((volatile unsigned int*)(0x42401228UL))
\r
2195 #define bFM3_MFT0_WFG_WFSA32_PGEN1 *((volatile unsigned int*)(0x4240122CUL))
\r
2196 #define bFM3_MFT0_WFG_WFSA32_DMOD *((volatile unsigned int*)(0x42401230UL))
\r
2197 #define bFM3_MFT0_WFG_WFSA54_DCK0 *((volatile unsigned int*)(0x42401280UL))
\r
2198 #define bFM3_MFT0_WFG_WFSA54_DCK1 *((volatile unsigned int*)(0x42401284UL))
\r
2199 #define bFM3_MFT0_WFG_WFSA54_DCK2 *((volatile unsigned int*)(0x42401288UL))
\r
2200 #define bFM3_MFT0_WFG_WFSA54_TMD0 *((volatile unsigned int*)(0x4240128CUL))
\r
2201 #define bFM3_MFT0_WFG_WFSA54_TMD1 *((volatile unsigned int*)(0x42401290UL))
\r
2202 #define bFM3_MFT0_WFG_WFSA54_TMD2 *((volatile unsigned int*)(0x42401294UL))
\r
2203 #define bFM3_MFT0_WFG_WFSA54_GTEN0 *((volatile unsigned int*)(0x42401298UL))
\r
2204 #define bFM3_MFT0_WFG_WFSA54_GTEN1 *((volatile unsigned int*)(0x4240129CUL))
\r
2205 #define bFM3_MFT0_WFG_WFSA54_PSEL0 *((volatile unsigned int*)(0x424012A0UL))
\r
2206 #define bFM3_MFT0_WFG_WFSA54_PSEL1 *((volatile unsigned int*)(0x424012A4UL))
\r
2207 #define bFM3_MFT0_WFG_WFSA54_PGEN0 *((volatile unsigned int*)(0x424012A8UL))
\r
2208 #define bFM3_MFT0_WFG_WFSA54_PGEN1 *((volatile unsigned int*)(0x424012ACUL))
\r
2209 #define bFM3_MFT0_WFG_WFSA54_DMOD *((volatile unsigned int*)(0x424012B0UL))
\r
2210 #define bFM3_MFT0_WFG_WFIR_DTIF *((volatile unsigned int*)(0x42401300UL))
\r
2211 #define bFM3_MFT0_WFG_WFIR_DTIC *((volatile unsigned int*)(0x42401304UL))
\r
2212 #define bFM3_MFT0_WFG_WFIR_TMIF10 *((volatile unsigned int*)(0x42401310UL))
\r
2213 #define bFM3_MFT0_WFG_WFIR_TMIC10 *((volatile unsigned int*)(0x42401314UL))
\r
2214 #define bFM3_MFT0_WFG_WFIR_TMIE10 *((volatile unsigned int*)(0x42401318UL))
\r
2215 #define bFM3_MFT0_WFG_WFIR_TMIS10 *((volatile unsigned int*)(0x4240131CUL))
\r
2216 #define bFM3_MFT0_WFG_WFIR_TMIF32 *((volatile unsigned int*)(0x42401320UL))
\r
2217 #define bFM3_MFT0_WFG_WFIR_TMIC32 *((volatile unsigned int*)(0x42401324UL))
\r
2218 #define bFM3_MFT0_WFG_WFIR_TMIE32 *((volatile unsigned int*)(0x42401328UL))
\r
2219 #define bFM3_MFT0_WFG_WFIR_TMIS32 *((volatile unsigned int*)(0x4240132CUL))
\r
2220 #define bFM3_MFT0_WFG_WFIR_TMIF54 *((volatile unsigned int*)(0x42401330UL))
\r
2221 #define bFM3_MFT0_WFG_WFIR_TMIC54 *((volatile unsigned int*)(0x42401334UL))
\r
2222 #define bFM3_MFT0_WFG_WFIR_TMIE54 *((volatile unsigned int*)(0x42401338UL))
\r
2223 #define bFM3_MFT0_WFG_WFIR_TMIS54 *((volatile unsigned int*)(0x4240133CUL))
\r
2224 #define bFM3_MFT0_WFG_NZCL_DTIE *((volatile unsigned int*)(0x42401380UL))
\r
2225 #define bFM3_MFT0_WFG_NZCL_NWS0 *((volatile unsigned int*)(0x42401384UL))
\r
2226 #define bFM3_MFT0_WFG_NZCL_NWS1 *((volatile unsigned int*)(0x42401388UL))
\r
2227 #define bFM3_MFT0_WFG_NZCL_NWS2 *((volatile unsigned int*)(0x4240138CUL))
\r
2228 #define bFM3_MFT0_WFG_NZCL_SDTI *((volatile unsigned int*)(0x42401390UL))
\r
2230 /* Multifunction Timer unit 0 Input Capture Unit registers */
\r
2231 #define bFM3_MFT0_ICU_ICFS10_FSI00 *((volatile unsigned int*)(0x42400C00UL))
\r
2232 #define bFM3_MFT0_ICU_ICFS10_FSI01 *((volatile unsigned int*)(0x42400C04UL))
\r
2233 #define bFM3_MFT0_ICU_ICFS10_FSI02 *((volatile unsigned int*)(0x42400C08UL))
\r
2234 #define bFM3_MFT0_ICU_ICFS10_FSI03 *((volatile unsigned int*)(0x42400C0CUL))
\r
2235 #define bFM3_MFT0_ICU_ICFS10_FSI10 *((volatile unsigned int*)(0x42400C10UL))
\r
2236 #define bFM3_MFT0_ICU_ICFS10_FSI11 *((volatile unsigned int*)(0x42400C14UL))
\r
2237 #define bFM3_MFT0_ICU_ICFS10_FSI12 *((volatile unsigned int*)(0x42400C18UL))
\r
2238 #define bFM3_MFT0_ICU_ICFS10_FSI13 *((volatile unsigned int*)(0x42400C1CUL))
\r
2239 #define bFM3_MFT0_ICU_ICFS32_FSI20 *((volatile unsigned int*)(0x42400C20UL))
\r
2240 #define bFM3_MFT0_ICU_ICFS32_FSI21 *((volatile unsigned int*)(0x42400C24UL))
\r
2241 #define bFM3_MFT0_ICU_ICFS32_FSI22 *((volatile unsigned int*)(0x42400C28UL))
\r
2242 #define bFM3_MFT0_ICU_ICFS32_FSI23 *((volatile unsigned int*)(0x42400C2CUL))
\r
2243 #define bFM3_MFT0_ICU_ICFS32_FSI30 *((volatile unsigned int*)(0x42400C30UL))
\r
2244 #define bFM3_MFT0_ICU_ICFS32_FSI31 *((volatile unsigned int*)(0x42400C34UL))
\r
2245 #define bFM3_MFT0_ICU_ICFS32_FSI32 *((volatile unsigned int*)(0x42400C38UL))
\r
2246 #define bFM3_MFT0_ICU_ICFS32_FSI33 *((volatile unsigned int*)(0x42400C3CUL))
\r
2247 #define bFM3_MFT0_ICU_ICSA10_EG00 *((volatile unsigned int*)(0x42400F00UL))
\r
2248 #define bFM3_MFT0_ICU_ICSA10_EG01 *((volatile unsigned int*)(0x42400F04UL))
\r
2249 #define bFM3_MFT0_ICU_ICSA10_EG10 *((volatile unsigned int*)(0x42400F08UL))
\r
2250 #define bFM3_MFT0_ICU_ICSA10_EG11 *((volatile unsigned int*)(0x42400F0CUL))
\r
2251 #define bFM3_MFT0_ICU_ICSA10_ICE0 *((volatile unsigned int*)(0x42400F10UL))
\r
2252 #define bFM3_MFT0_ICU_ICSA10_ICE1 *((volatile unsigned int*)(0x42400F14UL))
\r
2253 #define bFM3_MFT0_ICU_ICSA10_IPC0 *((volatile unsigned int*)(0x42400F18UL))
\r
2254 #define bFM3_MFT0_ICU_ICSA10_IPC1 *((volatile unsigned int*)(0x42400F1CUL))
\r
2255 #define bFM3_MFT0_ICU_ICSB10_IEI0 *((volatile unsigned int*)(0x42400F20UL))
\r
2256 #define bFM3_MFT0_ICU_ICSB10_IEI1 *((volatile unsigned int*)(0x42400F24UL))
\r
2257 #define bFM3_MFT0_ICU_ICSA32_EG20 *((volatile unsigned int*)(0x42400F80UL))
\r
2258 #define bFM3_MFT0_ICU_ICSA32_EG21 *((volatile unsigned int*)(0x42400F84UL))
\r
2259 #define bFM3_MFT0_ICU_ICSA32_EG30 *((volatile unsigned int*)(0x42400F88UL))
\r
2260 #define bFM3_MFT0_ICU_ICSA32_EG31 *((volatile unsigned int*)(0x42400F8CUL))
\r
2261 #define bFM3_MFT0_ICU_ICSA32_ICE2 *((volatile unsigned int*)(0x42400F90UL))
\r
2262 #define bFM3_MFT0_ICU_ICSA32_ICE3 *((volatile unsigned int*)(0x42400F94UL))
\r
2263 #define bFM3_MFT0_ICU_ICSA32_IPC2 *((volatile unsigned int*)(0x42400F98UL))
\r
2264 #define bFM3_MFT0_ICU_ICSA32_IPC3 *((volatile unsigned int*)(0x42400F9CUL))
\r
2265 #define bFM3_MFT0_ICU_ICSB32_IEI2 *((volatile unsigned int*)(0x42400FA0UL))
\r
2266 #define bFM3_MFT0_ICU_ICSB32_IEI3 *((volatile unsigned int*)(0x42400FA4UL))
\r
2268 /* Multifunction Timer unit 0 ADC Start Compare Unit registers */
\r
2269 #define bFM3_MFT0_ADCMP_ACSB_BDIS0 *((volatile unsigned int*)(0x42401700UL))
\r
2270 #define bFM3_MFT0_ADCMP_ACSB_BDIS1 *((volatile unsigned int*)(0x42401704UL))
\r
2271 #define bFM3_MFT0_ADCMP_ACSB_BDIS2 *((volatile unsigned int*)(0x42401708UL))
\r
2272 #define bFM3_MFT0_ADCMP_ACSB_BTS0 *((volatile unsigned int*)(0x42401710UL))
\r
2273 #define bFM3_MFT0_ADCMP_ACSB_BTS1 *((volatile unsigned int*)(0x42401714UL))
\r
2274 #define bFM3_MFT0_ADCMP_ACSB_BTS2 *((volatile unsigned int*)(0x42401718UL))
\r
2275 #define bFM3_MFT0_ADCMP_ACSA_CE00 *((volatile unsigned int*)(0x42401780UL))
\r
2276 #define bFM3_MFT0_ADCMP_ACSA_CE01 *((volatile unsigned int*)(0x42401784UL))
\r
2277 #define bFM3_MFT0_ADCMP_ACSA_CE10 *((volatile unsigned int*)(0x42401788UL))
\r
2278 #define bFM3_MFT0_ADCMP_ACSA_CE11 *((volatile unsigned int*)(0x4240178CUL))
\r
2279 #define bFM3_MFT0_ADCMP_ACSA_CE20 *((volatile unsigned int*)(0x42401790UL))
\r
2280 #define bFM3_MFT0_ADCMP_ACSA_CE21 *((volatile unsigned int*)(0x42401794UL))
\r
2281 #define bFM3_MFT0_ADCMP_ACSA_SEL00 *((volatile unsigned int*)(0x424017A0UL))
\r
2282 #define bFM3_MFT0_ADCMP_ACSA_SEL01 *((volatile unsigned int*)(0x424017A4UL))
\r
2283 #define bFM3_MFT0_ADCMP_ACSA_SEL10 *((volatile unsigned int*)(0x424017A8UL))
\r
2284 #define bFM3_MFT0_ADCMP_ACSA_SEL11 *((volatile unsigned int*)(0x424017ACUL))
\r
2285 #define bFM3_MFT0_ADCMP_ACSA_SEL20 *((volatile unsigned int*)(0x424017B0UL))
\r
2286 #define bFM3_MFT0_ADCMP_ACSA_SEL21 *((volatile unsigned int*)(0x424017B4UL))
\r
2287 #define bFM3_MFT0_ADCMP_ATSA_AD0S0 *((volatile unsigned int*)(0x42401800UL))
\r
2288 #define bFM3_MFT0_ADCMP_ATSA_AD0S1 *((volatile unsigned int*)(0x42401804UL))
\r
2289 #define bFM3_MFT0_ADCMP_ATSA_AD1S0 *((volatile unsigned int*)(0x42401808UL))
\r
2290 #define bFM3_MFT0_ADCMP_ATSA_AD1S1 *((volatile unsigned int*)(0x4240180CUL))
\r
2291 #define bFM3_MFT0_ADCMP_ATSA_AD2S0 *((volatile unsigned int*)(0x42401810UL))
\r
2292 #define bFM3_MFT0_ADCMP_ATSA_AD2S1 *((volatile unsigned int*)(0x42401814UL))
\r
2293 #define bFM3_MFT0_ADCMP_ATSA_AD0P0 *((volatile unsigned int*)(0x42401820UL))
\r
2294 #define bFM3_MFT0_ADCMP_ATSA_AD0P1 *((volatile unsigned int*)(0x42401824UL))
\r
2295 #define bFM3_MFT0_ADCMP_ATSA_AD1P0 *((volatile unsigned int*)(0x42401828UL))
\r
2296 #define bFM3_MFT0_ADCMP_ATSA_AD1P1 *((volatile unsigned int*)(0x4240182CUL))
\r
2297 #define bFM3_MFT0_ADCMP_ATSA_AD2P0 *((volatile unsigned int*)(0x42401830UL))
\r
2298 #define bFM3_MFT0_ADCMP_ATSA_AD2P1 *((volatile unsigned int*)(0x42401834UL))
\r
2300 /* Multifunction Timer unit 1 Free Running Timer registers */
\r
2301 #define bFM3_MFT1_FRT_TCSA0_CLK0 *((volatile unsigned int*)(0x42420600UL))
\r
2302 #define bFM3_MFT1_FRT_TCSA0_CLK1 *((volatile unsigned int*)(0x42420604UL))
\r
2303 #define bFM3_MFT1_FRT_TCSA0_CLK2 *((volatile unsigned int*)(0x42420608UL))
\r
2304 #define bFM3_MFT1_FRT_TCSA0_CLK3 *((volatile unsigned int*)(0x4242060CUL))
\r
2305 #define bFM3_MFT1_FRT_TCSA0_SCLR *((volatile unsigned int*)(0x42420610UL))
\r
2306 #define bFM3_MFT1_FRT_TCSA0_MODE *((volatile unsigned int*)(0x42420614UL))
\r
2307 #define bFM3_MFT1_FRT_TCSA0_STOP *((volatile unsigned int*)(0x42420618UL))
\r
2308 #define bFM3_MFT1_FRT_TCSA0_BFE *((volatile unsigned int*)(0x4242061CUL))
\r
2309 #define bFM3_MFT1_FRT_TCSA0_ICRE *((volatile unsigned int*)(0x42420620UL))
\r
2310 #define bFM3_MFT1_FRT_TCSA0_ICLR *((volatile unsigned int*)(0x42420624UL))
\r
2311 #define bFM3_MFT1_FRT_TCSA0_IRQZE *((volatile unsigned int*)(0x42420634UL))
\r
2312 #define bFM3_MFT1_FRT_TCSA0_IRQZF *((volatile unsigned int*)(0x42420638UL))
\r
2313 #define bFM3_MFT1_FRT_TCSA0_ECKE *((volatile unsigned int*)(0x4242063CUL))
\r
2314 #define bFM3_MFT1_FRT_TCSB0_AD0E *((volatile unsigned int*)(0x42420680UL))
\r
2315 #define bFM3_MFT1_FRT_TCSB0_AD1E *((volatile unsigned int*)(0x42420684UL))
\r
2316 #define bFM3_MFT1_FRT_TCSB0_AD2E *((volatile unsigned int*)(0x42420688UL))
\r
2317 #define bFM3_MFT1_FRT_TCSA1_CLK0 *((volatile unsigned int*)(0x42420800UL))
\r
2318 #define bFM3_MFT1_FRT_TCSA1_CLK1 *((volatile unsigned int*)(0x42420804UL))
\r
2319 #define bFM3_MFT1_FRT_TCSA1_CLK2 *((volatile unsigned int*)(0x42420808UL))
\r
2320 #define bFM3_MFT1_FRT_TCSA1_CLK3 *((volatile unsigned int*)(0x4242080CUL))
\r
2321 #define bFM3_MFT1_FRT_TCSA1_SCLR *((volatile unsigned int*)(0x42420810UL))
\r
2322 #define bFM3_MFT1_FRT_TCSA1_MODE *((volatile unsigned int*)(0x42420814UL))
\r
2323 #define bFM3_MFT1_FRT_TCSA1_STOP *((volatile unsigned int*)(0x42420818UL))
\r
2324 #define bFM3_MFT1_FRT_TCSA1_BFE *((volatile unsigned int*)(0x4242081CUL))
\r
2325 #define bFM3_MFT1_FRT_TCSA1_ICRE *((volatile unsigned int*)(0x42420820UL))
\r
2326 #define bFM3_MFT1_FRT_TCSA1_ICLR *((volatile unsigned int*)(0x42420824UL))
\r
2327 #define bFM3_MFT1_FRT_TCSA1_IRQZE *((volatile unsigned int*)(0x42420834UL))
\r
2328 #define bFM3_MFT1_FRT_TCSA1_IRQZF *((volatile unsigned int*)(0x42420838UL))
\r
2329 #define bFM3_MFT1_FRT_TCSA1_ECKE *((volatile unsigned int*)(0x4242083CUL))
\r
2330 #define bFM3_MFT1_FRT_TCSB1_AD0E *((volatile unsigned int*)(0x42420880UL))
\r
2331 #define bFM3_MFT1_FRT_TCSB1_AD1E *((volatile unsigned int*)(0x42420884UL))
\r
2332 #define bFM3_MFT1_FRT_TCSB1_AD2E *((volatile unsigned int*)(0x42420888UL))
\r
2333 #define bFM3_MFT1_FRT_TCSA2_CLK0 *((volatile unsigned int*)(0x42420A00UL))
\r
2334 #define bFM3_MFT1_FRT_TCSA2_CLK1 *((volatile unsigned int*)(0x42420A04UL))
\r
2335 #define bFM3_MFT1_FRT_TCSA2_CLK2 *((volatile unsigned int*)(0x42420A08UL))
\r
2336 #define bFM3_MFT1_FRT_TCSA2_CLK3 *((volatile unsigned int*)(0x42420A0CUL))
\r
2337 #define bFM3_MFT1_FRT_TCSA2_SCLR *((volatile unsigned int*)(0x42420A10UL))
\r
2338 #define bFM3_MFT1_FRT_TCSA2_MODE *((volatile unsigned int*)(0x42420A14UL))
\r
2339 #define bFM3_MFT1_FRT_TCSA2_STOP *((volatile unsigned int*)(0x42420A18UL))
\r
2340 #define bFM3_MFT1_FRT_TCSA2_BFE *((volatile unsigned int*)(0x42420A1CUL))
\r
2341 #define bFM3_MFT1_FRT_TCSA2_ICRE *((volatile unsigned int*)(0x42420A20UL))
\r
2342 #define bFM3_MFT1_FRT_TCSA2_ICLR *((volatile unsigned int*)(0x42420A24UL))
\r
2343 #define bFM3_MFT1_FRT_TCSA2_IRQZE *((volatile unsigned int*)(0x42420A34UL))
\r
2344 #define bFM3_MFT1_FRT_TCSA2_IRQZF *((volatile unsigned int*)(0x42420A38UL))
\r
2345 #define bFM3_MFT1_FRT_TCSA2_ECKE *((volatile unsigned int*)(0x42420A3CUL))
\r
2346 #define bFM3_MFT1_FRT_TCSB2_AD0E *((volatile unsigned int*)(0x42420A80UL))
\r
2347 #define bFM3_MFT1_FRT_TCSB2_AD1E *((volatile unsigned int*)(0x42420A84UL))
\r
2348 #define bFM3_MFT1_FRT_TCSB2_AD2E *((volatile unsigned int*)(0x42420A88UL))
\r
2350 /* Multifunction Timer unit 1 Output Compare Unit registers */
\r
2351 #define bFM3_MFT1_OCU_OCSA10_CST0 *((volatile unsigned int*)(0x42420300UL))
\r
2352 #define bFM3_MFT1_OCU_OCSA10_CST1 *((volatile unsigned int*)(0x42420304UL))
\r
2353 #define bFM3_MFT1_OCU_OCSA10_BDIS0 *((volatile unsigned int*)(0x42420308UL))
\r
2354 #define bFM3_MFT1_OCU_OCSA10_BDIS1 *((volatile unsigned int*)(0x4242030CUL))
\r
2355 #define bFM3_MFT1_OCU_OCSA10_IOE0 *((volatile unsigned int*)(0x42420310UL))
\r
2356 #define bFM3_MFT1_OCU_OCSA10_IOE1 *((volatile unsigned int*)(0x42420314UL))
\r
2357 #define bFM3_MFT1_OCU_OCSA10_IOP0 *((volatile unsigned int*)(0x42420318UL))
\r
2358 #define bFM3_MFT1_OCU_OCSA10_IOP1 *((volatile unsigned int*)(0x4242031CUL))
\r
2359 #define bFM3_MFT1_OCU_OCSB10_OTD0 *((volatile unsigned int*)(0x42420320UL))
\r
2360 #define bFM3_MFT1_OCU_OCSB10_OTD1 *((volatile unsigned int*)(0x42420324UL))
\r
2361 #define bFM3_MFT1_OCU_OCSB10_CMOD *((volatile unsigned int*)(0x42420330UL))
\r
2362 #define bFM3_MFT1_OCU_OCSB10_BTS0 *((volatile unsigned int*)(0x42420334UL))
\r
2363 #define bFM3_MFT1_OCU_OCSB10_BTS1 *((volatile unsigned int*)(0x42420338UL))
\r
2364 #define bFM3_MFT1_OCU_OCSA32_CST2 *((volatile unsigned int*)(0x42420380UL))
\r
2365 #define bFM3_MFT1_OCU_OCSA32_CST3 *((volatile unsigned int*)(0x42420384UL))
\r
2366 #define bFM3_MFT1_OCU_OCSA32_BDIS2 *((volatile unsigned int*)(0x42420388UL))
\r
2367 #define bFM3_MFT1_OCU_OCSA32_BDIS3 *((volatile unsigned int*)(0x4242038CUL))
\r
2368 #define bFM3_MFT1_OCU_OCSA32_IOE2 *((volatile unsigned int*)(0x42420390UL))
\r
2369 #define bFM3_MFT1_OCU_OCSA32_IOE3 *((volatile unsigned int*)(0x42420394UL))
\r
2370 #define bFM3_MFT1_OCU_OCSA32_IOP2 *((volatile unsigned int*)(0x42420398UL))
\r
2371 #define bFM3_MFT1_OCU_OCSA32_IOP3 *((volatile unsigned int*)(0x4242039CUL))
\r
2372 #define bFM3_MFT1_OCU_OCSB32_OTD2 *((volatile unsigned int*)(0x424203A0UL))
\r
2373 #define bFM3_MFT1_OCU_OCSB32_OTD3 *((volatile unsigned int*)(0x424203A4UL))
\r
2374 #define bFM3_MFT1_OCU_OCSB32_CMOD *((volatile unsigned int*)(0x424203B0UL))
\r
2375 #define bFM3_MFT1_OCU_OCSB32_BTS2 *((volatile unsigned int*)(0x424203B4UL))
\r
2376 #define bFM3_MFT1_OCU_OCSB32_BTS3 *((volatile unsigned int*)(0x424203B8UL))
\r
2377 #define bFM3_MFT1_OCU_OCSA54_CST4 *((volatile unsigned int*)(0x42420400UL))
\r
2378 #define bFM3_MFT1_OCU_OCSA54_CST5 *((volatile unsigned int*)(0x42420404UL))
\r
2379 #define bFM3_MFT1_OCU_OCSA54_BDIS4 *((volatile unsigned int*)(0x42420408UL))
\r
2380 #define bFM3_MFT1_OCU_OCSA54_BDIS5 *((volatile unsigned int*)(0x4242040CUL))
\r
2381 #define bFM3_MFT1_OCU_OCSA54_IOE4 *((volatile unsigned int*)(0x42420410UL))
\r
2382 #define bFM3_MFT1_OCU_OCSA54_IOE5 *((volatile unsigned int*)(0x42420414UL))
\r
2383 #define bFM3_MFT1_OCU_OCSA54_IOP4 *((volatile unsigned int*)(0x42420418UL))
\r
2384 #define bFM3_MFT1_OCU_OCSA54_IOP5 *((volatile unsigned int*)(0x4242041CUL))
\r
2385 #define bFM3_MFT1_OCU_OCSB54_OTD4 *((volatile unsigned int*)(0x42420420UL))
\r
2386 #define bFM3_MFT1_OCU_OCSB54_OTD5 *((volatile unsigned int*)(0x42420424UL))
\r
2387 #define bFM3_MFT1_OCU_OCSB54_CMOD *((volatile unsigned int*)(0x42420430UL))
\r
2388 #define bFM3_MFT1_OCU_OCSB54_BTS4 *((volatile unsigned int*)(0x42420434UL))
\r
2389 #define bFM3_MFT1_OCU_OCSB54_BTS5 *((volatile unsigned int*)(0x42420438UL))
\r
2390 #define bFM3_MFT1_OCU_OCSC_MOD0 *((volatile unsigned int*)(0x424204A0UL))
\r
2391 #define bFM3_MFT1_OCU_OCSC_MOD1 *((volatile unsigned int*)(0x424204A4UL))
\r
2392 #define bFM3_MFT1_OCU_OCSC_MOD2 *((volatile unsigned int*)(0x424204A8UL))
\r
2393 #define bFM3_MFT1_OCU_OCSC_MOD3 *((volatile unsigned int*)(0x424204ACUL))
\r
2394 #define bFM3_MFT1_OCU_OCSC_MOD4 *((volatile unsigned int*)(0x424204B0UL))
\r
2395 #define bFM3_MFT1_OCU_OCSC_MOD5 *((volatile unsigned int*)(0x424204B4UL))
\r
2396 #define bFM3_MFT1_OCU_OCFS10_FSO00 *((volatile unsigned int*)(0x42420B00UL))
\r
2397 #define bFM3_MFT1_OCU_OCFS10_FSO01 *((volatile unsigned int*)(0x42420B04UL))
\r
2398 #define bFM3_MFT1_OCU_OCFS10_FSO02 *((volatile unsigned int*)(0x42420B08UL))
\r
2399 #define bFM3_MFT1_OCU_OCFS10_FSO03 *((volatile unsigned int*)(0x42420B0CUL))
\r
2400 #define bFM3_MFT1_OCU_OCFS10_FSO10 *((volatile unsigned int*)(0x42420B10UL))
\r
2401 #define bFM3_MFT1_OCU_OCFS10_FSO11 *((volatile unsigned int*)(0x42420B14UL))
\r
2402 #define bFM3_MFT1_OCU_OCFS10_FSO12 *((volatile unsigned int*)(0x42420B18UL))
\r
2403 #define bFM3_MFT1_OCU_OCFS10_FSO13 *((volatile unsigned int*)(0x42420B1CUL))
\r
2404 #define bFM3_MFT1_OCU_OCFS32_FSO20 *((volatile unsigned int*)(0x42420B20UL))
\r
2405 #define bFM3_MFT1_OCU_OCFS32_FSO21 *((volatile unsigned int*)(0x42420B24UL))
\r
2406 #define bFM3_MFT1_OCU_OCFS32_FSO22 *((volatile unsigned int*)(0x42420B28UL))
\r
2407 #define bFM3_MFT1_OCU_OCFS32_FSO23 *((volatile unsigned int*)(0x42420B2CUL))
\r
2408 #define bFM3_MFT1_OCU_OCFS32_FSO30 *((volatile unsigned int*)(0x42420B30UL))
\r
2409 #define bFM3_MFT1_OCU_OCFS32_FSO31 *((volatile unsigned int*)(0x42420B34UL))
\r
2410 #define bFM3_MFT1_OCU_OCFS32_FSO32 *((volatile unsigned int*)(0x42420B38UL))
\r
2411 #define bFM3_MFT1_OCU_OCFS32_FSO33 *((volatile unsigned int*)(0x42420B3CUL))
\r
2412 #define bFM3_MFT1_OCU_OCFS54_FSO40 *((volatile unsigned int*)(0x42420B80UL))
\r
2413 #define bFM3_MFT1_OCU_OCFS54_FSO41 *((volatile unsigned int*)(0x42420B84UL))
\r
2414 #define bFM3_MFT1_OCU_OCFS54_FSO42 *((volatile unsigned int*)(0x42420B88UL))
\r
2415 #define bFM3_MFT1_OCU_OCFS54_FSO43 *((volatile unsigned int*)(0x42420B8CUL))
\r
2416 #define bFM3_MFT1_OCU_OCFS54_FSO50 *((volatile unsigned int*)(0x42420B90UL))
\r
2417 #define bFM3_MFT1_OCU_OCFS54_FSO51 *((volatile unsigned int*)(0x42420B94UL))
\r
2418 #define bFM3_MFT1_OCU_OCFS54_FSO52 *((volatile unsigned int*)(0x42420B98UL))
\r
2419 #define bFM3_MFT1_OCU_OCFS54_FSO53 *((volatile unsigned int*)(0x42420B9CUL))
\r
2421 /* Multifunction Timer unit 1 Waveform Generator and Noise Canceler registers */
\r
2422 #define bFM3_MFT1_WFG_WFSA10_DCK0 *((volatile unsigned int*)(0x42421180UL))
\r
2423 #define bFM3_MFT1_WFG_WFSA10_DCK1 *((volatile unsigned int*)(0x42421184UL))
\r
2424 #define bFM3_MFT1_WFG_WFSA10_DCK2 *((volatile unsigned int*)(0x42421188UL))
\r
2425 #define bFM3_MFT1_WFG_WFSA10_TMD0 *((volatile unsigned int*)(0x4242118CUL))
\r
2426 #define bFM3_MFT1_WFG_WFSA10_TMD1 *((volatile unsigned int*)(0x42421190UL))
\r
2427 #define bFM3_MFT1_WFG_WFSA10_TMD2 *((volatile unsigned int*)(0x42421194UL))
\r
2428 #define bFM3_MFT1_WFG_WFSA10_GTEN0 *((volatile unsigned int*)(0x42421198UL))
\r
2429 #define bFM3_MFT1_WFG_WFSA10_GTEN1 *((volatile unsigned int*)(0x4242119CUL))
\r
2430 #define bFM3_MFT1_WFG_WFSA10_PSEL0 *((volatile unsigned int*)(0x424211A0UL))
\r
2431 #define bFM3_MFT1_WFG_WFSA10_PSEL1 *((volatile unsigned int*)(0x424211A4UL))
\r
2432 #define bFM3_MFT1_WFG_WFSA10_PGEN0 *((volatile unsigned int*)(0x424211A8UL))
\r
2433 #define bFM3_MFT1_WFG_WFSA10_PGEN1 *((volatile unsigned int*)(0x424211ACUL))
\r
2434 #define bFM3_MFT1_WFG_WFSA10_DMOD *((volatile unsigned int*)(0x424211B0UL))
\r
2435 #define bFM3_MFT1_WFG_WFSA32_DCK0 *((volatile unsigned int*)(0x42421200UL))
\r
2436 #define bFM3_MFT1_WFG_WFSA32_DCK1 *((volatile unsigned int*)(0x42421204UL))
\r
2437 #define bFM3_MFT1_WFG_WFSA32_DCK2 *((volatile unsigned int*)(0x42421208UL))
\r
2438 #define bFM3_MFT1_WFG_WFSA32_TMD0 *((volatile unsigned int*)(0x4242120CUL))
\r
2439 #define bFM3_MFT1_WFG_WFSA32_TMD1 *((volatile unsigned int*)(0x42421210UL))
\r
2440 #define bFM3_MFT1_WFG_WFSA32_TMD2 *((volatile unsigned int*)(0x42421214UL))
\r
2441 #define bFM3_MFT1_WFG_WFSA32_GTEN0 *((volatile unsigned int*)(0x42421218UL))
\r
2442 #define bFM3_MFT1_WFG_WFSA32_GTEN1 *((volatile unsigned int*)(0x4242121CUL))
\r
2443 #define bFM3_MFT1_WFG_WFSA32_PSEL0 *((volatile unsigned int*)(0x42421220UL))
\r
2444 #define bFM3_MFT1_WFG_WFSA32_PSEL1 *((volatile unsigned int*)(0x42421224UL))
\r
2445 #define bFM3_MFT1_WFG_WFSA32_PGEN0 *((volatile unsigned int*)(0x42421228UL))
\r
2446 #define bFM3_MFT1_WFG_WFSA32_PGEN1 *((volatile unsigned int*)(0x4242122CUL))
\r
2447 #define bFM3_MFT1_WFG_WFSA32_DMOD *((volatile unsigned int*)(0x42421230UL))
\r
2448 #define bFM3_MFT1_WFG_WFSA54_DCK0 *((volatile unsigned int*)(0x42421280UL))
\r
2449 #define bFM3_MFT1_WFG_WFSA54_DCK1 *((volatile unsigned int*)(0x42421284UL))
\r
2450 #define bFM3_MFT1_WFG_WFSA54_DCK2 *((volatile unsigned int*)(0x42421288UL))
\r
2451 #define bFM3_MFT1_WFG_WFSA54_TMD0 *((volatile unsigned int*)(0x4242128CUL))
\r
2452 #define bFM3_MFT1_WFG_WFSA54_TMD1 *((volatile unsigned int*)(0x42421290UL))
\r
2453 #define bFM3_MFT1_WFG_WFSA54_TMD2 *((volatile unsigned int*)(0x42421294UL))
\r
2454 #define bFM3_MFT1_WFG_WFSA54_GTEN0 *((volatile unsigned int*)(0x42421298UL))
\r
2455 #define bFM3_MFT1_WFG_WFSA54_GTEN1 *((volatile unsigned int*)(0x4242129CUL))
\r
2456 #define bFM3_MFT1_WFG_WFSA54_PSEL0 *((volatile unsigned int*)(0x424212A0UL))
\r
2457 #define bFM3_MFT1_WFG_WFSA54_PSEL1 *((volatile unsigned int*)(0x424212A4UL))
\r
2458 #define bFM3_MFT1_WFG_WFSA54_PGEN0 *((volatile unsigned int*)(0x424212A8UL))
\r
2459 #define bFM3_MFT1_WFG_WFSA54_PGEN1 *((volatile unsigned int*)(0x424212ACUL))
\r
2460 #define bFM3_MFT1_WFG_WFSA54_DMOD *((volatile unsigned int*)(0x424212B0UL))
\r
2461 #define bFM3_MFT1_WFG_WFIR_DTIF *((volatile unsigned int*)(0x42421300UL))
\r
2462 #define bFM3_MFT1_WFG_WFIR_DTIC *((volatile unsigned int*)(0x42421304UL))
\r
2463 #define bFM3_MFT1_WFG_WFIR_TMIF10 *((volatile unsigned int*)(0x42421310UL))
\r
2464 #define bFM3_MFT1_WFG_WFIR_TMIC10 *((volatile unsigned int*)(0x42421314UL))
\r
2465 #define bFM3_MFT1_WFG_WFIR_TMIE10 *((volatile unsigned int*)(0x42421318UL))
\r
2466 #define bFM3_MFT1_WFG_WFIR_TMIS10 *((volatile unsigned int*)(0x4242131CUL))
\r
2467 #define bFM3_MFT1_WFG_WFIR_TMIF32 *((volatile unsigned int*)(0x42421320UL))
\r
2468 #define bFM3_MFT1_WFG_WFIR_TMIC32 *((volatile unsigned int*)(0x42421324UL))
\r
2469 #define bFM3_MFT1_WFG_WFIR_TMIE32 *((volatile unsigned int*)(0x42421328UL))
\r
2470 #define bFM3_MFT1_WFG_WFIR_TMIS32 *((volatile unsigned int*)(0x4242132CUL))
\r
2471 #define bFM3_MFT1_WFG_WFIR_TMIF54 *((volatile unsigned int*)(0x42421330UL))
\r
2472 #define bFM3_MFT1_WFG_WFIR_TMIC54 *((volatile unsigned int*)(0x42421334UL))
\r
2473 #define bFM3_MFT1_WFG_WFIR_TMIE54 *((volatile unsigned int*)(0x42421338UL))
\r
2474 #define bFM3_MFT1_WFG_WFIR_TMIS54 *((volatile unsigned int*)(0x4242133CUL))
\r
2475 #define bFM3_MFT1_WFG_NZCL_DTIE *((volatile unsigned int*)(0x42421380UL))
\r
2476 #define bFM3_MFT1_WFG_NZCL_NWS0 *((volatile unsigned int*)(0x42421384UL))
\r
2477 #define bFM3_MFT1_WFG_NZCL_NWS1 *((volatile unsigned int*)(0x42421388UL))
\r
2478 #define bFM3_MFT1_WFG_NZCL_NWS2 *((volatile unsigned int*)(0x4242138CUL))
\r
2479 #define bFM3_MFT1_WFG_NZCL_SDTI *((volatile unsigned int*)(0x42421390UL))
\r
2481 /* Multifunction Timer unit 1 Input Capture Unit registers */
\r
2482 #define bFM3_MFT1_ICU_ICFS10_FSI00 *((volatile unsigned int*)(0x42420C00UL))
\r
2483 #define bFM3_MFT1_ICU_ICFS10_FSI01 *((volatile unsigned int*)(0x42420C04UL))
\r
2484 #define bFM3_MFT1_ICU_ICFS10_FSI02 *((volatile unsigned int*)(0x42420C08UL))
\r
2485 #define bFM3_MFT1_ICU_ICFS10_FSI03 *((volatile unsigned int*)(0x42420C0CUL))
\r
2486 #define bFM3_MFT1_ICU_ICFS10_FSI10 *((volatile unsigned int*)(0x42420C10UL))
\r
2487 #define bFM3_MFT1_ICU_ICFS10_FSI11 *((volatile unsigned int*)(0x42420C14UL))
\r
2488 #define bFM3_MFT1_ICU_ICFS10_FSI12 *((volatile unsigned int*)(0x42420C18UL))
\r
2489 #define bFM3_MFT1_ICU_ICFS10_FSI13 *((volatile unsigned int*)(0x42420C1CUL))
\r
2490 #define bFM3_MFT1_ICU_ICFS32_FSI20 *((volatile unsigned int*)(0x42420C20UL))
\r
2491 #define bFM3_MFT1_ICU_ICFS32_FSI21 *((volatile unsigned int*)(0x42420C24UL))
\r
2492 #define bFM3_MFT1_ICU_ICFS32_FSI22 *((volatile unsigned int*)(0x42420C28UL))
\r
2493 #define bFM3_MFT1_ICU_ICFS32_FSI23 *((volatile unsigned int*)(0x42420C2CUL))
\r
2494 #define bFM3_MFT1_ICU_ICFS32_FSI30 *((volatile unsigned int*)(0x42420C30UL))
\r
2495 #define bFM3_MFT1_ICU_ICFS32_FSI31 *((volatile unsigned int*)(0x42420C34UL))
\r
2496 #define bFM3_MFT1_ICU_ICFS32_FSI32 *((volatile unsigned int*)(0x42420C38UL))
\r
2497 #define bFM3_MFT1_ICU_ICFS32_FSI33 *((volatile unsigned int*)(0x42420C3CUL))
\r
2498 #define bFM3_MFT1_ICU_ICSA10_EG00 *((volatile unsigned int*)(0x42420F00UL))
\r
2499 #define bFM3_MFT1_ICU_ICSA10_EG01 *((volatile unsigned int*)(0x42420F04UL))
\r
2500 #define bFM3_MFT1_ICU_ICSA10_EG10 *((volatile unsigned int*)(0x42420F08UL))
\r
2501 #define bFM3_MFT1_ICU_ICSA10_EG11 *((volatile unsigned int*)(0x42420F0CUL))
\r
2502 #define bFM3_MFT1_ICU_ICSA10_ICE0 *((volatile unsigned int*)(0x42420F10UL))
\r
2503 #define bFM3_MFT1_ICU_ICSA10_ICE1 *((volatile unsigned int*)(0x42420F14UL))
\r
2504 #define bFM3_MFT1_ICU_ICSA10_IPC0 *((volatile unsigned int*)(0x42420F18UL))
\r
2505 #define bFM3_MFT1_ICU_ICSA10_IPC1 *((volatile unsigned int*)(0x42420F1CUL))
\r
2506 #define bFM3_MFT1_ICU_ICSB10_IEI0 *((volatile unsigned int*)(0x42420F20UL))
\r
2507 #define bFM3_MFT1_ICU_ICSB10_IEI1 *((volatile unsigned int*)(0x42420F24UL))
\r
2508 #define bFM3_MFT1_ICU_ICSA32_EG20 *((volatile unsigned int*)(0x42420F80UL))
\r
2509 #define bFM3_MFT1_ICU_ICSA32_EG21 *((volatile unsigned int*)(0x42420F84UL))
\r
2510 #define bFM3_MFT1_ICU_ICSA32_EG30 *((volatile unsigned int*)(0x42420F88UL))
\r
2511 #define bFM3_MFT1_ICU_ICSA32_EG31 *((volatile unsigned int*)(0x42420F8CUL))
\r
2512 #define bFM3_MFT1_ICU_ICSA32_ICE2 *((volatile unsigned int*)(0x42420F90UL))
\r
2513 #define bFM3_MFT1_ICU_ICSA32_ICE3 *((volatile unsigned int*)(0x42420F94UL))
\r
2514 #define bFM3_MFT1_ICU_ICSA32_IPC2 *((volatile unsigned int*)(0x42420F98UL))
\r
2515 #define bFM3_MFT1_ICU_ICSA32_IPC3 *((volatile unsigned int*)(0x42420F9CUL))
\r
2516 #define bFM3_MFT1_ICU_ICSB32_IEI2 *((volatile unsigned int*)(0x42420FA0UL))
\r
2517 #define bFM3_MFT1_ICU_ICSB32_IEI3 *((volatile unsigned int*)(0x42420FA4UL))
\r
2519 /* Multifunction Timer unit 1 ADC Start Compare Unit registers */
\r
2520 #define bFM3_MFT1_ADCMP_ACSB_BDIS0 *((volatile unsigned int*)(0x42421700UL))
\r
2521 #define bFM3_MFT1_ADCMP_ACSB_BDIS1 *((volatile unsigned int*)(0x42421704UL))
\r
2522 #define bFM3_MFT1_ADCMP_ACSB_BDIS2 *((volatile unsigned int*)(0x42421708UL))
\r
2523 #define bFM3_MFT1_ADCMP_ACSB_BTS0 *((volatile unsigned int*)(0x42421710UL))
\r
2524 #define bFM3_MFT1_ADCMP_ACSB_BTS1 *((volatile unsigned int*)(0x42421714UL))
\r
2525 #define bFM3_MFT1_ADCMP_ACSB_BTS2 *((volatile unsigned int*)(0x42421718UL))
\r
2526 #define bFM3_MFT1_ADCMP_ACSA_CE00 *((volatile unsigned int*)(0x42421780UL))
\r
2527 #define bFM3_MFT1_ADCMP_ACSA_CE01 *((volatile unsigned int*)(0x42421784UL))
\r
2528 #define bFM3_MFT1_ADCMP_ACSA_CE10 *((volatile unsigned int*)(0x42421788UL))
\r
2529 #define bFM3_MFT1_ADCMP_ACSA_CE11 *((volatile unsigned int*)(0x4242178CUL))
\r
2530 #define bFM3_MFT1_ADCMP_ACSA_CE20 *((volatile unsigned int*)(0x42421790UL))
\r
2531 #define bFM3_MFT1_ADCMP_ACSA_CE21 *((volatile unsigned int*)(0x42421794UL))
\r
2532 #define bFM3_MFT1_ADCMP_ACSA_SEL00 *((volatile unsigned int*)(0x424217A0UL))
\r
2533 #define bFM3_MFT1_ADCMP_ACSA_SEL01 *((volatile unsigned int*)(0x424217A4UL))
\r
2534 #define bFM3_MFT1_ADCMP_ACSA_SEL10 *((volatile unsigned int*)(0x424217A8UL))
\r
2535 #define bFM3_MFT1_ADCMP_ACSA_SEL11 *((volatile unsigned int*)(0x424217ACUL))
\r
2536 #define bFM3_MFT1_ADCMP_ACSA_SEL20 *((volatile unsigned int*)(0x424217B0UL))
\r
2537 #define bFM3_MFT1_ADCMP_ACSA_SEL21 *((volatile unsigned int*)(0x424217B4UL))
\r
2538 #define bFM3_MFT1_ADCMP_ATSA_AD0S0 *((volatile unsigned int*)(0x42421800UL))
\r
2539 #define bFM3_MFT1_ADCMP_ATSA_AD0S1 *((volatile unsigned int*)(0x42421804UL))
\r
2540 #define bFM3_MFT1_ADCMP_ATSA_AD1S0 *((volatile unsigned int*)(0x42421808UL))
\r
2541 #define bFM3_MFT1_ADCMP_ATSA_AD1S1 *((volatile unsigned int*)(0x4242180CUL))
\r
2542 #define bFM3_MFT1_ADCMP_ATSA_AD2S0 *((volatile unsigned int*)(0x42421810UL))
\r
2543 #define bFM3_MFT1_ADCMP_ATSA_AD2S1 *((volatile unsigned int*)(0x42421814UL))
\r
2544 #define bFM3_MFT1_ADCMP_ATSA_AD0P0 *((volatile unsigned int*)(0x42421820UL))
\r
2545 #define bFM3_MFT1_ADCMP_ATSA_AD0P1 *((volatile unsigned int*)(0x42421824UL))
\r
2546 #define bFM3_MFT1_ADCMP_ATSA_AD1P0 *((volatile unsigned int*)(0x42421828UL))
\r
2547 #define bFM3_MFT1_ADCMP_ATSA_AD1P1 *((volatile unsigned int*)(0x4242182CUL))
\r
2548 #define bFM3_MFT1_ADCMP_ATSA_AD2P0 *((volatile unsigned int*)(0x42421830UL))
\r
2549 #define bFM3_MFT1_ADCMP_ATSA_AD2P1 *((volatile unsigned int*)(0x42421834UL))
\r
2551 /* Multifunction Timer PPG registers */
\r
2552 #define bFM3_MFT_PPG_TTCR0_STR0 *((volatile unsigned int*)(0x42480020UL))
\r
2553 #define bFM3_MFT_PPG_TTCR0_MONI0 *((volatile unsigned int*)(0x42480024UL))
\r
2554 #define bFM3_MFT_PPG_TTCR0_CS00 *((volatile unsigned int*)(0x42480028UL))
\r
2555 #define bFM3_MFT_PPG_TTCR0_CS01 *((volatile unsigned int*)(0x4248002CUL))
\r
2556 #define bFM3_MFT_PPG_TTCR0_TRG0O *((volatile unsigned int*)(0x42480030UL))
\r
2557 #define bFM3_MFT_PPG_TTCR0_TRG2O *((volatile unsigned int*)(0x42480034UL))
\r
2558 #define bFM3_MFT_PPG_TTCR0_TRG4O *((volatile unsigned int*)(0x42480038UL))
\r
2559 #define bFM3_MFT_PPG_TTCR0_TRG6O *((volatile unsigned int*)(0x4248003CUL))
\r
2560 #define bFM3_MFT_PPG_TTCR1_STR1 *((volatile unsigned int*)(0x42480420UL))
\r
2561 #define bFM3_MFT_PPG_TTCR1_MONI1 *((volatile unsigned int*)(0x42480424UL))
\r
2562 #define bFM3_MFT_PPG_TTCR1_CS10 *((volatile unsigned int*)(0x42480428UL))
\r
2563 #define bFM3_MFT_PPG_TTCR1_CS11 *((volatile unsigned int*)(0x4248042CUL))
\r
2564 #define bFM3_MFT_PPG_TTCR1_TRG1O *((volatile unsigned int*)(0x42480430UL))
\r
2565 #define bFM3_MFT_PPG_TTCR1_TRG3O *((volatile unsigned int*)(0x42480434UL))
\r
2566 #define bFM3_MFT_PPG_TTCR1_TRG5O *((volatile unsigned int*)(0x42480438UL))
\r
2567 #define bFM3_MFT_PPG_TTCR1_TRG7O *((volatile unsigned int*)(0x4248043CUL))
\r
2568 #define bFM3_MFT_PPG_TRG_PEN00 *((volatile unsigned int*)(0x42482000UL))
\r
2569 #define bFM3_MFT_PPG_TRG_PEN01 *((volatile unsigned int*)(0x42482004UL))
\r
2570 #define bFM3_MFT_PPG_TRG_PEN02 *((volatile unsigned int*)(0x42482008UL))
\r
2571 #define bFM3_MFT_PPG_TRG_PEN03 *((volatile unsigned int*)(0x4248200CUL))
\r
2572 #define bFM3_MFT_PPG_TRG_PEN04 *((volatile unsigned int*)(0x42482010UL))
\r
2573 #define bFM3_MFT_PPG_TRG_PEN05 *((volatile unsigned int*)(0x42482014UL))
\r
2574 #define bFM3_MFT_PPG_TRG_PEN06 *((volatile unsigned int*)(0x42482018UL))
\r
2575 #define bFM3_MFT_PPG_TRG_PEN07 *((volatile unsigned int*)(0x4248201CUL))
\r
2576 #define bFM3_MFT_PPG_TRG_PEN08 *((volatile unsigned int*)(0x42482020UL))
\r
2577 #define bFM3_MFT_PPG_TRG_PEN09 *((volatile unsigned int*)(0x42482024UL))
\r
2578 #define bFM3_MFT_PPG_TRG_PEN10 *((volatile unsigned int*)(0x42482028UL))
\r
2579 #define bFM3_MFT_PPG_TRG_PEN11 *((volatile unsigned int*)(0x4248202CUL))
\r
2580 #define bFM3_MFT_PPG_TRG_PEN12 *((volatile unsigned int*)(0x42482030UL))
\r
2581 #define bFM3_MFT_PPG_TRG_PEN13 *((volatile unsigned int*)(0x42482034UL))
\r
2582 #define bFM3_MFT_PPG_TRG_PEN14 *((volatile unsigned int*)(0x42482038UL))
\r
2583 #define bFM3_MFT_PPG_TRG_PEN15 *((volatile unsigned int*)(0x4248203CUL))
\r
2584 #define bFM3_MFT_PPG_REVC_REV00 *((volatile unsigned int*)(0x42482080UL))
\r
2585 #define bFM3_MFT_PPG_REVC_REV01 *((volatile unsigned int*)(0x42482084UL))
\r
2586 #define bFM3_MFT_PPG_REVC_REV02 *((volatile unsigned int*)(0x42482088UL))
\r
2587 #define bFM3_MFT_PPG_REVC_REV03 *((volatile unsigned int*)(0x4248208CUL))
\r
2588 #define bFM3_MFT_PPG_REVC_REV04 *((volatile unsigned int*)(0x42482090UL))
\r
2589 #define bFM3_MFT_PPG_REVC_REV05 *((volatile unsigned int*)(0x42482094UL))
\r
2590 #define bFM3_MFT_PPG_REVC_REV06 *((volatile unsigned int*)(0x42482098UL))
\r
2591 #define bFM3_MFT_PPG_REVC_REV07 *((volatile unsigned int*)(0x4248209CUL))
\r
2592 #define bFM3_MFT_PPG_REVC_REV08 *((volatile unsigned int*)(0x424820A0UL))
\r
2593 #define bFM3_MFT_PPG_REVC_REV09 *((volatile unsigned int*)(0x424820A4UL))
\r
2594 #define bFM3_MFT_PPG_REVC_REV10 *((volatile unsigned int*)(0x424820A8UL))
\r
2595 #define bFM3_MFT_PPG_REVC_REV11 *((volatile unsigned int*)(0x424820ACUL))
\r
2596 #define bFM3_MFT_PPG_REVC_REV12 *((volatile unsigned int*)(0x424820B0UL))
\r
2597 #define bFM3_MFT_PPG_REVC_REV13 *((volatile unsigned int*)(0x424820B4UL))
\r
2598 #define bFM3_MFT_PPG_REVC_REV14 *((volatile unsigned int*)(0x424820B8UL))
\r
2599 #define bFM3_MFT_PPG_REVC_REV15 *((volatile unsigned int*)(0x424820BCUL))
\r
2600 #define bFM3_MFT_PPG_PPGC1_TTRG *((volatile unsigned int*)(0x42484000UL))
\r
2601 #define bFM3_MFT_PPG_PPGC1_MD0 *((volatile unsigned int*)(0x42484004UL))
\r
2602 #define bFM3_MFT_PPG_PPGC1_MD1 *((volatile unsigned int*)(0x42484008UL))
\r
2603 #define bFM3_MFT_PPG_PPGC1_PCS0 *((volatile unsigned int*)(0x4248400CUL))
\r
2604 #define bFM3_MFT_PPG_PPGC1_PCS1 *((volatile unsigned int*)(0x42484010UL))
\r
2605 #define bFM3_MFT_PPG_PPGC1_INTM *((volatile unsigned int*)(0x42484014UL))
\r
2606 #define bFM3_MFT_PPG_PPGC1_PUF *((volatile unsigned int*)(0x42484018UL))
\r
2607 #define bFM3_MFT_PPG_PPGC1_PIE *((volatile unsigned int*)(0x4248401CUL))
\r
2608 #define bFM3_MFT_PPG_PPGC0_TTRG *((volatile unsigned int*)(0x42484020UL))
\r
2609 #define bFM3_MFT_PPG_PPGC0_MD0 *((volatile unsigned int*)(0x42484024UL))
\r
2610 #define bFM3_MFT_PPG_PPGC0_MD1 *((volatile unsigned int*)(0x42484028UL))
\r
2611 #define bFM3_MFT_PPG_PPGC0_PCS0 *((volatile unsigned int*)(0x4248402CUL))
\r
2612 #define bFM3_MFT_PPG_PPGC0_PCS1 *((volatile unsigned int*)(0x42484030UL))
\r
2613 #define bFM3_MFT_PPG_PPGC0_INTM *((volatile unsigned int*)(0x42484034UL))
\r
2614 #define bFM3_MFT_PPG_PPGC0_PUF *((volatile unsigned int*)(0x42484038UL))
\r
2615 #define bFM3_MFT_PPG_PPGC0_PIE *((volatile unsigned int*)(0x4248403CUL))
\r
2616 #define bFM3_MFT_PPG_PPGC3_TTRG *((volatile unsigned int*)(0x42484080UL))
\r
2617 #define bFM3_MFT_PPG_PPGC3_MD0 *((volatile unsigned int*)(0x42484084UL))
\r
2618 #define bFM3_MFT_PPG_PPGC3_MD1 *((volatile unsigned int*)(0x42484088UL))
\r
2619 #define bFM3_MFT_PPG_PPGC3_PCS0 *((volatile unsigned int*)(0x4248408CUL))
\r
2620 #define bFM3_MFT_PPG_PPGC3_PCS1 *((volatile unsigned int*)(0x42484090UL))
\r
2621 #define bFM3_MFT_PPG_PPGC3_INTM *((volatile unsigned int*)(0x42484094UL))
\r
2622 #define bFM3_MFT_PPG_PPGC3_PUF *((volatile unsigned int*)(0x42484098UL))
\r
2623 #define bFM3_MFT_PPG_PPGC3_PIE *((volatile unsigned int*)(0x4248409CUL))
\r
2624 #define bFM3_MFT_PPG_PPGC2_TTRG *((volatile unsigned int*)(0x424840A0UL))
\r
2625 #define bFM3_MFT_PPG_PPGC2_MD0 *((volatile unsigned int*)(0x424840A4UL))
\r
2626 #define bFM3_MFT_PPG_PPGC2_MD1 *((volatile unsigned int*)(0x424840A8UL))
\r
2627 #define bFM3_MFT_PPG_PPGC2_PCS0 *((volatile unsigned int*)(0x424840ACUL))
\r
2628 #define bFM3_MFT_PPG_PPGC2_PCS1 *((volatile unsigned int*)(0x424840B0UL))
\r
2629 #define bFM3_MFT_PPG_PPGC2_INTM *((volatile unsigned int*)(0x424840B4UL))
\r
2630 #define bFM3_MFT_PPG_PPGC2_PUF *((volatile unsigned int*)(0x424840B8UL))
\r
2631 #define bFM3_MFT_PPG_PPGC2_PIE *((volatile unsigned int*)(0x424840BCUL))
\r
2632 #define bFM3_MFT_PPG_GATEC0_EDGE0 *((volatile unsigned int*)(0x42484300UL))
\r
2633 #define bFM3_MFT_PPG_GATEC0_STRG0 *((volatile unsigned int*)(0x42484304UL))
\r
2634 #define bFM3_MFT_PPG_GATEC0_EDGE2 *((volatile unsigned int*)(0x42484310UL))
\r
2635 #define bFM3_MFT_PPG_GATEC0_STRG2 *((volatile unsigned int*)(0x42484314UL))
\r
2636 #define bFM3_MFT_PPG_PPGC5_TTRG *((volatile unsigned int*)(0x42484800UL))
\r
2637 #define bFM3_MFT_PPG_PPGC5_MD0 *((volatile unsigned int*)(0x42484804UL))
\r
2638 #define bFM3_MFT_PPG_PPGC5_MD1 *((volatile unsigned int*)(0x42484808UL))
\r
2639 #define bFM3_MFT_PPG_PPGC5_PCS0 *((volatile unsigned int*)(0x4248480CUL))
\r
2640 #define bFM3_MFT_PPG_PPGC5_PCS1 *((volatile unsigned int*)(0x42484810UL))
\r
2641 #define bFM3_MFT_PPG_PPGC5_INTM *((volatile unsigned int*)(0x42484814UL))
\r
2642 #define bFM3_MFT_PPG_PPGC5_PUF *((volatile unsigned int*)(0x42484818UL))
\r
2643 #define bFM3_MFT_PPG_PPGC5_PIE *((volatile unsigned int*)(0x4248481CUL))
\r
2644 #define bFM3_MFT_PPG_PPGC4_TTRG *((volatile unsigned int*)(0x42484820UL))
\r
2645 #define bFM3_MFT_PPG_PPGC4_MD0 *((volatile unsigned int*)(0x42484824UL))
\r
2646 #define bFM3_MFT_PPG_PPGC4_MD1 *((volatile unsigned int*)(0x42484828UL))
\r
2647 #define bFM3_MFT_PPG_PPGC4_PCS0 *((volatile unsigned int*)(0x4248482CUL))
\r
2648 #define bFM3_MFT_PPG_PPGC4_PCS1 *((volatile unsigned int*)(0x42484830UL))
\r
2649 #define bFM3_MFT_PPG_PPGC4_INTM *((volatile unsigned int*)(0x42484834UL))
\r
2650 #define bFM3_MFT_PPG_PPGC4_PUF *((volatile unsigned int*)(0x42484838UL))
\r
2651 #define bFM3_MFT_PPG_PPGC4_PIE *((volatile unsigned int*)(0x4248483CUL))
\r
2652 #define bFM3_MFT_PPG_PPGC7_TTRG *((volatile unsigned int*)(0x42484880UL))
\r
2653 #define bFM3_MFT_PPG_PPGC7_MD0 *((volatile unsigned int*)(0x42484884UL))
\r
2654 #define bFM3_MFT_PPG_PPGC7_MD1 *((volatile unsigned int*)(0x42484888UL))
\r
2655 #define bFM3_MFT_PPG_PPGC7_PCS0 *((volatile unsigned int*)(0x4248488CUL))
\r
2656 #define bFM3_MFT_PPG_PPGC7_PCS1 *((volatile unsigned int*)(0x42484890UL))
\r
2657 #define bFM3_MFT_PPG_PPGC7_INTM *((volatile unsigned int*)(0x42484894UL))
\r
2658 #define bFM3_MFT_PPG_PPGC7_PUF *((volatile unsigned int*)(0x42484898UL))
\r
2659 #define bFM3_MFT_PPG_PPGC7_PIE *((volatile unsigned int*)(0x4248489CUL))
\r
2660 #define bFM3_MFT_PPG_PPGC6_TTRG *((volatile unsigned int*)(0x424848A0UL))
\r
2661 #define bFM3_MFT_PPG_PPGC6_MD0 *((volatile unsigned int*)(0x424848A4UL))
\r
2662 #define bFM3_MFT_PPG_PPGC6_MD1 *((volatile unsigned int*)(0x424848A8UL))
\r
2663 #define bFM3_MFT_PPG_PPGC6_PCS0 *((volatile unsigned int*)(0x424848ACUL))
\r
2664 #define bFM3_MFT_PPG_PPGC6_PCS1 *((volatile unsigned int*)(0x424848B0UL))
\r
2665 #define bFM3_MFT_PPG_PPGC6_INTM *((volatile unsigned int*)(0x424848B4UL))
\r
2666 #define bFM3_MFT_PPG_PPGC6_PUF *((volatile unsigned int*)(0x424848B8UL))
\r
2667 #define bFM3_MFT_PPG_PPGC6_PIE *((volatile unsigned int*)(0x424848BCUL))
\r
2668 #define bFM3_MFT_PPG_GATEC4_EDGE4 *((volatile unsigned int*)(0x42484B00UL))
\r
2669 #define bFM3_MFT_PPG_GATEC4_STRG4 *((volatile unsigned int*)(0x42484B04UL))
\r
2670 #define bFM3_MFT_PPG_GATEC4_EDGE6 *((volatile unsigned int*)(0x42484B10UL))
\r
2671 #define bFM3_MFT_PPG_GATEC4_STRG6 *((volatile unsigned int*)(0x42484B14UL))
\r
2672 #define bFM3_MFT_PPG_PPGC9_TTRG *((volatile unsigned int*)(0x42485000UL))
\r
2673 #define bFM3_MFT_PPG_PPGC9_MD0 *((volatile unsigned int*)(0x42485004UL))
\r
2674 #define bFM3_MFT_PPG_PPGC9_MD1 *((volatile unsigned int*)(0x42485008UL))
\r
2675 #define bFM3_MFT_PPG_PPGC9_PCS0 *((volatile unsigned int*)(0x4248500CUL))
\r
2676 #define bFM3_MFT_PPG_PPGC9_PCS1 *((volatile unsigned int*)(0x42485010UL))
\r
2677 #define bFM3_MFT_PPG_PPGC9_INTM *((volatile unsigned int*)(0x42485014UL))
\r
2678 #define bFM3_MFT_PPG_PPGC9_PUF *((volatile unsigned int*)(0x42485018UL))
\r
2679 #define bFM3_MFT_PPG_PPGC9_PIE *((volatile unsigned int*)(0x4248501CUL))
\r
2680 #define bFM3_MFT_PPG_PPGC8_TTRG *((volatile unsigned int*)(0x42485020UL))
\r
2681 #define bFM3_MFT_PPG_PPGC8_MD0 *((volatile unsigned int*)(0x42485024UL))
\r
2682 #define bFM3_MFT_PPG_PPGC8_MD1 *((volatile unsigned int*)(0x42485028UL))
\r
2683 #define bFM3_MFT_PPG_PPGC8_PCS0 *((volatile unsigned int*)(0x4248502CUL))
\r
2684 #define bFM3_MFT_PPG_PPGC8_PCS1 *((volatile unsigned int*)(0x42485030UL))
\r
2685 #define bFM3_MFT_PPG_PPGC8_INTM *((volatile unsigned int*)(0x42485034UL))
\r
2686 #define bFM3_MFT_PPG_PPGC8_PUF *((volatile unsigned int*)(0x42485038UL))
\r
2687 #define bFM3_MFT_PPG_PPGC8_PIE *((volatile unsigned int*)(0x4248503CUL))
\r
2688 #define bFM3_MFT_PPG_PPGC11_TTRG *((volatile unsigned int*)(0x42485080UL))
\r
2689 #define bFM3_MFT_PPG_PPGC11_MD0 *((volatile unsigned int*)(0x42485084UL))
\r
2690 #define bFM3_MFT_PPG_PPGC11_MD1 *((volatile unsigned int*)(0x42485088UL))
\r
2691 #define bFM3_MFT_PPG_PPGC11_PCS0 *((volatile unsigned int*)(0x4248508CUL))
\r
2692 #define bFM3_MFT_PPG_PPGC11_PCS1 *((volatile unsigned int*)(0x42485090UL))
\r
2693 #define bFM3_MFT_PPG_PPGC11_INTM *((volatile unsigned int*)(0x42485094UL))
\r
2694 #define bFM3_MFT_PPG_PPGC11_PUF *((volatile unsigned int*)(0x42485098UL))
\r
2695 #define bFM3_MFT_PPG_PPGC11_PIE *((volatile unsigned int*)(0x4248509CUL))
\r
2696 #define bFM3_MFT_PPG_PPGC10_TTRG *((volatile unsigned int*)(0x424850A0UL))
\r
2697 #define bFM3_MFT_PPG_PPGC10_MD0 *((volatile unsigned int*)(0x424850A4UL))
\r
2698 #define bFM3_MFT_PPG_PPGC10_MD1 *((volatile unsigned int*)(0x424850A8UL))
\r
2699 #define bFM3_MFT_PPG_PPGC10_PCS0 *((volatile unsigned int*)(0x424850ACUL))
\r
2700 #define bFM3_MFT_PPG_PPGC10_PCS1 *((volatile unsigned int*)(0x424850B0UL))
\r
2701 #define bFM3_MFT_PPG_PPGC10_INTM *((volatile unsigned int*)(0x424850B4UL))
\r
2702 #define bFM3_MFT_PPG_PPGC10_PUF *((volatile unsigned int*)(0x424850B8UL))
\r
2703 #define bFM3_MFT_PPG_PPGC10_PIE *((volatile unsigned int*)(0x424850BCUL))
\r
2704 #define bFM3_MFT_PPG_GATEC8_EDGE8 *((volatile unsigned int*)(0x42485300UL))
\r
2705 #define bFM3_MFT_PPG_GATEC8_STRG8 *((volatile unsigned int*)(0x42485304UL))
\r
2706 #define bFM3_MFT_PPG_GATEC8_EDGE10 *((volatile unsigned int*)(0x42485310UL))
\r
2707 #define bFM3_MFT_PPG_GATEC8_STRG10 *((volatile unsigned int*)(0x42485314UL))
\r
2708 #define bFM3_MFT_PPG_PPGC13_TTRG *((volatile unsigned int*)(0x42485800UL))
\r
2709 #define bFM3_MFT_PPG_PPGC13_MD0 *((volatile unsigned int*)(0x42485804UL))
\r
2710 #define bFM3_MFT_PPG_PPGC13_MD1 *((volatile unsigned int*)(0x42485808UL))
\r
2711 #define bFM3_MFT_PPG_PPGC13_PCS0 *((volatile unsigned int*)(0x4248580CUL))
\r
2712 #define bFM3_MFT_PPG_PPGC13_PCS1 *((volatile unsigned int*)(0x42485810UL))
\r
2713 #define bFM3_MFT_PPG_PPGC13_INTM *((volatile unsigned int*)(0x42485814UL))
\r
2714 #define bFM3_MFT_PPG_PPGC13_PUF *((volatile unsigned int*)(0x42485818UL))
\r
2715 #define bFM3_MFT_PPG_PPGC13_PIE *((volatile unsigned int*)(0x4248581CUL))
\r
2716 #define bFM3_MFT_PPG_PPGC12_TTRG *((volatile unsigned int*)(0x42485820UL))
\r
2717 #define bFM3_MFT_PPG_PPGC12_MD0 *((volatile unsigned int*)(0x42485824UL))
\r
2718 #define bFM3_MFT_PPG_PPGC12_MD1 *((volatile unsigned int*)(0x42485828UL))
\r
2719 #define bFM3_MFT_PPG_PPGC12_PCS0 *((volatile unsigned int*)(0x4248582CUL))
\r
2720 #define bFM3_MFT_PPG_PPGC12_PCS1 *((volatile unsigned int*)(0x42485830UL))
\r
2721 #define bFM3_MFT_PPG_PPGC12_INTM *((volatile unsigned int*)(0x42485834UL))
\r
2722 #define bFM3_MFT_PPG_PPGC12_PUF *((volatile unsigned int*)(0x42485838UL))
\r
2723 #define bFM3_MFT_PPG_PPGC12_PIE *((volatile unsigned int*)(0x4248583CUL))
\r
2724 #define bFM3_MFT_PPG_PPGC15_TTRG *((volatile unsigned int*)(0x42485880UL))
\r
2725 #define bFM3_MFT_PPG_PPGC15_MD0 *((volatile unsigned int*)(0x42485884UL))
\r
2726 #define bFM3_MFT_PPG_PPGC15_MD1 *((volatile unsigned int*)(0x42485888UL))
\r
2727 #define bFM3_MFT_PPG_PPGC15_PCS0 *((volatile unsigned int*)(0x4248588CUL))
\r
2728 #define bFM3_MFT_PPG_PPGC15_PCS1 *((volatile unsigned int*)(0x42485890UL))
\r
2729 #define bFM3_MFT_PPG_PPGC15_INTM *((volatile unsigned int*)(0x42485894UL))
\r
2730 #define bFM3_MFT_PPG_PPGC15_PUF *((volatile unsigned int*)(0x42485898UL))
\r
2731 #define bFM3_MFT_PPG_PPGC15_PIE *((volatile unsigned int*)(0x4248589CUL))
\r
2732 #define bFM3_MFT_PPG_PPGC14_TTRG *((volatile unsigned int*)(0x424858A0UL))
\r
2733 #define bFM3_MFT_PPG_PPGC14_MD0 *((volatile unsigned int*)(0x424858A4UL))
\r
2734 #define bFM3_MFT_PPG_PPGC14_MD1 *((volatile unsigned int*)(0x424858A8UL))
\r
2735 #define bFM3_MFT_PPG_PPGC14_PCS0 *((volatile unsigned int*)(0x424858ACUL))
\r
2736 #define bFM3_MFT_PPG_PPGC14_PCS1 *((volatile unsigned int*)(0x424858B0UL))
\r
2737 #define bFM3_MFT_PPG_PPGC14_INTM *((volatile unsigned int*)(0x424858B4UL))
\r
2738 #define bFM3_MFT_PPG_PPGC14_PUF *((volatile unsigned int*)(0x424858B8UL))
\r
2739 #define bFM3_MFT_PPG_PPGC14_PIE *((volatile unsigned int*)(0x424858BCUL))
\r
2740 #define bFM3_MFT_PPG_GATEC12_EDGE12 *((volatile unsigned int*)(0x42485B00UL))
\r
2741 #define bFM3_MFT_PPG_GATEC12_STRG12 *((volatile unsigned int*)(0x42485B04UL))
\r
2742 #define bFM3_MFT_PPG_GATEC12_EDGE14 *((volatile unsigned int*)(0x42485B10UL))
\r
2743 #define bFM3_MFT_PPG_GATEC12_STRG14 *((volatile unsigned int*)(0x42485B14UL))
\r
2745 /* Base Timer 0 PPG registers */
\r
2746 #define bFM3_BT0_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A0180UL))
\r
2747 #define bFM3_BT0_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A0184UL))
\r
2748 #define bFM3_BT0_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A0188UL))
\r
2749 #define bFM3_BT0_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A018CUL))
\r
2750 #define bFM3_BT0_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A0190UL))
\r
2751 #define bFM3_BT0_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A0194UL))
\r
2752 #define bFM3_BT0_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A0198UL))
\r
2753 #define bFM3_BT0_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A01A0UL))
\r
2754 #define bFM3_BT0_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A01A4UL))
\r
2755 #define bFM3_BT0_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A01A8UL))
\r
2756 #define bFM3_BT0_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A01ACUL))
\r
2757 #define bFM3_BT0_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A01B0UL))
\r
2758 #define bFM3_BT0_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A01B4UL))
\r
2759 #define bFM3_BT0_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A01B8UL))
\r
2760 #define bFM3_BT0_PPG_STC_UDIR *((volatile unsigned int*)(0x424A0200UL))
\r
2761 #define bFM3_BT0_PPG_STC_TGIR *((volatile unsigned int*)(0x424A0208UL))
\r
2762 #define bFM3_BT0_PPG_STC_UDIE *((volatile unsigned int*)(0x424A0210UL))
\r
2763 #define bFM3_BT0_PPG_STC_TGIE *((volatile unsigned int*)(0x424A0218UL))
\r
2764 #define bFM3_BT0_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0220UL))
\r
2766 /* Base Timer 0 PWM registers */
\r
2767 #define bFM3_BT0_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A0180UL))
\r
2768 #define bFM3_BT0_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A0184UL))
\r
2769 #define bFM3_BT0_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A0188UL))
\r
2770 #define bFM3_BT0_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A018CUL))
\r
2771 #define bFM3_BT0_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A0190UL))
\r
2772 #define bFM3_BT0_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A0194UL))
\r
2773 #define bFM3_BT0_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A0198UL))
\r
2774 #define bFM3_BT0_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A01A0UL))
\r
2775 #define bFM3_BT0_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A01A4UL))
\r
2776 #define bFM3_BT0_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A01A8UL))
\r
2777 #define bFM3_BT0_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A01ACUL))
\r
2778 #define bFM3_BT0_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A01B0UL))
\r
2779 #define bFM3_BT0_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A01B4UL))
\r
2780 #define bFM3_BT0_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A01B8UL))
\r
2781 #define bFM3_BT0_PWM_STC_UDIR *((volatile unsigned int*)(0x424A0200UL))
\r
2782 #define bFM3_BT0_PWM_STC_DTIR *((volatile unsigned int*)(0x424A0204UL))
\r
2783 #define bFM3_BT0_PWM_STC_TGIR *((volatile unsigned int*)(0x424A0208UL))
\r
2784 #define bFM3_BT0_PWM_STC_UDIE *((volatile unsigned int*)(0x424A0210UL))
\r
2785 #define bFM3_BT0_PWM_STC_DTIE *((volatile unsigned int*)(0x424A0214UL))
\r
2786 #define bFM3_BT0_PWM_STC_TGIE *((volatile unsigned int*)(0x424A0218UL))
\r
2787 #define bFM3_BT0_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0220UL))
\r
2789 /* Base Timer 0 RT registers */
\r
2790 #define bFM3_BT0_RT_TMCR_STRG *((volatile unsigned int*)(0x424A0180UL))
\r
2791 #define bFM3_BT0_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A0184UL))
\r
2792 #define bFM3_BT0_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A0188UL))
\r
2793 #define bFM3_BT0_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A018CUL))
\r
2794 #define bFM3_BT0_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A0190UL))
\r
2795 #define bFM3_BT0_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A0194UL))
\r
2796 #define bFM3_BT0_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A0198UL))
\r
2797 #define bFM3_BT0_RT_TMCR_T32 *((volatile unsigned int*)(0x424A019CUL))
\r
2798 #define bFM3_BT0_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A01A0UL))
\r
2799 #define bFM3_BT0_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A01A4UL))
\r
2800 #define bFM3_BT0_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A01B0UL))
\r
2801 #define bFM3_BT0_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A01B4UL))
\r
2802 #define bFM3_BT0_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A01B8UL))
\r
2803 #define bFM3_BT0_RT_STC_UDIR *((volatile unsigned int*)(0x424A0200UL))
\r
2804 #define bFM3_BT0_RT_STC_TGIR *((volatile unsigned int*)(0x424A0208UL))
\r
2805 #define bFM3_BT0_RT_STC_UDIE *((volatile unsigned int*)(0x424A0210UL))
\r
2806 #define bFM3_BT0_RT_STC_TGIE *((volatile unsigned int*)(0x424A0218UL))
\r
2807 #define bFM3_BT0_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0220UL))
\r
2809 /* Base Timer 0 PWC registers */
\r
2810 #define bFM3_BT0_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A0184UL))
\r
2811 #define bFM3_BT0_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A0188UL))
\r
2812 #define bFM3_BT0_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A0190UL))
\r
2813 #define bFM3_BT0_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A0194UL))
\r
2814 #define bFM3_BT0_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A0198UL))
\r
2815 #define bFM3_BT0_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A019CUL))
\r
2816 #define bFM3_BT0_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A01A0UL))
\r
2817 #define bFM3_BT0_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A01A4UL))
\r
2818 #define bFM3_BT0_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A01A8UL))
\r
2819 #define bFM3_BT0_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A01B0UL))
\r
2820 #define bFM3_BT0_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A01B4UL))
\r
2821 #define bFM3_BT0_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A01B8UL))
\r
2822 #define bFM3_BT0_PWC_STC_OVIR *((volatile unsigned int*)(0x424A0200UL))
\r
2823 #define bFM3_BT0_PWC_STC_EDIR *((volatile unsigned int*)(0x424A0208UL))
\r
2824 #define bFM3_BT0_PWC_STC_OVIE *((volatile unsigned int*)(0x424A0210UL))
\r
2825 #define bFM3_BT0_PWC_STC_EDIE *((volatile unsigned int*)(0x424A0218UL))
\r
2826 #define bFM3_BT0_PWC_STC_ERR *((volatile unsigned int*)(0x424A021CUL))
\r
2827 #define bFM3_BT0_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0220UL))
\r
2829 /* Base Timer 1 PPG registers */
\r
2830 #define bFM3_BT1_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A0980UL))
\r
2831 #define bFM3_BT1_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A0984UL))
\r
2832 #define bFM3_BT1_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A0988UL))
\r
2833 #define bFM3_BT1_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A098CUL))
\r
2834 #define bFM3_BT1_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A0990UL))
\r
2835 #define bFM3_BT1_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A0994UL))
\r
2836 #define bFM3_BT1_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A0998UL))
\r
2837 #define bFM3_BT1_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A09A0UL))
\r
2838 #define bFM3_BT1_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A09A4UL))
\r
2839 #define bFM3_BT1_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A09A8UL))
\r
2840 #define bFM3_BT1_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A09ACUL))
\r
2841 #define bFM3_BT1_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A09B0UL))
\r
2842 #define bFM3_BT1_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A09B4UL))
\r
2843 #define bFM3_BT1_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A09B8UL))
\r
2844 #define bFM3_BT1_PPG_STC_UDIR *((volatile unsigned int*)(0x424A0A00UL))
\r
2845 #define bFM3_BT1_PPG_STC_TGIR *((volatile unsigned int*)(0x424A0A08UL))
\r
2846 #define bFM3_BT1_PPG_STC_UDIE *((volatile unsigned int*)(0x424A0A10UL))
\r
2847 #define bFM3_BT1_PPG_STC_TGIE *((volatile unsigned int*)(0x424A0A18UL))
\r
2848 #define bFM3_BT1_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0A20UL))
\r
2850 /* Base Timer 1 PWM registers */
\r
2851 #define bFM3_BT1_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A0980UL))
\r
2852 #define bFM3_BT1_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A0984UL))
\r
2853 #define bFM3_BT1_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A0988UL))
\r
2854 #define bFM3_BT1_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A098CUL))
\r
2855 #define bFM3_BT1_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A0990UL))
\r
2856 #define bFM3_BT1_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A0994UL))
\r
2857 #define bFM3_BT1_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A0998UL))
\r
2858 #define bFM3_BT1_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A09A0UL))
\r
2859 #define bFM3_BT1_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A09A4UL))
\r
2860 #define bFM3_BT1_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A09A8UL))
\r
2861 #define bFM3_BT1_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A09ACUL))
\r
2862 #define bFM3_BT1_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A09B0UL))
\r
2863 #define bFM3_BT1_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A09B4UL))
\r
2864 #define bFM3_BT1_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A09B8UL))
\r
2865 #define bFM3_BT1_PWM_STC_UDIR *((volatile unsigned int*)(0x424A0A00UL))
\r
2866 #define bFM3_BT1_PWM_STC_DTIR *((volatile unsigned int*)(0x424A0A04UL))
\r
2867 #define bFM3_BT1_PWM_STC_TGIR *((volatile unsigned int*)(0x424A0A08UL))
\r
2868 #define bFM3_BT1_PWM_STC_UDIE *((volatile unsigned int*)(0x424A0A10UL))
\r
2869 #define bFM3_BT1_PWM_STC_DTIE *((volatile unsigned int*)(0x424A0A14UL))
\r
2870 #define bFM3_BT1_PWM_STC_TGIE *((volatile unsigned int*)(0x424A0A18UL))
\r
2871 #define bFM3_BT1_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0A20UL))
\r
2873 /* Base Timer 1 RT registers */
\r
2874 #define bFM3_BT1_RT_TMCR_STRG *((volatile unsigned int*)(0x424A0980UL))
\r
2875 #define bFM3_BT1_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A0984UL))
\r
2876 #define bFM3_BT1_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A0988UL))
\r
2877 #define bFM3_BT1_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A098CUL))
\r
2878 #define bFM3_BT1_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A0990UL))
\r
2879 #define bFM3_BT1_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A0994UL))
\r
2880 #define bFM3_BT1_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A0998UL))
\r
2881 #define bFM3_BT1_RT_TMCR_T32 *((volatile unsigned int*)(0x424A099CUL))
\r
2882 #define bFM3_BT1_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A09A0UL))
\r
2883 #define bFM3_BT1_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A09A4UL))
\r
2884 #define bFM3_BT1_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A09B0UL))
\r
2885 #define bFM3_BT1_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A09B4UL))
\r
2886 #define bFM3_BT1_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A09B8UL))
\r
2887 #define bFM3_BT1_RT_STC_UDIR *((volatile unsigned int*)(0x424A0A00UL))
\r
2888 #define bFM3_BT1_RT_STC_TGIR *((volatile unsigned int*)(0x424A0A08UL))
\r
2889 #define bFM3_BT1_RT_STC_UDIE *((volatile unsigned int*)(0x424A0A10UL))
\r
2890 #define bFM3_BT1_RT_STC_TGIE *((volatile unsigned int*)(0x424A0A18UL))
\r
2891 #define bFM3_BT1_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0A20UL))
\r
2893 /* Base Timer 1 PWC registers */
\r
2894 #define bFM3_BT1_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A0984UL))
\r
2895 #define bFM3_BT1_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A0988UL))
\r
2896 #define bFM3_BT1_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A0990UL))
\r
2897 #define bFM3_BT1_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A0994UL))
\r
2898 #define bFM3_BT1_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A0998UL))
\r
2899 #define bFM3_BT1_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A099CUL))
\r
2900 #define bFM3_BT1_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A09A0UL))
\r
2901 #define bFM3_BT1_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A09A4UL))
\r
2902 #define bFM3_BT1_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A09A8UL))
\r
2903 #define bFM3_BT1_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A09B0UL))
\r
2904 #define bFM3_BT1_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A09B4UL))
\r
2905 #define bFM3_BT1_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A09B8UL))
\r
2906 #define bFM3_BT1_PWC_STC_OVIR *((volatile unsigned int*)(0x424A0A00UL))
\r
2907 #define bFM3_BT1_PWC_STC_EDIR *((volatile unsigned int*)(0x424A0A08UL))
\r
2908 #define bFM3_BT1_PWC_STC_OVIE *((volatile unsigned int*)(0x424A0A10UL))
\r
2909 #define bFM3_BT1_PWC_STC_EDIE *((volatile unsigned int*)(0x424A0A18UL))
\r
2910 #define bFM3_BT1_PWC_STC_ERR *((volatile unsigned int*)(0x424A0A1CUL))
\r
2911 #define bFM3_BT1_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0A20UL))
\r
2913 /* Base Timer 2 PPG registers */
\r
2914 #define bFM3_BT2_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A1180UL))
\r
2915 #define bFM3_BT2_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A1184UL))
\r
2916 #define bFM3_BT2_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A1188UL))
\r
2917 #define bFM3_BT2_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A118CUL))
\r
2918 #define bFM3_BT2_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A1190UL))
\r
2919 #define bFM3_BT2_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A1194UL))
\r
2920 #define bFM3_BT2_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A1198UL))
\r
2921 #define bFM3_BT2_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A11A0UL))
\r
2922 #define bFM3_BT2_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A11A4UL))
\r
2923 #define bFM3_BT2_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A11A8UL))
\r
2924 #define bFM3_BT2_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A11ACUL))
\r
2925 #define bFM3_BT2_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A11B0UL))
\r
2926 #define bFM3_BT2_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A11B4UL))
\r
2927 #define bFM3_BT2_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A11B8UL))
\r
2928 #define bFM3_BT2_PPG_STC_UDIR *((volatile unsigned int*)(0x424A1200UL))
\r
2929 #define bFM3_BT2_PPG_STC_TGIR *((volatile unsigned int*)(0x424A1208UL))
\r
2930 #define bFM3_BT2_PPG_STC_UDIE *((volatile unsigned int*)(0x424A1210UL))
\r
2931 #define bFM3_BT2_PPG_STC_TGIE *((volatile unsigned int*)(0x424A1218UL))
\r
2932 #define bFM3_BT2_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1220UL))
\r
2934 /* Base Timer 2 PWM registers */
\r
2935 #define bFM3_BT2_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A1180UL))
\r
2936 #define bFM3_BT2_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A1184UL))
\r
2937 #define bFM3_BT2_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A1188UL))
\r
2938 #define bFM3_BT2_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A118CUL))
\r
2939 #define bFM3_BT2_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A1190UL))
\r
2940 #define bFM3_BT2_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A1194UL))
\r
2941 #define bFM3_BT2_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A1198UL))
\r
2942 #define bFM3_BT2_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A11A0UL))
\r
2943 #define bFM3_BT2_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A11A4UL))
\r
2944 #define bFM3_BT2_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A11A8UL))
\r
2945 #define bFM3_BT2_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A11ACUL))
\r
2946 #define bFM3_BT2_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A11B0UL))
\r
2947 #define bFM3_BT2_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A11B4UL))
\r
2948 #define bFM3_BT2_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A11B8UL))
\r
2949 #define bFM3_BT2_PWM_STC_UDIR *((volatile unsigned int*)(0x424A1200UL))
\r
2950 #define bFM3_BT2_PWM_STC_DTIR *((volatile unsigned int*)(0x424A1204UL))
\r
2951 #define bFM3_BT2_PWM_STC_TGIR *((volatile unsigned int*)(0x424A1208UL))
\r
2952 #define bFM3_BT2_PWM_STC_UDIE *((volatile unsigned int*)(0x424A1210UL))
\r
2953 #define bFM3_BT2_PWM_STC_DTIE *((volatile unsigned int*)(0x424A1214UL))
\r
2954 #define bFM3_BT2_PWM_STC_TGIE *((volatile unsigned int*)(0x424A1218UL))
\r
2955 #define bFM3_BT2_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1220UL))
\r
2957 /* Base Timer 2 RT registers */
\r
2958 #define bFM3_BT2_RT_TMCR_STRG *((volatile unsigned int*)(0x424A1180UL))
\r
2959 #define bFM3_BT2_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A1184UL))
\r
2960 #define bFM3_BT2_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A1188UL))
\r
2961 #define bFM3_BT2_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A118CUL))
\r
2962 #define bFM3_BT2_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A1190UL))
\r
2963 #define bFM3_BT2_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A1194UL))
\r
2964 #define bFM3_BT2_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A1198UL))
\r
2965 #define bFM3_BT2_RT_TMCR_T32 *((volatile unsigned int*)(0x424A119CUL))
\r
2966 #define bFM3_BT2_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A11A0UL))
\r
2967 #define bFM3_BT2_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A11A4UL))
\r
2968 #define bFM3_BT2_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A11B0UL))
\r
2969 #define bFM3_BT2_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A11B4UL))
\r
2970 #define bFM3_BT2_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A11B8UL))
\r
2971 #define bFM3_BT2_RT_STC_UDIR *((volatile unsigned int*)(0x424A1200UL))
\r
2972 #define bFM3_BT2_RT_STC_TGIR *((volatile unsigned int*)(0x424A1208UL))
\r
2973 #define bFM3_BT2_RT_STC_UDIE *((volatile unsigned int*)(0x424A1210UL))
\r
2974 #define bFM3_BT2_RT_STC_TGIE *((volatile unsigned int*)(0x424A1218UL))
\r
2975 #define bFM3_BT2_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1220UL))
\r
2977 /* Base Timer 2 PWC registers */
\r
2978 #define bFM3_BT2_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A1184UL))
\r
2979 #define bFM3_BT2_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A1188UL))
\r
2980 #define bFM3_BT2_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A1190UL))
\r
2981 #define bFM3_BT2_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A1194UL))
\r
2982 #define bFM3_BT2_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A1198UL))
\r
2983 #define bFM3_BT2_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A119CUL))
\r
2984 #define bFM3_BT2_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A11A0UL))
\r
2985 #define bFM3_BT2_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A11A4UL))
\r
2986 #define bFM3_BT2_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A11A8UL))
\r
2987 #define bFM3_BT2_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A11B0UL))
\r
2988 #define bFM3_BT2_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A11B4UL))
\r
2989 #define bFM3_BT2_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A11B8UL))
\r
2990 #define bFM3_BT2_PWC_STC_OVIR *((volatile unsigned int*)(0x424A1200UL))
\r
2991 #define bFM3_BT2_PWC_STC_EDIR *((volatile unsigned int*)(0x424A1208UL))
\r
2992 #define bFM3_BT2_PWC_STC_OVIE *((volatile unsigned int*)(0x424A1210UL))
\r
2993 #define bFM3_BT2_PWC_STC_EDIE *((volatile unsigned int*)(0x424A1218UL))
\r
2994 #define bFM3_BT2_PWC_STC_ERR *((volatile unsigned int*)(0x424A121CUL))
\r
2995 #define bFM3_BT2_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1220UL))
\r
2997 /* Base Timer 3 PPG registers */
\r
2998 #define bFM3_BT3_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A1980UL))
\r
2999 #define bFM3_BT3_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A1984UL))
\r
3000 #define bFM3_BT3_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A1988UL))
\r
3001 #define bFM3_BT3_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A198CUL))
\r
3002 #define bFM3_BT3_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A1990UL))
\r
3003 #define bFM3_BT3_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A1994UL))
\r
3004 #define bFM3_BT3_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A1998UL))
\r
3005 #define bFM3_BT3_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A19A0UL))
\r
3006 #define bFM3_BT3_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A19A4UL))
\r
3007 #define bFM3_BT3_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A19A8UL))
\r
3008 #define bFM3_BT3_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A19ACUL))
\r
3009 #define bFM3_BT3_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A19B0UL))
\r
3010 #define bFM3_BT3_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A19B4UL))
\r
3011 #define bFM3_BT3_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A19B8UL))
\r
3012 #define bFM3_BT3_PPG_STC_UDIR *((volatile unsigned int*)(0x424A1A00UL))
\r
3013 #define bFM3_BT3_PPG_STC_TGIR *((volatile unsigned int*)(0x424A1A08UL))
\r
3014 #define bFM3_BT3_PPG_STC_UDIE *((volatile unsigned int*)(0x424A1A10UL))
\r
3015 #define bFM3_BT3_PPG_STC_TGIE *((volatile unsigned int*)(0x424A1A18UL))
\r
3016 #define bFM3_BT3_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1A20UL))
\r
3018 /* Base Timer 3 PWM registers */
\r
3019 #define bFM3_BT3_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A1980UL))
\r
3020 #define bFM3_BT3_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A1984UL))
\r
3021 #define bFM3_BT3_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A1988UL))
\r
3022 #define bFM3_BT3_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A198CUL))
\r
3023 #define bFM3_BT3_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A1990UL))
\r
3024 #define bFM3_BT3_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A1994UL))
\r
3025 #define bFM3_BT3_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A1998UL))
\r
3026 #define bFM3_BT3_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A19A0UL))
\r
3027 #define bFM3_BT3_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A19A4UL))
\r
3028 #define bFM3_BT3_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A19A8UL))
\r
3029 #define bFM3_BT3_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A19ACUL))
\r
3030 #define bFM3_BT3_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A19B0UL))
\r
3031 #define bFM3_BT3_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A19B4UL))
\r
3032 #define bFM3_BT3_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A19B8UL))
\r
3033 #define bFM3_BT3_PWM_STC_UDIR *((volatile unsigned int*)(0x424A1A00UL))
\r
3034 #define bFM3_BT3_PWM_STC_DTIR *((volatile unsigned int*)(0x424A1A04UL))
\r
3035 #define bFM3_BT3_PWM_STC_TGIR *((volatile unsigned int*)(0x424A1A08UL))
\r
3036 #define bFM3_BT3_PWM_STC_UDIE *((volatile unsigned int*)(0x424A1A10UL))
\r
3037 #define bFM3_BT3_PWM_STC_DTIE *((volatile unsigned int*)(0x424A1A14UL))
\r
3038 #define bFM3_BT3_PWM_STC_TGIE *((volatile unsigned int*)(0x424A1A18UL))
\r
3039 #define bFM3_BT3_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1A20UL))
\r
3041 /* Base Timer 3 RT registers */
\r
3042 #define bFM3_BT3_RT_TMCR_STRG *((volatile unsigned int*)(0x424A1980UL))
\r
3043 #define bFM3_BT3_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A1984UL))
\r
3044 #define bFM3_BT3_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A1988UL))
\r
3045 #define bFM3_BT3_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A198CUL))
\r
3046 #define bFM3_BT3_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A1990UL))
\r
3047 #define bFM3_BT3_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A1994UL))
\r
3048 #define bFM3_BT3_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A1998UL))
\r
3049 #define bFM3_BT3_RT_TMCR_T32 *((volatile unsigned int*)(0x424A199CUL))
\r
3050 #define bFM3_BT3_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A19A0UL))
\r
3051 #define bFM3_BT3_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A19A4UL))
\r
3052 #define bFM3_BT3_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A19B0UL))
\r
3053 #define bFM3_BT3_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A19B4UL))
\r
3054 #define bFM3_BT3_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A19B8UL))
\r
3055 #define bFM3_BT3_RT_STC_UDIR *((volatile unsigned int*)(0x424A1A00UL))
\r
3056 #define bFM3_BT3_RT_STC_TGIR *((volatile unsigned int*)(0x424A1A08UL))
\r
3057 #define bFM3_BT3_RT_STC_UDIE *((volatile unsigned int*)(0x424A1A10UL))
\r
3058 #define bFM3_BT3_RT_STC_TGIE *((volatile unsigned int*)(0x424A1A18UL))
\r
3059 #define bFM3_BT3_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1A20UL))
\r
3061 /* Base Timer 3 PWC registers */
\r
3062 #define bFM3_BT3_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A1984UL))
\r
3063 #define bFM3_BT3_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A1988UL))
\r
3064 #define bFM3_BT3_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A1990UL))
\r
3065 #define bFM3_BT3_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A1994UL))
\r
3066 #define bFM3_BT3_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A1998UL))
\r
3067 #define bFM3_BT3_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A199CUL))
\r
3068 #define bFM3_BT3_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A19A0UL))
\r
3069 #define bFM3_BT3_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A19A4UL))
\r
3070 #define bFM3_BT3_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A19A8UL))
\r
3071 #define bFM3_BT3_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A19B0UL))
\r
3072 #define bFM3_BT3_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A19B4UL))
\r
3073 #define bFM3_BT3_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A19B8UL))
\r
3074 #define bFM3_BT3_PWC_STC_OVIR *((volatile unsigned int*)(0x424A1A00UL))
\r
3075 #define bFM3_BT3_PWC_STC_EDIR *((volatile unsigned int*)(0x424A1A08UL))
\r
3076 #define bFM3_BT3_PWC_STC_OVIE *((volatile unsigned int*)(0x424A1A10UL))
\r
3077 #define bFM3_BT3_PWC_STC_EDIE *((volatile unsigned int*)(0x424A1A18UL))
\r
3078 #define bFM3_BT3_PWC_STC_ERR *((volatile unsigned int*)(0x424A1A1CUL))
\r
3079 #define bFM3_BT3_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1A20UL))
\r
3081 /* Base Timer 4 PPG registers */
\r
3082 #define bFM3_BT4_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A4180UL))
\r
3083 #define bFM3_BT4_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A4184UL))
\r
3084 #define bFM3_BT4_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A4188UL))
\r
3085 #define bFM3_BT4_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A418CUL))
\r
3086 #define bFM3_BT4_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A4190UL))
\r
3087 #define bFM3_BT4_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A4194UL))
\r
3088 #define bFM3_BT4_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A4198UL))
\r
3089 #define bFM3_BT4_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A41A0UL))
\r
3090 #define bFM3_BT4_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A41A4UL))
\r
3091 #define bFM3_BT4_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A41A8UL))
\r
3092 #define bFM3_BT4_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A41ACUL))
\r
3093 #define bFM3_BT4_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A41B0UL))
\r
3094 #define bFM3_BT4_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A41B4UL))
\r
3095 #define bFM3_BT4_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A41B8UL))
\r
3096 #define bFM3_BT4_PPG_STC_UDIR *((volatile unsigned int*)(0x424A4200UL))
\r
3097 #define bFM3_BT4_PPG_STC_TGIR *((volatile unsigned int*)(0x424A4208UL))
\r
3098 #define bFM3_BT4_PPG_STC_UDIE *((volatile unsigned int*)(0x424A4210UL))
\r
3099 #define bFM3_BT4_PPG_STC_TGIE *((volatile unsigned int*)(0x424A4218UL))
\r
3100 #define bFM3_BT4_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4220UL))
\r
3102 /* Base Timer 4 PWM registers */
\r
3103 #define bFM3_BT4_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A4180UL))
\r
3104 #define bFM3_BT4_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A4184UL))
\r
3105 #define bFM3_BT4_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A4188UL))
\r
3106 #define bFM3_BT4_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A418CUL))
\r
3107 #define bFM3_BT4_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A4190UL))
\r
3108 #define bFM3_BT4_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A4194UL))
\r
3109 #define bFM3_BT4_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A4198UL))
\r
3110 #define bFM3_BT4_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A41A0UL))
\r
3111 #define bFM3_BT4_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A41A4UL))
\r
3112 #define bFM3_BT4_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A41A8UL))
\r
3113 #define bFM3_BT4_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A41ACUL))
\r
3114 #define bFM3_BT4_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A41B0UL))
\r
3115 #define bFM3_BT4_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A41B4UL))
\r
3116 #define bFM3_BT4_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A41B8UL))
\r
3117 #define bFM3_BT4_PWM_STC_UDIR *((volatile unsigned int*)(0x424A4200UL))
\r
3118 #define bFM3_BT4_PWM_STC_DTIR *((volatile unsigned int*)(0x424A4204UL))
\r
3119 #define bFM3_BT4_PWM_STC_TGIR *((volatile unsigned int*)(0x424A4208UL))
\r
3120 #define bFM3_BT4_PWM_STC_UDIE *((volatile unsigned int*)(0x424A4210UL))
\r
3121 #define bFM3_BT4_PWM_STC_DTIE *((volatile unsigned int*)(0x424A4214UL))
\r
3122 #define bFM3_BT4_PWM_STC_TGIE *((volatile unsigned int*)(0x424A4218UL))
\r
3123 #define bFM3_BT4_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4220UL))
\r
3125 /* Base Timer 4 RT registers */
\r
3126 #define bFM3_BT4_RT_TMCR_STRG *((volatile unsigned int*)(0x424A4180UL))
\r
3127 #define bFM3_BT4_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A4184UL))
\r
3128 #define bFM3_BT4_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A4188UL))
\r
3129 #define bFM3_BT4_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A418CUL))
\r
3130 #define bFM3_BT4_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A4190UL))
\r
3131 #define bFM3_BT4_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A4194UL))
\r
3132 #define bFM3_BT4_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A4198UL))
\r
3133 #define bFM3_BT4_RT_TMCR_T32 *((volatile unsigned int*)(0x424A419CUL))
\r
3134 #define bFM3_BT4_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A41A0UL))
\r
3135 #define bFM3_BT4_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A41A4UL))
\r
3136 #define bFM3_BT4_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A41B0UL))
\r
3137 #define bFM3_BT4_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A41B4UL))
\r
3138 #define bFM3_BT4_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A41B8UL))
\r
3139 #define bFM3_BT4_RT_STC_UDIR *((volatile unsigned int*)(0x424A4200UL))
\r
3140 #define bFM3_BT4_RT_STC_TGIR *((volatile unsigned int*)(0x424A4208UL))
\r
3141 #define bFM3_BT4_RT_STC_UDIE *((volatile unsigned int*)(0x424A4210UL))
\r
3142 #define bFM3_BT4_RT_STC_TGIE *((volatile unsigned int*)(0x424A4218UL))
\r
3143 #define bFM3_BT4_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4220UL))
\r
3145 /* Base Timer 4 PWC registers */
\r
3146 #define bFM3_BT4_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A4184UL))
\r
3147 #define bFM3_BT4_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A4188UL))
\r
3148 #define bFM3_BT4_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A4190UL))
\r
3149 #define bFM3_BT4_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A4194UL))
\r
3150 #define bFM3_BT4_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A4198UL))
\r
3151 #define bFM3_BT4_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A419CUL))
\r
3152 #define bFM3_BT4_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A41A0UL))
\r
3153 #define bFM3_BT4_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A41A4UL))
\r
3154 #define bFM3_BT4_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A41A8UL))
\r
3155 #define bFM3_BT4_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A41B0UL))
\r
3156 #define bFM3_BT4_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A41B4UL))
\r
3157 #define bFM3_BT4_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A41B8UL))
\r
3158 #define bFM3_BT4_PWC_STC_OVIR *((volatile unsigned int*)(0x424A4200UL))
\r
3159 #define bFM3_BT4_PWC_STC_EDIR *((volatile unsigned int*)(0x424A4208UL))
\r
3160 #define bFM3_BT4_PWC_STC_OVIE *((volatile unsigned int*)(0x424A4210UL))
\r
3161 #define bFM3_BT4_PWC_STC_EDIE *((volatile unsigned int*)(0x424A4218UL))
\r
3162 #define bFM3_BT4_PWC_STC_ERR *((volatile unsigned int*)(0x424A421CUL))
\r
3163 #define bFM3_BT4_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4220UL))
\r
3165 /* Base Timer 5 PPG registers */
\r
3166 #define bFM3_BT5_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A4980UL))
\r
3167 #define bFM3_BT5_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A4984UL))
\r
3168 #define bFM3_BT5_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A4988UL))
\r
3169 #define bFM3_BT5_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A498CUL))
\r
3170 #define bFM3_BT5_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A4990UL))
\r
3171 #define bFM3_BT5_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A4994UL))
\r
3172 #define bFM3_BT5_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A4998UL))
\r
3173 #define bFM3_BT5_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A49A0UL))
\r
3174 #define bFM3_BT5_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A49A4UL))
\r
3175 #define bFM3_BT5_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A49A8UL))
\r
3176 #define bFM3_BT5_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A49ACUL))
\r
3177 #define bFM3_BT5_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A49B0UL))
\r
3178 #define bFM3_BT5_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A49B4UL))
\r
3179 #define bFM3_BT5_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A49B8UL))
\r
3180 #define bFM3_BT5_PPG_STC_UDIR *((volatile unsigned int*)(0x424A4A00UL))
\r
3181 #define bFM3_BT5_PPG_STC_TGIR *((volatile unsigned int*)(0x424A4A08UL))
\r
3182 #define bFM3_BT5_PPG_STC_UDIE *((volatile unsigned int*)(0x424A4A10UL))
\r
3183 #define bFM3_BT5_PPG_STC_TGIE *((volatile unsigned int*)(0x424A4A18UL))
\r
3184 #define bFM3_BT5_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4A20UL))
\r
3186 /* Base Timer 5 PWM registers */
\r
3187 #define bFM3_BT5_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A4980UL))
\r
3188 #define bFM3_BT5_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A4984UL))
\r
3189 #define bFM3_BT5_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A4988UL))
\r
3190 #define bFM3_BT5_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A498CUL))
\r
3191 #define bFM3_BT5_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A4990UL))
\r
3192 #define bFM3_BT5_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A4994UL))
\r
3193 #define bFM3_BT5_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A4998UL))
\r
3194 #define bFM3_BT5_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A49A0UL))
\r
3195 #define bFM3_BT5_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A49A4UL))
\r
3196 #define bFM3_BT5_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A49A8UL))
\r
3197 #define bFM3_BT5_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A49ACUL))
\r
3198 #define bFM3_BT5_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A49B0UL))
\r
3199 #define bFM3_BT5_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A49B4UL))
\r
3200 #define bFM3_BT5_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A49B8UL))
\r
3201 #define bFM3_BT5_PWM_STC_UDIR *((volatile unsigned int*)(0x424A4A00UL))
\r
3202 #define bFM3_BT5_PWM_STC_DTIR *((volatile unsigned int*)(0x424A4A04UL))
\r
3203 #define bFM3_BT5_PWM_STC_TGIR *((volatile unsigned int*)(0x424A4A08UL))
\r
3204 #define bFM3_BT5_PWM_STC_UDIE *((volatile unsigned int*)(0x424A4A10UL))
\r
3205 #define bFM3_BT5_PWM_STC_DTIE *((volatile unsigned int*)(0x424A4A14UL))
\r
3206 #define bFM3_BT5_PWM_STC_TGIE *((volatile unsigned int*)(0x424A4A18UL))
\r
3207 #define bFM3_BT5_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4A20UL))
\r
3209 /* Base Timer 5 RT registers */
\r
3210 #define bFM3_BT5_RT_TMCR_STRG *((volatile unsigned int*)(0x424A4980UL))
\r
3211 #define bFM3_BT5_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A4984UL))
\r
3212 #define bFM3_BT5_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A4988UL))
\r
3213 #define bFM3_BT5_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A498CUL))
\r
3214 #define bFM3_BT5_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A4990UL))
\r
3215 #define bFM3_BT5_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A4994UL))
\r
3216 #define bFM3_BT5_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A4998UL))
\r
3217 #define bFM3_BT5_RT_TMCR_T32 *((volatile unsigned int*)(0x424A499CUL))
\r
3218 #define bFM3_BT5_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A49A0UL))
\r
3219 #define bFM3_BT5_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A49A4UL))
\r
3220 #define bFM3_BT5_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A49B0UL))
\r
3221 #define bFM3_BT5_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A49B4UL))
\r
3222 #define bFM3_BT5_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A49B8UL))
\r
3223 #define bFM3_BT5_RT_STC_UDIR *((volatile unsigned int*)(0x424A4A00UL))
\r
3224 #define bFM3_BT5_RT_STC_TGIR *((volatile unsigned int*)(0x424A4A08UL))
\r
3225 #define bFM3_BT5_RT_STC_UDIE *((volatile unsigned int*)(0x424A4A10UL))
\r
3226 #define bFM3_BT5_RT_STC_TGIE *((volatile unsigned int*)(0x424A4A18UL))
\r
3227 #define bFM3_BT5_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4A20UL))
\r
3229 /* Base Timer 5 PWC registers */
\r
3230 #define bFM3_BT5_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A4984UL))
\r
3231 #define bFM3_BT5_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A4988UL))
\r
3232 #define bFM3_BT5_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A4990UL))
\r
3233 #define bFM3_BT5_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A4994UL))
\r
3234 #define bFM3_BT5_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A4998UL))
\r
3235 #define bFM3_BT5_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A499CUL))
\r
3236 #define bFM3_BT5_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A49A0UL))
\r
3237 #define bFM3_BT5_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A49A4UL))
\r
3238 #define bFM3_BT5_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A49A8UL))
\r
3239 #define bFM3_BT5_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A49B0UL))
\r
3240 #define bFM3_BT5_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A49B4UL))
\r
3241 #define bFM3_BT5_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A49B8UL))
\r
3242 #define bFM3_BT5_PWC_STC_OVIR *((volatile unsigned int*)(0x424A4A00UL))
\r
3243 #define bFM3_BT5_PWC_STC_EDIR *((volatile unsigned int*)(0x424A4A08UL))
\r
3244 #define bFM3_BT5_PWC_STC_OVIE *((volatile unsigned int*)(0x424A4A10UL))
\r
3245 #define bFM3_BT5_PWC_STC_EDIE *((volatile unsigned int*)(0x424A4A18UL))
\r
3246 #define bFM3_BT5_PWC_STC_ERR *((volatile unsigned int*)(0x424A4A1CUL))
\r
3247 #define bFM3_BT5_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4A20UL))
\r
3249 /* Base Timer 6 PPG registers */
\r
3250 #define bFM3_BT6_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A5180UL))
\r
3251 #define bFM3_BT6_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A5184UL))
\r
3252 #define bFM3_BT6_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A5188UL))
\r
3253 #define bFM3_BT6_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A518CUL))
\r
3254 #define bFM3_BT6_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A5190UL))
\r
3255 #define bFM3_BT6_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A5194UL))
\r
3256 #define bFM3_BT6_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A5198UL))
\r
3257 #define bFM3_BT6_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A51A0UL))
\r
3258 #define bFM3_BT6_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A51A4UL))
\r
3259 #define bFM3_BT6_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A51A8UL))
\r
3260 #define bFM3_BT6_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A51ACUL))
\r
3261 #define bFM3_BT6_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A51B0UL))
\r
3262 #define bFM3_BT6_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A51B4UL))
\r
3263 #define bFM3_BT6_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A51B8UL))
\r
3264 #define bFM3_BT6_PPG_STC_UDIR *((volatile unsigned int*)(0x424A5200UL))
\r
3265 #define bFM3_BT6_PPG_STC_TGIR *((volatile unsigned int*)(0x424A5208UL))
\r
3266 #define bFM3_BT6_PPG_STC_UDIE *((volatile unsigned int*)(0x424A5210UL))
\r
3267 #define bFM3_BT6_PPG_STC_TGIE *((volatile unsigned int*)(0x424A5218UL))
\r
3268 #define bFM3_BT6_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5220UL))
\r
3270 /* Base Timer 6 PWM registers */
\r
3271 #define bFM3_BT6_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A5180UL))
\r
3272 #define bFM3_BT6_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A5184UL))
\r
3273 #define bFM3_BT6_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A5188UL))
\r
3274 #define bFM3_BT6_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A518CUL))
\r
3275 #define bFM3_BT6_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A5190UL))
\r
3276 #define bFM3_BT6_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A5194UL))
\r
3277 #define bFM3_BT6_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A5198UL))
\r
3278 #define bFM3_BT6_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A51A0UL))
\r
3279 #define bFM3_BT6_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A51A4UL))
\r
3280 #define bFM3_BT6_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A51A8UL))
\r
3281 #define bFM3_BT6_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A51ACUL))
\r
3282 #define bFM3_BT6_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A51B0UL))
\r
3283 #define bFM3_BT6_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A51B4UL))
\r
3284 #define bFM3_BT6_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A51B8UL))
\r
3285 #define bFM3_BT6_PWM_STC_UDIR *((volatile unsigned int*)(0x424A5200UL))
\r
3286 #define bFM3_BT6_PWM_STC_DTIR *((volatile unsigned int*)(0x424A5204UL))
\r
3287 #define bFM3_BT6_PWM_STC_TGIR *((volatile unsigned int*)(0x424A5208UL))
\r
3288 #define bFM3_BT6_PWM_STC_UDIE *((volatile unsigned int*)(0x424A5210UL))
\r
3289 #define bFM3_BT6_PWM_STC_DTIE *((volatile unsigned int*)(0x424A5214UL))
\r
3290 #define bFM3_BT6_PWM_STC_TGIE *((volatile unsigned int*)(0x424A5218UL))
\r
3291 #define bFM3_BT6_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5220UL))
\r
3293 /* Base Timer 6 RT registers */
\r
3294 #define bFM3_BT6_RT_TMCR_STRG *((volatile unsigned int*)(0x424A5180UL))
\r
3295 #define bFM3_BT6_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A5184UL))
\r
3296 #define bFM3_BT6_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A5188UL))
\r
3297 #define bFM3_BT6_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A518CUL))
\r
3298 #define bFM3_BT6_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A5190UL))
\r
3299 #define bFM3_BT6_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A5194UL))
\r
3300 #define bFM3_BT6_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A5198UL))
\r
3301 #define bFM3_BT6_RT_TMCR_T32 *((volatile unsigned int*)(0x424A519CUL))
\r
3302 #define bFM3_BT6_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A51A0UL))
\r
3303 #define bFM3_BT6_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A51A4UL))
\r
3304 #define bFM3_BT6_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A51B0UL))
\r
3305 #define bFM3_BT6_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A51B4UL))
\r
3306 #define bFM3_BT6_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A51B8UL))
\r
3307 #define bFM3_BT6_RT_STC_UDIR *((volatile unsigned int*)(0x424A5200UL))
\r
3308 #define bFM3_BT6_RT_STC_TGIR *((volatile unsigned int*)(0x424A5208UL))
\r
3309 #define bFM3_BT6_RT_STC_UDIE *((volatile unsigned int*)(0x424A5210UL))
\r
3310 #define bFM3_BT6_RT_STC_TGIE *((volatile unsigned int*)(0x424A5218UL))
\r
3311 #define bFM3_BT6_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5220UL))
\r
3313 /* Base Timer 6 PWC registers */
\r
3314 #define bFM3_BT6_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A5184UL))
\r
3315 #define bFM3_BT6_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A5188UL))
\r
3316 #define bFM3_BT6_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A5190UL))
\r
3317 #define bFM3_BT6_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A5194UL))
\r
3318 #define bFM3_BT6_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A5198UL))
\r
3319 #define bFM3_BT6_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A519CUL))
\r
3320 #define bFM3_BT6_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A51A0UL))
\r
3321 #define bFM3_BT6_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A51A4UL))
\r
3322 #define bFM3_BT6_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A51A8UL))
\r
3323 #define bFM3_BT6_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A51B0UL))
\r
3324 #define bFM3_BT6_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A51B4UL))
\r
3325 #define bFM3_BT6_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A51B8UL))
\r
3326 #define bFM3_BT6_PWC_STC_OVIR *((volatile unsigned int*)(0x424A5200UL))
\r
3327 #define bFM3_BT6_PWC_STC_EDIR *((volatile unsigned int*)(0x424A5208UL))
\r
3328 #define bFM3_BT6_PWC_STC_OVIE *((volatile unsigned int*)(0x424A5210UL))
\r
3329 #define bFM3_BT6_PWC_STC_EDIE *((volatile unsigned int*)(0x424A5218UL))
\r
3330 #define bFM3_BT6_PWC_STC_ERR *((volatile unsigned int*)(0x424A521CUL))
\r
3331 #define bFM3_BT6_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5220UL))
\r
3333 /* Base Timer 7 PPG registers */
\r
3334 #define bFM3_BT7_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A5980UL))
\r
3335 #define bFM3_BT7_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A5984UL))
\r
3336 #define bFM3_BT7_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A5988UL))
\r
3337 #define bFM3_BT7_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A598CUL))
\r
3338 #define bFM3_BT7_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A5990UL))
\r
3339 #define bFM3_BT7_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A5994UL))
\r
3340 #define bFM3_BT7_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A5998UL))
\r
3341 #define bFM3_BT7_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A59A0UL))
\r
3342 #define bFM3_BT7_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A59A4UL))
\r
3343 #define bFM3_BT7_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A59A8UL))
\r
3344 #define bFM3_BT7_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A59ACUL))
\r
3345 #define bFM3_BT7_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A59B0UL))
\r
3346 #define bFM3_BT7_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A59B4UL))
\r
3347 #define bFM3_BT7_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A59B8UL))
\r
3348 #define bFM3_BT7_PPG_STC_UDIR *((volatile unsigned int*)(0x424A5A00UL))
\r
3349 #define bFM3_BT7_PPG_STC_TGIR *((volatile unsigned int*)(0x424A5A08UL))
\r
3350 #define bFM3_BT7_PPG_STC_UDIE *((volatile unsigned int*)(0x424A5A10UL))
\r
3351 #define bFM3_BT7_PPG_STC_TGIE *((volatile unsigned int*)(0x424A5A18UL))
\r
3352 #define bFM3_BT7_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5A20UL))
\r
3354 /* Base Timer 7 PWM registers */
\r
3355 #define bFM3_BT7_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A5980UL))
\r
3356 #define bFM3_BT7_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A5984UL))
\r
3357 #define bFM3_BT7_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A5988UL))
\r
3358 #define bFM3_BT7_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A598CUL))
\r
3359 #define bFM3_BT7_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A5990UL))
\r
3360 #define bFM3_BT7_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A5994UL))
\r
3361 #define bFM3_BT7_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A5998UL))
\r
3362 #define bFM3_BT7_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A59A0UL))
\r
3363 #define bFM3_BT7_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A59A4UL))
\r
3364 #define bFM3_BT7_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A59A8UL))
\r
3365 #define bFM3_BT7_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A59ACUL))
\r
3366 #define bFM3_BT7_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A59B0UL))
\r
3367 #define bFM3_BT7_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A59B4UL))
\r
3368 #define bFM3_BT7_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A59B8UL))
\r
3369 #define bFM3_BT7_PWM_STC_UDIR *((volatile unsigned int*)(0x424A5A00UL))
\r
3370 #define bFM3_BT7_PWM_STC_DTIR *((volatile unsigned int*)(0x424A5A04UL))
\r
3371 #define bFM3_BT7_PWM_STC_TGIR *((volatile unsigned int*)(0x424A5A08UL))
\r
3372 #define bFM3_BT7_PWM_STC_UDIE *((volatile unsigned int*)(0x424A5A10UL))
\r
3373 #define bFM3_BT7_PWM_STC_DTIE *((volatile unsigned int*)(0x424A5A14UL))
\r
3374 #define bFM3_BT7_PWM_STC_TGIE *((volatile unsigned int*)(0x424A5A18UL))
\r
3375 #define bFM3_BT7_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5A20UL))
\r
3377 /* Base Timer 7 RT registers */
\r
3378 #define bFM3_BT7_RT_TMCR_STRG *((volatile unsigned int*)(0x424A5980UL))
\r
3379 #define bFM3_BT7_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A5984UL))
\r
3380 #define bFM3_BT7_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A5988UL))
\r
3381 #define bFM3_BT7_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A598CUL))
\r
3382 #define bFM3_BT7_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A5990UL))
\r
3383 #define bFM3_BT7_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A5994UL))
\r
3384 #define bFM3_BT7_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A5998UL))
\r
3385 #define bFM3_BT7_RT_TMCR_T32 *((volatile unsigned int*)(0x424A599CUL))
\r
3386 #define bFM3_BT7_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A59A0UL))
\r
3387 #define bFM3_BT7_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A59A4UL))
\r
3388 #define bFM3_BT7_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A59B0UL))
\r
3389 #define bFM3_BT7_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A59B4UL))
\r
3390 #define bFM3_BT7_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A59B8UL))
\r
3391 #define bFM3_BT7_RT_STC_UDIR *((volatile unsigned int*)(0x424A5A00UL))
\r
3392 #define bFM3_BT7_RT_STC_TGIR *((volatile unsigned int*)(0x424A5A08UL))
\r
3393 #define bFM3_BT7_RT_STC_UDIE *((volatile unsigned int*)(0x424A5A10UL))
\r
3394 #define bFM3_BT7_RT_STC_TGIE *((volatile unsigned int*)(0x424A5A18UL))
\r
3395 #define bFM3_BT7_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5A20UL))
\r
3397 /* Base Timer 7 PWC registers */
\r
3398 #define bFM3_BT7_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A5984UL))
\r
3399 #define bFM3_BT7_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A5988UL))
\r
3400 #define bFM3_BT7_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A5990UL))
\r
3401 #define bFM3_BT7_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A5994UL))
\r
3402 #define bFM3_BT7_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A5998UL))
\r
3403 #define bFM3_BT7_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A599CUL))
\r
3404 #define bFM3_BT7_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A59A0UL))
\r
3405 #define bFM3_BT7_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A59A4UL))
\r
3406 #define bFM3_BT7_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A59A8UL))
\r
3407 #define bFM3_BT7_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A59B0UL))
\r
3408 #define bFM3_BT7_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A59B4UL))
\r
3409 #define bFM3_BT7_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A59B8UL))
\r
3410 #define bFM3_BT7_PWC_STC_OVIR *((volatile unsigned int*)(0x424A5A00UL))
\r
3411 #define bFM3_BT7_PWC_STC_EDIR *((volatile unsigned int*)(0x424A5A08UL))
\r
3412 #define bFM3_BT7_PWC_STC_OVIE *((volatile unsigned int*)(0x424A5A10UL))
\r
3413 #define bFM3_BT7_PWC_STC_EDIE *((volatile unsigned int*)(0x424A5A18UL))
\r
3414 #define bFM3_BT7_PWC_STC_ERR *((volatile unsigned int*)(0x424A5A1CUL))
\r
3415 #define bFM3_BT7_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5A20UL))
\r
3417 /* Base Timer I/O selector channel 0 - channel 3 registers */
\r
3418 #define bFM3_BTIOSEL03_BTSEL0123_SEL01_0 *((volatile unsigned int*)(0x424A2020UL))
\r
3419 #define bFM3_BTIOSEL03_BTSEL0123_SEL01_1 *((volatile unsigned int*)(0x424A2024UL))
\r
3420 #define bFM3_BTIOSEL03_BTSEL0123_SEL01_2 *((volatile unsigned int*)(0x424A2028UL))
\r
3421 #define bFM3_BTIOSEL03_BTSEL0123_SEL01_3 *((volatile unsigned int*)(0x424A202CUL))
\r
3422 #define bFM3_BTIOSEL03_BTSEL0123_SEL23_0 *((volatile unsigned int*)(0x424A2030UL))
\r
3423 #define bFM3_BTIOSEL03_BTSEL0123_SEL23_1 *((volatile unsigned int*)(0x424A2034UL))
\r
3424 #define bFM3_BTIOSEL03_BTSEL0123_SEL23_2 *((volatile unsigned int*)(0x424A2038UL))
\r
3425 #define bFM3_BTIOSEL03_BTSEL0123_SEL23_3 *((volatile unsigned int*)(0x424A203CUL))
\r
3427 /* Base Timer I/O selector channel 4 - channel 7 registers */
\r
3428 #define bFM3_BTIOSEL47_BTSEL4567_SEL45_0 *((volatile unsigned int*)(0x424A6020UL))
\r
3429 #define bFM3_BTIOSEL47_BTSEL4567_SEL45_1 *((volatile unsigned int*)(0x424A6024UL))
\r
3430 #define bFM3_BTIOSEL47_BTSEL4567_SEL45_2 *((volatile unsigned int*)(0x424A6028UL))
\r
3431 #define bFM3_BTIOSEL47_BTSEL4567_SEL45_3 *((volatile unsigned int*)(0x424A602CUL))
\r
3432 #define bFM3_BTIOSEL47_BTSEL4567_SEL67_0 *((volatile unsigned int*)(0x424A6030UL))
\r
3433 #define bFM3_BTIOSEL47_BTSEL4567_SEL67_1 *((volatile unsigned int*)(0x424A6034UL))
\r
3434 #define bFM3_BTIOSEL47_BTSEL4567_SEL67_2 *((volatile unsigned int*)(0x424A6038UL))
\r
3435 #define bFM3_BTIOSEL47_BTSEL4567_SEL67_3 *((volatile unsigned int*)(0x424A603CUL))
\r
3437 /* Software based Simulation Startup (Base Timer) register */
\r
3438 #define bFM3_SBSSR_BTSSSR_SSR0 *((volatile unsigned int*)(0x424BFF80UL))
\r
3439 #define bFM3_SBSSR_BTSSSR_SSR1 *((volatile unsigned int*)(0x424BFF84UL))
\r
3440 #define bFM3_SBSSR_BTSSSR_SSR2 *((volatile unsigned int*)(0x424BFF88UL))
\r
3441 #define bFM3_SBSSR_BTSSSR_SSR3 *((volatile unsigned int*)(0x424BFF8CUL))
\r
3442 #define bFM3_SBSSR_BTSSSR_SSR4 *((volatile unsigned int*)(0x424BFF90UL))
\r
3443 #define bFM3_SBSSR_BTSSSR_SSR5 *((volatile unsigned int*)(0x424BFF94UL))
\r
3444 #define bFM3_SBSSR_BTSSSR_SSR6 *((volatile unsigned int*)(0x424BFF98UL))
\r
3445 #define bFM3_SBSSR_BTSSSR_SSR7 *((volatile unsigned int*)(0x424BFF9CUL))
\r
3446 #define bFM3_SBSSR_BTSSSR_SSR8 *((volatile unsigned int*)(0x424BFFA0UL))
\r
3447 #define bFM3_SBSSR_BTSSSR_SSR9 *((volatile unsigned int*)(0x424BFFA4UL))
\r
3448 #define bFM3_SBSSR_BTSSSR_SSR10 *((volatile unsigned int*)(0x424BFFA8UL))
\r
3449 #define bFM3_SBSSR_BTSSSR_SSR11 *((volatile unsigned int*)(0x424BFFACUL))
\r
3450 #define bFM3_SBSSR_BTSSSR_SSR12 *((volatile unsigned int*)(0x424BFFB0UL))
\r
3451 #define bFM3_SBSSR_BTSSSR_SSR13 *((volatile unsigned int*)(0x424BFFB4UL))
\r
3452 #define bFM3_SBSSR_BTSSSR_SSR14 *((volatile unsigned int*)(0x424BFFB8UL))
\r
3453 #define bFM3_SBSSR_BTSSSR_SSR15 *((volatile unsigned int*)(0x424BFFBCUL))
\r
3455 /* Quad position and revolution counter channel 0 registers */
\r
3456 #define bFM3_QPRC0_QICR_QPCMIE *((volatile unsigned int*)(0x424C0280UL))
\r
3457 #define bFM3_QPRC0_QICR_QPCMF *((volatile unsigned int*)(0x424C0284UL))
\r
3458 #define bFM3_QPRC0_QICR_QPRCMIE *((volatile unsigned int*)(0x424C0288UL))
\r
3459 #define bFM3_QPRC0_QICR_QPRCMF *((volatile unsigned int*)(0x424C028CUL))
\r
3460 #define bFM3_QPRC0_QICR_OUZIE *((volatile unsigned int*)(0x424C0290UL))
\r
3461 #define bFM3_QPRC0_QICR_UFDF *((volatile unsigned int*)(0x424C0294UL))
\r
3462 #define bFM3_QPRC0_QICR_OFDF *((volatile unsigned int*)(0x424C0298UL))
\r
3463 #define bFM3_QPRC0_QICR_ZIIF *((volatile unsigned int*)(0x424C029CUL))
\r
3464 #define bFM3_QPRC0_QICR_CDCIE *((volatile unsigned int*)(0x424C02A0UL))
\r
3465 #define bFM3_QPRC0_QICR_CDCF *((volatile unsigned int*)(0x424C02A4UL))
\r
3466 #define bFM3_QPRC0_QICR_DIRPC *((volatile unsigned int*)(0x424C02A8UL))
\r
3467 #define bFM3_QPRC0_QICR_DIROU *((volatile unsigned int*)(0x424C02ACUL))
\r
3468 #define bFM3_QPRC0_QICR_QPCNRCMIE *((volatile unsigned int*)(0x424C02B0UL))
\r
3469 #define bFM3_QPRC0_QICR_QPCNRCMF *((volatile unsigned int*)(0x424C02B4UL))
\r
3470 #define bFM3_QPRC0_QICRL_QPCMIE *((volatile unsigned int*)(0x424C0280UL))
\r
3471 #define bFM3_QPRC0_QICRL_QPCMF *((volatile unsigned int*)(0x424C0284UL))
\r
3472 #define bFM3_QPRC0_QICRL_QPRCMIE *((volatile unsigned int*)(0x424C0288UL))
\r
3473 #define bFM3_QPRC0_QICRL_QPRCMF *((volatile unsigned int*)(0x424C028CUL))
\r
3474 #define bFM3_QPRC0_QICRL_OUZIE *((volatile unsigned int*)(0x424C0290UL))
\r
3475 #define bFM3_QPRC0_QICRL_UFDF *((volatile unsigned int*)(0x424C0294UL))
\r
3476 #define bFM3_QPRC0_QICRL_OFDF *((volatile unsigned int*)(0x424C0298UL))
\r
3477 #define bFM3_QPRC0_QICRL_ZIIF *((volatile unsigned int*)(0x424C029CUL))
\r
3478 #define bFM3_QPRC0_QICRH_CDCIE *((volatile unsigned int*)(0x424C02A0UL))
\r
3479 #define bFM3_QPRC0_QICRH_CDCF *((volatile unsigned int*)(0x424C02A4UL))
\r
3480 #define bFM3_QPRC0_QICRH_DIRPC *((volatile unsigned int*)(0x424C02A8UL))
\r
3481 #define bFM3_QPRC0_QICRH_DIROU *((volatile unsigned int*)(0x424C02ACUL))
\r
3482 #define bFM3_QPRC0_QICRH_QPCNRCMIE *((volatile unsigned int*)(0x424C02B0UL))
\r
3483 #define bFM3_QPRC0_QICRH_QPCNRCMF *((volatile unsigned int*)(0x424C02B4UL))
\r
3484 #define bFM3_QPRC0_QCR_PCM0 *((volatile unsigned int*)(0x424C0300UL))
\r
3485 #define bFM3_QPRC0_QCR_PCM1 *((volatile unsigned int*)(0x424C0304UL))
\r
3486 #define bFM3_QPRC0_QCR_RCM0 *((volatile unsigned int*)(0x424C0308UL))
\r
3487 #define bFM3_QPRC0_QCR_RCM1 *((volatile unsigned int*)(0x424C030CUL))
\r
3488 #define bFM3_QPRC0_QCR_PSTP *((volatile unsigned int*)(0x424C0310UL))
\r
3489 #define bFM3_QPRC0_QCR_CGSC *((volatile unsigned int*)(0x424C0314UL))
\r
3490 #define bFM3_QPRC0_QCR_RSEL *((volatile unsigned int*)(0x424C0318UL))
\r
3491 #define bFM3_QPRC0_QCR_SWAP *((volatile unsigned int*)(0x424C031CUL))
\r
3492 #define bFM3_QPRC0_QCR_PCRM0 *((volatile unsigned int*)(0x424C0320UL))
\r
3493 #define bFM3_QPRC0_QCR_PCRM1 *((volatile unsigned int*)(0x424C0324UL))
\r
3494 #define bFM3_QPRC0_QCR_AES0 *((volatile unsigned int*)(0x424C0328UL))
\r
3495 #define bFM3_QPRC0_QCR_AES1 *((volatile unsigned int*)(0x424C032CUL))
\r
3496 #define bFM3_QPRC0_QCR_BES0 *((volatile unsigned int*)(0x424C0330UL))
\r
3497 #define bFM3_QPRC0_QCR_BES1 *((volatile unsigned int*)(0x424C0334UL))
\r
3498 #define bFM3_QPRC0_QCR_CGE0 *((volatile unsigned int*)(0x424C0338UL))
\r
3499 #define bFM3_QPRC0_QCR_CGE1 *((volatile unsigned int*)(0x424C033CUL))
\r
3500 #define bFM3_QPRC0_QCRL_PCM0 *((volatile unsigned int*)(0x424C0300UL))
\r
3501 #define bFM3_QPRC0_QCRL_PCM1 *((volatile unsigned int*)(0x424C0304UL))
\r
3502 #define bFM3_QPRC0_QCRL_RCM0 *((volatile unsigned int*)(0x424C0308UL))
\r
3503 #define bFM3_QPRC0_QCRL_RCM1 *((volatile unsigned int*)(0x424C030CUL))
\r
3504 #define bFM3_QPRC0_QCRL_PSTP *((volatile unsigned int*)(0x424C0310UL))
\r
3505 #define bFM3_QPRC0_QCRL_CGSC *((volatile unsigned int*)(0x424C0314UL))
\r
3506 #define bFM3_QPRC0_QCRL_RSEL *((volatile unsigned int*)(0x424C0318UL))
\r
3507 #define bFM3_QPRC0_QCRL_SWAP *((volatile unsigned int*)(0x424C031CUL))
\r
3508 #define bFM3_QPRC0_QCRH_PCRM0 *((volatile unsigned int*)(0x424C0320UL))
\r
3509 #define bFM3_QPRC0_QCRH_PCRM1 *((volatile unsigned int*)(0x424C0324UL))
\r
3510 #define bFM3_QPRC0_QCRH_AES0 *((volatile unsigned int*)(0x424C0328UL))
\r
3511 #define bFM3_QPRC0_QCRH_AES1 *((volatile unsigned int*)(0x424C032CUL))
\r
3512 #define bFM3_QPRC0_QCRH_BES0 *((volatile unsigned int*)(0x424C0330UL))
\r
3513 #define bFM3_QPRC0_QCRH_BES1 *((volatile unsigned int*)(0x424C0334UL))
\r
3514 #define bFM3_QPRC0_QCRH_CGE0 *((volatile unsigned int*)(0x424C0338UL))
\r
3515 #define bFM3_QPRC0_QCRH_CGE1 *((volatile unsigned int*)(0x424C033CUL))
\r
3516 #define bFM3_QPRC0_QECR_ORNGMD *((volatile unsigned int*)(0x424C0380UL))
\r
3517 #define bFM3_QPRC0_QECR_ORNGF *((volatile unsigned int*)(0x424C0384UL))
\r
3518 #define bFM3_QPRC0_QECR_ORNGIE *((volatile unsigned int*)(0x424C0388UL))
\r
3520 /* Quad position and revolution counter channel 1 registers */
\r
3521 #define bFM3_QPRC1_QICR_QPCMIE *((volatile unsigned int*)(0x424C0A80UL))
\r
3522 #define bFM3_QPRC1_QICR_QPCMF *((volatile unsigned int*)(0x424C0A84UL))
\r
3523 #define bFM3_QPRC1_QICR_QPRCMIE *((volatile unsigned int*)(0x424C0A88UL))
\r
3524 #define bFM3_QPRC1_QICR_QPRCMF *((volatile unsigned int*)(0x424C0A8CUL))
\r
3525 #define bFM3_QPRC1_QICR_OUZIE *((volatile unsigned int*)(0x424C0A90UL))
\r
3526 #define bFM3_QPRC1_QICR_UFDF *((volatile unsigned int*)(0x424C0A94UL))
\r
3527 #define bFM3_QPRC1_QICR_OFDF *((volatile unsigned int*)(0x424C0A98UL))
\r
3528 #define bFM3_QPRC1_QICR_ZIIF *((volatile unsigned int*)(0x424C0A9CUL))
\r
3529 #define bFM3_QPRC1_QICR_CDCIE *((volatile unsigned int*)(0x424C0AA0UL))
\r
3530 #define bFM3_QPRC1_QICR_CDCF *((volatile unsigned int*)(0x424C0AA4UL))
\r
3531 #define bFM3_QPRC1_QICR_DIRPC *((volatile unsigned int*)(0x424C0AA8UL))
\r
3532 #define bFM3_QPRC1_QICR_DIROU *((volatile unsigned int*)(0x424C0AACUL))
\r
3533 #define bFM3_QPRC1_QICR_QPCNRCMIE *((volatile unsigned int*)(0x424C0AB0UL))
\r
3534 #define bFM3_QPRC1_QICR_QPCNRCMF *((volatile unsigned int*)(0x424C0AB4UL))
\r
3535 #define bFM3_QPRC1_QICRL_QPCMIE *((volatile unsigned int*)(0x424C0A80UL))
\r
3536 #define bFM3_QPRC1_QICRL_QPCMF *((volatile unsigned int*)(0x424C0A84UL))
\r
3537 #define bFM3_QPRC1_QICRL_QPRCMIE *((volatile unsigned int*)(0x424C0A88UL))
\r
3538 #define bFM3_QPRC1_QICRL_QPRCMF *((volatile unsigned int*)(0x424C0A8CUL))
\r
3539 #define bFM3_QPRC1_QICRL_OUZIE *((volatile unsigned int*)(0x424C0A90UL))
\r
3540 #define bFM3_QPRC1_QICRL_UFDF *((volatile unsigned int*)(0x424C0A94UL))
\r
3541 #define bFM3_QPRC1_QICRL_OFDF *((volatile unsigned int*)(0x424C0A98UL))
\r
3542 #define bFM3_QPRC1_QICRL_ZIIF *((volatile unsigned int*)(0x424C0A9CUL))
\r
3543 #define bFM3_QPRC1_QICRH_CDCIE *((volatile unsigned int*)(0x424C0AA0UL))
\r
3544 #define bFM3_QPRC1_QICRH_CDCF *((volatile unsigned int*)(0x424C0AA4UL))
\r
3545 #define bFM3_QPRC1_QICRH_DIRPC *((volatile unsigned int*)(0x424C0AA8UL))
\r
3546 #define bFM3_QPRC1_QICRH_DIROU *((volatile unsigned int*)(0x424C0AACUL))
\r
3547 #define bFM3_QPRC1_QICRH_QPCNRCMIE *((volatile unsigned int*)(0x424C0AB0UL))
\r
3548 #define bFM3_QPRC1_QICRH_QPCNRCMF *((volatile unsigned int*)(0x424C0AB4UL))
\r
3549 #define bFM3_QPRC1_QCR_PCM0 *((volatile unsigned int*)(0x424C0B00UL))
\r
3550 #define bFM3_QPRC1_QCR_PCM1 *((volatile unsigned int*)(0x424C0B04UL))
\r
3551 #define bFM3_QPRC1_QCR_RCM0 *((volatile unsigned int*)(0x424C0B08UL))
\r
3552 #define bFM3_QPRC1_QCR_RCM1 *((volatile unsigned int*)(0x424C0B0CUL))
\r
3553 #define bFM3_QPRC1_QCR_PSTP *((volatile unsigned int*)(0x424C0B10UL))
\r
3554 #define bFM3_QPRC1_QCR_CGSC *((volatile unsigned int*)(0x424C0B14UL))
\r
3555 #define bFM3_QPRC1_QCR_RSEL *((volatile unsigned int*)(0x424C0B18UL))
\r
3556 #define bFM3_QPRC1_QCR_SWAP *((volatile unsigned int*)(0x424C0B1CUL))
\r
3557 #define bFM3_QPRC1_QCR_PCRM0 *((volatile unsigned int*)(0x424C0B20UL))
\r
3558 #define bFM3_QPRC1_QCR_PCRM1 *((volatile unsigned int*)(0x424C0B24UL))
\r
3559 #define bFM3_QPRC1_QCR_AES0 *((volatile unsigned int*)(0x424C0B28UL))
\r
3560 #define bFM3_QPRC1_QCR_AES1 *((volatile unsigned int*)(0x424C0B2CUL))
\r
3561 #define bFM3_QPRC1_QCR_BES0 *((volatile unsigned int*)(0x424C0B30UL))
\r
3562 #define bFM3_QPRC1_QCR_BES1 *((volatile unsigned int*)(0x424C0B34UL))
\r
3563 #define bFM3_QPRC1_QCR_CGE0 *((volatile unsigned int*)(0x424C0B38UL))
\r
3564 #define bFM3_QPRC1_QCR_CGE1 *((volatile unsigned int*)(0x424C0B3CUL))
\r
3565 #define bFM3_QPRC1_QCRL_PCM0 *((volatile unsigned int*)(0x424C0B00UL))
\r
3566 #define bFM3_QPRC1_QCRL_PCM1 *((volatile unsigned int*)(0x424C0B04UL))
\r
3567 #define bFM3_QPRC1_QCRL_RCM0 *((volatile unsigned int*)(0x424C0B08UL))
\r
3568 #define bFM3_QPRC1_QCRL_RCM1 *((volatile unsigned int*)(0x424C0B0CUL))
\r
3569 #define bFM3_QPRC1_QCRL_PSTP *((volatile unsigned int*)(0x424C0B10UL))
\r
3570 #define bFM3_QPRC1_QCRL_CGSC *((volatile unsigned int*)(0x424C0B14UL))
\r
3571 #define bFM3_QPRC1_QCRL_RSEL *((volatile unsigned int*)(0x424C0B18UL))
\r
3572 #define bFM3_QPRC1_QCRL_SWAP *((volatile unsigned int*)(0x424C0B1CUL))
\r
3573 #define bFM3_QPRC1_QCRH_PCRM0 *((volatile unsigned int*)(0x424C0B20UL))
\r
3574 #define bFM3_QPRC1_QCRH_PCRM1 *((volatile unsigned int*)(0x424C0B24UL))
\r
3575 #define bFM3_QPRC1_QCRH_AES0 *((volatile unsigned int*)(0x424C0B28UL))
\r
3576 #define bFM3_QPRC1_QCRH_AES1 *((volatile unsigned int*)(0x424C0B2CUL))
\r
3577 #define bFM3_QPRC1_QCRH_BES0 *((volatile unsigned int*)(0x424C0B30UL))
\r
3578 #define bFM3_QPRC1_QCRH_BES1 *((volatile unsigned int*)(0x424C0B34UL))
\r
3579 #define bFM3_QPRC1_QCRH_CGE0 *((volatile unsigned int*)(0x424C0B38UL))
\r
3580 #define bFM3_QPRC1_QCRH_CGE1 *((volatile unsigned int*)(0x424C0B3CUL))
\r
3581 #define bFM3_QPRC1_QECR_ORNGMD *((volatile unsigned int*)(0x424C0B80UL))
\r
3582 #define bFM3_QPRC1_QECR_ORNGF *((volatile unsigned int*)(0x424C0B84UL))
\r
3583 #define bFM3_QPRC1_QECR_ORNGIE *((volatile unsigned int*)(0x424C0B88UL))
\r
3585 /* 12-bit ADC unit 0 registers */
\r
3586 #define bFM3_ADC0_ADSR_SCS *((volatile unsigned int*)(0x424E0000UL))
\r
3587 #define bFM3_ADC0_ADSR_PCS *((volatile unsigned int*)(0x424E0004UL))
\r
3588 #define bFM3_ADC0_ADSR_PCNS *((volatile unsigned int*)(0x424E0008UL))
\r
3589 #define bFM3_ADC0_ADSR_FDAS *((volatile unsigned int*)(0x424E0018UL))
\r
3590 #define bFM3_ADC0_ADSR_ADSTP *((volatile unsigned int*)(0x424E001CUL))
\r
3591 #define bFM3_ADC0_ADCR_OVRIE *((volatile unsigned int*)(0x424E0020UL))
\r
3592 #define bFM3_ADC0_ADCR_CMPIE *((volatile unsigned int*)(0x424E0024UL))
\r
3593 #define bFM3_ADC0_ADCR_PCIE *((volatile unsigned int*)(0x424E0028UL))
\r
3594 #define bFM3_ADC0_ADCR_SCIE *((volatile unsigned int*)(0x424E002CUL))
\r
3595 #define bFM3_ADC0_ADCR_CMPIF *((volatile unsigned int*)(0x424E0034UL))
\r
3596 #define bFM3_ADC0_ADCR_PCIF *((volatile unsigned int*)(0x424E0038UL))
\r
3597 #define bFM3_ADC0_ADCR_SCIF *((volatile unsigned int*)(0x424E003CUL))
\r
3598 #define bFM3_ADC0_SFNS_SFS0 *((volatile unsigned int*)(0x424E0100UL))
\r
3599 #define bFM3_ADC0_SFNS_SFS1 *((volatile unsigned int*)(0x424E0104UL))
\r
3600 #define bFM3_ADC0_SFNS_SFS2 *((volatile unsigned int*)(0x424E0108UL))
\r
3601 #define bFM3_ADC0_SFNS_SFS3 *((volatile unsigned int*)(0x424E010CUL))
\r
3602 #define bFM3_ADC0_SCCR_SSTR *((volatile unsigned int*)(0x424E0120UL))
\r
3603 #define bFM3_ADC0_SCCR_SHEN *((volatile unsigned int*)(0x424E0124UL))
\r
3604 #define bFM3_ADC0_SCCR_RPT *((volatile unsigned int*)(0x424E0128UL))
\r
3605 #define bFM3_ADC0_SCCR_SFCLR *((volatile unsigned int*)(0x424E0130UL))
\r
3606 #define bFM3_ADC0_SCCR_SOVR *((volatile unsigned int*)(0x424E0134UL))
\r
3607 #define bFM3_ADC0_SCCR_SFUL *((volatile unsigned int*)(0x424E0138UL))
\r
3608 #define bFM3_ADC0_SCCR_SEMP *((volatile unsigned int*)(0x424E013CUL))
\r
3609 #define bFM3_ADC0_SCFD_SC0 *((volatile unsigned int*)(0x424E0180UL))
\r
3610 #define bFM3_ADC0_SCFD_SC1 *((volatile unsigned int*)(0x424E0184UL))
\r
3611 #define bFM3_ADC0_SCFD_SC2 *((volatile unsigned int*)(0x424E0188UL))
\r
3612 #define bFM3_ADC0_SCFD_SC3 *((volatile unsigned int*)(0x424E018CUL))
\r
3613 #define bFM3_ADC0_SCFD_SC4 *((volatile unsigned int*)(0x424E0190UL))
\r
3614 #define bFM3_ADC0_SCFD_RS0 *((volatile unsigned int*)(0x424E01A0UL))
\r
3615 #define bFM3_ADC0_SCFD_RS1 *((volatile unsigned int*)(0x424E01A4UL))
\r
3616 #define bFM3_ADC0_SCFD_INVL *((volatile unsigned int*)(0x424E01B0UL))
\r
3617 #define bFM3_ADC0_SCFD_SD0 *((volatile unsigned int*)(0x424E01D0UL))
\r
3618 #define bFM3_ADC0_SCFD_SD1 *((volatile unsigned int*)(0x424E01D4UL))
\r
3619 #define bFM3_ADC0_SCFD_SD2 *((volatile unsigned int*)(0x424E01D8UL))
\r
3620 #define bFM3_ADC0_SCFD_SD3 *((volatile unsigned int*)(0x424E01DCUL))
\r
3621 #define bFM3_ADC0_SCFD_SD4 *((volatile unsigned int*)(0x424E01E0UL))
\r
3622 #define bFM3_ADC0_SCFD_SD5 *((volatile unsigned int*)(0x424E01E4UL))
\r
3623 #define bFM3_ADC0_SCFD_SD6 *((volatile unsigned int*)(0x424E01E8UL))
\r
3624 #define bFM3_ADC0_SCFD_SD7 *((volatile unsigned int*)(0x424E01ECUL))
\r
3625 #define bFM3_ADC0_SCFD_SD8 *((volatile unsigned int*)(0x424E01F0UL))
\r
3626 #define bFM3_ADC0_SCFD_SD9 *((volatile unsigned int*)(0x424E01F4UL))
\r
3627 #define bFM3_ADC0_SCFD_SD10 *((volatile unsigned int*)(0x424E01F8UL))
\r
3628 #define bFM3_ADC0_SCFD_SD11 *((volatile unsigned int*)(0x424E01FCUL))
\r
3629 #define bFM3_ADC0_SCFDL_SC0 *((volatile unsigned int*)(0x424E0180UL))
\r
3630 #define bFM3_ADC0_SCFDL_SC1 *((volatile unsigned int*)(0x424E0184UL))
\r
3631 #define bFM3_ADC0_SCFDL_SC2 *((volatile unsigned int*)(0x424E0188UL))
\r
3632 #define bFM3_ADC0_SCFDL_SC3 *((volatile unsigned int*)(0x424E018CUL))
\r
3633 #define bFM3_ADC0_SCFDL_SC4 *((volatile unsigned int*)(0x424E0190UL))
\r
3634 #define bFM3_ADC0_SCFDL_RS0 *((volatile unsigned int*)(0x424E01A0UL))
\r
3635 #define bFM3_ADC0_SCFDL_RS1 *((volatile unsigned int*)(0x424E01A4UL))
\r
3636 #define bFM3_ADC0_SCFDL_INVL *((volatile unsigned int*)(0x424E01B0UL))
\r
3637 #define bFM3_ADC0_SCFDH_SD0 *((volatile unsigned int*)(0x424E01D0UL))
\r
3638 #define bFM3_ADC0_SCFDH_SD1 *((volatile unsigned int*)(0x424E01D4UL))
\r
3639 #define bFM3_ADC0_SCFDH_SD2 *((volatile unsigned int*)(0x424E01D8UL))
\r
3640 #define bFM3_ADC0_SCFDH_SD3 *((volatile unsigned int*)(0x424E01DCUL))
\r
3641 #define bFM3_ADC0_SCFDH_SD4 *((volatile unsigned int*)(0x424E01E0UL))
\r
3642 #define bFM3_ADC0_SCFDH_SD5 *((volatile unsigned int*)(0x424E01E4UL))
\r
3643 #define bFM3_ADC0_SCFDH_SD6 *((volatile unsigned int*)(0x424E01E8UL))
\r
3644 #define bFM3_ADC0_SCFDH_SD7 *((volatile unsigned int*)(0x424E01ECUL))
\r
3645 #define bFM3_ADC0_SCFDH_SD8 *((volatile unsigned int*)(0x424E01F0UL))
\r
3646 #define bFM3_ADC0_SCFDH_SD9 *((volatile unsigned int*)(0x424E01F4UL))
\r
3647 #define bFM3_ADC0_SCFDH_SD10 *((volatile unsigned int*)(0x424E01F8UL))
\r
3648 #define bFM3_ADC0_SCFDH_SD11 *((volatile unsigned int*)(0x424E01FCUL))
\r
3649 #define bFM3_ADC0_SCIS23_AN16 *((volatile unsigned int*)(0x424E0200UL))
\r
3650 #define bFM3_ADC0_SCIS23_AN17 *((volatile unsigned int*)(0x424E0204UL))
\r
3651 #define bFM3_ADC0_SCIS23_AN18 *((volatile unsigned int*)(0x424E0208UL))
\r
3652 #define bFM3_ADC0_SCIS23_AN19 *((volatile unsigned int*)(0x424E020CUL))
\r
3653 #define bFM3_ADC0_SCIS23_AN20 *((volatile unsigned int*)(0x424E0210UL))
\r
3654 #define bFM3_ADC0_SCIS23_AN21 *((volatile unsigned int*)(0x424E0214UL))
\r
3655 #define bFM3_ADC0_SCIS23_AN22 *((volatile unsigned int*)(0x424E0218UL))
\r
3656 #define bFM3_ADC0_SCIS23_AN23 *((volatile unsigned int*)(0x424E021CUL))
\r
3657 #define bFM3_ADC0_SCIS23_AN24 *((volatile unsigned int*)(0x424E0220UL))
\r
3658 #define bFM3_ADC0_SCIS23_AN25 *((volatile unsigned int*)(0x424E0224UL))
\r
3659 #define bFM3_ADC0_SCIS23_AN26 *((volatile unsigned int*)(0x424E0228UL))
\r
3660 #define bFM3_ADC0_SCIS23_AN27 *((volatile unsigned int*)(0x424E022CUL))
\r
3661 #define bFM3_ADC0_SCIS23_AN28 *((volatile unsigned int*)(0x424E0230UL))
\r
3662 #define bFM3_ADC0_SCIS23_AN29 *((volatile unsigned int*)(0x424E0234UL))
\r
3663 #define bFM3_ADC0_SCIS23_AN30 *((volatile unsigned int*)(0x424E0238UL))
\r
3664 #define bFM3_ADC0_SCIS23_AN31 *((volatile unsigned int*)(0x424E023CUL))
\r
3665 #define bFM3_ADC0_SCIS2_AN16 *((volatile unsigned int*)(0x424E0200UL))
\r
3666 #define bFM3_ADC0_SCIS2_AN17 *((volatile unsigned int*)(0x424E0204UL))
\r
3667 #define bFM3_ADC0_SCIS2_AN18 *((volatile unsigned int*)(0x424E0208UL))
\r
3668 #define bFM3_ADC0_SCIS2_AN19 *((volatile unsigned int*)(0x424E020CUL))
\r
3669 #define bFM3_ADC0_SCIS2_AN20 *((volatile unsigned int*)(0x424E0210UL))
\r
3670 #define bFM3_ADC0_SCIS2_AN21 *((volatile unsigned int*)(0x424E0214UL))
\r
3671 #define bFM3_ADC0_SCIS2_AN22 *((volatile unsigned int*)(0x424E0218UL))
\r
3672 #define bFM3_ADC0_SCIS2_AN23 *((volatile unsigned int*)(0x424E021CUL))
\r
3673 #define bFM3_ADC0_SCIS3_AN24 *((volatile unsigned int*)(0x424E0220UL))
\r
3674 #define bFM3_ADC0_SCIS3_AN25 *((volatile unsigned int*)(0x424E0224UL))
\r
3675 #define bFM3_ADC0_SCIS3_AN26 *((volatile unsigned int*)(0x424E0228UL))
\r
3676 #define bFM3_ADC0_SCIS3_AN27 *((volatile unsigned int*)(0x424E022CUL))
\r
3677 #define bFM3_ADC0_SCIS3_AN28 *((volatile unsigned int*)(0x424E0230UL))
\r
3678 #define bFM3_ADC0_SCIS3_AN29 *((volatile unsigned int*)(0x424E0234UL))
\r
3679 #define bFM3_ADC0_SCIS3_AN30 *((volatile unsigned int*)(0x424E0238UL))
\r
3680 #define bFM3_ADC0_SCIS3_AN31 *((volatile unsigned int*)(0x424E023CUL))
\r
3681 #define bFM3_ADC0_SCIS01_AN0 *((volatile unsigned int*)(0x424E0280UL))
\r
3682 #define bFM3_ADC0_SCIS01_AN1 *((volatile unsigned int*)(0x424E0284UL))
\r
3683 #define bFM3_ADC0_SCIS01_AN2 *((volatile unsigned int*)(0x424E0288UL))
\r
3684 #define bFM3_ADC0_SCIS01_AN3 *((volatile unsigned int*)(0x424E028CUL))
\r
3685 #define bFM3_ADC0_SCIS01_AN4 *((volatile unsigned int*)(0x424E0290UL))
\r
3686 #define bFM3_ADC0_SCIS01_AN5 *((volatile unsigned int*)(0x424E0294UL))
\r
3687 #define bFM3_ADC0_SCIS01_AN6 *((volatile unsigned int*)(0x424E0298UL))
\r
3688 #define bFM3_ADC0_SCIS01_AN7 *((volatile unsigned int*)(0x424E029CUL))
\r
3689 #define bFM3_ADC0_SCIS01_AN8 *((volatile unsigned int*)(0x424E02A0UL))
\r
3690 #define bFM3_ADC0_SCIS01_AN9 *((volatile unsigned int*)(0x424E02A4UL))
\r
3691 #define bFM3_ADC0_SCIS01_AN10 *((volatile unsigned int*)(0x424E02A8UL))
\r
3692 #define bFM3_ADC0_SCIS01_AN11 *((volatile unsigned int*)(0x424E02ACUL))
\r
3693 #define bFM3_ADC0_SCIS01_AN12 *((volatile unsigned int*)(0x424E02B0UL))
\r
3694 #define bFM3_ADC0_SCIS01_AN13 *((volatile unsigned int*)(0x424E02B4UL))
\r
3695 #define bFM3_ADC0_SCIS01_AN14 *((volatile unsigned int*)(0x424E02B8UL))
\r
3696 #define bFM3_ADC0_SCIS01_AN15 *((volatile unsigned int*)(0x424E02BCUL))
\r
3697 #define bFM3_ADC0_SCIS0_AN0 *((volatile unsigned int*)(0x424E0280UL))
\r
3698 #define bFM3_ADC0_SCIS0_AN1 *((volatile unsigned int*)(0x424E0284UL))
\r
3699 #define bFM3_ADC0_SCIS0_AN2 *((volatile unsigned int*)(0x424E0288UL))
\r
3700 #define bFM3_ADC0_SCIS0_AN3 *((volatile unsigned int*)(0x424E028CUL))
\r
3701 #define bFM3_ADC0_SCIS0_AN4 *((volatile unsigned int*)(0x424E0290UL))
\r
3702 #define bFM3_ADC0_SCIS0_AN5 *((volatile unsigned int*)(0x424E0294UL))
\r
3703 #define bFM3_ADC0_SCIS0_AN6 *((volatile unsigned int*)(0x424E0298UL))
\r
3704 #define bFM3_ADC0_SCIS0_AN7 *((volatile unsigned int*)(0x424E029CUL))
\r
3705 #define bFM3_ADC0_SCIS1_AN8 *((volatile unsigned int*)(0x424E02A0UL))
\r
3706 #define bFM3_ADC0_SCIS1_AN9 *((volatile unsigned int*)(0x424E02A4UL))
\r
3707 #define bFM3_ADC0_SCIS1_AN10 *((volatile unsigned int*)(0x424E02A8UL))
\r
3708 #define bFM3_ADC0_SCIS1_AN11 *((volatile unsigned int*)(0x424E02ACUL))
\r
3709 #define bFM3_ADC0_SCIS1_AN12 *((volatile unsigned int*)(0x424E02B0UL))
\r
3710 #define bFM3_ADC0_SCIS1_AN13 *((volatile unsigned int*)(0x424E02B4UL))
\r
3711 #define bFM3_ADC0_SCIS1_AN14 *((volatile unsigned int*)(0x424E02B8UL))
\r
3712 #define bFM3_ADC0_SCIS1_AN15 *((volatile unsigned int*)(0x424E02BCUL))
\r
3713 #define bFM3_ADC0_PFNS_PFS0 *((volatile unsigned int*)(0x424E0300UL))
\r
3714 #define bFM3_ADC0_PFNS_PFS1 *((volatile unsigned int*)(0x424E0304UL))
\r
3715 #define bFM3_ADC0_PFNS_TEST0 *((volatile unsigned int*)(0x424E0310UL))
\r
3716 #define bFM3_ADC0_PFNS_TEST1 *((volatile unsigned int*)(0x424E0314UL))
\r
3717 #define bFM3_ADC0_PCCR_PSTR *((volatile unsigned int*)(0x424E0320UL))
\r
3718 #define bFM3_ADC0_PCCR_PHEN *((volatile unsigned int*)(0x424E0324UL))
\r
3719 #define bFM3_ADC0_PCCR_PEEN *((volatile unsigned int*)(0x424E0328UL))
\r
3720 #define bFM3_ADC0_PCCR_ESCE *((volatile unsigned int*)(0x424E032CUL))
\r
3721 #define bFM3_ADC0_PCCR_PFCLR *((volatile unsigned int*)(0x424E0330UL))
\r
3722 #define bFM3_ADC0_PCCR_POVR *((volatile unsigned int*)(0x424E0334UL))
\r
3723 #define bFM3_ADC0_PCCR_PFUL *((volatile unsigned int*)(0x424E0338UL))
\r
3724 #define bFM3_ADC0_PCCR_PEMP *((volatile unsigned int*)(0x424E033CUL))
\r
3725 #define bFM3_ADC0_PCFD_PC0 *((volatile unsigned int*)(0x424E0380UL))
\r
3726 #define bFM3_ADC0_PCFD_PC1 *((volatile unsigned int*)(0x424E0384UL))
\r
3727 #define bFM3_ADC0_PCFD_PC2 *((volatile unsigned int*)(0x424E0388UL))
\r
3728 #define bFM3_ADC0_PCFD_PC3 *((volatile unsigned int*)(0x424E038CUL))
\r
3729 #define bFM3_ADC0_PCFD_PC4 *((volatile unsigned int*)(0x424E0390UL))
\r
3730 #define bFM3_ADC0_PCFD_RS0 *((volatile unsigned int*)(0x424E03A0UL))
\r
3731 #define bFM3_ADC0_PCFD_RS1 *((volatile unsigned int*)(0x424E03A4UL))
\r
3732 #define bFM3_ADC0_PCFD_RS2 *((volatile unsigned int*)(0x424E03A8UL))
\r
3733 #define bFM3_ADC0_PCFD_INVL *((volatile unsigned int*)(0x424E03B0UL))
\r
3734 #define bFM3_ADC0_PCFD_PD0 *((volatile unsigned int*)(0x424E03D0UL))
\r
3735 #define bFM3_ADC0_PCFD_PD1 *((volatile unsigned int*)(0x424E03D4UL))
\r
3736 #define bFM3_ADC0_PCFD_PD2 *((volatile unsigned int*)(0x424E03D8UL))
\r
3737 #define bFM3_ADC0_PCFD_PD3 *((volatile unsigned int*)(0x424E03DCUL))
\r
3738 #define bFM3_ADC0_PCFD_PD4 *((volatile unsigned int*)(0x424E03E0UL))
\r
3739 #define bFM3_ADC0_PCFD_PD5 *((volatile unsigned int*)(0x424E03E4UL))
\r
3740 #define bFM3_ADC0_PCFD_PD6 *((volatile unsigned int*)(0x424E03E8UL))
\r
3741 #define bFM3_ADC0_PCFD_PD7 *((volatile unsigned int*)(0x424E03ECUL))
\r
3742 #define bFM3_ADC0_PCFD_PD8 *((volatile unsigned int*)(0x424E03F0UL))
\r
3743 #define bFM3_ADC0_PCFD_PD9 *((volatile unsigned int*)(0x424E03F4UL))
\r
3744 #define bFM3_ADC0_PCFD_PD10 *((volatile unsigned int*)(0x424E03F8UL))
\r
3745 #define bFM3_ADC0_PCFD_PD11 *((volatile unsigned int*)(0x424E03FCUL))
\r
3746 #define bFM3_ADC0_PCFDL_PC0 *((volatile unsigned int*)(0x424E0380UL))
\r
3747 #define bFM3_ADC0_PCFDL_PC1 *((volatile unsigned int*)(0x424E0384UL))
\r
3748 #define bFM3_ADC0_PCFDL_PC2 *((volatile unsigned int*)(0x424E0388UL))
\r
3749 #define bFM3_ADC0_PCFDL_PC3 *((volatile unsigned int*)(0x424E038CUL))
\r
3750 #define bFM3_ADC0_PCFDL_PC4 *((volatile unsigned int*)(0x424E0390UL))
\r
3751 #define bFM3_ADC0_PCFDL_RS0 *((volatile unsigned int*)(0x424E03A0UL))
\r
3752 #define bFM3_ADC0_PCFDL_RS1 *((volatile unsigned int*)(0x424E03A4UL))
\r
3753 #define bFM3_ADC0_PCFDL_RS2 *((volatile unsigned int*)(0x424E03A8UL))
\r
3754 #define bFM3_ADC0_PCFDL_INVL *((volatile unsigned int*)(0x424E03B0UL))
\r
3755 #define bFM3_ADC0_PCFDH_PD0 *((volatile unsigned int*)(0x424E03D0UL))
\r
3756 #define bFM3_ADC0_PCFDH_PD1 *((volatile unsigned int*)(0x424E03D4UL))
\r
3757 #define bFM3_ADC0_PCFDH_PD2 *((volatile unsigned int*)(0x424E03D8UL))
\r
3758 #define bFM3_ADC0_PCFDH_PD3 *((volatile unsigned int*)(0x424E03DCUL))
\r
3759 #define bFM3_ADC0_PCFDH_PD4 *((volatile unsigned int*)(0x424E03E0UL))
\r
3760 #define bFM3_ADC0_PCFDH_PD5 *((volatile unsigned int*)(0x424E03E4UL))
\r
3761 #define bFM3_ADC0_PCFDH_PD6 *((volatile unsigned int*)(0x424E03E8UL))
\r
3762 #define bFM3_ADC0_PCFDH_PD7 *((volatile unsigned int*)(0x424E03ECUL))
\r
3763 #define bFM3_ADC0_PCFDH_PD8 *((volatile unsigned int*)(0x424E03F0UL))
\r
3764 #define bFM3_ADC0_PCFDH_PD9 *((volatile unsigned int*)(0x424E03F4UL))
\r
3765 #define bFM3_ADC0_PCFDH_PD10 *((volatile unsigned int*)(0x424E03F8UL))
\r
3766 #define bFM3_ADC0_PCFDH_PD11 *((volatile unsigned int*)(0x424E03FCUL))
\r
3767 #define bFM3_ADC0_PCIS_P1A0 *((volatile unsigned int*)(0x424E0400UL))
\r
3768 #define bFM3_ADC0_PCIS_P1A1 *((volatile unsigned int*)(0x424E0404UL))
\r
3769 #define bFM3_ADC0_PCIS_P1A2 *((volatile unsigned int*)(0x424E0408UL))
\r
3770 #define bFM3_ADC0_PCIS_P2A0 *((volatile unsigned int*)(0x424E040CUL))
\r
3771 #define bFM3_ADC0_PCIS_P2A1 *((volatile unsigned int*)(0x424E0410UL))
\r
3772 #define bFM3_ADC0_PCIS_P2A2 *((volatile unsigned int*)(0x424E0414UL))
\r
3773 #define bFM3_ADC0_PCIS_P2A3 *((volatile unsigned int*)(0x424E0418UL))
\r
3774 #define bFM3_ADC0_PCIS_P2A4 *((volatile unsigned int*)(0x424E041CUL))
\r
3775 #define bFM3_ADC0_CMPCR_CCH0 *((volatile unsigned int*)(0x424E0480UL))
\r
3776 #define bFM3_ADC0_CMPCR_CCH1 *((volatile unsigned int*)(0x424E0484UL))
\r
3777 #define bFM3_ADC0_CMPCR_CCH2 *((volatile unsigned int*)(0x424E0488UL))
\r
3778 #define bFM3_ADC0_CMPCR_CCH3 *((volatile unsigned int*)(0x424E048CUL))
\r
3779 #define bFM3_ADC0_CMPCR_CCH4 *((volatile unsigned int*)(0x424E0490UL))
\r
3780 #define bFM3_ADC0_CMPCR_CMD0 *((volatile unsigned int*)(0x424E0494UL))
\r
3781 #define bFM3_ADC0_CMPCR_CMD1 *((volatile unsigned int*)(0x424E0498UL))
\r
3782 #define bFM3_ADC0_CMPCR_CMPEN *((volatile unsigned int*)(0x424E049CUL))
\r
3783 #define bFM3_ADC0_CMPD_CMAD2 *((volatile unsigned int*)(0x424E04D8UL))
\r
3784 #define bFM3_ADC0_CMPD_CMAD3 *((volatile unsigned int*)(0x424E04DCUL))
\r
3785 #define bFM3_ADC0_CMPD_CMAD4 *((volatile unsigned int*)(0x424E04E0UL))
\r
3786 #define bFM3_ADC0_CMPD_CMAD5 *((volatile unsigned int*)(0x424E04E4UL))
\r
3787 #define bFM3_ADC0_CMPD_CMAD6 *((volatile unsigned int*)(0x424E04E8UL))
\r
3788 #define bFM3_ADC0_CMPD_CMAD7 *((volatile unsigned int*)(0x424E04ECUL))
\r
3789 #define bFM3_ADC0_CMPD_CMAD8 *((volatile unsigned int*)(0x424E04F0UL))
\r
3790 #define bFM3_ADC0_CMPD_CMAD9 *((volatile unsigned int*)(0x424E04F4UL))
\r
3791 #define bFM3_ADC0_CMPD_CMAD10 *((volatile unsigned int*)(0x424E04F8UL))
\r
3792 #define bFM3_ADC0_CMPD_CMAD11 *((volatile unsigned int*)(0x424E04FCUL))
\r
3793 #define bFM3_ADC0_ADSS23_TS16 *((volatile unsigned int*)(0x424E0500UL))
\r
3794 #define bFM3_ADC0_ADSS23_TS17 *((volatile unsigned int*)(0x424E0504UL))
\r
3795 #define bFM3_ADC0_ADSS23_TS18 *((volatile unsigned int*)(0x424E0508UL))
\r
3796 #define bFM3_ADC0_ADSS23_TS19 *((volatile unsigned int*)(0x424E050CUL))
\r
3797 #define bFM3_ADC0_ADSS23_TS20 *((volatile unsigned int*)(0x424E0510UL))
\r
3798 #define bFM3_ADC0_ADSS23_TS21 *((volatile unsigned int*)(0x424E0514UL))
\r
3799 #define bFM3_ADC0_ADSS23_TS22 *((volatile unsigned int*)(0x424E0518UL))
\r
3800 #define bFM3_ADC0_ADSS23_TS23 *((volatile unsigned int*)(0x424E051CUL))
\r
3801 #define bFM3_ADC0_ADSS23_TS24 *((volatile unsigned int*)(0x424E0520UL))
\r
3802 #define bFM3_ADC0_ADSS23_TS25 *((volatile unsigned int*)(0x424E0524UL))
\r
3803 #define bFM3_ADC0_ADSS23_TS26 *((volatile unsigned int*)(0x424E0528UL))
\r
3804 #define bFM3_ADC0_ADSS23_TS27 *((volatile unsigned int*)(0x424E052CUL))
\r
3805 #define bFM3_ADC0_ADSS23_TS28 *((volatile unsigned int*)(0x424E0530UL))
\r
3806 #define bFM3_ADC0_ADSS23_TS29 *((volatile unsigned int*)(0x424E0534UL))
\r
3807 #define bFM3_ADC0_ADSS23_TS30 *((volatile unsigned int*)(0x424E0538UL))
\r
3808 #define bFM3_ADC0_ADSS23_TS31 *((volatile unsigned int*)(0x424E053CUL))
\r
3809 #define bFM3_ADC0_ADSS2_TS16 *((volatile unsigned int*)(0x424E0500UL))
\r
3810 #define bFM3_ADC0_ADSS2_TS17 *((volatile unsigned int*)(0x424E0504UL))
\r
3811 #define bFM3_ADC0_ADSS2_TS18 *((volatile unsigned int*)(0x424E0508UL))
\r
3812 #define bFM3_ADC0_ADSS2_TS19 *((volatile unsigned int*)(0x424E050CUL))
\r
3813 #define bFM3_ADC0_ADSS2_TS20 *((volatile unsigned int*)(0x424E0510UL))
\r
3814 #define bFM3_ADC0_ADSS2_TS21 *((volatile unsigned int*)(0x424E0514UL))
\r
3815 #define bFM3_ADC0_ADSS2_TS22 *((volatile unsigned int*)(0x424E0518UL))
\r
3816 #define bFM3_ADC0_ADSS2_TS23 *((volatile unsigned int*)(0x424E051CUL))
\r
3817 #define bFM3_ADC0_ADSS3_TS24 *((volatile unsigned int*)(0x424E0520UL))
\r
3818 #define bFM3_ADC0_ADSS3_TS25 *((volatile unsigned int*)(0x424E0524UL))
\r
3819 #define bFM3_ADC0_ADSS3_TS26 *((volatile unsigned int*)(0x424E0528UL))
\r
3820 #define bFM3_ADC0_ADSS3_TS27 *((volatile unsigned int*)(0x424E052CUL))
\r
3821 #define bFM3_ADC0_ADSS3_TS28 *((volatile unsigned int*)(0x424E0530UL))
\r
3822 #define bFM3_ADC0_ADSS3_TS29 *((volatile unsigned int*)(0x424E0534UL))
\r
3823 #define bFM3_ADC0_ADSS3_TS30 *((volatile unsigned int*)(0x424E0538UL))
\r
3824 #define bFM3_ADC0_ADSS3_TS31 *((volatile unsigned int*)(0x424E053CUL))
\r
3825 #define bFM3_ADC0_ADSS01_TS0 *((volatile unsigned int*)(0x424E0580UL))
\r
3826 #define bFM3_ADC0_ADSS01_TS1 *((volatile unsigned int*)(0x424E0584UL))
\r
3827 #define bFM3_ADC0_ADSS01_TS2 *((volatile unsigned int*)(0x424E0588UL))
\r
3828 #define bFM3_ADC0_ADSS01_TS3 *((volatile unsigned int*)(0x424E058CUL))
\r
3829 #define bFM3_ADC0_ADSS01_TS4 *((volatile unsigned int*)(0x424E0590UL))
\r
3830 #define bFM3_ADC0_ADSS01_TS5 *((volatile unsigned int*)(0x424E0594UL))
\r
3831 #define bFM3_ADC0_ADSS01_TS6 *((volatile unsigned int*)(0x424E0598UL))
\r
3832 #define bFM3_ADC0_ADSS01_TS7 *((volatile unsigned int*)(0x424E059CUL))
\r
3833 #define bFM3_ADC0_ADSS01_TS8 *((volatile unsigned int*)(0x424E05A0UL))
\r
3834 #define bFM3_ADC0_ADSS01_TS9 *((volatile unsigned int*)(0x424E05A4UL))
\r
3835 #define bFM3_ADC0_ADSS01_TS10 *((volatile unsigned int*)(0x424E05A8UL))
\r
3836 #define bFM3_ADC0_ADSS01_TS11 *((volatile unsigned int*)(0x424E05ACUL))
\r
3837 #define bFM3_ADC0_ADSS01_TS12 *((volatile unsigned int*)(0x424E05B0UL))
\r
3838 #define bFM3_ADC0_ADSS01_TS13 *((volatile unsigned int*)(0x424E05B4UL))
\r
3839 #define bFM3_ADC0_ADSS01_TS14 *((volatile unsigned int*)(0x424E05B8UL))
\r
3840 #define bFM3_ADC0_ADSS01_TS15 *((volatile unsigned int*)(0x424E05BCUL))
\r
3841 #define bFM3_ADC0_ADSS0_TS0 *((volatile unsigned int*)(0x424E0580UL))
\r
3842 #define bFM3_ADC0_ADSS0_TS1 *((volatile unsigned int*)(0x424E0584UL))
\r
3843 #define bFM3_ADC0_ADSS0_TS2 *((volatile unsigned int*)(0x424E0588UL))
\r
3844 #define bFM3_ADC0_ADSS0_TS3 *((volatile unsigned int*)(0x424E058CUL))
\r
3845 #define bFM3_ADC0_ADSS0_TS4 *((volatile unsigned int*)(0x424E0590UL))
\r
3846 #define bFM3_ADC0_ADSS0_TS5 *((volatile unsigned int*)(0x424E0594UL))
\r
3847 #define bFM3_ADC0_ADSS0_TS6 *((volatile unsigned int*)(0x424E0598UL))
\r
3848 #define bFM3_ADC0_ADSS0_TS7 *((volatile unsigned int*)(0x424E059CUL))
\r
3849 #define bFM3_ADC0_ADSS1_TS8 *((volatile unsigned int*)(0x424E05A0UL))
\r
3850 #define bFM3_ADC0_ADSS1_TS9 *((volatile unsigned int*)(0x424E05A4UL))
\r
3851 #define bFM3_ADC0_ADSS1_TS10 *((volatile unsigned int*)(0x424E05A8UL))
\r
3852 #define bFM3_ADC0_ADSS1_TS11 *((volatile unsigned int*)(0x424E05ACUL))
\r
3853 #define bFM3_ADC0_ADSS1_TS12 *((volatile unsigned int*)(0x424E05B0UL))
\r
3854 #define bFM3_ADC0_ADSS1_TS13 *((volatile unsigned int*)(0x424E05B4UL))
\r
3855 #define bFM3_ADC0_ADSS1_TS14 *((volatile unsigned int*)(0x424E05B8UL))
\r
3856 #define bFM3_ADC0_ADSS1_TS15 *((volatile unsigned int*)(0x424E05BCUL))
\r
3857 #define bFM3_ADC0_ADST01_ST10 *((volatile unsigned int*)(0x424E0600UL))
\r
3858 #define bFM3_ADC0_ADST01_ST11 *((volatile unsigned int*)(0x424E0604UL))
\r
3859 #define bFM3_ADC0_ADST01_ST12 *((volatile unsigned int*)(0x424E0608UL))
\r
3860 #define bFM3_ADC0_ADST01_ST13 *((volatile unsigned int*)(0x424E060CUL))
\r
3861 #define bFM3_ADC0_ADST01_ST14 *((volatile unsigned int*)(0x424E0610UL))
\r
3862 #define bFM3_ADC0_ADST01_STX10 *((volatile unsigned int*)(0x424E0614UL))
\r
3863 #define bFM3_ADC0_ADST01_STX11 *((volatile unsigned int*)(0x424E0618UL))
\r
3864 #define bFM3_ADC0_ADST01_STX12 *((volatile unsigned int*)(0x424E061CUL))
\r
3865 #define bFM3_ADC0_ADST01_ST00 *((volatile unsigned int*)(0x424E0620UL))
\r
3866 #define bFM3_ADC0_ADST01_ST01 *((volatile unsigned int*)(0x424E0624UL))
\r
3867 #define bFM3_ADC0_ADST01_ST02 *((volatile unsigned int*)(0x424E0628UL))
\r
3868 #define bFM3_ADC0_ADST01_ST03 *((volatile unsigned int*)(0x424E062CUL))
\r
3869 #define bFM3_ADC0_ADST01_ST04 *((volatile unsigned int*)(0x424E0630UL))
\r
3870 #define bFM3_ADC0_ADST01_STX00 *((volatile unsigned int*)(0x424E0634UL))
\r
3871 #define bFM3_ADC0_ADST01_STX01 *((volatile unsigned int*)(0x424E0638UL))
\r
3872 #define bFM3_ADC0_ADST01_STX02 *((volatile unsigned int*)(0x424E063CUL))
\r
3873 #define bFM3_ADC0_ADST1_ST10 *((volatile unsigned int*)(0x424E0600UL))
\r
3874 #define bFM3_ADC0_ADST1_ST11 *((volatile unsigned int*)(0x424E0604UL))
\r
3875 #define bFM3_ADC0_ADST1_ST12 *((volatile unsigned int*)(0x424E0608UL))
\r
3876 #define bFM3_ADC0_ADST1_ST13 *((volatile unsigned int*)(0x424E060CUL))
\r
3877 #define bFM3_ADC0_ADST1_ST14 *((volatile unsigned int*)(0x424E0610UL))
\r
3878 #define bFM3_ADC0_ADST1_STX10 *((volatile unsigned int*)(0x424E0614UL))
\r
3879 #define bFM3_ADC0_ADST1_STX11 *((volatile unsigned int*)(0x424E0618UL))
\r
3880 #define bFM3_ADC0_ADST1_STX12 *((volatile unsigned int*)(0x424E061CUL))
\r
3881 #define bFM3_ADC0_ADST0_ST00 *((volatile unsigned int*)(0x424E0620UL))
\r
3882 #define bFM3_ADC0_ADST0_ST01 *((volatile unsigned int*)(0x424E0624UL))
\r
3883 #define bFM3_ADC0_ADST0_ST02 *((volatile unsigned int*)(0x424E0628UL))
\r
3884 #define bFM3_ADC0_ADST0_ST03 *((volatile unsigned int*)(0x424E062CUL))
\r
3885 #define bFM3_ADC0_ADST0_ST04 *((volatile unsigned int*)(0x424E0630UL))
\r
3886 #define bFM3_ADC0_ADST0_STX00 *((volatile unsigned int*)(0x424E0634UL))
\r
3887 #define bFM3_ADC0_ADST0_STX01 *((volatile unsigned int*)(0x424E0638UL))
\r
3888 #define bFM3_ADC0_ADST0_STX02 *((volatile unsigned int*)(0x424E063CUL))
\r
3889 #define bFM3_ADC0_ADCT_CT0 *((volatile unsigned int*)(0x424E0680UL))
\r
3890 #define bFM3_ADC0_ADCT_CT1 *((volatile unsigned int*)(0x424E0684UL))
\r
3891 #define bFM3_ADC0_ADCT_CT2 *((volatile unsigned int*)(0x424E0688UL))
\r
3892 #define bFM3_ADC0_PRTSL_PRTSL0 *((volatile unsigned int*)(0x424E0700UL))
\r
3893 #define bFM3_ADC0_PRTSL_PRTSL1 *((volatile unsigned int*)(0x424E0704UL))
\r
3894 #define bFM3_ADC0_PRTSL_PRTSL2 *((volatile unsigned int*)(0x424E0708UL))
\r
3895 #define bFM3_ADC0_PRTSL_PRTSL3 *((volatile unsigned int*)(0x424E070CUL))
\r
3896 #define bFM3_ADC0_SCTSL_SCTSL0 *((volatile unsigned int*)(0x424E0720UL))
\r
3897 #define bFM3_ADC0_SCTSL_SCTSL1 *((volatile unsigned int*)(0x424E0724UL))
\r
3898 #define bFM3_ADC0_SCTSL_SCTSL2 *((volatile unsigned int*)(0x424E0728UL))
\r
3899 #define bFM3_ADC0_SCTSL_SCTSL3 *((volatile unsigned int*)(0x424E072CUL))
\r
3900 #define bFM3_ADC0_ADCEN_ENBL *((volatile unsigned int*)(0x424E0780UL))
\r
3901 #define bFM3_ADC0_ADCEN_READY *((volatile unsigned int*)(0x424E0784UL))
\r
3903 /* 12-bit ADC unit 1 registers */
\r
3904 #define bFM3_ADC1_ADSR_SCS *((volatile unsigned int*)(0x424E2000UL))
\r
3905 #define bFM3_ADC1_ADSR_PCS *((volatile unsigned int*)(0x424E2004UL))
\r
3906 #define bFM3_ADC1_ADSR_PCNS *((volatile unsigned int*)(0x424E2008UL))
\r
3907 #define bFM3_ADC1_ADSR_FDAS *((volatile unsigned int*)(0x424E2018UL))
\r
3908 #define bFM3_ADC1_ADSR_ADSTP *((volatile unsigned int*)(0x424E201CUL))
\r
3909 #define bFM3_ADC1_ADCR_OVRIE *((volatile unsigned int*)(0x424E2020UL))
\r
3910 #define bFM3_ADC1_ADCR_CMPIE *((volatile unsigned int*)(0x424E2024UL))
\r
3911 #define bFM3_ADC1_ADCR_PCIE *((volatile unsigned int*)(0x424E2028UL))
\r
3912 #define bFM3_ADC1_ADCR_SCIE *((volatile unsigned int*)(0x424E202CUL))
\r
3913 #define bFM3_ADC1_ADCR_CMPIF *((volatile unsigned int*)(0x424E2034UL))
\r
3914 #define bFM3_ADC1_ADCR_PCIF *((volatile unsigned int*)(0x424E2038UL))
\r
3915 #define bFM3_ADC1_ADCR_SCIF *((volatile unsigned int*)(0x424E203CUL))
\r
3916 #define bFM3_ADC1_SFNS_SFS0 *((volatile unsigned int*)(0x424E2100UL))
\r
3917 #define bFM3_ADC1_SFNS_SFS1 *((volatile unsigned int*)(0x424E2104UL))
\r
3918 #define bFM3_ADC1_SFNS_SFS2 *((volatile unsigned int*)(0x424E2108UL))
\r
3919 #define bFM3_ADC1_SFNS_SFS3 *((volatile unsigned int*)(0x424E210CUL))
\r
3920 #define bFM3_ADC1_SCCR_SSTR *((volatile unsigned int*)(0x424E2120UL))
\r
3921 #define bFM3_ADC1_SCCR_SHEN *((volatile unsigned int*)(0x424E2124UL))
\r
3922 #define bFM3_ADC1_SCCR_RPT *((volatile unsigned int*)(0x424E2128UL))
\r
3923 #define bFM3_ADC1_SCCR_SFCLR *((volatile unsigned int*)(0x424E2130UL))
\r
3924 #define bFM3_ADC1_SCCR_SOVR *((volatile unsigned int*)(0x424E2134UL))
\r
3925 #define bFM3_ADC1_SCCR_SFUL *((volatile unsigned int*)(0x424E2138UL))
\r
3926 #define bFM3_ADC1_SCCR_SEMP *((volatile unsigned int*)(0x424E213CUL))
\r
3927 #define bFM3_ADC1_SCFD_SC0 *((volatile unsigned int*)(0x424E2180UL))
\r
3928 #define bFM3_ADC1_SCFD_SC1 *((volatile unsigned int*)(0x424E2184UL))
\r
3929 #define bFM3_ADC1_SCFD_SC2 *((volatile unsigned int*)(0x424E2188UL))
\r
3930 #define bFM3_ADC1_SCFD_SC3 *((volatile unsigned int*)(0x424E218CUL))
\r
3931 #define bFM3_ADC1_SCFD_SC4 *((volatile unsigned int*)(0x424E2190UL))
\r
3932 #define bFM3_ADC1_SCFD_RS0 *((volatile unsigned int*)(0x424E21A0UL))
\r
3933 #define bFM3_ADC1_SCFD_RS1 *((volatile unsigned int*)(0x424E21A4UL))
\r
3934 #define bFM3_ADC1_SCFD_INVL *((volatile unsigned int*)(0x424E21B0UL))
\r
3935 #define bFM3_ADC1_SCFD_SD0 *((volatile unsigned int*)(0x424E21D0UL))
\r
3936 #define bFM3_ADC1_SCFD_SD1 *((volatile unsigned int*)(0x424E21D4UL))
\r
3937 #define bFM3_ADC1_SCFD_SD2 *((volatile unsigned int*)(0x424E21D8UL))
\r
3938 #define bFM3_ADC1_SCFD_SD3 *((volatile unsigned int*)(0x424E21DCUL))
\r
3939 #define bFM3_ADC1_SCFD_SD4 *((volatile unsigned int*)(0x424E21E0UL))
\r
3940 #define bFM3_ADC1_SCFD_SD5 *((volatile unsigned int*)(0x424E21E4UL))
\r
3941 #define bFM3_ADC1_SCFD_SD6 *((volatile unsigned int*)(0x424E21E8UL))
\r
3942 #define bFM3_ADC1_SCFD_SD7 *((volatile unsigned int*)(0x424E21ECUL))
\r
3943 #define bFM3_ADC1_SCFD_SD8 *((volatile unsigned int*)(0x424E21F0UL))
\r
3944 #define bFM3_ADC1_SCFD_SD9 *((volatile unsigned int*)(0x424E21F4UL))
\r
3945 #define bFM3_ADC1_SCFD_SD10 *((volatile unsigned int*)(0x424E21F8UL))
\r
3946 #define bFM3_ADC1_SCFD_SD11 *((volatile unsigned int*)(0x424E21FCUL))
\r
3947 #define bFM3_ADC1_SCFDL_SC0 *((volatile unsigned int*)(0x424E2180UL))
\r
3948 #define bFM3_ADC1_SCFDL_SC1 *((volatile unsigned int*)(0x424E2184UL))
\r
3949 #define bFM3_ADC1_SCFDL_SC2 *((volatile unsigned int*)(0x424E2188UL))
\r
3950 #define bFM3_ADC1_SCFDL_SC3 *((volatile unsigned int*)(0x424E218CUL))
\r
3951 #define bFM3_ADC1_SCFDL_SC4 *((volatile unsigned int*)(0x424E2190UL))
\r
3952 #define bFM3_ADC1_SCFDL_RS0 *((volatile unsigned int*)(0x424E21A0UL))
\r
3953 #define bFM3_ADC1_SCFDL_RS1 *((volatile unsigned int*)(0x424E21A4UL))
\r
3954 #define bFM3_ADC1_SCFDL_INVL *((volatile unsigned int*)(0x424E21B0UL))
\r
3955 #define bFM3_ADC1_SCFDH_SD0 *((volatile unsigned int*)(0x424E21D0UL))
\r
3956 #define bFM3_ADC1_SCFDH_SD1 *((volatile unsigned int*)(0x424E21D4UL))
\r
3957 #define bFM3_ADC1_SCFDH_SD2 *((volatile unsigned int*)(0x424E21D8UL))
\r
3958 #define bFM3_ADC1_SCFDH_SD3 *((volatile unsigned int*)(0x424E21DCUL))
\r
3959 #define bFM3_ADC1_SCFDH_SD4 *((volatile unsigned int*)(0x424E21E0UL))
\r
3960 #define bFM3_ADC1_SCFDH_SD5 *((volatile unsigned int*)(0x424E21E4UL))
\r
3961 #define bFM3_ADC1_SCFDH_SD6 *((volatile unsigned int*)(0x424E21E8UL))
\r
3962 #define bFM3_ADC1_SCFDH_SD7 *((volatile unsigned int*)(0x424E21ECUL))
\r
3963 #define bFM3_ADC1_SCFDH_SD8 *((volatile unsigned int*)(0x424E21F0UL))
\r
3964 #define bFM3_ADC1_SCFDH_SD9 *((volatile unsigned int*)(0x424E21F4UL))
\r
3965 #define bFM3_ADC1_SCFDH_SD10 *((volatile unsigned int*)(0x424E21F8UL))
\r
3966 #define bFM3_ADC1_SCFDH_SD11 *((volatile unsigned int*)(0x424E21FCUL))
\r
3967 #define bFM3_ADC1_SCIS23_AN16 *((volatile unsigned int*)(0x424E2200UL))
\r
3968 #define bFM3_ADC1_SCIS23_AN17 *((volatile unsigned int*)(0x424E2204UL))
\r
3969 #define bFM3_ADC1_SCIS23_AN18 *((volatile unsigned int*)(0x424E2208UL))
\r
3970 #define bFM3_ADC1_SCIS23_AN19 *((volatile unsigned int*)(0x424E220CUL))
\r
3971 #define bFM3_ADC1_SCIS23_AN20 *((volatile unsigned int*)(0x424E2210UL))
\r
3972 #define bFM3_ADC1_SCIS23_AN21 *((volatile unsigned int*)(0x424E2214UL))
\r
3973 #define bFM3_ADC1_SCIS23_AN22 *((volatile unsigned int*)(0x424E2218UL))
\r
3974 #define bFM3_ADC1_SCIS23_AN23 *((volatile unsigned int*)(0x424E221CUL))
\r
3975 #define bFM3_ADC1_SCIS23_AN24 *((volatile unsigned int*)(0x424E2220UL))
\r
3976 #define bFM3_ADC1_SCIS23_AN25 *((volatile unsigned int*)(0x424E2224UL))
\r
3977 #define bFM3_ADC1_SCIS23_AN26 *((volatile unsigned int*)(0x424E2228UL))
\r
3978 #define bFM3_ADC1_SCIS23_AN27 *((volatile unsigned int*)(0x424E222CUL))
\r
3979 #define bFM3_ADC1_SCIS23_AN28 *((volatile unsigned int*)(0x424E2230UL))
\r
3980 #define bFM3_ADC1_SCIS23_AN29 *((volatile unsigned int*)(0x424E2234UL))
\r
3981 #define bFM3_ADC1_SCIS23_AN30 *((volatile unsigned int*)(0x424E2238UL))
\r
3982 #define bFM3_ADC1_SCIS23_AN31 *((volatile unsigned int*)(0x424E223CUL))
\r
3983 #define bFM3_ADC1_SCIS2_AN16 *((volatile unsigned int*)(0x424E2200UL))
\r
3984 #define bFM3_ADC1_SCIS2_AN17 *((volatile unsigned int*)(0x424E2204UL))
\r
3985 #define bFM3_ADC1_SCIS2_AN18 *((volatile unsigned int*)(0x424E2208UL))
\r
3986 #define bFM3_ADC1_SCIS2_AN19 *((volatile unsigned int*)(0x424E220CUL))
\r
3987 #define bFM3_ADC1_SCIS2_AN20 *((volatile unsigned int*)(0x424E2210UL))
\r
3988 #define bFM3_ADC1_SCIS2_AN21 *((volatile unsigned int*)(0x424E2214UL))
\r
3989 #define bFM3_ADC1_SCIS2_AN22 *((volatile unsigned int*)(0x424E2218UL))
\r
3990 #define bFM3_ADC1_SCIS2_AN23 *((volatile unsigned int*)(0x424E221CUL))
\r
3991 #define bFM3_ADC1_SCIS3_AN24 *((volatile unsigned int*)(0x424E2220UL))
\r
3992 #define bFM3_ADC1_SCIS3_AN25 *((volatile unsigned int*)(0x424E2224UL))
\r
3993 #define bFM3_ADC1_SCIS3_AN26 *((volatile unsigned int*)(0x424E2228UL))
\r
3994 #define bFM3_ADC1_SCIS3_AN27 *((volatile unsigned int*)(0x424E222CUL))
\r
3995 #define bFM3_ADC1_SCIS3_AN28 *((volatile unsigned int*)(0x424E2230UL))
\r
3996 #define bFM3_ADC1_SCIS3_AN29 *((volatile unsigned int*)(0x424E2234UL))
\r
3997 #define bFM3_ADC1_SCIS3_AN30 *((volatile unsigned int*)(0x424E2238UL))
\r
3998 #define bFM3_ADC1_SCIS3_AN31 *((volatile unsigned int*)(0x424E223CUL))
\r
3999 #define bFM3_ADC1_SCIS01_AN0 *((volatile unsigned int*)(0x424E2280UL))
\r
4000 #define bFM3_ADC1_SCIS01_AN1 *((volatile unsigned int*)(0x424E2284UL))
\r
4001 #define bFM3_ADC1_SCIS01_AN2 *((volatile unsigned int*)(0x424E2288UL))
\r
4002 #define bFM3_ADC1_SCIS01_AN3 *((volatile unsigned int*)(0x424E228CUL))
\r
4003 #define bFM3_ADC1_SCIS01_AN4 *((volatile unsigned int*)(0x424E2290UL))
\r
4004 #define bFM3_ADC1_SCIS01_AN5 *((volatile unsigned int*)(0x424E2294UL))
\r
4005 #define bFM3_ADC1_SCIS01_AN6 *((volatile unsigned int*)(0x424E2298UL))
\r
4006 #define bFM3_ADC1_SCIS01_AN7 *((volatile unsigned int*)(0x424E229CUL))
\r
4007 #define bFM3_ADC1_SCIS01_AN8 *((volatile unsigned int*)(0x424E22A0UL))
\r
4008 #define bFM3_ADC1_SCIS01_AN9 *((volatile unsigned int*)(0x424E22A4UL))
\r
4009 #define bFM3_ADC1_SCIS01_AN10 *((volatile unsigned int*)(0x424E22A8UL))
\r
4010 #define bFM3_ADC1_SCIS01_AN11 *((volatile unsigned int*)(0x424E22ACUL))
\r
4011 #define bFM3_ADC1_SCIS01_AN12 *((volatile unsigned int*)(0x424E22B0UL))
\r
4012 #define bFM3_ADC1_SCIS01_AN13 *((volatile unsigned int*)(0x424E22B4UL))
\r
4013 #define bFM3_ADC1_SCIS01_AN14 *((volatile unsigned int*)(0x424E22B8UL))
\r
4014 #define bFM3_ADC1_SCIS01_AN15 *((volatile unsigned int*)(0x424E22BCUL))
\r
4015 #define bFM3_ADC1_SCIS0_AN0 *((volatile unsigned int*)(0x424E2280UL))
\r
4016 #define bFM3_ADC1_SCIS0_AN1 *((volatile unsigned int*)(0x424E2284UL))
\r
4017 #define bFM3_ADC1_SCIS0_AN2 *((volatile unsigned int*)(0x424E2288UL))
\r
4018 #define bFM3_ADC1_SCIS0_AN3 *((volatile unsigned int*)(0x424E228CUL))
\r
4019 #define bFM3_ADC1_SCIS0_AN4 *((volatile unsigned int*)(0x424E2290UL))
\r
4020 #define bFM3_ADC1_SCIS0_AN5 *((volatile unsigned int*)(0x424E2294UL))
\r
4021 #define bFM3_ADC1_SCIS0_AN6 *((volatile unsigned int*)(0x424E2298UL))
\r
4022 #define bFM3_ADC1_SCIS0_AN7 *((volatile unsigned int*)(0x424E229CUL))
\r
4023 #define bFM3_ADC1_SCIS1_AN8 *((volatile unsigned int*)(0x424E22A0UL))
\r
4024 #define bFM3_ADC1_SCIS1_AN9 *((volatile unsigned int*)(0x424E22A4UL))
\r
4025 #define bFM3_ADC1_SCIS1_AN10 *((volatile unsigned int*)(0x424E22A8UL))
\r
4026 #define bFM3_ADC1_SCIS1_AN11 *((volatile unsigned int*)(0x424E22ACUL))
\r
4027 #define bFM3_ADC1_SCIS1_AN12 *((volatile unsigned int*)(0x424E22B0UL))
\r
4028 #define bFM3_ADC1_SCIS1_AN13 *((volatile unsigned int*)(0x424E22B4UL))
\r
4029 #define bFM3_ADC1_SCIS1_AN14 *((volatile unsigned int*)(0x424E22B8UL))
\r
4030 #define bFM3_ADC1_SCIS1_AN15 *((volatile unsigned int*)(0x424E22BCUL))
\r
4031 #define bFM3_ADC1_PFNS_PFS0 *((volatile unsigned int*)(0x424E2300UL))
\r
4032 #define bFM3_ADC1_PFNS_PFS1 *((volatile unsigned int*)(0x424E2304UL))
\r
4033 #define bFM3_ADC1_PFNS_TEST0 *((volatile unsigned int*)(0x424E2310UL))
\r
4034 #define bFM3_ADC1_PFNS_TEST1 *((volatile unsigned int*)(0x424E2314UL))
\r
4035 #define bFM3_ADC1_PCCR_PSTR *((volatile unsigned int*)(0x424E2320UL))
\r
4036 #define bFM3_ADC1_PCCR_PHEN *((volatile unsigned int*)(0x424E2324UL))
\r
4037 #define bFM3_ADC1_PCCR_PEEN *((volatile unsigned int*)(0x424E2328UL))
\r
4038 #define bFM3_ADC1_PCCR_ESCE *((volatile unsigned int*)(0x424E232CUL))
\r
4039 #define bFM3_ADC1_PCCR_PFCLR *((volatile unsigned int*)(0x424E2330UL))
\r
4040 #define bFM3_ADC1_PCCR_POVR *((volatile unsigned int*)(0x424E2334UL))
\r
4041 #define bFM3_ADC1_PCCR_PFUL *((volatile unsigned int*)(0x424E2338UL))
\r
4042 #define bFM3_ADC1_PCCR_PEMP *((volatile unsigned int*)(0x424E233CUL))
\r
4043 #define bFM3_ADC1_PCFD_PC0 *((volatile unsigned int*)(0x424E2380UL))
\r
4044 #define bFM3_ADC1_PCFD_PC1 *((volatile unsigned int*)(0x424E2384UL))
\r
4045 #define bFM3_ADC1_PCFD_PC2 *((volatile unsigned int*)(0x424E2388UL))
\r
4046 #define bFM3_ADC1_PCFD_PC3 *((volatile unsigned int*)(0x424E238CUL))
\r
4047 #define bFM3_ADC1_PCFD_PC4 *((volatile unsigned int*)(0x424E2390UL))
\r
4048 #define bFM3_ADC1_PCFD_RS0 *((volatile unsigned int*)(0x424E23A0UL))
\r
4049 #define bFM3_ADC1_PCFD_RS1 *((volatile unsigned int*)(0x424E23A4UL))
\r
4050 #define bFM3_ADC1_PCFD_RS2 *((volatile unsigned int*)(0x424E23A8UL))
\r
4051 #define bFM3_ADC1_PCFD_INVL *((volatile unsigned int*)(0x424E23B0UL))
\r
4052 #define bFM3_ADC1_PCFD_PD0 *((volatile unsigned int*)(0x424E23D0UL))
\r
4053 #define bFM3_ADC1_PCFD_PD1 *((volatile unsigned int*)(0x424E23D4UL))
\r
4054 #define bFM3_ADC1_PCFD_PD2 *((volatile unsigned int*)(0x424E23D8UL))
\r
4055 #define bFM3_ADC1_PCFD_PD3 *((volatile unsigned int*)(0x424E23DCUL))
\r
4056 #define bFM3_ADC1_PCFD_PD4 *((volatile unsigned int*)(0x424E23E0UL))
\r
4057 #define bFM3_ADC1_PCFD_PD5 *((volatile unsigned int*)(0x424E23E4UL))
\r
4058 #define bFM3_ADC1_PCFD_PD6 *((volatile unsigned int*)(0x424E23E8UL))
\r
4059 #define bFM3_ADC1_PCFD_PD7 *((volatile unsigned int*)(0x424E23ECUL))
\r
4060 #define bFM3_ADC1_PCFD_PD8 *((volatile unsigned int*)(0x424E23F0UL))
\r
4061 #define bFM3_ADC1_PCFD_PD9 *((volatile unsigned int*)(0x424E23F4UL))
\r
4062 #define bFM3_ADC1_PCFD_PD10 *((volatile unsigned int*)(0x424E23F8UL))
\r
4063 #define bFM3_ADC1_PCFD_PD11 *((volatile unsigned int*)(0x424E23FCUL))
\r
4064 #define bFM3_ADC1_PCFDL_PC0 *((volatile unsigned int*)(0x424E2380UL))
\r
4065 #define bFM3_ADC1_PCFDL_PC1 *((volatile unsigned int*)(0x424E2384UL))
\r
4066 #define bFM3_ADC1_PCFDL_PC2 *((volatile unsigned int*)(0x424E2388UL))
\r
4067 #define bFM3_ADC1_PCFDL_PC3 *((volatile unsigned int*)(0x424E238CUL))
\r
4068 #define bFM3_ADC1_PCFDL_PC4 *((volatile unsigned int*)(0x424E2390UL))
\r
4069 #define bFM3_ADC1_PCFDL_RS0 *((volatile unsigned int*)(0x424E23A0UL))
\r
4070 #define bFM3_ADC1_PCFDL_RS1 *((volatile unsigned int*)(0x424E23A4UL))
\r
4071 #define bFM3_ADC1_PCFDL_RS2 *((volatile unsigned int*)(0x424E23A8UL))
\r
4072 #define bFM3_ADC1_PCFDL_INVL *((volatile unsigned int*)(0x424E23B0UL))
\r
4073 #define bFM3_ADC1_PCFDH_PD0 *((volatile unsigned int*)(0x424E23D0UL))
\r
4074 #define bFM3_ADC1_PCFDH_PD1 *((volatile unsigned int*)(0x424E23D4UL))
\r
4075 #define bFM3_ADC1_PCFDH_PD2 *((volatile unsigned int*)(0x424E23D8UL))
\r
4076 #define bFM3_ADC1_PCFDH_PD3 *((volatile unsigned int*)(0x424E23DCUL))
\r
4077 #define bFM3_ADC1_PCFDH_PD4 *((volatile unsigned int*)(0x424E23E0UL))
\r
4078 #define bFM3_ADC1_PCFDH_PD5 *((volatile unsigned int*)(0x424E23E4UL))
\r
4079 #define bFM3_ADC1_PCFDH_PD6 *((volatile unsigned int*)(0x424E23E8UL))
\r
4080 #define bFM3_ADC1_PCFDH_PD7 *((volatile unsigned int*)(0x424E23ECUL))
\r
4081 #define bFM3_ADC1_PCFDH_PD8 *((volatile unsigned int*)(0x424E23F0UL))
\r
4082 #define bFM3_ADC1_PCFDH_PD9 *((volatile unsigned int*)(0x424E23F4UL))
\r
4083 #define bFM3_ADC1_PCFDH_PD10 *((volatile unsigned int*)(0x424E23F8UL))
\r
4084 #define bFM3_ADC1_PCFDH_PD11 *((volatile unsigned int*)(0x424E23FCUL))
\r
4085 #define bFM3_ADC1_PCIS_P1A0 *((volatile unsigned int*)(0x424E2400UL))
\r
4086 #define bFM3_ADC1_PCIS_P1A1 *((volatile unsigned int*)(0x424E2404UL))
\r
4087 #define bFM3_ADC1_PCIS_P1A2 *((volatile unsigned int*)(0x424E2408UL))
\r
4088 #define bFM3_ADC1_PCIS_P2A0 *((volatile unsigned int*)(0x424E240CUL))
\r
4089 #define bFM3_ADC1_PCIS_P2A1 *((volatile unsigned int*)(0x424E2410UL))
\r
4090 #define bFM3_ADC1_PCIS_P2A2 *((volatile unsigned int*)(0x424E2414UL))
\r
4091 #define bFM3_ADC1_PCIS_P2A3 *((volatile unsigned int*)(0x424E2418UL))
\r
4092 #define bFM3_ADC1_PCIS_P2A4 *((volatile unsigned int*)(0x424E241CUL))
\r
4093 #define bFM3_ADC1_CMPCR_CCH0 *((volatile unsigned int*)(0x424E2480UL))
\r
4094 #define bFM3_ADC1_CMPCR_CCH1 *((volatile unsigned int*)(0x424E2484UL))
\r
4095 #define bFM3_ADC1_CMPCR_CCH2 *((volatile unsigned int*)(0x424E2488UL))
\r
4096 #define bFM3_ADC1_CMPCR_CCH3 *((volatile unsigned int*)(0x424E248CUL))
\r
4097 #define bFM3_ADC1_CMPCR_CCH4 *((volatile unsigned int*)(0x424E2490UL))
\r
4098 #define bFM3_ADC1_CMPCR_CMD0 *((volatile unsigned int*)(0x424E2494UL))
\r
4099 #define bFM3_ADC1_CMPCR_CMD1 *((volatile unsigned int*)(0x424E2498UL))
\r
4100 #define bFM3_ADC1_CMPCR_CMPEN *((volatile unsigned int*)(0x424E249CUL))
\r
4101 #define bFM3_ADC1_CMPD_CMAD2 *((volatile unsigned int*)(0x424E24D8UL))
\r
4102 #define bFM3_ADC1_CMPD_CMAD3 *((volatile unsigned int*)(0x424E24DCUL))
\r
4103 #define bFM3_ADC1_CMPD_CMAD4 *((volatile unsigned int*)(0x424E24E0UL))
\r
4104 #define bFM3_ADC1_CMPD_CMAD5 *((volatile unsigned int*)(0x424E24E4UL))
\r
4105 #define bFM3_ADC1_CMPD_CMAD6 *((volatile unsigned int*)(0x424E24E8UL))
\r
4106 #define bFM3_ADC1_CMPD_CMAD7 *((volatile unsigned int*)(0x424E24ECUL))
\r
4107 #define bFM3_ADC1_CMPD_CMAD8 *((volatile unsigned int*)(0x424E24F0UL))
\r
4108 #define bFM3_ADC1_CMPD_CMAD9 *((volatile unsigned int*)(0x424E24F4UL))
\r
4109 #define bFM3_ADC1_CMPD_CMAD10 *((volatile unsigned int*)(0x424E24F8UL))
\r
4110 #define bFM3_ADC1_CMPD_CMAD11 *((volatile unsigned int*)(0x424E24FCUL))
\r
4111 #define bFM3_ADC1_ADSS23_TS16 *((volatile unsigned int*)(0x424E2500UL))
\r
4112 #define bFM3_ADC1_ADSS23_TS17 *((volatile unsigned int*)(0x424E2504UL))
\r
4113 #define bFM3_ADC1_ADSS23_TS18 *((volatile unsigned int*)(0x424E2508UL))
\r
4114 #define bFM3_ADC1_ADSS23_TS19 *((volatile unsigned int*)(0x424E250CUL))
\r
4115 #define bFM3_ADC1_ADSS23_TS20 *((volatile unsigned int*)(0x424E2510UL))
\r
4116 #define bFM3_ADC1_ADSS23_TS21 *((volatile unsigned int*)(0x424E2514UL))
\r
4117 #define bFM3_ADC1_ADSS23_TS22 *((volatile unsigned int*)(0x424E2518UL))
\r
4118 #define bFM3_ADC1_ADSS23_TS23 *((volatile unsigned int*)(0x424E251CUL))
\r
4119 #define bFM3_ADC1_ADSS23_TS24 *((volatile unsigned int*)(0x424E2520UL))
\r
4120 #define bFM3_ADC1_ADSS23_TS25 *((volatile unsigned int*)(0x424E2524UL))
\r
4121 #define bFM3_ADC1_ADSS23_TS26 *((volatile unsigned int*)(0x424E2528UL))
\r
4122 #define bFM3_ADC1_ADSS23_TS27 *((volatile unsigned int*)(0x424E252CUL))
\r
4123 #define bFM3_ADC1_ADSS23_TS28 *((volatile unsigned int*)(0x424E2530UL))
\r
4124 #define bFM3_ADC1_ADSS23_TS29 *((volatile unsigned int*)(0x424E2534UL))
\r
4125 #define bFM3_ADC1_ADSS23_TS30 *((volatile unsigned int*)(0x424E2538UL))
\r
4126 #define bFM3_ADC1_ADSS23_TS31 *((volatile unsigned int*)(0x424E253CUL))
\r
4127 #define bFM3_ADC1_ADSS2_TS16 *((volatile unsigned int*)(0x424E2500UL))
\r
4128 #define bFM3_ADC1_ADSS2_TS17 *((volatile unsigned int*)(0x424E2504UL))
\r
4129 #define bFM3_ADC1_ADSS2_TS18 *((volatile unsigned int*)(0x424E2508UL))
\r
4130 #define bFM3_ADC1_ADSS2_TS19 *((volatile unsigned int*)(0x424E250CUL))
\r
4131 #define bFM3_ADC1_ADSS2_TS20 *((volatile unsigned int*)(0x424E2510UL))
\r
4132 #define bFM3_ADC1_ADSS2_TS21 *((volatile unsigned int*)(0x424E2514UL))
\r
4133 #define bFM3_ADC1_ADSS2_TS22 *((volatile unsigned int*)(0x424E2518UL))
\r
4134 #define bFM3_ADC1_ADSS2_TS23 *((volatile unsigned int*)(0x424E251CUL))
\r
4135 #define bFM3_ADC1_ADSS3_TS24 *((volatile unsigned int*)(0x424E2520UL))
\r
4136 #define bFM3_ADC1_ADSS3_TS25 *((volatile unsigned int*)(0x424E2524UL))
\r
4137 #define bFM3_ADC1_ADSS3_TS26 *((volatile unsigned int*)(0x424E2528UL))
\r
4138 #define bFM3_ADC1_ADSS3_TS27 *((volatile unsigned int*)(0x424E252CUL))
\r
4139 #define bFM3_ADC1_ADSS3_TS28 *((volatile unsigned int*)(0x424E2530UL))
\r
4140 #define bFM3_ADC1_ADSS3_TS29 *((volatile unsigned int*)(0x424E2534UL))
\r
4141 #define bFM3_ADC1_ADSS3_TS30 *((volatile unsigned int*)(0x424E2538UL))
\r
4142 #define bFM3_ADC1_ADSS3_TS31 *((volatile unsigned int*)(0x424E253CUL))
\r
4143 #define bFM3_ADC1_ADSS01_TS0 *((volatile unsigned int*)(0x424E2580UL))
\r
4144 #define bFM3_ADC1_ADSS01_TS1 *((volatile unsigned int*)(0x424E2584UL))
\r
4145 #define bFM3_ADC1_ADSS01_TS2 *((volatile unsigned int*)(0x424E2588UL))
\r
4146 #define bFM3_ADC1_ADSS01_TS3 *((volatile unsigned int*)(0x424E258CUL))
\r
4147 #define bFM3_ADC1_ADSS01_TS4 *((volatile unsigned int*)(0x424E2590UL))
\r
4148 #define bFM3_ADC1_ADSS01_TS5 *((volatile unsigned int*)(0x424E2594UL))
\r
4149 #define bFM3_ADC1_ADSS01_TS6 *((volatile unsigned int*)(0x424E2598UL))
\r
4150 #define bFM3_ADC1_ADSS01_TS7 *((volatile unsigned int*)(0x424E259CUL))
\r
4151 #define bFM3_ADC1_ADSS01_TS8 *((volatile unsigned int*)(0x424E25A0UL))
\r
4152 #define bFM3_ADC1_ADSS01_TS9 *((volatile unsigned int*)(0x424E25A4UL))
\r
4153 #define bFM3_ADC1_ADSS01_TS10 *((volatile unsigned int*)(0x424E25A8UL))
\r
4154 #define bFM3_ADC1_ADSS01_TS11 *((volatile unsigned int*)(0x424E25ACUL))
\r
4155 #define bFM3_ADC1_ADSS01_TS12 *((volatile unsigned int*)(0x424E25B0UL))
\r
4156 #define bFM3_ADC1_ADSS01_TS13 *((volatile unsigned int*)(0x424E25B4UL))
\r
4157 #define bFM3_ADC1_ADSS01_TS14 *((volatile unsigned int*)(0x424E25B8UL))
\r
4158 #define bFM3_ADC1_ADSS01_TS15 *((volatile unsigned int*)(0x424E25BCUL))
\r
4159 #define bFM3_ADC1_ADSS0_TS0 *((volatile unsigned int*)(0x424E2580UL))
\r
4160 #define bFM3_ADC1_ADSS0_TS1 *((volatile unsigned int*)(0x424E2584UL))
\r
4161 #define bFM3_ADC1_ADSS0_TS2 *((volatile unsigned int*)(0x424E2588UL))
\r
4162 #define bFM3_ADC1_ADSS0_TS3 *((volatile unsigned int*)(0x424E258CUL))
\r
4163 #define bFM3_ADC1_ADSS0_TS4 *((volatile unsigned int*)(0x424E2590UL))
\r
4164 #define bFM3_ADC1_ADSS0_TS5 *((volatile unsigned int*)(0x424E2594UL))
\r
4165 #define bFM3_ADC1_ADSS0_TS6 *((volatile unsigned int*)(0x424E2598UL))
\r
4166 #define bFM3_ADC1_ADSS0_TS7 *((volatile unsigned int*)(0x424E259CUL))
\r
4167 #define bFM3_ADC1_ADSS1_TS8 *((volatile unsigned int*)(0x424E25A0UL))
\r
4168 #define bFM3_ADC1_ADSS1_TS9 *((volatile unsigned int*)(0x424E25A4UL))
\r
4169 #define bFM3_ADC1_ADSS1_TS10 *((volatile unsigned int*)(0x424E25A8UL))
\r
4170 #define bFM3_ADC1_ADSS1_TS11 *((volatile unsigned int*)(0x424E25ACUL))
\r
4171 #define bFM3_ADC1_ADSS1_TS12 *((volatile unsigned int*)(0x424E25B0UL))
\r
4172 #define bFM3_ADC1_ADSS1_TS13 *((volatile unsigned int*)(0x424E25B4UL))
\r
4173 #define bFM3_ADC1_ADSS1_TS14 *((volatile unsigned int*)(0x424E25B8UL))
\r
4174 #define bFM3_ADC1_ADSS1_TS15 *((volatile unsigned int*)(0x424E25BCUL))
\r
4175 #define bFM3_ADC1_ADST01_ST10 *((volatile unsigned int*)(0x424E2600UL))
\r
4176 #define bFM3_ADC1_ADST01_ST11 *((volatile unsigned int*)(0x424E2604UL))
\r
4177 #define bFM3_ADC1_ADST01_ST12 *((volatile unsigned int*)(0x424E2608UL))
\r
4178 #define bFM3_ADC1_ADST01_ST13 *((volatile unsigned int*)(0x424E260CUL))
\r
4179 #define bFM3_ADC1_ADST01_ST14 *((volatile unsigned int*)(0x424E2610UL))
\r
4180 #define bFM3_ADC1_ADST01_STX10 *((volatile unsigned int*)(0x424E2614UL))
\r
4181 #define bFM3_ADC1_ADST01_STX11 *((volatile unsigned int*)(0x424E2618UL))
\r
4182 #define bFM3_ADC1_ADST01_STX12 *((volatile unsigned int*)(0x424E261CUL))
\r
4183 #define bFM3_ADC1_ADST01_ST00 *((volatile unsigned int*)(0x424E2620UL))
\r
4184 #define bFM3_ADC1_ADST01_ST01 *((volatile unsigned int*)(0x424E2624UL))
\r
4185 #define bFM3_ADC1_ADST01_ST02 *((volatile unsigned int*)(0x424E2628UL))
\r
4186 #define bFM3_ADC1_ADST01_ST03 *((volatile unsigned int*)(0x424E262CUL))
\r
4187 #define bFM3_ADC1_ADST01_ST04 *((volatile unsigned int*)(0x424E2630UL))
\r
4188 #define bFM3_ADC1_ADST01_STX00 *((volatile unsigned int*)(0x424E2634UL))
\r
4189 #define bFM3_ADC1_ADST01_STX01 *((volatile unsigned int*)(0x424E2638UL))
\r
4190 #define bFM3_ADC1_ADST01_STX02 *((volatile unsigned int*)(0x424E263CUL))
\r
4191 #define bFM3_ADC1_ADST1_ST10 *((volatile unsigned int*)(0x424E2600UL))
\r
4192 #define bFM3_ADC1_ADST1_ST11 *((volatile unsigned int*)(0x424E2604UL))
\r
4193 #define bFM3_ADC1_ADST1_ST12 *((volatile unsigned int*)(0x424E2608UL))
\r
4194 #define bFM3_ADC1_ADST1_ST13 *((volatile unsigned int*)(0x424E260CUL))
\r
4195 #define bFM3_ADC1_ADST1_ST14 *((volatile unsigned int*)(0x424E2610UL))
\r
4196 #define bFM3_ADC1_ADST1_STX10 *((volatile unsigned int*)(0x424E2614UL))
\r
4197 #define bFM3_ADC1_ADST1_STX11 *((volatile unsigned int*)(0x424E2618UL))
\r
4198 #define bFM3_ADC1_ADST1_STX12 *((volatile unsigned int*)(0x424E261CUL))
\r
4199 #define bFM3_ADC1_ADST0_ST00 *((volatile unsigned int*)(0x424E2620UL))
\r
4200 #define bFM3_ADC1_ADST0_ST01 *((volatile unsigned int*)(0x424E2624UL))
\r
4201 #define bFM3_ADC1_ADST0_ST02 *((volatile unsigned int*)(0x424E2628UL))
\r
4202 #define bFM3_ADC1_ADST0_ST03 *((volatile unsigned int*)(0x424E262CUL))
\r
4203 #define bFM3_ADC1_ADST0_ST04 *((volatile unsigned int*)(0x424E2630UL))
\r
4204 #define bFM3_ADC1_ADST0_STX00 *((volatile unsigned int*)(0x424E2634UL))
\r
4205 #define bFM3_ADC1_ADST0_STX01 *((volatile unsigned int*)(0x424E2638UL))
\r
4206 #define bFM3_ADC1_ADST0_STX02 *((volatile unsigned int*)(0x424E263CUL))
\r
4207 #define bFM3_ADC1_ADCT_CT0 *((volatile unsigned int*)(0x424E2680UL))
\r
4208 #define bFM3_ADC1_ADCT_CT1 *((volatile unsigned int*)(0x424E2684UL))
\r
4209 #define bFM3_ADC1_ADCT_CT2 *((volatile unsigned int*)(0x424E2688UL))
\r
4210 #define bFM3_ADC1_PRTSL_PRTSL0 *((volatile unsigned int*)(0x424E2700UL))
\r
4211 #define bFM3_ADC1_PRTSL_PRTSL1 *((volatile unsigned int*)(0x424E2704UL))
\r
4212 #define bFM3_ADC1_PRTSL_PRTSL2 *((volatile unsigned int*)(0x424E2708UL))
\r
4213 #define bFM3_ADC1_PRTSL_PRTSL3 *((volatile unsigned int*)(0x424E270CUL))
\r
4214 #define bFM3_ADC1_SCTSL_SCTSL0 *((volatile unsigned int*)(0x424E2720UL))
\r
4215 #define bFM3_ADC1_SCTSL_SCTSL1 *((volatile unsigned int*)(0x424E2724UL))
\r
4216 #define bFM3_ADC1_SCTSL_SCTSL2 *((volatile unsigned int*)(0x424E2728UL))
\r
4217 #define bFM3_ADC1_SCTSL_SCTSL3 *((volatile unsigned int*)(0x424E272CUL))
\r
4218 #define bFM3_ADC1_ADCEN_ENBL *((volatile unsigned int*)(0x424E2780UL))
\r
4219 #define bFM3_ADC1_ADCEN_READY *((volatile unsigned int*)(0x424E2784UL))
\r
4221 /* 12-bit ADC unit 2 registers */
\r
4222 #define bFM3_ADC2_ADSR_SCS *((volatile unsigned int*)(0x424E4000UL))
\r
4223 #define bFM3_ADC2_ADSR_PCS *((volatile unsigned int*)(0x424E4004UL))
\r
4224 #define bFM3_ADC2_ADSR_PCNS *((volatile unsigned int*)(0x424E4008UL))
\r
4225 #define bFM3_ADC2_ADSR_FDAS *((volatile unsigned int*)(0x424E4018UL))
\r
4226 #define bFM3_ADC2_ADSR_ADSTP *((volatile unsigned int*)(0x424E401CUL))
\r
4227 #define bFM3_ADC2_ADCR_OVRIE *((volatile unsigned int*)(0x424E4020UL))
\r
4228 #define bFM3_ADC2_ADCR_CMPIE *((volatile unsigned int*)(0x424E4024UL))
\r
4229 #define bFM3_ADC2_ADCR_PCIE *((volatile unsigned int*)(0x424E4028UL))
\r
4230 #define bFM3_ADC2_ADCR_SCIE *((volatile unsigned int*)(0x424E402CUL))
\r
4231 #define bFM3_ADC2_ADCR_CMPIF *((volatile unsigned int*)(0x424E4034UL))
\r
4232 #define bFM3_ADC2_ADCR_PCIF *((volatile unsigned int*)(0x424E4038UL))
\r
4233 #define bFM3_ADC2_ADCR_SCIF *((volatile unsigned int*)(0x424E403CUL))
\r
4234 #define bFM3_ADC2_SFNS_SFS0 *((volatile unsigned int*)(0x424E4100UL))
\r
4235 #define bFM3_ADC2_SFNS_SFS1 *((volatile unsigned int*)(0x424E4104UL))
\r
4236 #define bFM3_ADC2_SFNS_SFS2 *((volatile unsigned int*)(0x424E4108UL))
\r
4237 #define bFM3_ADC2_SFNS_SFS3 *((volatile unsigned int*)(0x424E410CUL))
\r
4238 #define bFM3_ADC2_SCCR_SSTR *((volatile unsigned int*)(0x424E4120UL))
\r
4239 #define bFM3_ADC2_SCCR_SHEN *((volatile unsigned int*)(0x424E4124UL))
\r
4240 #define bFM3_ADC2_SCCR_RPT *((volatile unsigned int*)(0x424E4128UL))
\r
4241 #define bFM3_ADC2_SCCR_SFCLR *((volatile unsigned int*)(0x424E4130UL))
\r
4242 #define bFM3_ADC2_SCCR_SOVR *((volatile unsigned int*)(0x424E4134UL))
\r
4243 #define bFM3_ADC2_SCCR_SFUL *((volatile unsigned int*)(0x424E4138UL))
\r
4244 #define bFM3_ADC2_SCCR_SEMP *((volatile unsigned int*)(0x424E413CUL))
\r
4245 #define bFM3_ADC2_SCFD_SC0 *((volatile unsigned int*)(0x424E4180UL))
\r
4246 #define bFM3_ADC2_SCFD_SC1 *((volatile unsigned int*)(0x424E4184UL))
\r
4247 #define bFM3_ADC2_SCFD_SC2 *((volatile unsigned int*)(0x424E4188UL))
\r
4248 #define bFM3_ADC2_SCFD_SC3 *((volatile unsigned int*)(0x424E418CUL))
\r
4249 #define bFM3_ADC2_SCFD_SC4 *((volatile unsigned int*)(0x424E4190UL))
\r
4250 #define bFM3_ADC2_SCFD_RS0 *((volatile unsigned int*)(0x424E41A0UL))
\r
4251 #define bFM3_ADC2_SCFD_RS1 *((volatile unsigned int*)(0x424E41A4UL))
\r
4252 #define bFM3_ADC2_SCFD_INVL *((volatile unsigned int*)(0x424E41B0UL))
\r
4253 #define bFM3_ADC2_SCFD_SD0 *((volatile unsigned int*)(0x424E41D0UL))
\r
4254 #define bFM3_ADC2_SCFD_SD1 *((volatile unsigned int*)(0x424E41D4UL))
\r
4255 #define bFM3_ADC2_SCFD_SD2 *((volatile unsigned int*)(0x424E41D8UL))
\r
4256 #define bFM3_ADC2_SCFD_SD3 *((volatile unsigned int*)(0x424E41DCUL))
\r
4257 #define bFM3_ADC2_SCFD_SD4 *((volatile unsigned int*)(0x424E41E0UL))
\r
4258 #define bFM3_ADC2_SCFD_SD5 *((volatile unsigned int*)(0x424E41E4UL))
\r
4259 #define bFM3_ADC2_SCFD_SD6 *((volatile unsigned int*)(0x424E41E8UL))
\r
4260 #define bFM3_ADC2_SCFD_SD7 *((volatile unsigned int*)(0x424E41ECUL))
\r
4261 #define bFM3_ADC2_SCFD_SD8 *((volatile unsigned int*)(0x424E41F0UL))
\r
4262 #define bFM3_ADC2_SCFD_SD9 *((volatile unsigned int*)(0x424E41F4UL))
\r
4263 #define bFM3_ADC2_SCFD_SD10 *((volatile unsigned int*)(0x424E41F8UL))
\r
4264 #define bFM3_ADC2_SCFD_SD11 *((volatile unsigned int*)(0x424E41FCUL))
\r
4265 #define bFM3_ADC2_SCFDL_SC0 *((volatile unsigned int*)(0x424E4180UL))
\r
4266 #define bFM3_ADC2_SCFDL_SC1 *((volatile unsigned int*)(0x424E4184UL))
\r
4267 #define bFM3_ADC2_SCFDL_SC2 *((volatile unsigned int*)(0x424E4188UL))
\r
4268 #define bFM3_ADC2_SCFDL_SC3 *((volatile unsigned int*)(0x424E418CUL))
\r
4269 #define bFM3_ADC2_SCFDL_SC4 *((volatile unsigned int*)(0x424E4190UL))
\r
4270 #define bFM3_ADC2_SCFDL_RS0 *((volatile unsigned int*)(0x424E41A0UL))
\r
4271 #define bFM3_ADC2_SCFDL_RS1 *((volatile unsigned int*)(0x424E41A4UL))
\r
4272 #define bFM3_ADC2_SCFDL_INVL *((volatile unsigned int*)(0x424E41B0UL))
\r
4273 #define bFM3_ADC2_SCFDH_SD0 *((volatile unsigned int*)(0x424E41D0UL))
\r
4274 #define bFM3_ADC2_SCFDH_SD1 *((volatile unsigned int*)(0x424E41D4UL))
\r
4275 #define bFM3_ADC2_SCFDH_SD2 *((volatile unsigned int*)(0x424E41D8UL))
\r
4276 #define bFM3_ADC2_SCFDH_SD3 *((volatile unsigned int*)(0x424E41DCUL))
\r
4277 #define bFM3_ADC2_SCFDH_SD4 *((volatile unsigned int*)(0x424E41E0UL))
\r
4278 #define bFM3_ADC2_SCFDH_SD5 *((volatile unsigned int*)(0x424E41E4UL))
\r
4279 #define bFM3_ADC2_SCFDH_SD6 *((volatile unsigned int*)(0x424E41E8UL))
\r
4280 #define bFM3_ADC2_SCFDH_SD7 *((volatile unsigned int*)(0x424E41ECUL))
\r
4281 #define bFM3_ADC2_SCFDH_SD8 *((volatile unsigned int*)(0x424E41F0UL))
\r
4282 #define bFM3_ADC2_SCFDH_SD9 *((volatile unsigned int*)(0x424E41F4UL))
\r
4283 #define bFM3_ADC2_SCFDH_SD10 *((volatile unsigned int*)(0x424E41F8UL))
\r
4284 #define bFM3_ADC2_SCFDH_SD11 *((volatile unsigned int*)(0x424E41FCUL))
\r
4285 #define bFM3_ADC2_SCIS23_AN16 *((volatile unsigned int*)(0x424E4200UL))
\r
4286 #define bFM3_ADC2_SCIS23_AN17 *((volatile unsigned int*)(0x424E4204UL))
\r
4287 #define bFM3_ADC2_SCIS23_AN18 *((volatile unsigned int*)(0x424E4208UL))
\r
4288 #define bFM3_ADC2_SCIS23_AN19 *((volatile unsigned int*)(0x424E420CUL))
\r
4289 #define bFM3_ADC2_SCIS23_AN20 *((volatile unsigned int*)(0x424E4210UL))
\r
4290 #define bFM3_ADC2_SCIS23_AN21 *((volatile unsigned int*)(0x424E4214UL))
\r
4291 #define bFM3_ADC2_SCIS23_AN22 *((volatile unsigned int*)(0x424E4218UL))
\r
4292 #define bFM3_ADC2_SCIS23_AN23 *((volatile unsigned int*)(0x424E421CUL))
\r
4293 #define bFM3_ADC2_SCIS23_AN24 *((volatile unsigned int*)(0x424E4220UL))
\r
4294 #define bFM3_ADC2_SCIS23_AN25 *((volatile unsigned int*)(0x424E4224UL))
\r
4295 #define bFM3_ADC2_SCIS23_AN26 *((volatile unsigned int*)(0x424E4228UL))
\r
4296 #define bFM3_ADC2_SCIS23_AN27 *((volatile unsigned int*)(0x424E422CUL))
\r
4297 #define bFM3_ADC2_SCIS23_AN28 *((volatile unsigned int*)(0x424E4230UL))
\r
4298 #define bFM3_ADC2_SCIS23_AN29 *((volatile unsigned int*)(0x424E4234UL))
\r
4299 #define bFM3_ADC2_SCIS23_AN30 *((volatile unsigned int*)(0x424E4238UL))
\r
4300 #define bFM3_ADC2_SCIS23_AN31 *((volatile unsigned int*)(0x424E423CUL))
\r
4301 #define bFM3_ADC2_SCIS2_AN16 *((volatile unsigned int*)(0x424E4200UL))
\r
4302 #define bFM3_ADC2_SCIS2_AN17 *((volatile unsigned int*)(0x424E4204UL))
\r
4303 #define bFM3_ADC2_SCIS2_AN18 *((volatile unsigned int*)(0x424E4208UL))
\r
4304 #define bFM3_ADC2_SCIS2_AN19 *((volatile unsigned int*)(0x424E420CUL))
\r
4305 #define bFM3_ADC2_SCIS2_AN20 *((volatile unsigned int*)(0x424E4210UL))
\r
4306 #define bFM3_ADC2_SCIS2_AN21 *((volatile unsigned int*)(0x424E4214UL))
\r
4307 #define bFM3_ADC2_SCIS2_AN22 *((volatile unsigned int*)(0x424E4218UL))
\r
4308 #define bFM3_ADC2_SCIS2_AN23 *((volatile unsigned int*)(0x424E421CUL))
\r
4309 #define bFM3_ADC2_SCIS3_AN24 *((volatile unsigned int*)(0x424E4220UL))
\r
4310 #define bFM3_ADC2_SCIS3_AN25 *((volatile unsigned int*)(0x424E4224UL))
\r
4311 #define bFM3_ADC2_SCIS3_AN26 *((volatile unsigned int*)(0x424E4228UL))
\r
4312 #define bFM3_ADC2_SCIS3_AN27 *((volatile unsigned int*)(0x424E422CUL))
\r
4313 #define bFM3_ADC2_SCIS3_AN28 *((volatile unsigned int*)(0x424E4230UL))
\r
4314 #define bFM3_ADC2_SCIS3_AN29 *((volatile unsigned int*)(0x424E4234UL))
\r
4315 #define bFM3_ADC2_SCIS3_AN30 *((volatile unsigned int*)(0x424E4238UL))
\r
4316 #define bFM3_ADC2_SCIS3_AN31 *((volatile unsigned int*)(0x424E423CUL))
\r
4317 #define bFM3_ADC2_SCIS01_AN0 *((volatile unsigned int*)(0x424E4280UL))
\r
4318 #define bFM3_ADC2_SCIS01_AN1 *((volatile unsigned int*)(0x424E4284UL))
\r
4319 #define bFM3_ADC2_SCIS01_AN2 *((volatile unsigned int*)(0x424E4288UL))
\r
4320 #define bFM3_ADC2_SCIS01_AN3 *((volatile unsigned int*)(0x424E428CUL))
\r
4321 #define bFM3_ADC2_SCIS01_AN4 *((volatile unsigned int*)(0x424E4290UL))
\r
4322 #define bFM3_ADC2_SCIS01_AN5 *((volatile unsigned int*)(0x424E4294UL))
\r
4323 #define bFM3_ADC2_SCIS01_AN6 *((volatile unsigned int*)(0x424E4298UL))
\r
4324 #define bFM3_ADC2_SCIS01_AN7 *((volatile unsigned int*)(0x424E429CUL))
\r
4325 #define bFM3_ADC2_SCIS01_AN8 *((volatile unsigned int*)(0x424E42A0UL))
\r
4326 #define bFM3_ADC2_SCIS01_AN9 *((volatile unsigned int*)(0x424E42A4UL))
\r
4327 #define bFM3_ADC2_SCIS01_AN10 *((volatile unsigned int*)(0x424E42A8UL))
\r
4328 #define bFM3_ADC2_SCIS01_AN11 *((volatile unsigned int*)(0x424E42ACUL))
\r
4329 #define bFM3_ADC2_SCIS01_AN12 *((volatile unsigned int*)(0x424E42B0UL))
\r
4330 #define bFM3_ADC2_SCIS01_AN13 *((volatile unsigned int*)(0x424E42B4UL))
\r
4331 #define bFM3_ADC2_SCIS01_AN14 *((volatile unsigned int*)(0x424E42B8UL))
\r
4332 #define bFM3_ADC2_SCIS01_AN15 *((volatile unsigned int*)(0x424E42BCUL))
\r
4333 #define bFM3_ADC2_SCIS0_AN0 *((volatile unsigned int*)(0x424E4280UL))
\r
4334 #define bFM3_ADC2_SCIS0_AN1 *((volatile unsigned int*)(0x424E4284UL))
\r
4335 #define bFM3_ADC2_SCIS0_AN2 *((volatile unsigned int*)(0x424E4288UL))
\r
4336 #define bFM3_ADC2_SCIS0_AN3 *((volatile unsigned int*)(0x424E428CUL))
\r
4337 #define bFM3_ADC2_SCIS0_AN4 *((volatile unsigned int*)(0x424E4290UL))
\r
4338 #define bFM3_ADC2_SCIS0_AN5 *((volatile unsigned int*)(0x424E4294UL))
\r
4339 #define bFM3_ADC2_SCIS0_AN6 *((volatile unsigned int*)(0x424E4298UL))
\r
4340 #define bFM3_ADC2_SCIS0_AN7 *((volatile unsigned int*)(0x424E429CUL))
\r
4341 #define bFM3_ADC2_SCIS1_AN8 *((volatile unsigned int*)(0x424E42A0UL))
\r
4342 #define bFM3_ADC2_SCIS1_AN9 *((volatile unsigned int*)(0x424E42A4UL))
\r
4343 #define bFM3_ADC2_SCIS1_AN10 *((volatile unsigned int*)(0x424E42A8UL))
\r
4344 #define bFM3_ADC2_SCIS1_AN11 *((volatile unsigned int*)(0x424E42ACUL))
\r
4345 #define bFM3_ADC2_SCIS1_AN12 *((volatile unsigned int*)(0x424E42B0UL))
\r
4346 #define bFM3_ADC2_SCIS1_AN13 *((volatile unsigned int*)(0x424E42B4UL))
\r
4347 #define bFM3_ADC2_SCIS1_AN14 *((volatile unsigned int*)(0x424E42B8UL))
\r
4348 #define bFM3_ADC2_SCIS1_AN15 *((volatile unsigned int*)(0x424E42BCUL))
\r
4349 #define bFM3_ADC2_PFNS_PFS0 *((volatile unsigned int*)(0x424E4300UL))
\r
4350 #define bFM3_ADC2_PFNS_PFS1 *((volatile unsigned int*)(0x424E4304UL))
\r
4351 #define bFM3_ADC2_PFNS_TEST0 *((volatile unsigned int*)(0x424E4310UL))
\r
4352 #define bFM3_ADC2_PFNS_TEST1 *((volatile unsigned int*)(0x424E4314UL))
\r
4353 #define bFM3_ADC2_PCCR_PSTR *((volatile unsigned int*)(0x424E4320UL))
\r
4354 #define bFM3_ADC2_PCCR_PHEN *((volatile unsigned int*)(0x424E4324UL))
\r
4355 #define bFM3_ADC2_PCCR_PEEN *((volatile unsigned int*)(0x424E4328UL))
\r
4356 #define bFM3_ADC2_PCCR_ESCE *((volatile unsigned int*)(0x424E432CUL))
\r
4357 #define bFM3_ADC2_PCCR_PFCLR *((volatile unsigned int*)(0x424E4330UL))
\r
4358 #define bFM3_ADC2_PCCR_POVR *((volatile unsigned int*)(0x424E4334UL))
\r
4359 #define bFM3_ADC2_PCCR_PFUL *((volatile unsigned int*)(0x424E4338UL))
\r
4360 #define bFM3_ADC2_PCCR_PEMP *((volatile unsigned int*)(0x424E433CUL))
\r
4361 #define bFM3_ADC2_PCFD_PC0 *((volatile unsigned int*)(0x424E4380UL))
\r
4362 #define bFM3_ADC2_PCFD_PC1 *((volatile unsigned int*)(0x424E4384UL))
\r
4363 #define bFM3_ADC2_PCFD_PC2 *((volatile unsigned int*)(0x424E4388UL))
\r
4364 #define bFM3_ADC2_PCFD_PC3 *((volatile unsigned int*)(0x424E438CUL))
\r
4365 #define bFM3_ADC2_PCFD_PC4 *((volatile unsigned int*)(0x424E4390UL))
\r
4366 #define bFM3_ADC2_PCFD_RS0 *((volatile unsigned int*)(0x424E43A0UL))
\r
4367 #define bFM3_ADC2_PCFD_RS1 *((volatile unsigned int*)(0x424E43A4UL))
\r
4368 #define bFM3_ADC2_PCFD_RS2 *((volatile unsigned int*)(0x424E43A8UL))
\r
4369 #define bFM3_ADC2_PCFD_INVL *((volatile unsigned int*)(0x424E43B0UL))
\r
4370 #define bFM3_ADC2_PCFD_PD0 *((volatile unsigned int*)(0x424E43D0UL))
\r
4371 #define bFM3_ADC2_PCFD_PD1 *((volatile unsigned int*)(0x424E43D4UL))
\r
4372 #define bFM3_ADC2_PCFD_PD2 *((volatile unsigned int*)(0x424E43D8UL))
\r
4373 #define bFM3_ADC2_PCFD_PD3 *((volatile unsigned int*)(0x424E43DCUL))
\r
4374 #define bFM3_ADC2_PCFD_PD4 *((volatile unsigned int*)(0x424E43E0UL))
\r
4375 #define bFM3_ADC2_PCFD_PD5 *((volatile unsigned int*)(0x424E43E4UL))
\r
4376 #define bFM3_ADC2_PCFD_PD6 *((volatile unsigned int*)(0x424E43E8UL))
\r
4377 #define bFM3_ADC2_PCFD_PD7 *((volatile unsigned int*)(0x424E43ECUL))
\r
4378 #define bFM3_ADC2_PCFD_PD8 *((volatile unsigned int*)(0x424E43F0UL))
\r
4379 #define bFM3_ADC2_PCFD_PD9 *((volatile unsigned int*)(0x424E43F4UL))
\r
4380 #define bFM3_ADC2_PCFD_PD10 *((volatile unsigned int*)(0x424E43F8UL))
\r
4381 #define bFM3_ADC2_PCFD_PD11 *((volatile unsigned int*)(0x424E43FCUL))
\r
4382 #define bFM3_ADC2_PCFDL_PC0 *((volatile unsigned int*)(0x424E4380UL))
\r
4383 #define bFM3_ADC2_PCFDL_PC1 *((volatile unsigned int*)(0x424E4384UL))
\r
4384 #define bFM3_ADC2_PCFDL_PC2 *((volatile unsigned int*)(0x424E4388UL))
\r
4385 #define bFM3_ADC2_PCFDL_PC3 *((volatile unsigned int*)(0x424E438CUL))
\r
4386 #define bFM3_ADC2_PCFDL_PC4 *((volatile unsigned int*)(0x424E4390UL))
\r
4387 #define bFM3_ADC2_PCFDL_RS0 *((volatile unsigned int*)(0x424E43A0UL))
\r
4388 #define bFM3_ADC2_PCFDL_RS1 *((volatile unsigned int*)(0x424E43A4UL))
\r
4389 #define bFM3_ADC2_PCFDL_RS2 *((volatile unsigned int*)(0x424E43A8UL))
\r
4390 #define bFM3_ADC2_PCFDL_INVL *((volatile unsigned int*)(0x424E43B0UL))
\r
4391 #define bFM3_ADC2_PCFDH_PD0 *((volatile unsigned int*)(0x424E43D0UL))
\r
4392 #define bFM3_ADC2_PCFDH_PD1 *((volatile unsigned int*)(0x424E43D4UL))
\r
4393 #define bFM3_ADC2_PCFDH_PD2 *((volatile unsigned int*)(0x424E43D8UL))
\r
4394 #define bFM3_ADC2_PCFDH_PD3 *((volatile unsigned int*)(0x424E43DCUL))
\r
4395 #define bFM3_ADC2_PCFDH_PD4 *((volatile unsigned int*)(0x424E43E0UL))
\r
4396 #define bFM3_ADC2_PCFDH_PD5 *((volatile unsigned int*)(0x424E43E4UL))
\r
4397 #define bFM3_ADC2_PCFDH_PD6 *((volatile unsigned int*)(0x424E43E8UL))
\r
4398 #define bFM3_ADC2_PCFDH_PD7 *((volatile unsigned int*)(0x424E43ECUL))
\r
4399 #define bFM3_ADC2_PCFDH_PD8 *((volatile unsigned int*)(0x424E43F0UL))
\r
4400 #define bFM3_ADC2_PCFDH_PD9 *((volatile unsigned int*)(0x424E43F4UL))
\r
4401 #define bFM3_ADC2_PCFDH_PD10 *((volatile unsigned int*)(0x424E43F8UL))
\r
4402 #define bFM3_ADC2_PCFDH_PD11 *((volatile unsigned int*)(0x424E43FCUL))
\r
4403 #define bFM3_ADC2_PCIS_P1A0 *((volatile unsigned int*)(0x424E4400UL))
\r
4404 #define bFM3_ADC2_PCIS_P1A1 *((volatile unsigned int*)(0x424E4404UL))
\r
4405 #define bFM3_ADC2_PCIS_P1A2 *((volatile unsigned int*)(0x424E4408UL))
\r
4406 #define bFM3_ADC2_PCIS_P2A0 *((volatile unsigned int*)(0x424E440CUL))
\r
4407 #define bFM3_ADC2_PCIS_P2A1 *((volatile unsigned int*)(0x424E4410UL))
\r
4408 #define bFM3_ADC2_PCIS_P2A2 *((volatile unsigned int*)(0x424E4414UL))
\r
4409 #define bFM3_ADC2_PCIS_P2A3 *((volatile unsigned int*)(0x424E4418UL))
\r
4410 #define bFM3_ADC2_PCIS_P2A4 *((volatile unsigned int*)(0x424E441CUL))
\r
4411 #define bFM3_ADC2_CMPCR_CCH0 *((volatile unsigned int*)(0x424E4480UL))
\r
4412 #define bFM3_ADC2_CMPCR_CCH1 *((volatile unsigned int*)(0x424E4484UL))
\r
4413 #define bFM3_ADC2_CMPCR_CCH2 *((volatile unsigned int*)(0x424E4488UL))
\r
4414 #define bFM3_ADC2_CMPCR_CCH3 *((volatile unsigned int*)(0x424E448CUL))
\r
4415 #define bFM3_ADC2_CMPCR_CCH4 *((volatile unsigned int*)(0x424E4490UL))
\r
4416 #define bFM3_ADC2_CMPCR_CMD0 *((volatile unsigned int*)(0x424E4494UL))
\r
4417 #define bFM3_ADC2_CMPCR_CMD1 *((volatile unsigned int*)(0x424E4498UL))
\r
4418 #define bFM3_ADC2_CMPCR_CMPEN *((volatile unsigned int*)(0x424E449CUL))
\r
4419 #define bFM3_ADC2_CMPD_CMAD2 *((volatile unsigned int*)(0x424E44D8UL))
\r
4420 #define bFM3_ADC2_CMPD_CMAD3 *((volatile unsigned int*)(0x424E44DCUL))
\r
4421 #define bFM3_ADC2_CMPD_CMAD4 *((volatile unsigned int*)(0x424E44E0UL))
\r
4422 #define bFM3_ADC2_CMPD_CMAD5 *((volatile unsigned int*)(0x424E44E4UL))
\r
4423 #define bFM3_ADC2_CMPD_CMAD6 *((volatile unsigned int*)(0x424E44E8UL))
\r
4424 #define bFM3_ADC2_CMPD_CMAD7 *((volatile unsigned int*)(0x424E44ECUL))
\r
4425 #define bFM3_ADC2_CMPD_CMAD8 *((volatile unsigned int*)(0x424E44F0UL))
\r
4426 #define bFM3_ADC2_CMPD_CMAD9 *((volatile unsigned int*)(0x424E44F4UL))
\r
4427 #define bFM3_ADC2_CMPD_CMAD10 *((volatile unsigned int*)(0x424E44F8UL))
\r
4428 #define bFM3_ADC2_CMPD_CMAD11 *((volatile unsigned int*)(0x424E44FCUL))
\r
4429 #define bFM3_ADC2_ADSS23_TS16 *((volatile unsigned int*)(0x424E4500UL))
\r
4430 #define bFM3_ADC2_ADSS23_TS17 *((volatile unsigned int*)(0x424E4504UL))
\r
4431 #define bFM3_ADC2_ADSS23_TS18 *((volatile unsigned int*)(0x424E4508UL))
\r
4432 #define bFM3_ADC2_ADSS23_TS19 *((volatile unsigned int*)(0x424E450CUL))
\r
4433 #define bFM3_ADC2_ADSS23_TS20 *((volatile unsigned int*)(0x424E4510UL))
\r
4434 #define bFM3_ADC2_ADSS23_TS21 *((volatile unsigned int*)(0x424E4514UL))
\r
4435 #define bFM3_ADC2_ADSS23_TS22 *((volatile unsigned int*)(0x424E4518UL))
\r
4436 #define bFM3_ADC2_ADSS23_TS23 *((volatile unsigned int*)(0x424E451CUL))
\r
4437 #define bFM3_ADC2_ADSS23_TS24 *((volatile unsigned int*)(0x424E4520UL))
\r
4438 #define bFM3_ADC2_ADSS23_TS25 *((volatile unsigned int*)(0x424E4524UL))
\r
4439 #define bFM3_ADC2_ADSS23_TS26 *((volatile unsigned int*)(0x424E4528UL))
\r
4440 #define bFM3_ADC2_ADSS23_TS27 *((volatile unsigned int*)(0x424E452CUL))
\r
4441 #define bFM3_ADC2_ADSS23_TS28 *((volatile unsigned int*)(0x424E4530UL))
\r
4442 #define bFM3_ADC2_ADSS23_TS29 *((volatile unsigned int*)(0x424E4534UL))
\r
4443 #define bFM3_ADC2_ADSS23_TS30 *((volatile unsigned int*)(0x424E4538UL))
\r
4444 #define bFM3_ADC2_ADSS23_TS31 *((volatile unsigned int*)(0x424E453CUL))
\r
4445 #define bFM3_ADC2_ADSS2_TS16 *((volatile unsigned int*)(0x424E4500UL))
\r
4446 #define bFM3_ADC2_ADSS2_TS17 *((volatile unsigned int*)(0x424E4504UL))
\r
4447 #define bFM3_ADC2_ADSS2_TS18 *((volatile unsigned int*)(0x424E4508UL))
\r
4448 #define bFM3_ADC2_ADSS2_TS19 *((volatile unsigned int*)(0x424E450CUL))
\r
4449 #define bFM3_ADC2_ADSS2_TS20 *((volatile unsigned int*)(0x424E4510UL))
\r
4450 #define bFM3_ADC2_ADSS2_TS21 *((volatile unsigned int*)(0x424E4514UL))
\r
4451 #define bFM3_ADC2_ADSS2_TS22 *((volatile unsigned int*)(0x424E4518UL))
\r
4452 #define bFM3_ADC2_ADSS2_TS23 *((volatile unsigned int*)(0x424E451CUL))
\r
4453 #define bFM3_ADC2_ADSS3_TS24 *((volatile unsigned int*)(0x424E4520UL))
\r
4454 #define bFM3_ADC2_ADSS3_TS25 *((volatile unsigned int*)(0x424E4524UL))
\r
4455 #define bFM3_ADC2_ADSS3_TS26 *((volatile unsigned int*)(0x424E4528UL))
\r
4456 #define bFM3_ADC2_ADSS3_TS27 *((volatile unsigned int*)(0x424E452CUL))
\r
4457 #define bFM3_ADC2_ADSS3_TS28 *((volatile unsigned int*)(0x424E4530UL))
\r
4458 #define bFM3_ADC2_ADSS3_TS29 *((volatile unsigned int*)(0x424E4534UL))
\r
4459 #define bFM3_ADC2_ADSS3_TS30 *((volatile unsigned int*)(0x424E4538UL))
\r
4460 #define bFM3_ADC2_ADSS3_TS31 *((volatile unsigned int*)(0x424E453CUL))
\r
4461 #define bFM3_ADC2_ADSS01_TS0 *((volatile unsigned int*)(0x424E4580UL))
\r
4462 #define bFM3_ADC2_ADSS01_TS1 *((volatile unsigned int*)(0x424E4584UL))
\r
4463 #define bFM3_ADC2_ADSS01_TS2 *((volatile unsigned int*)(0x424E4588UL))
\r
4464 #define bFM3_ADC2_ADSS01_TS3 *((volatile unsigned int*)(0x424E458CUL))
\r
4465 #define bFM3_ADC2_ADSS01_TS4 *((volatile unsigned int*)(0x424E4590UL))
\r
4466 #define bFM3_ADC2_ADSS01_TS5 *((volatile unsigned int*)(0x424E4594UL))
\r
4467 #define bFM3_ADC2_ADSS01_TS6 *((volatile unsigned int*)(0x424E4598UL))
\r
4468 #define bFM3_ADC2_ADSS01_TS7 *((volatile unsigned int*)(0x424E459CUL))
\r
4469 #define bFM3_ADC2_ADSS01_TS8 *((volatile unsigned int*)(0x424E45A0UL))
\r
4470 #define bFM3_ADC2_ADSS01_TS9 *((volatile unsigned int*)(0x424E45A4UL))
\r
4471 #define bFM3_ADC2_ADSS01_TS10 *((volatile unsigned int*)(0x424E45A8UL))
\r
4472 #define bFM3_ADC2_ADSS01_TS11 *((volatile unsigned int*)(0x424E45ACUL))
\r
4473 #define bFM3_ADC2_ADSS01_TS12 *((volatile unsigned int*)(0x424E45B0UL))
\r
4474 #define bFM3_ADC2_ADSS01_TS13 *((volatile unsigned int*)(0x424E45B4UL))
\r
4475 #define bFM3_ADC2_ADSS01_TS14 *((volatile unsigned int*)(0x424E45B8UL))
\r
4476 #define bFM3_ADC2_ADSS01_TS15 *((volatile unsigned int*)(0x424E45BCUL))
\r
4477 #define bFM3_ADC2_ADSS0_TS0 *((volatile unsigned int*)(0x424E4580UL))
\r
4478 #define bFM3_ADC2_ADSS0_TS1 *((volatile unsigned int*)(0x424E4584UL))
\r
4479 #define bFM3_ADC2_ADSS0_TS2 *((volatile unsigned int*)(0x424E4588UL))
\r
4480 #define bFM3_ADC2_ADSS0_TS3 *((volatile unsigned int*)(0x424E458CUL))
\r
4481 #define bFM3_ADC2_ADSS0_TS4 *((volatile unsigned int*)(0x424E4590UL))
\r
4482 #define bFM3_ADC2_ADSS0_TS5 *((volatile unsigned int*)(0x424E4594UL))
\r
4483 #define bFM3_ADC2_ADSS0_TS6 *((volatile unsigned int*)(0x424E4598UL))
\r
4484 #define bFM3_ADC2_ADSS0_TS7 *((volatile unsigned int*)(0x424E459CUL))
\r
4485 #define bFM3_ADC2_ADSS1_TS8 *((volatile unsigned int*)(0x424E45A0UL))
\r
4486 #define bFM3_ADC2_ADSS1_TS9 *((volatile unsigned int*)(0x424E45A4UL))
\r
4487 #define bFM3_ADC2_ADSS1_TS10 *((volatile unsigned int*)(0x424E45A8UL))
\r
4488 #define bFM3_ADC2_ADSS1_TS11 *((volatile unsigned int*)(0x424E45ACUL))
\r
4489 #define bFM3_ADC2_ADSS1_TS12 *((volatile unsigned int*)(0x424E45B0UL))
\r
4490 #define bFM3_ADC2_ADSS1_TS13 *((volatile unsigned int*)(0x424E45B4UL))
\r
4491 #define bFM3_ADC2_ADSS1_TS14 *((volatile unsigned int*)(0x424E45B8UL))
\r
4492 #define bFM3_ADC2_ADSS1_TS15 *((volatile unsigned int*)(0x424E45BCUL))
\r
4493 #define bFM3_ADC2_ADST01_ST10 *((volatile unsigned int*)(0x424E4600UL))
\r
4494 #define bFM3_ADC2_ADST01_ST11 *((volatile unsigned int*)(0x424E4604UL))
\r
4495 #define bFM3_ADC2_ADST01_ST12 *((volatile unsigned int*)(0x424E4608UL))
\r
4496 #define bFM3_ADC2_ADST01_ST13 *((volatile unsigned int*)(0x424E460CUL))
\r
4497 #define bFM3_ADC2_ADST01_ST14 *((volatile unsigned int*)(0x424E4610UL))
\r
4498 #define bFM3_ADC2_ADST01_STX10 *((volatile unsigned int*)(0x424E4614UL))
\r
4499 #define bFM3_ADC2_ADST01_STX11 *((volatile unsigned int*)(0x424E4618UL))
\r
4500 #define bFM3_ADC2_ADST01_STX12 *((volatile unsigned int*)(0x424E461CUL))
\r
4501 #define bFM3_ADC2_ADST01_ST00 *((volatile unsigned int*)(0x424E4620UL))
\r
4502 #define bFM3_ADC2_ADST01_ST01 *((volatile unsigned int*)(0x424E4624UL))
\r
4503 #define bFM3_ADC2_ADST01_ST02 *((volatile unsigned int*)(0x424E4628UL))
\r
4504 #define bFM3_ADC2_ADST01_ST03 *((volatile unsigned int*)(0x424E462CUL))
\r
4505 #define bFM3_ADC2_ADST01_ST04 *((volatile unsigned int*)(0x424E4630UL))
\r
4506 #define bFM3_ADC2_ADST01_STX00 *((volatile unsigned int*)(0x424E4634UL))
\r
4507 #define bFM3_ADC2_ADST01_STX01 *((volatile unsigned int*)(0x424E4638UL))
\r
4508 #define bFM3_ADC2_ADST01_STX02 *((volatile unsigned int*)(0x424E463CUL))
\r
4509 #define bFM3_ADC2_ADST1_ST10 *((volatile unsigned int*)(0x424E4600UL))
\r
4510 #define bFM3_ADC2_ADST1_ST11 *((volatile unsigned int*)(0x424E4604UL))
\r
4511 #define bFM3_ADC2_ADST1_ST12 *((volatile unsigned int*)(0x424E4608UL))
\r
4512 #define bFM3_ADC2_ADST1_ST13 *((volatile unsigned int*)(0x424E460CUL))
\r
4513 #define bFM3_ADC2_ADST1_ST14 *((volatile unsigned int*)(0x424E4610UL))
\r
4514 #define bFM3_ADC2_ADST1_STX10 *((volatile unsigned int*)(0x424E4614UL))
\r
4515 #define bFM3_ADC2_ADST1_STX11 *((volatile unsigned int*)(0x424E4618UL))
\r
4516 #define bFM3_ADC2_ADST1_STX12 *((volatile unsigned int*)(0x424E461CUL))
\r
4517 #define bFM3_ADC2_ADST0_ST00 *((volatile unsigned int*)(0x424E4620UL))
\r
4518 #define bFM3_ADC2_ADST0_ST01 *((volatile unsigned int*)(0x424E4624UL))
\r
4519 #define bFM3_ADC2_ADST0_ST02 *((volatile unsigned int*)(0x424E4628UL))
\r
4520 #define bFM3_ADC2_ADST0_ST03 *((volatile unsigned int*)(0x424E462CUL))
\r
4521 #define bFM3_ADC2_ADST0_ST04 *((volatile unsigned int*)(0x424E4630UL))
\r
4522 #define bFM3_ADC2_ADST0_STX00 *((volatile unsigned int*)(0x424E4634UL))
\r
4523 #define bFM3_ADC2_ADST0_STX01 *((volatile unsigned int*)(0x424E4638UL))
\r
4524 #define bFM3_ADC2_ADST0_STX02 *((volatile unsigned int*)(0x424E463CUL))
\r
4525 #define bFM3_ADC2_ADCT_CT0 *((volatile unsigned int*)(0x424E4680UL))
\r
4526 #define bFM3_ADC2_ADCT_CT1 *((volatile unsigned int*)(0x424E4684UL))
\r
4527 #define bFM3_ADC2_ADCT_CT2 *((volatile unsigned int*)(0x424E4688UL))
\r
4528 #define bFM3_ADC2_PRTSL_PRTSL0 *((volatile unsigned int*)(0x424E4700UL))
\r
4529 #define bFM3_ADC2_PRTSL_PRTSL1 *((volatile unsigned int*)(0x424E4704UL))
\r
4530 #define bFM3_ADC2_PRTSL_PRTSL2 *((volatile unsigned int*)(0x424E4708UL))
\r
4531 #define bFM3_ADC2_PRTSL_PRTSL3 *((volatile unsigned int*)(0x424E470CUL))
\r
4532 #define bFM3_ADC2_SCTSL_SCTSL0 *((volatile unsigned int*)(0x424E4720UL))
\r
4533 #define bFM3_ADC2_SCTSL_SCTSL1 *((volatile unsigned int*)(0x424E4724UL))
\r
4534 #define bFM3_ADC2_SCTSL_SCTSL2 *((volatile unsigned int*)(0x424E4728UL))
\r
4535 #define bFM3_ADC2_SCTSL_SCTSL3 *((volatile unsigned int*)(0x424E472CUL))
\r
4536 #define bFM3_ADC2_ADCEN_ENBL *((volatile unsigned int*)(0x424E4780UL))
\r
4537 #define bFM3_ADC2_ADCEN_READY *((volatile unsigned int*)(0x424E4784UL))
\r
4539 /* CR trimming registers */
\r
4540 #define bFM3_CRTRIM_MCR_PSR_CSR0 *((volatile unsigned int*)(0x425C0000UL))
\r
4541 #define bFM3_CRTRIM_MCR_PSR_CSR1 *((volatile unsigned int*)(0x425C0004UL))
\r
4542 #define bFM3_CRTRIM_MCR_FTRM_TRD0 *((volatile unsigned int*)(0x425C0080UL))
\r
4543 #define bFM3_CRTRIM_MCR_FTRM_TRD1 *((volatile unsigned int*)(0x425C0084UL))
\r
4544 #define bFM3_CRTRIM_MCR_FTRM_TRD2 *((volatile unsigned int*)(0x425C0088UL))
\r
4545 #define bFM3_CRTRIM_MCR_FTRM_TRD3 *((volatile unsigned int*)(0x425C008CUL))
\r
4546 #define bFM3_CRTRIM_MCR_FTRM_TRD4 *((volatile unsigned int*)(0x425C0090UL))
\r
4547 #define bFM3_CRTRIM_MCR_FTRM_TRD5 *((volatile unsigned int*)(0x425C0094UL))
\r
4548 #define bFM3_CRTRIM_MCR_FTRM_TRD6 *((volatile unsigned int*)(0x425C0098UL))
\r
4549 #define bFM3_CRTRIM_MCR_FTRM_TRD7 *((volatile unsigned int*)(0x425C009CUL))
\r
4550 #define bFM3_CRTRIM_MCR_FTRM_TRD8 *((volatile unsigned int*)(0x425C00A0UL))
\r
4551 #define bFM3_CRTRIM_MCR_FTRM_TRD9 *((volatile unsigned int*)(0x425C00A4UL))
\r
4553 /* External interrupt registers */
\r
4554 #define bFM3_EXTI_ENIR_EN0 *((volatile unsigned int*)(0x42600000UL))
\r
4555 #define bFM3_EXTI_ENIR_EN1 *((volatile unsigned int*)(0x42600004UL))
\r
4556 #define bFM3_EXTI_ENIR_EN2 *((volatile unsigned int*)(0x42600008UL))
\r
4557 #define bFM3_EXTI_ENIR_EN3 *((volatile unsigned int*)(0x4260000CUL))
\r
4558 #define bFM3_EXTI_ENIR_EN4 *((volatile unsigned int*)(0x42600010UL))
\r
4559 #define bFM3_EXTI_ENIR_EN5 *((volatile unsigned int*)(0x42600014UL))
\r
4560 #define bFM3_EXTI_ENIR_EN6 *((volatile unsigned int*)(0x42600018UL))
\r
4561 #define bFM3_EXTI_ENIR_EN7 *((volatile unsigned int*)(0x4260001CUL))
\r
4562 #define bFM3_EXTI_ENIR_EN8 *((volatile unsigned int*)(0x42600020UL))
\r
4563 #define bFM3_EXTI_ENIR_EN9 *((volatile unsigned int*)(0x42600024UL))
\r
4564 #define bFM3_EXTI_ENIR_EN10 *((volatile unsigned int*)(0x42600028UL))
\r
4565 #define bFM3_EXTI_ENIR_EN11 *((volatile unsigned int*)(0x4260002CUL))
\r
4566 #define bFM3_EXTI_ENIR_EN12 *((volatile unsigned int*)(0x42600030UL))
\r
4567 #define bFM3_EXTI_ENIR_EN13 *((volatile unsigned int*)(0x42600034UL))
\r
4568 #define bFM3_EXTI_ENIR_EN14 *((volatile unsigned int*)(0x42600038UL))
\r
4569 #define bFM3_EXTI_ENIR_EN15 *((volatile unsigned int*)(0x4260003CUL))
\r
4570 #define bFM3_EXTI_EIRR_ER0 *((volatile unsigned int*)(0x42600080UL))
\r
4571 #define bFM3_EXTI_EIRR_ER1 *((volatile unsigned int*)(0x42600084UL))
\r
4572 #define bFM3_EXTI_EIRR_ER2 *((volatile unsigned int*)(0x42600088UL))
\r
4573 #define bFM3_EXTI_EIRR_ER3 *((volatile unsigned int*)(0x4260008CUL))
\r
4574 #define bFM3_EXTI_EIRR_ER4 *((volatile unsigned int*)(0x42600090UL))
\r
4575 #define bFM3_EXTI_EIRR_ER5 *((volatile unsigned int*)(0x42600094UL))
\r
4576 #define bFM3_EXTI_EIRR_ER6 *((volatile unsigned int*)(0x42600098UL))
\r
4577 #define bFM3_EXTI_EIRR_ER7 *((volatile unsigned int*)(0x4260009CUL))
\r
4578 #define bFM3_EXTI_EIRR_ER8 *((volatile unsigned int*)(0x426000A0UL))
\r
4579 #define bFM3_EXTI_EIRR_ER9 *((volatile unsigned int*)(0x426000A4UL))
\r
4580 #define bFM3_EXTI_EIRR_ER10 *((volatile unsigned int*)(0x426000A8UL))
\r
4581 #define bFM3_EXTI_EIRR_ER11 *((volatile unsigned int*)(0x426000ACUL))
\r
4582 #define bFM3_EXTI_EIRR_ER12 *((volatile unsigned int*)(0x426000B0UL))
\r
4583 #define bFM3_EXTI_EIRR_ER13 *((volatile unsigned int*)(0x426000B4UL))
\r
4584 #define bFM3_EXTI_EIRR_ER14 *((volatile unsigned int*)(0x426000B8UL))
\r
4585 #define bFM3_EXTI_EIRR_ER15 *((volatile unsigned int*)(0x426000BCUL))
\r
4586 #define bFM3_EXTI_EICL_ECL0 *((volatile unsigned int*)(0x42600100UL))
\r
4587 #define bFM3_EXTI_EICL_ECL1 *((volatile unsigned int*)(0x42600104UL))
\r
4588 #define bFM3_EXTI_EICL_ECL2 *((volatile unsigned int*)(0x42600108UL))
\r
4589 #define bFM3_EXTI_EICL_ECL3 *((volatile unsigned int*)(0x4260010CUL))
\r
4590 #define bFM3_EXTI_EICL_ECL4 *((volatile unsigned int*)(0x42600110UL))
\r
4591 #define bFM3_EXTI_EICL_ECL5 *((volatile unsigned int*)(0x42600114UL))
\r
4592 #define bFM3_EXTI_EICL_ECL6 *((volatile unsigned int*)(0x42600118UL))
\r
4593 #define bFM3_EXTI_EICL_ECL7 *((volatile unsigned int*)(0x4260011CUL))
\r
4594 #define bFM3_EXTI_EICL_ECL8 *((volatile unsigned int*)(0x42600120UL))
\r
4595 #define bFM3_EXTI_EICL_ECL9 *((volatile unsigned int*)(0x42600124UL))
\r
4596 #define bFM3_EXTI_EICL_ECL10 *((volatile unsigned int*)(0x42600128UL))
\r
4597 #define bFM3_EXTI_EICL_ECL11 *((volatile unsigned int*)(0x4260012CUL))
\r
4598 #define bFM3_EXTI_EICL_ECL12 *((volatile unsigned int*)(0x42600130UL))
\r
4599 #define bFM3_EXTI_EICL_ECL13 *((volatile unsigned int*)(0x42600134UL))
\r
4600 #define bFM3_EXTI_EICL_ECL14 *((volatile unsigned int*)(0x42600138UL))
\r
4601 #define bFM3_EXTI_EICL_ECL15 *((volatile unsigned int*)(0x4260013CUL))
\r
4602 #define bFM3_EXTI_ELVR_LA0 *((volatile unsigned int*)(0x42600180UL))
\r
4603 #define bFM3_EXTI_ELVR_LB0 *((volatile unsigned int*)(0x42600184UL))
\r
4604 #define bFM3_EXTI_ELVR_LA1 *((volatile unsigned int*)(0x42600188UL))
\r
4605 #define bFM3_EXTI_ELVR_LB1 *((volatile unsigned int*)(0x4260018CUL))
\r
4606 #define bFM3_EXTI_ELVR_LA2 *((volatile unsigned int*)(0x42600190UL))
\r
4607 #define bFM3_EXTI_ELVR_LB2 *((volatile unsigned int*)(0x42600194UL))
\r
4608 #define bFM3_EXTI_ELVR_LA3 *((volatile unsigned int*)(0x42600198UL))
\r
4609 #define bFM3_EXTI_ELVR_LB3 *((volatile unsigned int*)(0x4260019CUL))
\r
4610 #define bFM3_EXTI_ELVR_LA4 *((volatile unsigned int*)(0x426001A0UL))
\r
4611 #define bFM3_EXTI_ELVR_LB4 *((volatile unsigned int*)(0x426001A4UL))
\r
4612 #define bFM3_EXTI_ELVR_LA5 *((volatile unsigned int*)(0x426001A8UL))
\r
4613 #define bFM3_EXTI_ELVR_LB5 *((volatile unsigned int*)(0x426001ACUL))
\r
4614 #define bFM3_EXTI_ELVR_LA6 *((volatile unsigned int*)(0x426001B0UL))
\r
4615 #define bFM3_EXTI_ELVR_LB6 *((volatile unsigned int*)(0x426001B4UL))
\r
4616 #define bFM3_EXTI_ELVR_LA7 *((volatile unsigned int*)(0x426001B8UL))
\r
4617 #define bFM3_EXTI_ELVR_LB7 *((volatile unsigned int*)(0x426001BCUL))
\r
4618 #define bFM3_EXTI_ELVR_LA8 *((volatile unsigned int*)(0x426001C0UL))
\r
4619 #define bFM3_EXTI_ELVR_LB8 *((volatile unsigned int*)(0x426001C4UL))
\r
4620 #define bFM3_EXTI_ELVR_LA9 *((volatile unsigned int*)(0x426001C8UL))
\r
4621 #define bFM3_EXTI_ELVR_LB9 *((volatile unsigned int*)(0x426001CCUL))
\r
4622 #define bFM3_EXTI_ELVR_LA10 *((volatile unsigned int*)(0x426001D0UL))
\r
4623 #define bFM3_EXTI_ELVR_LB10 *((volatile unsigned int*)(0x426001D4UL))
\r
4624 #define bFM3_EXTI_ELVR_LA11 *((volatile unsigned int*)(0x426001D8UL))
\r
4625 #define bFM3_EXTI_ELVR_LB11 *((volatile unsigned int*)(0x426001DCUL))
\r
4626 #define bFM3_EXTI_ELVR_LA12 *((volatile unsigned int*)(0x426001E0UL))
\r
4627 #define bFM3_EXTI_ELVR_LB12 *((volatile unsigned int*)(0x426001E4UL))
\r
4628 #define bFM3_EXTI_ELVR_LA13 *((volatile unsigned int*)(0x426001E8UL))
\r
4629 #define bFM3_EXTI_ELVR_LB13 *((volatile unsigned int*)(0x426001ECUL))
\r
4630 #define bFM3_EXTI_ELVR_LA14 *((volatile unsigned int*)(0x426001F0UL))
\r
4631 #define bFM3_EXTI_ELVR_LB14 *((volatile unsigned int*)(0x426001F4UL))
\r
4632 #define bFM3_EXTI_ELVR_LA15 *((volatile unsigned int*)(0x426001F8UL))
\r
4633 #define bFM3_EXTI_ELVR_LB15 *((volatile unsigned int*)(0x426001FCUL))
\r
4634 #define bFM3_EXTI_NMIRR_NR0 *((volatile unsigned int*)(0x42600280UL))
\r
4635 #define bFM3_EXTI_NMICL_NCL0 *((volatile unsigned int*)(0x42600300UL))
\r
4637 /* Interrupt request read registers */
\r
4638 #define bFM3_INTREQ_DRQSEL_DRQSEL0 *((volatile unsigned int*)(0x42620000UL))
\r
4639 #define bFM3_INTREQ_DRQSEL_DRQSEL1 *((volatile unsigned int*)(0x42620004UL))
\r
4640 #define bFM3_INTREQ_DRQSEL_DRQSEL2 *((volatile unsigned int*)(0x42620008UL))
\r
4641 #define bFM3_INTREQ_DRQSEL_DRQSEL3 *((volatile unsigned int*)(0x4262000CUL))
\r
4642 #define bFM3_INTREQ_DRQSEL_DRQSEL4 *((volatile unsigned int*)(0x42620010UL))
\r
4643 #define bFM3_INTREQ_DRQSEL_DRQSEL5 *((volatile unsigned int*)(0x42620014UL))
\r
4644 #define bFM3_INTREQ_DRQSEL_DRQSEL6 *((volatile unsigned int*)(0x42620018UL))
\r
4645 #define bFM3_INTREQ_DRQSEL_DRQSEL7 *((volatile unsigned int*)(0x4262001CUL))
\r
4646 #define bFM3_INTREQ_DRQSEL_DRQSEL8 *((volatile unsigned int*)(0x42620020UL))
\r
4647 #define bFM3_INTREQ_DRQSEL_DRQSEL9 *((volatile unsigned int*)(0x42620024UL))
\r
4648 #define bFM3_INTREQ_DRQSEL_DRQSEL10 *((volatile unsigned int*)(0x42620028UL))
\r
4649 #define bFM3_INTREQ_DRQSEL_DRQSEL11 *((volatile unsigned int*)(0x4262002CUL))
\r
4650 #define bFM3_INTREQ_DRQSEL_DRQSEL12 *((volatile unsigned int*)(0x42620030UL))
\r
4651 #define bFM3_INTREQ_DRQSEL_DRQSEL13 *((volatile unsigned int*)(0x42620034UL))
\r
4652 #define bFM3_INTREQ_DRQSEL_DRQSEL14 *((volatile unsigned int*)(0x42620038UL))
\r
4653 #define bFM3_INTREQ_DRQSEL_DRQSEL15 *((volatile unsigned int*)(0x4262003CUL))
\r
4654 #define bFM3_INTREQ_DRQSEL_DRQSEL16 *((volatile unsigned int*)(0x42620040UL))
\r
4655 #define bFM3_INTREQ_DRQSEL_DRQSEL17 *((volatile unsigned int*)(0x42620044UL))
\r
4656 #define bFM3_INTREQ_DRQSEL_DRQSEL18 *((volatile unsigned int*)(0x42620048UL))
\r
4657 #define bFM3_INTREQ_DRQSEL_DRQSEL19 *((volatile unsigned int*)(0x4262004CUL))
\r
4658 #define bFM3_INTREQ_DRQSEL_DRQSEL20 *((volatile unsigned int*)(0x42620050UL))
\r
4659 #define bFM3_INTREQ_DRQSEL_DRQSEL21 *((volatile unsigned int*)(0x42620054UL))
\r
4660 #define bFM3_INTREQ_DRQSEL_DRQSEL22 *((volatile unsigned int*)(0x42620058UL))
\r
4661 #define bFM3_INTREQ_DRQSEL_DRQSEL23 *((volatile unsigned int*)(0x4262005CUL))
\r
4662 #define bFM3_INTREQ_DRQSEL_DRQSEL24 *((volatile unsigned int*)(0x42620060UL))
\r
4663 #define bFM3_INTREQ_DRQSEL_DRQSEL25 *((volatile unsigned int*)(0x42620064UL))
\r
4664 #define bFM3_INTREQ_DRQSEL_DRQSEL26 *((volatile unsigned int*)(0x42620068UL))
\r
4665 #define bFM3_INTREQ_DRQSEL_DRQSEL27 *((volatile unsigned int*)(0x4262006CUL))
\r
4666 #define bFM3_INTREQ_DRQSEL_DRQSEL28 *((volatile unsigned int*)(0x42620070UL))
\r
4667 #define bFM3_INTREQ_DRQSEL_DRQSEL29 *((volatile unsigned int*)(0x42620074UL))
\r
4668 #define bFM3_INTREQ_DRQSEL_DRQSEL30 *((volatile unsigned int*)(0x42620078UL))
\r
4669 #define bFM3_INTREQ_DRQSEL_DRQSEL31 *((volatile unsigned int*)(0x4262007CUL))
\r
4670 #define bFM3_INTREQ_EXC02MON_NMI *((volatile unsigned int*)(0x42620200UL))
\r
4671 #define bFM3_INTREQ_EXC02MON_HWINT *((volatile unsigned int*)(0x42620204UL))
\r
4672 #define bFM3_INTREQ_IRQ00MON_FCSINT *((volatile unsigned int*)(0x42620280UL))
\r
4673 #define bFM3_INTREQ_IRQ01MON_SWWDTINT *((volatile unsigned int*)(0x42620300UL))
\r
4674 #define bFM3_INTREQ_IRQ02MON_LVDINT *((volatile unsigned int*)(0x42620380UL))
\r
4675 #define bFM3_INTREQ_IRQ03MON_WAVE0INT0 *((volatile unsigned int*)(0x42620400UL))
\r
4676 #define bFM3_INTREQ_IRQ03MON_WAVE0INT1 *((volatile unsigned int*)(0x42620404UL))
\r
4677 #define bFM3_INTREQ_IRQ03MON_WAVE0INT2 *((volatile unsigned int*)(0x42620408UL))
\r
4678 #define bFM3_INTREQ_IRQ03MON_WAVE0INT3 *((volatile unsigned int*)(0x4262040CUL))
\r
4679 #define bFM3_INTREQ_IRQ03MON_WAVE1INT0 *((volatile unsigned int*)(0x42620410UL))
\r
4680 #define bFM3_INTREQ_IRQ03MON_WAVE1INT1 *((volatile unsigned int*)(0x42620414UL))
\r
4681 #define bFM3_INTREQ_IRQ03MON_WAVE1INT2 *((volatile unsigned int*)(0x42620418UL))
\r
4682 #define bFM3_INTREQ_IRQ03MON_WAVE1INT3 *((volatile unsigned int*)(0x4262041CUL))
\r
4683 #define bFM3_INTREQ_IRQ04MON_EXTINT0 *((volatile unsigned int*)(0x42620480UL))
\r
4684 #define bFM3_INTREQ_IRQ04MON_EXTINT1 *((volatile unsigned int*)(0x42620484UL))
\r
4685 #define bFM3_INTREQ_IRQ04MON_EXTINT2 *((volatile unsigned int*)(0x42620488UL))
\r
4686 #define bFM3_INTREQ_IRQ04MON_EXTINT3 *((volatile unsigned int*)(0x4262048CUL))
\r
4687 #define bFM3_INTREQ_IRQ04MON_EXTINT4 *((volatile unsigned int*)(0x42620490UL))
\r
4688 #define bFM3_INTREQ_IRQ04MON_EXTINT5 *((volatile unsigned int*)(0x42620494UL))
\r
4689 #define bFM3_INTREQ_IRQ04MON_EXTINT6 *((volatile unsigned int*)(0x42620498UL))
\r
4690 #define bFM3_INTREQ_IRQ04MON_EXTINT7 *((volatile unsigned int*)(0x4262049CUL))
\r
4691 #define bFM3_INTREQ_IRQ05MON_EXTINT0 *((volatile unsigned int*)(0x42620500UL))
\r
4692 #define bFM3_INTREQ_IRQ05MON_EXTINT1 *((volatile unsigned int*)(0x42620504UL))
\r
4693 #define bFM3_INTREQ_IRQ05MON_EXTINT2 *((volatile unsigned int*)(0x42620508UL))
\r
4694 #define bFM3_INTREQ_IRQ05MON_EXTINT3 *((volatile unsigned int*)(0x4262050CUL))
\r
4695 #define bFM3_INTREQ_IRQ05MON_EXTINT4 *((volatile unsigned int*)(0x42620510UL))
\r
4696 #define bFM3_INTREQ_IRQ05MON_EXTINT5 *((volatile unsigned int*)(0x42620514UL))
\r
4697 #define bFM3_INTREQ_IRQ05MON_EXTINT6 *((volatile unsigned int*)(0x42620518UL))
\r
4698 #define bFM3_INTREQ_IRQ05MON_EXTINT7 *((volatile unsigned int*)(0x4262051CUL))
\r
4699 #define bFM3_INTREQ_IRQ06MON_TIMINT0 *((volatile unsigned int*)(0x42620580UL))
\r
4700 #define bFM3_INTREQ_IRQ06MON_TIMINT1 *((volatile unsigned int*)(0x42620584UL))
\r
4701 #define bFM3_INTREQ_IRQ06MON_QUD0INT0 *((volatile unsigned int*)(0x42620588UL))
\r
4702 #define bFM3_INTREQ_IRQ06MON_QUD0INT1 *((volatile unsigned int*)(0x4262058CUL))
\r
4703 #define bFM3_INTREQ_IRQ06MON_QUD0INT2 *((volatile unsigned int*)(0x42620590UL))
\r
4704 #define bFM3_INTREQ_IRQ06MON_QUD0INT3 *((volatile unsigned int*)(0x42620594UL))
\r
4705 #define bFM3_INTREQ_IRQ06MON_QUD0INT4 *((volatile unsigned int*)(0x42620598UL))
\r
4706 #define bFM3_INTREQ_IRQ06MON_QUD0INT5 *((volatile unsigned int*)(0x4262059CUL))
\r
4707 #define bFM3_INTREQ_IRQ06MON_QUD1INT0 *((volatile unsigned int*)(0x426205A0UL))
\r
4708 #define bFM3_INTREQ_IRQ06MON_QUD1INT1 *((volatile unsigned int*)(0x426205A4UL))
\r
4709 #define bFM3_INTREQ_IRQ06MON_QUD1INT2 *((volatile unsigned int*)(0x426205A8UL))
\r
4710 #define bFM3_INTREQ_IRQ06MON_QUD1INT3 *((volatile unsigned int*)(0x426205ACUL))
\r
4711 #define bFM3_INTREQ_IRQ06MON_QUD1INT4 *((volatile unsigned int*)(0x426205B0UL))
\r
4712 #define bFM3_INTREQ_IRQ06MON_QUD1INT5 *((volatile unsigned int*)(0x426205B4UL))
\r
4713 #define bFM3_INTREQ_IRQ07MON_FMSINT *((volatile unsigned int*)(0x42620600UL))
\r
4714 #define bFM3_INTREQ_IRQ08MON_MFSINT0 *((volatile unsigned int*)(0x42620680UL))
\r
4715 #define bFM3_INTREQ_IRQ08MON_MFSINT1 *((volatile unsigned int*)(0x42620684UL))
\r
4716 #define bFM3_INTREQ_IRQ09MON_FMSINT *((volatile unsigned int*)(0x42620700UL))
\r
4717 #define bFM3_INTREQ_IRQ10MON_MFSINT0 *((volatile unsigned int*)(0x42620780UL))
\r
4718 #define bFM3_INTREQ_IRQ10MON_MFSINT1 *((volatile unsigned int*)(0x42620784UL))
\r
4719 #define bFM3_INTREQ_IRQ11MON_FMSINT *((volatile unsigned int*)(0x42620800UL))
\r
4720 #define bFM3_INTREQ_IRQ12MON_MFSINT0 *((volatile unsigned int*)(0x42620880UL))
\r
4721 #define bFM3_INTREQ_IRQ12MON_MFSINT1 *((volatile unsigned int*)(0x42620884UL))
\r
4722 #define bFM3_INTREQ_IRQ13MON_FMSINT *((volatile unsigned int*)(0x42620900UL))
\r
4723 #define bFM3_INTREQ_IRQ14MON_MFSINT0 *((volatile unsigned int*)(0x42620980UL))
\r
4724 #define bFM3_INTREQ_IRQ14MON_MFSINT1 *((volatile unsigned int*)(0x42620984UL))
\r
4725 #define bFM3_INTREQ_IRQ15MON_FMSINT *((volatile unsigned int*)(0x42620A00UL))
\r
4726 #define bFM3_INTREQ_IRQ16MON_MFSINT0 *((volatile unsigned int*)(0x42620A80UL))
\r
4727 #define bFM3_INTREQ_IRQ16MON_MFSINT1 *((volatile unsigned int*)(0x42620A84UL))
\r
4728 #define bFM3_INTREQ_IRQ17MON_FMSINT *((volatile unsigned int*)(0x42620B00UL))
\r
4729 #define bFM3_INTREQ_IRQ18MON_MFSINT0 *((volatile unsigned int*)(0x42620B80UL))
\r
4730 #define bFM3_INTREQ_IRQ18MON_MFSINT1 *((volatile unsigned int*)(0x42620B84UL))
\r
4731 #define bFM3_INTREQ_IRQ19MON_FMSINT *((volatile unsigned int*)(0x42620C00UL))
\r
4732 #define bFM3_INTREQ_IRQ20MON_MFSINT0 *((volatile unsigned int*)(0x42620C80UL))
\r
4733 #define bFM3_INTREQ_IRQ20MON_MFSINT1 *((volatile unsigned int*)(0x42620C84UL))
\r
4734 #define bFM3_INTREQ_IRQ21MON_FMSINT *((volatile unsigned int*)(0x42620D00UL))
\r
4735 #define bFM3_INTREQ_IRQ22MON_MFSINT0 *((volatile unsigned int*)(0x42620D80UL))
\r
4736 #define bFM3_INTREQ_IRQ22MON_MFSINT1 *((volatile unsigned int*)(0x42620D84UL))
\r
4737 #define bFM3_INTREQ_IRQ23MON_PPGINT0 *((volatile unsigned int*)(0x42620E00UL))
\r
4738 #define bFM3_INTREQ_IRQ23MON_PPGINT1 *((volatile unsigned int*)(0x42620E04UL))
\r
4739 #define bFM3_INTREQ_IRQ23MON_PPGINT2 *((volatile unsigned int*)(0x42620E08UL))
\r
4740 #define bFM3_INTREQ_IRQ23MON_PPGINT3 *((volatile unsigned int*)(0x42620E0CUL))
\r
4741 #define bFM3_INTREQ_IRQ23MON_PPGINT4 *((volatile unsigned int*)(0x42620E10UL))
\r
4742 #define bFM3_INTREQ_IRQ23MON_PPGINT5 *((volatile unsigned int*)(0x42620E14UL))
\r
4743 #define bFM3_INTREQ_IRQ24MON_MOSCINT *((volatile unsigned int*)(0x42620E80UL))
\r
4744 #define bFM3_INTREQ_IRQ24MON_SOSCINT *((volatile unsigned int*)(0x42620E84UL))
\r
4745 #define bFM3_INTREQ_IRQ24MON_MPLLINT *((volatile unsigned int*)(0x42620E88UL))
\r
4746 #define bFM3_INTREQ_IRQ24MON_UPLLINT *((volatile unsigned int*)(0x42620E8CUL))
\r
4747 #define bFM3_INTREQ_IRQ24MON_WCINT *((volatile unsigned int*)(0x42620E90UL))
\r
4748 #define bFM3_INTREQ_IRQ25MON_ADCINT0 *((volatile unsigned int*)(0x42620F00UL))
\r
4749 #define bFM3_INTREQ_IRQ25MON_ADCINT1 *((volatile unsigned int*)(0x42620F04UL))
\r
4750 #define bFM3_INTREQ_IRQ25MON_ADCINT2 *((volatile unsigned int*)(0x42620F08UL))
\r
4751 #define bFM3_INTREQ_IRQ25MON_ADCINT3 *((volatile unsigned int*)(0x42620F0CUL))
\r
4752 #define bFM3_INTREQ_IRQ26MON_ADCINT0 *((volatile unsigned int*)(0x42620F80UL))
\r
4753 #define bFM3_INTREQ_IRQ26MON_ADCINT1 *((volatile unsigned int*)(0x42620F84UL))
\r
4754 #define bFM3_INTREQ_IRQ26MON_ADCINT2 *((volatile unsigned int*)(0x42620F88UL))
\r
4755 #define bFM3_INTREQ_IRQ26MON_ADCINT3 *((volatile unsigned int*)(0x42620F8CUL))
\r
4756 #define bFM3_INTREQ_IRQ27MON_ADCINT0 *((volatile unsigned int*)(0x42621000UL))
\r
4757 #define bFM3_INTREQ_IRQ27MON_ADCINT1 *((volatile unsigned int*)(0x42621004UL))
\r
4758 #define bFM3_INTREQ_IRQ27MON_ADCINT2 *((volatile unsigned int*)(0x42621008UL))
\r
4759 #define bFM3_INTREQ_IRQ27MON_ADCINT3 *((volatile unsigned int*)(0x4262100CUL))
\r
4760 #define bFM3_INTREQ_IRQ28MON_FRT0INT0 *((volatile unsigned int*)(0x42621080UL))
\r
4761 #define bFM3_INTREQ_IRQ28MON_FRT0INT1 *((volatile unsigned int*)(0x42621084UL))
\r
4762 #define bFM3_INTREQ_IRQ28MON_FRT0INT2 *((volatile unsigned int*)(0x42621088UL))
\r
4763 #define bFM3_INTREQ_IRQ28MON_FRT0INT3 *((volatile unsigned int*)(0x4262108CUL))
\r
4764 #define bFM3_INTREQ_IRQ28MON_FRT0INT4 *((volatile unsigned int*)(0x42621090UL))
\r
4765 #define bFM3_INTREQ_IRQ28MON_FRT0INT5 *((volatile unsigned int*)(0x42621094UL))
\r
4766 #define bFM3_INTREQ_IRQ28MON_FRT1INT0 *((volatile unsigned int*)(0x42621098UL))
\r
4767 #define bFM3_INTREQ_IRQ28MON_FRT1INT1 *((volatile unsigned int*)(0x4262109CUL))
\r
4768 #define bFM3_INTREQ_IRQ28MON_FRT1INT2 *((volatile unsigned int*)(0x426210A0UL))
\r
4769 #define bFM3_INTREQ_IRQ28MON_FRT1INT3 *((volatile unsigned int*)(0x426210A4UL))
\r
4770 #define bFM3_INTREQ_IRQ28MON_FRT1INT4 *((volatile unsigned int*)(0x426210A8UL))
\r
4771 #define bFM3_INTREQ_IRQ28MON_FRT1INT5 *((volatile unsigned int*)(0x426210ACUL))
\r
4772 #define bFM3_INTREQ_IRQ29MON_ICU0INT0 *((volatile unsigned int*)(0x42621100UL))
\r
4773 #define bFM3_INTREQ_IRQ29MON_ICU0INT1 *((volatile unsigned int*)(0x42621104UL))
\r
4774 #define bFM3_INTREQ_IRQ29MON_ICU0INT2 *((volatile unsigned int*)(0x42621108UL))
\r
4775 #define bFM3_INTREQ_IRQ29MON_ICU0INT3 *((volatile unsigned int*)(0x4262110CUL))
\r
4776 #define bFM3_INTREQ_IRQ29MON_ICU1INT0 *((volatile unsigned int*)(0x42621110UL))
\r
4777 #define bFM3_INTREQ_IRQ29MON_ICU1INT1 *((volatile unsigned int*)(0x42621114UL))
\r
4778 #define bFM3_INTREQ_IRQ29MON_ICU1INT2 *((volatile unsigned int*)(0x42621118UL))
\r
4779 #define bFM3_INTREQ_IRQ29MON_ICU1INT3 *((volatile unsigned int*)(0x4262111CUL))
\r
4780 #define bFM3_INTREQ_IRQ30MON_OCU0INT0 *((volatile unsigned int*)(0x42621180UL))
\r
4781 #define bFM3_INTREQ_IRQ30MON_OCU0INT1 *((volatile unsigned int*)(0x42621184UL))
\r
4782 #define bFM3_INTREQ_IRQ30MON_OCU0INT2 *((volatile unsigned int*)(0x42621188UL))
\r
4783 #define bFM3_INTREQ_IRQ30MON_OCU0INT3 *((volatile unsigned int*)(0x4262118CUL))
\r
4784 #define bFM3_INTREQ_IRQ30MON_OCU0INT4 *((volatile unsigned int*)(0x42621190UL))
\r
4785 #define bFM3_INTREQ_IRQ30MON_OCU0INT5 *((volatile unsigned int*)(0x42621194UL))
\r
4786 #define bFM3_INTREQ_IRQ30MON_OCU1INT0 *((volatile unsigned int*)(0x42621198UL))
\r
4787 #define bFM3_INTREQ_IRQ30MON_OCU1INT1 *((volatile unsigned int*)(0x4262119CUL))
\r
4788 #define bFM3_INTREQ_IRQ30MON_OCU1INT2 *((volatile unsigned int*)(0x426211A0UL))
\r
4789 #define bFM3_INTREQ_IRQ30MON_OCU1INT3 *((volatile unsigned int*)(0x426211A4UL))
\r
4790 #define bFM3_INTREQ_IRQ30MON_OCU1INT4 *((volatile unsigned int*)(0x426211A8UL))
\r
4791 #define bFM3_INTREQ_IRQ30MON_OCU1INT5 *((volatile unsigned int*)(0x426211ACUL))
\r
4792 #define bFM3_INTREQ_IRQ31MON_BTINT0 *((volatile unsigned int*)(0x42621200UL))
\r
4793 #define bFM3_INTREQ_IRQ31MON_BTINT1 *((volatile unsigned int*)(0x42621204UL))
\r
4794 #define bFM3_INTREQ_IRQ31MON_BTINT2 *((volatile unsigned int*)(0x42621208UL))
\r
4795 #define bFM3_INTREQ_IRQ31MON_BTINT3 *((volatile unsigned int*)(0x4262120CUL))
\r
4796 #define bFM3_INTREQ_IRQ31MON_BTINT4 *((volatile unsigned int*)(0x42621210UL))
\r
4797 #define bFM3_INTREQ_IRQ31MON_BTINT5 *((volatile unsigned int*)(0x42621214UL))
\r
4798 #define bFM3_INTREQ_IRQ31MON_BTINT6 *((volatile unsigned int*)(0x42621218UL))
\r
4799 #define bFM3_INTREQ_IRQ31MON_BTINT7 *((volatile unsigned int*)(0x4262121CUL))
\r
4800 #define bFM3_INTREQ_IRQ31MON_BTINT8 *((volatile unsigned int*)(0x42621220UL))
\r
4801 #define bFM3_INTREQ_IRQ31MON_BTINT9 *((volatile unsigned int*)(0x42621224UL))
\r
4802 #define bFM3_INTREQ_IRQ31MON_BTINT10 *((volatile unsigned int*)(0x42621228UL))
\r
4803 #define bFM3_INTREQ_IRQ31MON_BTINT11 *((volatile unsigned int*)(0x4262122CUL))
\r
4804 #define bFM3_INTREQ_IRQ31MON_BTINT12 *((volatile unsigned int*)(0x42621230UL))
\r
4805 #define bFM3_INTREQ_IRQ31MON_BTINT13 *((volatile unsigned int*)(0x42621234UL))
\r
4806 #define bFM3_INTREQ_IRQ31MON_BTINT14 *((volatile unsigned int*)(0x42621238UL))
\r
4807 #define bFM3_INTREQ_IRQ31MON_BTINT15 *((volatile unsigned int*)(0x4262123CUL))
\r
4808 #define bFM3_INTREQ_IRQ32MON_CANINT *((volatile unsigned int*)(0x42621280UL))
\r
4809 #define bFM3_INTREQ_IRQ33MON_CANINT *((volatile unsigned int*)(0x42621300UL))
\r
4810 #define bFM3_INTREQ_IRQ34MON_USB0INT0 *((volatile unsigned int*)(0x42621380UL))
\r
4811 #define bFM3_INTREQ_IRQ34MON_USB0INT1 *((volatile unsigned int*)(0x42621384UL))
\r
4812 #define bFM3_INTREQ_IRQ34MON_USB0INT2 *((volatile unsigned int*)(0x42621388UL))
\r
4813 #define bFM3_INTREQ_IRQ34MON_USB0INT3 *((volatile unsigned int*)(0x4262138CUL))
\r
4814 #define bFM3_INTREQ_IRQ34MON_USB0INT4 *((volatile unsigned int*)(0x42621390UL))
\r
4815 #define bFM3_INTREQ_IRQ35MON_USB0INT0 *((volatile unsigned int*)(0x42621400UL))
\r
4816 #define bFM3_INTREQ_IRQ35MON_USB0INT1 *((volatile unsigned int*)(0x42621404UL))
\r
4817 #define bFM3_INTREQ_IRQ35MON_USB0INT2 *((volatile unsigned int*)(0x42621408UL))
\r
4818 #define bFM3_INTREQ_IRQ35MON_USB0INT3 *((volatile unsigned int*)(0x4262140CUL))
\r
4819 #define bFM3_INTREQ_IRQ35MON_USB0INT4 *((volatile unsigned int*)(0x42621410UL))
\r
4820 #define bFM3_INTREQ_IRQ38MON_DMAINT *((volatile unsigned int*)(0x42621580UL))
\r
4821 #define bFM3_INTREQ_IRQ39MON_DMAINT *((volatile unsigned int*)(0x42621600UL))
\r
4822 #define bFM3_INTREQ_IRQ40MON_DMAINT *((volatile unsigned int*)(0x42621680UL))
\r
4823 #define bFM3_INTREQ_IRQ41MON_DMAINT *((volatile unsigned int*)(0x42621700UL))
\r
4824 #define bFM3_INTREQ_IRQ42MON_DMAINT *((volatile unsigned int*)(0x42621780UL))
\r
4825 #define bFM3_INTREQ_IRQ43MON_DMAINT *((volatile unsigned int*)(0x42621800UL))
\r
4826 #define bFM3_INTREQ_IRQ44MON_DMAINT *((volatile unsigned int*)(0x42621880UL))
\r
4827 #define bFM3_INTREQ_IRQ45MON_DMAINT *((volatile unsigned int*)(0x42621900UL))
\r
4829 /* General purpose I/O registers */
\r
4830 #define bFM3_GPIO_PFR0_P0 *((volatile unsigned int*)(0x42660000UL))
\r
4831 #define bFM3_GPIO_PFR0_P1 *((volatile unsigned int*)(0x42660004UL))
\r
4832 #define bFM3_GPIO_PFR0_P2 *((volatile unsigned int*)(0x42660008UL))
\r
4833 #define bFM3_GPIO_PFR0_P3 *((volatile unsigned int*)(0x4266000CUL))
\r
4834 #define bFM3_GPIO_PFR0_P4 *((volatile unsigned int*)(0x42660010UL))
\r
4835 #define bFM3_GPIO_PFR0_P5 *((volatile unsigned int*)(0x42660014UL))
\r
4836 #define bFM3_GPIO_PFR0_P6 *((volatile unsigned int*)(0x42660018UL))
\r
4837 #define bFM3_GPIO_PFR0_P7 *((volatile unsigned int*)(0x4266001CUL))
\r
4838 #define bFM3_GPIO_PFR0_P8 *((volatile unsigned int*)(0x42660020UL))
\r
4839 #define bFM3_GPIO_PFR0_P9 *((volatile unsigned int*)(0x42660024UL))
\r
4840 #define bFM3_GPIO_PFR0_PA *((volatile unsigned int*)(0x42660028UL))
\r
4841 #define bFM3_GPIO_PFR0_PB *((volatile unsigned int*)(0x4266002CUL))
\r
4842 #define bFM3_GPIO_PFR0_PC *((volatile unsigned int*)(0x42660030UL))
\r
4843 #define bFM3_GPIO_PFR0_PD *((volatile unsigned int*)(0x42660034UL))
\r
4844 #define bFM3_GPIO_PFR0_PE *((volatile unsigned int*)(0x42660038UL))
\r
4845 #define bFM3_GPIO_PFR0_PF *((volatile unsigned int*)(0x4266003CUL))
\r
4846 #define bFM3_GPIO_PFR1_P0 *((volatile unsigned int*)(0x42660080UL))
\r
4847 #define bFM3_GPIO_PFR1_P1 *((volatile unsigned int*)(0x42660084UL))
\r
4848 #define bFM3_GPIO_PFR1_P2 *((volatile unsigned int*)(0x42660088UL))
\r
4849 #define bFM3_GPIO_PFR1_P3 *((volatile unsigned int*)(0x4266008CUL))
\r
4850 #define bFM3_GPIO_PFR1_P4 *((volatile unsigned int*)(0x42660090UL))
\r
4851 #define bFM3_GPIO_PFR1_P5 *((volatile unsigned int*)(0x42660094UL))
\r
4852 #define bFM3_GPIO_PFR1_P6 *((volatile unsigned int*)(0x42660098UL))
\r
4853 #define bFM3_GPIO_PFR1_P7 *((volatile unsigned int*)(0x4266009CUL))
\r
4854 #define bFM3_GPIO_PFR1_P8 *((volatile unsigned int*)(0x426600A0UL))
\r
4855 #define bFM3_GPIO_PFR1_P9 *((volatile unsigned int*)(0x426600A4UL))
\r
4856 #define bFM3_GPIO_PFR1_PA *((volatile unsigned int*)(0x426600A8UL))
\r
4857 #define bFM3_GPIO_PFR1_PB *((volatile unsigned int*)(0x426600ACUL))
\r
4858 #define bFM3_GPIO_PFR1_PC *((volatile unsigned int*)(0x426600B0UL))
\r
4859 #define bFM3_GPIO_PFR1_PD *((volatile unsigned int*)(0x426600B4UL))
\r
4860 #define bFM3_GPIO_PFR1_PE *((volatile unsigned int*)(0x426600B8UL))
\r
4861 #define bFM3_GPIO_PFR1_PF *((volatile unsigned int*)(0x426600BCUL))
\r
4862 #define bFM3_GPIO_PFR2_P0 *((volatile unsigned int*)(0x42660100UL))
\r
4863 #define bFM3_GPIO_PFR2_P1 *((volatile unsigned int*)(0x42660104UL))
\r
4864 #define bFM3_GPIO_PFR2_P2 *((volatile unsigned int*)(0x42660108UL))
\r
4865 #define bFM3_GPIO_PFR2_P3 *((volatile unsigned int*)(0x4266010CUL))
\r
4866 #define bFM3_GPIO_PFR3_P0 *((volatile unsigned int*)(0x42660180UL))
\r
4867 #define bFM3_GPIO_PFR3_P1 *((volatile unsigned int*)(0x42660184UL))
\r
4868 #define bFM3_GPIO_PFR3_P2 *((volatile unsigned int*)(0x42660188UL))
\r
4869 #define bFM3_GPIO_PFR3_P3 *((volatile unsigned int*)(0x4266018CUL))
\r
4870 #define bFM3_GPIO_PFR3_P4 *((volatile unsigned int*)(0x42660190UL))
\r
4871 #define bFM3_GPIO_PFR3_P5 *((volatile unsigned int*)(0x42660194UL))
\r
4872 #define bFM3_GPIO_PFR3_P6 *((volatile unsigned int*)(0x42660198UL))
\r
4873 #define bFM3_GPIO_PFR3_P7 *((volatile unsigned int*)(0x4266019CUL))
\r
4874 #define bFM3_GPIO_PFR3_P8 *((volatile unsigned int*)(0x426601A0UL))
\r
4875 #define bFM3_GPIO_PFR3_P9 *((volatile unsigned int*)(0x426601A4UL))
\r
4876 #define bFM3_GPIO_PFR3_PA *((volatile unsigned int*)(0x426601A8UL))
\r
4877 #define bFM3_GPIO_PFR3_PB *((volatile unsigned int*)(0x426601ACUL))
\r
4878 #define bFM3_GPIO_PFR3_PC *((volatile unsigned int*)(0x426601B0UL))
\r
4879 #define bFM3_GPIO_PFR3_PD *((volatile unsigned int*)(0x426601B4UL))
\r
4880 #define bFM3_GPIO_PFR3_PE *((volatile unsigned int*)(0x426601B8UL))
\r
4881 #define bFM3_GPIO_PFR3_PF *((volatile unsigned int*)(0x426601BCUL))
\r
4882 #define bFM3_GPIO_PFR4_P0 *((volatile unsigned int*)(0x42660200UL))
\r
4883 #define bFM3_GPIO_PFR4_P1 *((volatile unsigned int*)(0x42660204UL))
\r
4884 #define bFM3_GPIO_PFR4_P2 *((volatile unsigned int*)(0x42660208UL))
\r
4885 #define bFM3_GPIO_PFR4_P3 *((volatile unsigned int*)(0x4266020CUL))
\r
4886 #define bFM3_GPIO_PFR4_P4 *((volatile unsigned int*)(0x42660210UL))
\r
4887 #define bFM3_GPIO_PFR4_P5 *((volatile unsigned int*)(0x42660214UL))
\r
4888 #define bFM3_GPIO_PFR4_P6 *((volatile unsigned int*)(0x42660218UL))
\r
4889 #define bFM3_GPIO_PFR4_P7 *((volatile unsigned int*)(0x4266021CUL))
\r
4890 #define bFM3_GPIO_PFR4_P8 *((volatile unsigned int*)(0x42660220UL))
\r
4891 #define bFM3_GPIO_PFR4_P9 *((volatile unsigned int*)(0x42660224UL))
\r
4892 #define bFM3_GPIO_PFR4_PA *((volatile unsigned int*)(0x42660228UL))
\r
4893 #define bFM3_GPIO_PFR4_PB *((volatile unsigned int*)(0x4266022CUL))
\r
4894 #define bFM3_GPIO_PFR4_PC *((volatile unsigned int*)(0x42660230UL))
\r
4895 #define bFM3_GPIO_PFR4_PD *((volatile unsigned int*)(0x42660234UL))
\r
4896 #define bFM3_GPIO_PFR4_PE *((volatile unsigned int*)(0x42660238UL))
\r
4897 #define bFM3_GPIO_PFR5_P0 *((volatile unsigned int*)(0x42660280UL))
\r
4898 #define bFM3_GPIO_PFR5_P1 *((volatile unsigned int*)(0x42660284UL))
\r
4899 #define bFM3_GPIO_PFR5_P2 *((volatile unsigned int*)(0x42660288UL))
\r
4900 #define bFM3_GPIO_PFR5_P3 *((volatile unsigned int*)(0x4266028CUL))
\r
4901 #define bFM3_GPIO_PFR5_P4 *((volatile unsigned int*)(0x42660290UL))
\r
4902 #define bFM3_GPIO_PFR5_P5 *((volatile unsigned int*)(0x42660294UL))
\r
4903 #define bFM3_GPIO_PFR5_P6 *((volatile unsigned int*)(0x42660298UL))
\r
4904 #define bFM3_GPIO_PFR6_P0 *((volatile unsigned int*)(0x42660300UL))
\r
4905 #define bFM3_GPIO_PFR6_P1 *((volatile unsigned int*)(0x42660304UL))
\r
4906 #define bFM3_GPIO_PFR6_P2 *((volatile unsigned int*)(0x42660308UL))
\r
4907 #define bFM3_GPIO_PFR6_P3 *((volatile unsigned int*)(0x4266030CUL))
\r
4908 #define bFM3_GPIO_PFR8_P0 *((volatile unsigned int*)(0x42660400UL))
\r
4909 #define bFM3_GPIO_PFR8_P1 *((volatile unsigned int*)(0x42660404UL))
\r
4910 #define bFM3_GPIO_PCR0_P0 *((volatile unsigned int*)(0x42662000UL))
\r
4911 #define bFM3_GPIO_PCR0_P1 *((volatile unsigned int*)(0x42662004UL))
\r
4912 #define bFM3_GPIO_PCR0_P2 *((volatile unsigned int*)(0x42662008UL))
\r
4913 #define bFM3_GPIO_PCR0_P3 *((volatile unsigned int*)(0x4266200CUL))
\r
4914 #define bFM3_GPIO_PCR0_P4 *((volatile unsigned int*)(0x42662010UL))
\r
4915 #define bFM3_GPIO_PCR0_P5 *((volatile unsigned int*)(0x42662014UL))
\r
4916 #define bFM3_GPIO_PCR0_P6 *((volatile unsigned int*)(0x42662018UL))
\r
4917 #define bFM3_GPIO_PCR0_P7 *((volatile unsigned int*)(0x4266201CUL))
\r
4918 #define bFM3_GPIO_PCR0_P8 *((volatile unsigned int*)(0x42662020UL))
\r
4919 #define bFM3_GPIO_PCR0_P9 *((volatile unsigned int*)(0x42662024UL))
\r
4920 #define bFM3_GPIO_PCR0_PA *((volatile unsigned int*)(0x42662028UL))
\r
4921 #define bFM3_GPIO_PCR0_PB *((volatile unsigned int*)(0x4266202CUL))
\r
4922 #define bFM3_GPIO_PCR0_PC *((volatile unsigned int*)(0x42662030UL))
\r
4923 #define bFM3_GPIO_PCR0_PD *((volatile unsigned int*)(0x42662034UL))
\r
4924 #define bFM3_GPIO_PCR0_PE *((volatile unsigned int*)(0x42662038UL))
\r
4925 #define bFM3_GPIO_PCR0_PF *((volatile unsigned int*)(0x4266203CUL))
\r
4926 #define bFM3_GPIO_PCR1_P0 *((volatile unsigned int*)(0x42662080UL))
\r
4927 #define bFM3_GPIO_PCR1_P1 *((volatile unsigned int*)(0x42662084UL))
\r
4928 #define bFM3_GPIO_PCR1_P2 *((volatile unsigned int*)(0x42662088UL))
\r
4929 #define bFM3_GPIO_PCR1_P3 *((volatile unsigned int*)(0x4266208CUL))
\r
4930 #define bFM3_GPIO_PCR1_P4 *((volatile unsigned int*)(0x42662090UL))
\r
4931 #define bFM3_GPIO_PCR1_P5 *((volatile unsigned int*)(0x42662094UL))
\r
4932 #define bFM3_GPIO_PCR1_P6 *((volatile unsigned int*)(0x42662098UL))
\r
4933 #define bFM3_GPIO_PCR1_P7 *((volatile unsigned int*)(0x4266209CUL))
\r
4934 #define bFM3_GPIO_PCR1_P8 *((volatile unsigned int*)(0x426620A0UL))
\r
4935 #define bFM3_GPIO_PCR1_P9 *((volatile unsigned int*)(0x426620A4UL))
\r
4936 #define bFM3_GPIO_PCR1_PA *((volatile unsigned int*)(0x426620A8UL))
\r
4937 #define bFM3_GPIO_PCR1_PB *((volatile unsigned int*)(0x426620ACUL))
\r
4938 #define bFM3_GPIO_PCR1_PC *((volatile unsigned int*)(0x426620B0UL))
\r
4939 #define bFM3_GPIO_PCR1_PD *((volatile unsigned int*)(0x426620B4UL))
\r
4940 #define bFM3_GPIO_PCR1_PE *((volatile unsigned int*)(0x426620B8UL))
\r
4941 #define bFM3_GPIO_PCR1_PF *((volatile unsigned int*)(0x426620BCUL))
\r
4942 #define bFM3_GPIO_PCR2_P0 *((volatile unsigned int*)(0x42662100UL))
\r
4943 #define bFM3_GPIO_PCR2_P1 *((volatile unsigned int*)(0x42662104UL))
\r
4944 #define bFM3_GPIO_PCR2_P2 *((volatile unsigned int*)(0x42662108UL))
\r
4945 #define bFM3_GPIO_PCR2_P3 *((volatile unsigned int*)(0x4266210CUL))
\r
4946 #define bFM3_GPIO_PCR3_P0 *((volatile unsigned int*)(0x42662180UL))
\r
4947 #define bFM3_GPIO_PCR3_P1 *((volatile unsigned int*)(0x42662184UL))
\r
4948 #define bFM3_GPIO_PCR3_P2 *((volatile unsigned int*)(0x42662188UL))
\r
4949 #define bFM3_GPIO_PCR3_P3 *((volatile unsigned int*)(0x4266218CUL))
\r
4950 #define bFM3_GPIO_PCR3_P4 *((volatile unsigned int*)(0x42662190UL))
\r
4951 #define bFM3_GPIO_PCR3_P5 *((volatile unsigned int*)(0x42662194UL))
\r
4952 #define bFM3_GPIO_PCR3_P6 *((volatile unsigned int*)(0x42662198UL))
\r
4953 #define bFM3_GPIO_PCR3_P7 *((volatile unsigned int*)(0x4266219CUL))
\r
4954 #define bFM3_GPIO_PCR3_P8 *((volatile unsigned int*)(0x426621A0UL))
\r
4955 #define bFM3_GPIO_PCR3_P9 *((volatile unsigned int*)(0x426621A4UL))
\r
4956 #define bFM3_GPIO_PCR3_PA *((volatile unsigned int*)(0x426621A8UL))
\r
4957 #define bFM3_GPIO_PCR3_PB *((volatile unsigned int*)(0x426621ACUL))
\r
4958 #define bFM3_GPIO_PCR3_PC *((volatile unsigned int*)(0x426621B0UL))
\r
4959 #define bFM3_GPIO_PCR3_PD *((volatile unsigned int*)(0x426621B4UL))
\r
4960 #define bFM3_GPIO_PCR3_PE *((volatile unsigned int*)(0x426621B8UL))
\r
4961 #define bFM3_GPIO_PCR3_PF *((volatile unsigned int*)(0x426621BCUL))
\r
4962 #define bFM3_GPIO_PCR4_P0 *((volatile unsigned int*)(0x42662200UL))
\r
4963 #define bFM3_GPIO_PCR4_P1 *((volatile unsigned int*)(0x42662204UL))
\r
4964 #define bFM3_GPIO_PCR4_P2 *((volatile unsigned int*)(0x42662208UL))
\r
4965 #define bFM3_GPIO_PCR4_P3 *((volatile unsigned int*)(0x4266220CUL))
\r
4966 #define bFM3_GPIO_PCR4_P4 *((volatile unsigned int*)(0x42662210UL))
\r
4967 #define bFM3_GPIO_PCR4_P5 *((volatile unsigned int*)(0x42662214UL))
\r
4968 #define bFM3_GPIO_PCR4_P6 *((volatile unsigned int*)(0x42662218UL))
\r
4969 #define bFM3_GPIO_PCR4_P7 *((volatile unsigned int*)(0x4266221CUL))
\r
4970 #define bFM3_GPIO_PCR4_P8 *((volatile unsigned int*)(0x42662220UL))
\r
4971 #define bFM3_GPIO_PCR4_P9 *((volatile unsigned int*)(0x42662224UL))
\r
4972 #define bFM3_GPIO_PCR4_PA *((volatile unsigned int*)(0x42662228UL))
\r
4973 #define bFM3_GPIO_PCR4_PB *((volatile unsigned int*)(0x4266222CUL))
\r
4974 #define bFM3_GPIO_PCR4_PC *((volatile unsigned int*)(0x42662230UL))
\r
4975 #define bFM3_GPIO_PCR4_PD *((volatile unsigned int*)(0x42662234UL))
\r
4976 #define bFM3_GPIO_PCR4_PE *((volatile unsigned int*)(0x42662238UL))
\r
4977 #define bFM3_GPIO_PCR5_P0 *((volatile unsigned int*)(0x42662280UL))
\r
4978 #define bFM3_GPIO_PCR5_P1 *((volatile unsigned int*)(0x42662284UL))
\r
4979 #define bFM3_GPIO_PCR5_P2 *((volatile unsigned int*)(0x42662288UL))
\r
4980 #define bFM3_GPIO_PCR5_P3 *((volatile unsigned int*)(0x4266228CUL))
\r
4981 #define bFM3_GPIO_PCR5_P4 *((volatile unsigned int*)(0x42662290UL))
\r
4982 #define bFM3_GPIO_PCR5_P5 *((volatile unsigned int*)(0x42662294UL))
\r
4983 #define bFM3_GPIO_PCR5_P6 *((volatile unsigned int*)(0x42662298UL))
\r
4984 #define bFM3_GPIO_PCR6_P0 *((volatile unsigned int*)(0x42662300UL))
\r
4985 #define bFM3_GPIO_PCR6_P1 *((volatile unsigned int*)(0x42662304UL))
\r
4986 #define bFM3_GPIO_PCR6_P2 *((volatile unsigned int*)(0x42662308UL))
\r
4987 #define bFM3_GPIO_PCR6_P3 *((volatile unsigned int*)(0x4266230CUL))
\r
4988 #define bFM3_GPIO_DDR0_P0 *((volatile unsigned int*)(0x42664000UL))
\r
4989 #define bFM3_GPIO_DDR0_P1 *((volatile unsigned int*)(0x42664004UL))
\r
4990 #define bFM3_GPIO_DDR0_P2 *((volatile unsigned int*)(0x42664008UL))
\r
4991 #define bFM3_GPIO_DDR0_P3 *((volatile unsigned int*)(0x4266400CUL))
\r
4992 #define bFM3_GPIO_DDR0_P4 *((volatile unsigned int*)(0x42664010UL))
\r
4993 #define bFM3_GPIO_DDR0_P5 *((volatile unsigned int*)(0x42664014UL))
\r
4994 #define bFM3_GPIO_DDR0_P6 *((volatile unsigned int*)(0x42664018UL))
\r
4995 #define bFM3_GPIO_DDR0_P7 *((volatile unsigned int*)(0x4266401CUL))
\r
4996 #define bFM3_GPIO_DDR0_P8 *((volatile unsigned int*)(0x42664020UL))
\r
4997 #define bFM3_GPIO_DDR0_P9 *((volatile unsigned int*)(0x42664024UL))
\r
4998 #define bFM3_GPIO_DDR0_PA *((volatile unsigned int*)(0x42664028UL))
\r
4999 #define bFM3_GPIO_DDR0_PB *((volatile unsigned int*)(0x4266402CUL))
\r
5000 #define bFM3_GPIO_DDR0_PC *((volatile unsigned int*)(0x42664030UL))
\r
5001 #define bFM3_GPIO_DDR0_PD *((volatile unsigned int*)(0x42664034UL))
\r
5002 #define bFM3_GPIO_DDR0_PE *((volatile unsigned int*)(0x42664038UL))
\r
5003 #define bFM3_GPIO_DDR0_PF *((volatile unsigned int*)(0x4266403CUL))
\r
5004 #define bFM3_GPIO_DDR1_P0 *((volatile unsigned int*)(0x42664080UL))
\r
5005 #define bFM3_GPIO_DDR1_P1 *((volatile unsigned int*)(0x42664084UL))
\r
5006 #define bFM3_GPIO_DDR1_P2 *((volatile unsigned int*)(0x42664088UL))
\r
5007 #define bFM3_GPIO_DDR1_P3 *((volatile unsigned int*)(0x4266408CUL))
\r
5008 #define bFM3_GPIO_DDR1_P4 *((volatile unsigned int*)(0x42664090UL))
\r
5009 #define bFM3_GPIO_DDR1_P5 *((volatile unsigned int*)(0x42664094UL))
\r
5010 #define bFM3_GPIO_DDR1_P6 *((volatile unsigned int*)(0x42664098UL))
\r
5011 #define bFM3_GPIO_DDR1_P7 *((volatile unsigned int*)(0x4266409CUL))
\r
5012 #define bFM3_GPIO_DDR1_P8 *((volatile unsigned int*)(0x426640A0UL))
\r
5013 #define bFM3_GPIO_DDR1_P9 *((volatile unsigned int*)(0x426640A4UL))
\r
5014 #define bFM3_GPIO_DDR1_PA *((volatile unsigned int*)(0x426640A8UL))
\r
5015 #define bFM3_GPIO_DDR1_PB *((volatile unsigned int*)(0x426640ACUL))
\r
5016 #define bFM3_GPIO_DDR1_PC *((volatile unsigned int*)(0x426640B0UL))
\r
5017 #define bFM3_GPIO_DDR1_PD *((volatile unsigned int*)(0x426640B4UL))
\r
5018 #define bFM3_GPIO_DDR1_PE *((volatile unsigned int*)(0x426640B8UL))
\r
5019 #define bFM3_GPIO_DDR1_PF *((volatile unsigned int*)(0x426640BCUL))
\r
5020 #define bFM3_GPIO_DDR2_P0 *((volatile unsigned int*)(0x42664100UL))
\r
5021 #define bFM3_GPIO_DDR2_P1 *((volatile unsigned int*)(0x42664104UL))
\r
5022 #define bFM3_GPIO_DDR2_P2 *((volatile unsigned int*)(0x42664108UL))
\r
5023 #define bFM3_GPIO_DDR2_P3 *((volatile unsigned int*)(0x4266410CUL))
\r
5024 #define bFM3_GPIO_DDR3_P0 *((volatile unsigned int*)(0x42664180UL))
\r
5025 #define bFM3_GPIO_DDR3_P1 *((volatile unsigned int*)(0x42664184UL))
\r
5026 #define bFM3_GPIO_DDR3_P2 *((volatile unsigned int*)(0x42664188UL))
\r
5027 #define bFM3_GPIO_DDR3_P3 *((volatile unsigned int*)(0x4266418CUL))
\r
5028 #define bFM3_GPIO_DDR3_P4 *((volatile unsigned int*)(0x42664190UL))
\r
5029 #define bFM3_GPIO_DDR3_P5 *((volatile unsigned int*)(0x42664194UL))
\r
5030 #define bFM3_GPIO_DDR3_P6 *((volatile unsigned int*)(0x42664198UL))
\r
5031 #define bFM3_GPIO_DDR3_P7 *((volatile unsigned int*)(0x4266419CUL))
\r
5032 #define bFM3_GPIO_DDR3_P8 *((volatile unsigned int*)(0x426641A0UL))
\r
5033 #define bFM3_GPIO_DDR3_P9 *((volatile unsigned int*)(0x426641A4UL))
\r
5034 #define bFM3_GPIO_DDR3_PA *((volatile unsigned int*)(0x426641A8UL))
\r
5035 #define bFM3_GPIO_DDR3_PB *((volatile unsigned int*)(0x426641ACUL))
\r
5036 #define bFM3_GPIO_DDR3_PC *((volatile unsigned int*)(0x426641B0UL))
\r
5037 #define bFM3_GPIO_DDR3_PD *((volatile unsigned int*)(0x426641B4UL))
\r
5038 #define bFM3_GPIO_DDR3_PE *((volatile unsigned int*)(0x426641B8UL))
\r
5039 #define bFM3_GPIO_DDR3_PF *((volatile unsigned int*)(0x426641BCUL))
\r
5040 #define bFM3_GPIO_DDR4_P0 *((volatile unsigned int*)(0x42664200UL))
\r
5041 #define bFM3_GPIO_DDR4_P1 *((volatile unsigned int*)(0x42664204UL))
\r
5042 #define bFM3_GPIO_DDR4_P2 *((volatile unsigned int*)(0x42664208UL))
\r
5043 #define bFM3_GPIO_DDR4_P3 *((volatile unsigned int*)(0x4266420CUL))
\r
5044 #define bFM3_GPIO_DDR4_P4 *((volatile unsigned int*)(0x42664210UL))
\r
5045 #define bFM3_GPIO_DDR4_P5 *((volatile unsigned int*)(0x42664214UL))
\r
5046 #define bFM3_GPIO_DDR4_P6 *((volatile unsigned int*)(0x42664218UL))
\r
5047 #define bFM3_GPIO_DDR4_P7 *((volatile unsigned int*)(0x4266421CUL))
\r
5048 #define bFM3_GPIO_DDR4_P8 *((volatile unsigned int*)(0x42664220UL))
\r
5049 #define bFM3_GPIO_DDR4_P9 *((volatile unsigned int*)(0x42664224UL))
\r
5050 #define bFM3_GPIO_DDR4_PA *((volatile unsigned int*)(0x42664228UL))
\r
5051 #define bFM3_GPIO_DDR4_PB *((volatile unsigned int*)(0x4266422CUL))
\r
5052 #define bFM3_GPIO_DDR4_PC *((volatile unsigned int*)(0x42664230UL))
\r
5053 #define bFM3_GPIO_DDR4_PD *((volatile unsigned int*)(0x42664234UL))
\r
5054 #define bFM3_GPIO_DDR4_PE *((volatile unsigned int*)(0x42664238UL))
\r
5055 #define bFM3_GPIO_DDR5_P0 *((volatile unsigned int*)(0x42664280UL))
\r
5056 #define bFM3_GPIO_DDR5_P1 *((volatile unsigned int*)(0x42664284UL))
\r
5057 #define bFM3_GPIO_DDR5_P2 *((volatile unsigned int*)(0x42664288UL))
\r
5058 #define bFM3_GPIO_DDR5_P3 *((volatile unsigned int*)(0x4266428CUL))
\r
5059 #define bFM3_GPIO_DDR5_P4 *((volatile unsigned int*)(0x42664290UL))
\r
5060 #define bFM3_GPIO_DDR5_P5 *((volatile unsigned int*)(0x42664294UL))
\r
5061 #define bFM3_GPIO_DDR5_P6 *((volatile unsigned int*)(0x42664298UL))
\r
5062 #define bFM3_GPIO_DDR6_P0 *((volatile unsigned int*)(0x42664300UL))
\r
5063 #define bFM3_GPIO_DDR6_P1 *((volatile unsigned int*)(0x42664304UL))
\r
5064 #define bFM3_GPIO_DDR6_P2 *((volatile unsigned int*)(0x42664308UL))
\r
5065 #define bFM3_GPIO_DDR6_P3 *((volatile unsigned int*)(0x4266430CUL))
\r
5066 #define bFM3_GPIO_DDR8_P0 *((volatile unsigned int*)(0x42664400UL))
\r
5067 #define bFM3_GPIO_DDR8_P1 *((volatile unsigned int*)(0x42664404UL))
\r
5068 #define bFM3_GPIO_PDIR0_P0 *((volatile unsigned int*)(0x42666000UL))
\r
5069 #define bFM3_GPIO_PDIR0_P1 *((volatile unsigned int*)(0x42666004UL))
\r
5070 #define bFM3_GPIO_PDIR0_P2 *((volatile unsigned int*)(0x42666008UL))
\r
5071 #define bFM3_GPIO_PDIR0_P3 *((volatile unsigned int*)(0x4266600CUL))
\r
5072 #define bFM3_GPIO_PDIR0_P4 *((volatile unsigned int*)(0x42666010UL))
\r
5073 #define bFM3_GPIO_PDIR0_P5 *((volatile unsigned int*)(0x42666014UL))
\r
5074 #define bFM3_GPIO_PDIR0_P6 *((volatile unsigned int*)(0x42666018UL))
\r
5075 #define bFM3_GPIO_PDIR0_P7 *((volatile unsigned int*)(0x4266601CUL))
\r
5076 #define bFM3_GPIO_PDIR0_P8 *((volatile unsigned int*)(0x42666020UL))
\r
5077 #define bFM3_GPIO_PDIR0_P9 *((volatile unsigned int*)(0x42666024UL))
\r
5078 #define bFM3_GPIO_PDIR0_PA *((volatile unsigned int*)(0x42666028UL))
\r
5079 #define bFM3_GPIO_PDIR0_PB *((volatile unsigned int*)(0x4266602CUL))
\r
5080 #define bFM3_GPIO_PDIR0_PC *((volatile unsigned int*)(0x42666030UL))
\r
5081 #define bFM3_GPIO_PDIR0_PD *((volatile unsigned int*)(0x42666034UL))
\r
5082 #define bFM3_GPIO_PDIR0_PE *((volatile unsigned int*)(0x42666038UL))
\r
5083 #define bFM3_GPIO_PDIR0_PF *((volatile unsigned int*)(0x4266603CUL))
\r
5084 #define bFM3_GPIO_PDIR1_P0 *((volatile unsigned int*)(0x42666080UL))
\r
5085 #define bFM3_GPIO_PDIR1_P1 *((volatile unsigned int*)(0x42666084UL))
\r
5086 #define bFM3_GPIO_PDIR1_P2 *((volatile unsigned int*)(0x42666088UL))
\r
5087 #define bFM3_GPIO_PDIR1_P3 *((volatile unsigned int*)(0x4266608CUL))
\r
5088 #define bFM3_GPIO_PDIR1_P4 *((volatile unsigned int*)(0x42666090UL))
\r
5089 #define bFM3_GPIO_PDIR1_P5 *((volatile unsigned int*)(0x42666094UL))
\r
5090 #define bFM3_GPIO_PDIR1_P6 *((volatile unsigned int*)(0x42666098UL))
\r
5091 #define bFM3_GPIO_PDIR1_P7 *((volatile unsigned int*)(0x4266609CUL))
\r
5092 #define bFM3_GPIO_PDIR1_P8 *((volatile unsigned int*)(0x426660A0UL))
\r
5093 #define bFM3_GPIO_PDIR1_P9 *((volatile unsigned int*)(0x426660A4UL))
\r
5094 #define bFM3_GPIO_PDIR1_PA *((volatile unsigned int*)(0x426660A8UL))
\r
5095 #define bFM3_GPIO_PDIR1_PB *((volatile unsigned int*)(0x426660ACUL))
\r
5096 #define bFM3_GPIO_PDIR1_PC *((volatile unsigned int*)(0x426660B0UL))
\r
5097 #define bFM3_GPIO_PDIR1_PD *((volatile unsigned int*)(0x426660B4UL))
\r
5098 #define bFM3_GPIO_PDIR1_PE *((volatile unsigned int*)(0x426660B8UL))
\r
5099 #define bFM3_GPIO_PDIR1_PF *((volatile unsigned int*)(0x426660BCUL))
\r
5100 #define bFM3_GPIO_PDIR2_P0 *((volatile unsigned int*)(0x42666100UL))
\r
5101 #define bFM3_GPIO_PDIR2_P1 *((volatile unsigned int*)(0x42666104UL))
\r
5102 #define bFM3_GPIO_PDIR2_P2 *((volatile unsigned int*)(0x42666108UL))
\r
5103 #define bFM3_GPIO_PDIR2_P3 *((volatile unsigned int*)(0x4266610CUL))
\r
5104 #define bFM3_GPIO_PDIR3_P0 *((volatile unsigned int*)(0x42666180UL))
\r
5105 #define bFM3_GPIO_PDIR3_P1 *((volatile unsigned int*)(0x42666184UL))
\r
5106 #define bFM3_GPIO_PDIR3_P2 *((volatile unsigned int*)(0x42666188UL))
\r
5107 #define bFM3_GPIO_PDIR3_P3 *((volatile unsigned int*)(0x4266618CUL))
\r
5108 #define bFM3_GPIO_PDIR3_P4 *((volatile unsigned int*)(0x42666190UL))
\r
5109 #define bFM3_GPIO_PDIR3_P5 *((volatile unsigned int*)(0x42666194UL))
\r
5110 #define bFM3_GPIO_PDIR3_P6 *((volatile unsigned int*)(0x42666198UL))
\r
5111 #define bFM3_GPIO_PDIR3_P7 *((volatile unsigned int*)(0x4266619CUL))
\r
5112 #define bFM3_GPIO_PDIR3_P8 *((volatile unsigned int*)(0x426661A0UL))
\r
5113 #define bFM3_GPIO_PDIR3_P9 *((volatile unsigned int*)(0x426661A4UL))
\r
5114 #define bFM3_GPIO_PDIR3_PA *((volatile unsigned int*)(0x426661A8UL))
\r
5115 #define bFM3_GPIO_PDIR3_PB *((volatile unsigned int*)(0x426661ACUL))
\r
5116 #define bFM3_GPIO_PDIR3_PC *((volatile unsigned int*)(0x426661B0UL))
\r
5117 #define bFM3_GPIO_PDIR3_PD *((volatile unsigned int*)(0x426661B4UL))
\r
5118 #define bFM3_GPIO_PDIR3_PE *((volatile unsigned int*)(0x426661B8UL))
\r
5119 #define bFM3_GPIO_PDIR3_PF *((volatile unsigned int*)(0x426661BCUL))
\r
5120 #define bFM3_GPIO_PDIR4_P0 *((volatile unsigned int*)(0x42666200UL))
\r
5121 #define bFM3_GPIO_PDIR4_P1 *((volatile unsigned int*)(0x42666204UL))
\r
5122 #define bFM3_GPIO_PDIR4_P2 *((volatile unsigned int*)(0x42666208UL))
\r
5123 #define bFM3_GPIO_PDIR4_P3 *((volatile unsigned int*)(0x4266620CUL))
\r
5124 #define bFM3_GPIO_PDIR4_P4 *((volatile unsigned int*)(0x42666210UL))
\r
5125 #define bFM3_GPIO_PDIR4_P5 *((volatile unsigned int*)(0x42666214UL))
\r
5126 #define bFM3_GPIO_PDIR4_P6 *((volatile unsigned int*)(0x42666218UL))
\r
5127 #define bFM3_GPIO_PDIR4_P7 *((volatile unsigned int*)(0x4266621CUL))
\r
5128 #define bFM3_GPIO_PDIR4_P8 *((volatile unsigned int*)(0x42666220UL))
\r
5129 #define bFM3_GPIO_PDIR4_P9 *((volatile unsigned int*)(0x42666224UL))
\r
5130 #define bFM3_GPIO_PDIR4_PA *((volatile unsigned int*)(0x42666228UL))
\r
5131 #define bFM3_GPIO_PDIR4_PB *((volatile unsigned int*)(0x4266622CUL))
\r
5132 #define bFM3_GPIO_PDIR4_PC *((volatile unsigned int*)(0x42666230UL))
\r
5133 #define bFM3_GPIO_PDIR4_PD *((volatile unsigned int*)(0x42666234UL))
\r
5134 #define bFM3_GPIO_PDIR4_PE *((volatile unsigned int*)(0x42666238UL))
\r
5135 #define bFM3_GPIO_PDIR5_P0 *((volatile unsigned int*)(0x42666280UL))
\r
5136 #define bFM3_GPIO_PDIR5_P1 *((volatile unsigned int*)(0x42666284UL))
\r
5137 #define bFM3_GPIO_PDIR5_P2 *((volatile unsigned int*)(0x42666288UL))
\r
5138 #define bFM3_GPIO_PDIR5_P3 *((volatile unsigned int*)(0x4266628CUL))
\r
5139 #define bFM3_GPIO_PDIR5_P4 *((volatile unsigned int*)(0x42666290UL))
\r
5140 #define bFM3_GPIO_PDIR5_P5 *((volatile unsigned int*)(0x42666294UL))
\r
5141 #define bFM3_GPIO_PDIR5_P6 *((volatile unsigned int*)(0x42666298UL))
\r
5142 #define bFM3_GPIO_PDIR6_P0 *((volatile unsigned int*)(0x42666300UL))
\r
5143 #define bFM3_GPIO_PDIR6_P1 *((volatile unsigned int*)(0x42666304UL))
\r
5144 #define bFM3_GPIO_PDIR6_P2 *((volatile unsigned int*)(0x42666308UL))
\r
5145 #define bFM3_GPIO_PDIR6_P3 *((volatile unsigned int*)(0x4266630CUL))
\r
5146 #define bFM3_GPIO_PDIR8_P0 *((volatile unsigned int*)(0x42666400UL))
\r
5147 #define bFM3_GPIO_PDIR8_P1 *((volatile unsigned int*)(0x42666404UL))
\r
5148 #define bFM3_GPIO_PDOR0_P0 *((volatile unsigned int*)(0x42668000UL))
\r
5149 #define bFM3_GPIO_PDOR0_P1 *((volatile unsigned int*)(0x42668004UL))
\r
5150 #define bFM3_GPIO_PDOR0_P2 *((volatile unsigned int*)(0x42668008UL))
\r
5151 #define bFM3_GPIO_PDOR0_P3 *((volatile unsigned int*)(0x4266800CUL))
\r
5152 #define bFM3_GPIO_PDOR0_P4 *((volatile unsigned int*)(0x42668010UL))
\r
5153 #define bFM3_GPIO_PDOR0_P5 *((volatile unsigned int*)(0x42668014UL))
\r
5154 #define bFM3_GPIO_PDOR0_P6 *((volatile unsigned int*)(0x42668018UL))
\r
5155 #define bFM3_GPIO_PDOR0_P7 *((volatile unsigned int*)(0x4266801CUL))
\r
5156 #define bFM3_GPIO_PDOR0_P8 *((volatile unsigned int*)(0x42668020UL))
\r
5157 #define bFM3_GPIO_PDOR0_P9 *((volatile unsigned int*)(0x42668024UL))
\r
5158 #define bFM3_GPIO_PDOR0_PA *((volatile unsigned int*)(0x42668028UL))
\r
5159 #define bFM3_GPIO_PDOR0_PB *((volatile unsigned int*)(0x4266802CUL))
\r
5160 #define bFM3_GPIO_PDOR0_PC *((volatile unsigned int*)(0x42668030UL))
\r
5161 #define bFM3_GPIO_PDOR0_PD *((volatile unsigned int*)(0x42668034UL))
\r
5162 #define bFM3_GPIO_PDOR0_PE *((volatile unsigned int*)(0x42668038UL))
\r
5163 #define bFM3_GPIO_PDOR0_PF *((volatile unsigned int*)(0x4266803CUL))
\r
5164 #define bFM3_GPIO_PDOR1_P0 *((volatile unsigned int*)(0x42668080UL))
\r
5165 #define bFM3_GPIO_PDOR1_P1 *((volatile unsigned int*)(0x42668084UL))
\r
5166 #define bFM3_GPIO_PDOR1_P2 *((volatile unsigned int*)(0x42668088UL))
\r
5167 #define bFM3_GPIO_PDOR1_P3 *((volatile unsigned int*)(0x4266808CUL))
\r
5168 #define bFM3_GPIO_PDOR1_P4 *((volatile unsigned int*)(0x42668090UL))
\r
5169 #define bFM3_GPIO_PDOR1_P5 *((volatile unsigned int*)(0x42668094UL))
\r
5170 #define bFM3_GPIO_PDOR1_P6 *((volatile unsigned int*)(0x42668098UL))
\r
5171 #define bFM3_GPIO_PDOR1_P7 *((volatile unsigned int*)(0x4266809CUL))
\r
5172 #define bFM3_GPIO_PDOR1_P8 *((volatile unsigned int*)(0x426680A0UL))
\r
5173 #define bFM3_GPIO_PDOR1_P9 *((volatile unsigned int*)(0x426680A4UL))
\r
5174 #define bFM3_GPIO_PDOR1_PA *((volatile unsigned int*)(0x426680A8UL))
\r
5175 #define bFM3_GPIO_PDOR1_PB *((volatile unsigned int*)(0x426680ACUL))
\r
5176 #define bFM3_GPIO_PDOR1_PC *((volatile unsigned int*)(0x426680B0UL))
\r
5177 #define bFM3_GPIO_PDOR1_PD *((volatile unsigned int*)(0x426680B4UL))
\r
5178 #define bFM3_GPIO_PDOR1_PE *((volatile unsigned int*)(0x426680B8UL))
\r
5179 #define bFM3_GPIO_PDOR1_PF *((volatile unsigned int*)(0x426680BCUL))
\r
5180 #define bFM3_GPIO_PDOR2_P0 *((volatile unsigned int*)(0x42668100UL))
\r
5181 #define bFM3_GPIO_PDOR2_P1 *((volatile unsigned int*)(0x42668104UL))
\r
5182 #define bFM3_GPIO_PDOR2_P2 *((volatile unsigned int*)(0x42668108UL))
\r
5183 #define bFM3_GPIO_PDOR2_P3 *((volatile unsigned int*)(0x4266810CUL))
\r
5184 #define bFM3_GPIO_PDOR3_P0 *((volatile unsigned int*)(0x42668180UL))
\r
5185 #define bFM3_GPIO_PDOR3_P1 *((volatile unsigned int*)(0x42668184UL))
\r
5186 #define bFM3_GPIO_PDOR3_P2 *((volatile unsigned int*)(0x42668188UL))
\r
5187 #define bFM3_GPIO_PDOR3_P3 *((volatile unsigned int*)(0x4266818CUL))
\r
5188 #define bFM3_GPIO_PDOR3_P4 *((volatile unsigned int*)(0x42668190UL))
\r
5189 #define bFM3_GPIO_PDOR3_P5 *((volatile unsigned int*)(0x42668194UL))
\r
5190 #define bFM3_GPIO_PDOR3_P6 *((volatile unsigned int*)(0x42668198UL))
\r
5191 #define bFM3_GPIO_PDOR3_P7 *((volatile unsigned int*)(0x4266819CUL))
\r
5192 #define bFM3_GPIO_PDOR3_P8 *((volatile unsigned int*)(0x426681A0UL))
\r
5193 #define bFM3_GPIO_PDOR3_P9 *((volatile unsigned int*)(0x426681A4UL))
\r
5194 #define bFM3_GPIO_PDOR3_PA *((volatile unsigned int*)(0x426681A8UL))
\r
5195 #define bFM3_GPIO_PDOR3_PB *((volatile unsigned int*)(0x426681ACUL))
\r
5196 #define bFM3_GPIO_PDOR3_PC *((volatile unsigned int*)(0x426681B0UL))
\r
5197 #define bFM3_GPIO_PDOR3_PD *((volatile unsigned int*)(0x426681B4UL))
\r
5198 #define bFM3_GPIO_PDOR3_PE *((volatile unsigned int*)(0x426681B8UL))
\r
5199 #define bFM3_GPIO_PDOR3_PF *((volatile unsigned int*)(0x426681BCUL))
\r
5200 #define bFM3_GPIO_PDOR4_P0 *((volatile unsigned int*)(0x42668200UL))
\r
5201 #define bFM3_GPIO_PDOR4_P1 *((volatile unsigned int*)(0x42668204UL))
\r
5202 #define bFM3_GPIO_PDOR4_P2 *((volatile unsigned int*)(0x42668208UL))
\r
5203 #define bFM3_GPIO_PDOR4_P3 *((volatile unsigned int*)(0x4266820CUL))
\r
5204 #define bFM3_GPIO_PDOR4_P4 *((volatile unsigned int*)(0x42668210UL))
\r
5205 #define bFM3_GPIO_PDOR4_P5 *((volatile unsigned int*)(0x42668214UL))
\r
5206 #define bFM3_GPIO_PDOR4_P6 *((volatile unsigned int*)(0x42668218UL))
\r
5207 #define bFM3_GPIO_PDOR4_P7 *((volatile unsigned int*)(0x4266821CUL))
\r
5208 #define bFM3_GPIO_PDOR4_P8 *((volatile unsigned int*)(0x42668220UL))
\r
5209 #define bFM3_GPIO_PDOR4_P9 *((volatile unsigned int*)(0x42668224UL))
\r
5210 #define bFM3_GPIO_PDOR4_PA *((volatile unsigned int*)(0x42668228UL))
\r
5211 #define bFM3_GPIO_PDOR4_PB *((volatile unsigned int*)(0x4266822CUL))
\r
5212 #define bFM3_GPIO_PDOR4_PC *((volatile unsigned int*)(0x42668230UL))
\r
5213 #define bFM3_GPIO_PDOR4_PD *((volatile unsigned int*)(0x42668234UL))
\r
5214 #define bFM3_GPIO_PDOR4_PE *((volatile unsigned int*)(0x42668238UL))
\r
5215 #define bFM3_GPIO_PDOR5_P0 *((volatile unsigned int*)(0x42668280UL))
\r
5216 #define bFM3_GPIO_PDOR5_P1 *((volatile unsigned int*)(0x42668284UL))
\r
5217 #define bFM3_GPIO_PDOR5_P2 *((volatile unsigned int*)(0x42668288UL))
\r
5218 #define bFM3_GPIO_PDOR5_P3 *((volatile unsigned int*)(0x4266828CUL))
\r
5219 #define bFM3_GPIO_PDOR5_P4 *((volatile unsigned int*)(0x42668290UL))
\r
5220 #define bFM3_GPIO_PDOR5_P5 *((volatile unsigned int*)(0x42668294UL))
\r
5221 #define bFM3_GPIO_PDOR5_P6 *((volatile unsigned int*)(0x42668298UL))
\r
5222 #define bFM3_GPIO_PDOR6_P0 *((volatile unsigned int*)(0x42668300UL))
\r
5223 #define bFM3_GPIO_PDOR6_P1 *((volatile unsigned int*)(0x42668304UL))
\r
5224 #define bFM3_GPIO_PDOR6_P2 *((volatile unsigned int*)(0x42668308UL))
\r
5225 #define bFM3_GPIO_PDOR6_P3 *((volatile unsigned int*)(0x4266830CUL))
\r
5226 #define bFM3_GPIO_PDOR8_P0 *((volatile unsigned int*)(0x42668400UL))
\r
5227 #define bFM3_GPIO_PDOR8_P1 *((volatile unsigned int*)(0x42668404UL))
\r
5228 #define bFM3_GPIO_ADE_AN0 *((volatile unsigned int*)(0x4266A000UL))
\r
5229 #define bFM3_GPIO_ADE_AN1 *((volatile unsigned int*)(0x4266A004UL))
\r
5230 #define bFM3_GPIO_ADE_AN2 *((volatile unsigned int*)(0x4266A008UL))
\r
5231 #define bFM3_GPIO_ADE_AN3 *((volatile unsigned int*)(0x4266A00CUL))
\r
5232 #define bFM3_GPIO_ADE_AN4 *((volatile unsigned int*)(0x4266A010UL))
\r
5233 #define bFM3_GPIO_ADE_AN5 *((volatile unsigned int*)(0x4266A014UL))
\r
5234 #define bFM3_GPIO_ADE_AN6 *((volatile unsigned int*)(0x4266A018UL))
\r
5235 #define bFM3_GPIO_ADE_AN7 *((volatile unsigned int*)(0x4266A01CUL))
\r
5236 #define bFM3_GPIO_ADE_AN8 *((volatile unsigned int*)(0x4266A020UL))
\r
5237 #define bFM3_GPIO_ADE_AN9 *((volatile unsigned int*)(0x4266A024UL))
\r
5238 #define bFM3_GPIO_ADE_ANA *((volatile unsigned int*)(0x4266A028UL))
\r
5239 #define bFM3_GPIO_ADE_ANB *((volatile unsigned int*)(0x4266A02CUL))
\r
5240 #define bFM3_GPIO_ADE_ANC *((volatile unsigned int*)(0x4266A030UL))
\r
5241 #define bFM3_GPIO_ADE_AND *((volatile unsigned int*)(0x4266A034UL))
\r
5242 #define bFM3_GPIO_ADE_ANE *((volatile unsigned int*)(0x4266A038UL))
\r
5243 #define bFM3_GPIO_ADE_ANF *((volatile unsigned int*)(0x4266A03CUL))
\r
5244 #define bFM3_GPIO_SPSR_SUBXC *((volatile unsigned int*)(0x4266B000UL))
\r
5245 #define bFM3_GPIO_SPSR_USB0C *((volatile unsigned int*)(0x4266B010UL))
\r
5246 #define bFM3_GPIO_EPFR00_NMIS *((volatile unsigned int*)(0x4266C000UL))
\r
5247 #define bFM3_GPIO_EPFR00_CROUTE *((volatile unsigned int*)(0x4266C004UL))
\r
5248 #define bFM3_GPIO_EPFR00_USB0PE *((volatile unsigned int*)(0x4266C024UL))
\r
5249 #define bFM3_GPIO_EPFR00_JTAGEN0B *((volatile unsigned int*)(0x4266C040UL))
\r
5250 #define bFM3_GPIO_EPFR00_JTAGEN1S *((volatile unsigned int*)(0x4266C044UL))
\r
5251 #define bFM3_GPIO_EPFR00_TRC0E *((volatile unsigned int*)(0x4266C060UL))
\r
5252 #define bFM3_GPIO_EPFR00_TRC1E *((volatile unsigned int*)(0x4266C064UL))
\r
5253 #define bFM3_GPIO_EPFR01_RTO00E0 *((volatile unsigned int*)(0x4266C080UL))
\r
5254 #define bFM3_GPIO_EPFR01_RTO00E1 *((volatile unsigned int*)(0x4266C084UL))
\r
5255 #define bFM3_GPIO_EPFR01_RTO01E0 *((volatile unsigned int*)(0x4266C088UL))
\r
5256 #define bFM3_GPIO_EPFR01_RTO01E1 *((volatile unsigned int*)(0x4266C08CUL))
\r
5257 #define bFM3_GPIO_EPFR01_RTO02E0 *((volatile unsigned int*)(0x4266C090UL))
\r
5258 #define bFM3_GPIO_EPFR01_RTO02E1 *((volatile unsigned int*)(0x4266C094UL))
\r
5259 #define bFM3_GPIO_EPFR01_RTO03E0 *((volatile unsigned int*)(0x4266C098UL))
\r
5260 #define bFM3_GPIO_EPFR01_RTO03E1 *((volatile unsigned int*)(0x4266C09CUL))
\r
5261 #define bFM3_GPIO_EPFR01_RTO04E0 *((volatile unsigned int*)(0x4266C0A0UL))
\r
5262 #define bFM3_GPIO_EPFR01_RTO04E1 *((volatile unsigned int*)(0x4266C0A4UL))
\r
5263 #define bFM3_GPIO_EPFR01_RTO05E0 *((volatile unsigned int*)(0x4266C0A8UL))
\r
5264 #define bFM3_GPIO_EPFR01_RTO05E1 *((volatile unsigned int*)(0x4266C0ACUL))
\r
5265 #define bFM3_GPIO_EPFR01_DTTI0C *((volatile unsigned int*)(0x4266C0B0UL))
\r
5266 #define bFM3_GPIO_EPFR01_DTTI0S0 *((volatile unsigned int*)(0x4266C0C0UL))
\r
5267 #define bFM3_GPIO_EPFR01_DTTI0S1 *((volatile unsigned int*)(0x4266C0C4UL))
\r
5268 #define bFM3_GPIO_EPFR01_FRCK0S0 *((volatile unsigned int*)(0x4266C0C8UL))
\r
5269 #define bFM3_GPIO_EPFR01_FRCK0S1 *((volatile unsigned int*)(0x4266C0CCUL))
\r
5270 #define bFM3_GPIO_EPFR01_IC00S0 *((volatile unsigned int*)(0x4266C0D0UL))
\r
5271 #define bFM3_GPIO_EPFR01_IC00S1 *((volatile unsigned int*)(0x4266C0D4UL))
\r
5272 #define bFM3_GPIO_EPFR01_IC00S2 *((volatile unsigned int*)(0x4266C0D8UL))
\r
5273 #define bFM3_GPIO_EPFR01_IC01S0 *((volatile unsigned int*)(0x4266C0DCUL))
\r
5274 #define bFM3_GPIO_EPFR01_IC01S1 *((volatile unsigned int*)(0x4266C0E0UL))
\r
5275 #define bFM3_GPIO_EPFR01_IC01S2 *((volatile unsigned int*)(0x4266C0E4UL))
\r
5276 #define bFM3_GPIO_EPFR01_IC02S0 *((volatile unsigned int*)(0x4266C0E8UL))
\r
5277 #define bFM3_GPIO_EPFR01_IC02S1 *((volatile unsigned int*)(0x4266C0ECUL))
\r
5278 #define bFM3_GPIO_EPFR01_IC02S2 *((volatile unsigned int*)(0x4266C0F0UL))
\r
5279 #define bFM3_GPIO_EPFR01_IC03S0 *((volatile unsigned int*)(0x4266C0F4UL))
\r
5280 #define bFM3_GPIO_EPFR01_IC03S1 *((volatile unsigned int*)(0x4266C0F8UL))
\r
5281 #define bFM3_GPIO_EPFR01_IC03S2 *((volatile unsigned int*)(0x4266C0FCUL))
\r
5282 #define bFM3_GPIO_EPFR02_RTO10E0 *((volatile unsigned int*)(0x4266C100UL))
\r
5283 #define bFM3_GPIO_EPFR02_RTO10E1 *((volatile unsigned int*)(0x4266C104UL))
\r
5284 #define bFM3_GPIO_EPFR02_RTO11E0 *((volatile unsigned int*)(0x4266C108UL))
\r
5285 #define bFM3_GPIO_EPFR02_RTO11E1 *((volatile unsigned int*)(0x4266C10CUL))
\r
5286 #define bFM3_GPIO_EPFR02_RTO12E0 *((volatile unsigned int*)(0x4266C110UL))
\r
5287 #define bFM3_GPIO_EPFR02_RTO12E1 *((volatile unsigned int*)(0x4266C114UL))
\r
5288 #define bFM3_GPIO_EPFR02_RTO13E0 *((volatile unsigned int*)(0x4266C118UL))
\r
5289 #define bFM3_GPIO_EPFR02_RTO13E1 *((volatile unsigned int*)(0x4266C11CUL))
\r
5290 #define bFM3_GPIO_EPFR02_RTO14E0 *((volatile unsigned int*)(0x4266C120UL))
\r
5291 #define bFM3_GPIO_EPFR02_RTO14E1 *((volatile unsigned int*)(0x4266C124UL))
\r
5292 #define bFM3_GPIO_EPFR02_RTO15E0 *((volatile unsigned int*)(0x4266C128UL))
\r
5293 #define bFM3_GPIO_EPFR02_RTO15E1 *((volatile unsigned int*)(0x4266C12CUL))
\r
5294 #define bFM3_GPIO_EPFR02_DTTI1C *((volatile unsigned int*)(0x4266C130UL))
\r
5295 #define bFM3_GPIO_EPFR02_DTTI1S0 *((volatile unsigned int*)(0x4266C140UL))
\r
5296 #define bFM3_GPIO_EPFR02_DTTI1S1 *((volatile unsigned int*)(0x4266C144UL))
\r
5297 #define bFM3_GPIO_EPFR02_FRCK1S0 *((volatile unsigned int*)(0x4266C148UL))
\r
5298 #define bFM3_GPIO_EPFR02_FRCK1S1 *((volatile unsigned int*)(0x4266C14CUL))
\r
5299 #define bFM3_GPIO_EPFR02_IC10S0 *((volatile unsigned int*)(0x4266C150UL))
\r
5300 #define bFM3_GPIO_EPFR02_IC10S1 *((volatile unsigned int*)(0x4266C154UL))
\r
5301 #define bFM3_GPIO_EPFR02_IC10S2 *((volatile unsigned int*)(0x4266C158UL))
\r
5302 #define bFM3_GPIO_EPFR02_IC11S0 *((volatile unsigned int*)(0x4266C15CUL))
\r
5303 #define bFM3_GPIO_EPFR02_IC11S1 *((volatile unsigned int*)(0x4266C160UL))
\r
5304 #define bFM3_GPIO_EPFR02_IC11S2 *((volatile unsigned int*)(0x4266C164UL))
\r
5305 #define bFM3_GPIO_EPFR02_IC12S0 *((volatile unsigned int*)(0x4266C168UL))
\r
5306 #define bFM3_GPIO_EPFR02_IC12S1 *((volatile unsigned int*)(0x4266C16CUL))
\r
5307 #define bFM3_GPIO_EPFR02_IC12S2 *((volatile unsigned int*)(0x4266C170UL))
\r
5308 #define bFM3_GPIO_EPFR02_IC13S0 *((volatile unsigned int*)(0x4266C174UL))
\r
5309 #define bFM3_GPIO_EPFR02_IC13S1 *((volatile unsigned int*)(0x4266C178UL))
\r
5310 #define bFM3_GPIO_EPFR02_IC13S2 *((volatile unsigned int*)(0x4266C17CUL))
\r
5311 #define bFM3_GPIO_EPFR04_TIOA0E0 *((volatile unsigned int*)(0x4266C208UL))
\r
5312 #define bFM3_GPIO_EPFR04_TIOA0E1 *((volatile unsigned int*)(0x4266C20CUL))
\r
5313 #define bFM3_GPIO_EPFR04_TIOB0S0 *((volatile unsigned int*)(0x4266C210UL))
\r
5314 #define bFM3_GPIO_EPFR04_TIOB0S1 *((volatile unsigned int*)(0x4266C214UL))
\r
5315 #define bFM3_GPIO_EPFR04_TIOA1S0 *((volatile unsigned int*)(0x4266C220UL))
\r
5316 #define bFM3_GPIO_EPFR04_TIOA1S1 *((volatile unsigned int*)(0x4266C224UL))
\r
5317 #define bFM3_GPIO_EPFR04_TIOA1E0 *((volatile unsigned int*)(0x4266C228UL))
\r
5318 #define bFM3_GPIO_EPFR04_TIOA1E1 *((volatile unsigned int*)(0x4266C22CUL))
\r
5319 #define bFM3_GPIO_EPFR04_TIOB1S0 *((volatile unsigned int*)(0x4266C230UL))
\r
5320 #define bFM3_GPIO_EPFR04_TIOB1S1 *((volatile unsigned int*)(0x4266C234UL))
\r
5321 #define bFM3_GPIO_EPFR04_TIOA2E0 *((volatile unsigned int*)(0x4266C248UL))
\r
5322 #define bFM3_GPIO_EPFR04_TIOA2E1 *((volatile unsigned int*)(0x4266C24CUL))
\r
5323 #define bFM3_GPIO_EPFR04_TIOB2S0 *((volatile unsigned int*)(0x4266C250UL))
\r
5324 #define bFM3_GPIO_EPFR04_TIOB2S1 *((volatile unsigned int*)(0x4266C254UL))
\r
5325 #define bFM3_GPIO_EPFR04_TIOA3S0 *((volatile unsigned int*)(0x4266C260UL))
\r
5326 #define bFM3_GPIO_EPFR04_TIOA3S1 *((volatile unsigned int*)(0x4266C264UL))
\r
5327 #define bFM3_GPIO_EPFR04_TIOA3E0 *((volatile unsigned int*)(0x4266C268UL))
\r
5328 #define bFM3_GPIO_EPFR04_TIOA3E1 *((volatile unsigned int*)(0x4266C26CUL))
\r
5329 #define bFM3_GPIO_EPFR04_TIOB3S0 *((volatile unsigned int*)(0x4266C270UL))
\r
5330 #define bFM3_GPIO_EPFR04_TIOB3S1 *((volatile unsigned int*)(0x4266C274UL))
\r
5331 #define bFM3_GPIO_EPFR05_TIOA4E0 *((volatile unsigned int*)(0x4266C288UL))
\r
5332 #define bFM3_GPIO_EPFR05_TIOA4E1 *((volatile unsigned int*)(0x4266C28CUL))
\r
5333 #define bFM3_GPIO_EPFR05_TIOB4S0 *((volatile unsigned int*)(0x4266C290UL))
\r
5334 #define bFM3_GPIO_EPFR05_TIOB4S1 *((volatile unsigned int*)(0x4266C294UL))
\r
5335 #define bFM3_GPIO_EPFR05_TIOA5S0 *((volatile unsigned int*)(0x4266C2A0UL))
\r
5336 #define bFM3_GPIO_EPFR05_TIOA5S1 *((volatile unsigned int*)(0x4266C2A4UL))
\r
5337 #define bFM3_GPIO_EPFR05_TIOA5E0 *((volatile unsigned int*)(0x4266C2A8UL))
\r
5338 #define bFM3_GPIO_EPFR05_TIOA5E1 *((volatile unsigned int*)(0x4266C2ACUL))
\r
5339 #define bFM3_GPIO_EPFR05_TIOB5S0 *((volatile unsigned int*)(0x4266C2B0UL))
\r
5340 #define bFM3_GPIO_EPFR05_TIOB5S1 *((volatile unsigned int*)(0x4266C2B4UL))
\r
5341 #define bFM3_GPIO_EPFR05_TIOA6E0 *((volatile unsigned int*)(0x4266C2C8UL))
\r
5342 #define bFM3_GPIO_EPFR05_TIOA6E1 *((volatile unsigned int*)(0x4266C2CCUL))
\r
5343 #define bFM3_GPIO_EPFR05_TIOB6S0 *((volatile unsigned int*)(0x4266C2D0UL))
\r
5344 #define bFM3_GPIO_EPFR05_TIOB6S1 *((volatile unsigned int*)(0x4266C2D4UL))
\r
5345 #define bFM3_GPIO_EPFR05_TIOA7S0 *((volatile unsigned int*)(0x4266C2E0UL))
\r
5346 #define bFM3_GPIO_EPFR05_TIOA7S1 *((volatile unsigned int*)(0x4266C2E4UL))
\r
5347 #define bFM3_GPIO_EPFR05_TIOA7E0 *((volatile unsigned int*)(0x4266C2E8UL))
\r
5348 #define bFM3_GPIO_EPFR05_TIOA7E1 *((volatile unsigned int*)(0x4266C2ECUL))
\r
5349 #define bFM3_GPIO_EPFR05_TIOB7S0 *((volatile unsigned int*)(0x4266C2F0UL))
\r
5350 #define bFM3_GPIO_EPFR05_TIOB7S1 *((volatile unsigned int*)(0x4266C2F4UL))
\r
5351 #define bFM3_GPIO_EPFR06_EINT00S0 *((volatile unsigned int*)(0x4266C300UL))
\r
5352 #define bFM3_GPIO_EPFR06_EINT00S1 *((volatile unsigned int*)(0x4266C304UL))
\r
5353 #define bFM3_GPIO_EPFR06_EINT01S0 *((volatile unsigned int*)(0x4266C308UL))
\r
5354 #define bFM3_GPIO_EPFR06_EINT01S1 *((volatile unsigned int*)(0x4266C30CUL))
\r
5355 #define bFM3_GPIO_EPFR06_EINT02S0 *((volatile unsigned int*)(0x4266C310UL))
\r
5356 #define bFM3_GPIO_EPFR06_EINT02S1 *((volatile unsigned int*)(0x4266C314UL))
\r
5357 #define bFM3_GPIO_EPFR06_EINT03S0 *((volatile unsigned int*)(0x4266C318UL))
\r
5358 #define bFM3_GPIO_EPFR06_EINT03S1 *((volatile unsigned int*)(0x4266C31CUL))
\r
5359 #define bFM3_GPIO_EPFR06_EINT04S0 *((volatile unsigned int*)(0x4266C320UL))
\r
5360 #define bFM3_GPIO_EPFR06_EINT04S1 *((volatile unsigned int*)(0x4266C324UL))
\r
5361 #define bFM3_GPIO_EPFR06_EINT05S0 *((volatile unsigned int*)(0x4266C328UL))
\r
5362 #define bFM3_GPIO_EPFR06_EINT05S1 *((volatile unsigned int*)(0x4266C32CUL))
\r
5363 #define bFM3_GPIO_EPFR06_EINT06S0 *((volatile unsigned int*)(0x4266C330UL))
\r
5364 #define bFM3_GPIO_EPFR06_EINT06S1 *((volatile unsigned int*)(0x4266C334UL))
\r
5365 #define bFM3_GPIO_EPFR06_EINT07S0 *((volatile unsigned int*)(0x4266C338UL))
\r
5366 #define bFM3_GPIO_EPFR06_EINT07S1 *((volatile unsigned int*)(0x4266C33CUL))
\r
5367 #define bFM3_GPIO_EPFR06_EINT08S0 *((volatile unsigned int*)(0x4266C340UL))
\r
5368 #define bFM3_GPIO_EPFR06_EINT08S1 *((volatile unsigned int*)(0x4266C344UL))
\r
5369 #define bFM3_GPIO_EPFR06_EINT09S0 *((volatile unsigned int*)(0x4266C348UL))
\r
5370 #define bFM3_GPIO_EPFR06_EINT09S1 *((volatile unsigned int*)(0x4266C34CUL))
\r
5371 #define bFM3_GPIO_EPFR06_EINT10S0 *((volatile unsigned int*)(0x4266C350UL))
\r
5372 #define bFM3_GPIO_EPFR06_EINT10S1 *((volatile unsigned int*)(0x4266C354UL))
\r
5373 #define bFM3_GPIO_EPFR06_EINT11S0 *((volatile unsigned int*)(0x4266C358UL))
\r
5374 #define bFM3_GPIO_EPFR06_EINT11S1 *((volatile unsigned int*)(0x4266C35CUL))
\r
5375 #define bFM3_GPIO_EPFR06_EINT12S0 *((volatile unsigned int*)(0x4266C360UL))
\r
5376 #define bFM3_GPIO_EPFR06_EINT12S1 *((volatile unsigned int*)(0x4266C364UL))
\r
5377 #define bFM3_GPIO_EPFR06_EINT13S0 *((volatile unsigned int*)(0x4266C368UL))
\r
5378 #define bFM3_GPIO_EPFR06_EINT13S1 *((volatile unsigned int*)(0x4266C36CUL))
\r
5379 #define bFM3_GPIO_EPFR06_EINT14S0 *((volatile unsigned int*)(0x4266C370UL))
\r
5380 #define bFM3_GPIO_EPFR06_EINT14S1 *((volatile unsigned int*)(0x4266C374UL))
\r
5381 #define bFM3_GPIO_EPFR06_EINT15S0 *((volatile unsigned int*)(0x4266C378UL))
\r
5382 #define bFM3_GPIO_EPFR06_EINT15S1 *((volatile unsigned int*)(0x4266C37CUL))
\r
5383 #define bFM3_GPIO_EPFR07_SIN0S0 *((volatile unsigned int*)(0x4266C390UL))
\r
5384 #define bFM3_GPIO_EPFR07_SIN0S1 *((volatile unsigned int*)(0x4266C394UL))
\r
5385 #define bFM3_GPIO_EPFR07_SOT0B0 *((volatile unsigned int*)(0x4266C398UL))
\r
5386 #define bFM3_GPIO_EPFR07_SOT0B1 *((volatile unsigned int*)(0x4266C39CUL))
\r
5387 #define bFM3_GPIO_EPFR07_SCK0B0 *((volatile unsigned int*)(0x4266C3A0UL))
\r
5388 #define bFM3_GPIO_EPFR07_SCK0B1 *((volatile unsigned int*)(0x4266C3A4UL))
\r
5389 #define bFM3_GPIO_EPFR07_SIN1S0 *((volatile unsigned int*)(0x4266C3A8UL))
\r
5390 #define bFM3_GPIO_EPFR07_SIN1S1 *((volatile unsigned int*)(0x4266C3ACUL))
\r
5391 #define bFM3_GPIO_EPFR07_SOT1B0 *((volatile unsigned int*)(0x4266C3B0UL))
\r
5392 #define bFM3_GPIO_EPFR07_SOT1B1 *((volatile unsigned int*)(0x4266C3B4UL))
\r
5393 #define bFM3_GPIO_EPFR07_SCK1B0 *((volatile unsigned int*)(0x4266C3B8UL))
\r
5394 #define bFM3_GPIO_EPFR07_SCK1B1 *((volatile unsigned int*)(0x4266C3BCUL))
\r
5395 #define bFM3_GPIO_EPFR07_SIN2S0 *((volatile unsigned int*)(0x4266C3C0UL))
\r
5396 #define bFM3_GPIO_EPFR07_SIN2S1 *((volatile unsigned int*)(0x4266C3C4UL))
\r
5397 #define bFM3_GPIO_EPFR07_SOT2B0 *((volatile unsigned int*)(0x4266C3C8UL))
\r
5398 #define bFM3_GPIO_EPFR07_SOT2B1 *((volatile unsigned int*)(0x4266C3CCUL))
\r
5399 #define bFM3_GPIO_EPFR07_SCK2B0 *((volatile unsigned int*)(0x4266C3D0UL))
\r
5400 #define bFM3_GPIO_EPFR07_SCK2B1 *((volatile unsigned int*)(0x4266C3D4UL))
\r
5401 #define bFM3_GPIO_EPFR07_SIN3S0 *((volatile unsigned int*)(0x4266C3D8UL))
\r
5402 #define bFM3_GPIO_EPFR07_SIN3S1 *((volatile unsigned int*)(0x4266C3DCUL))
\r
5403 #define bFM3_GPIO_EPFR07_SOT3B0 *((volatile unsigned int*)(0x4266C3E0UL))
\r
5404 #define bFM3_GPIO_EPFR07_SOT3B1 *((volatile unsigned int*)(0x4266C3E4UL))
\r
5405 #define bFM3_GPIO_EPFR07_SCK3B0 *((volatile unsigned int*)(0x4266C3E8UL))
\r
5406 #define bFM3_GPIO_EPFR07_SCK3B1 *((volatile unsigned int*)(0x4266C3ECUL))
\r
5407 #define bFM3_GPIO_EPFR08_RTS4E0 *((volatile unsigned int*)(0x4266C400UL))
\r
5408 #define bFM3_GPIO_EPFR08_RTS4E1 *((volatile unsigned int*)(0x4266C404UL))
\r
5409 #define bFM3_GPIO_EPFR08_CTS4S0 *((volatile unsigned int*)(0x4266C408UL))
\r
5410 #define bFM3_GPIO_EPFR08_CTS4S1 *((volatile unsigned int*)(0x4266C40CUL))
\r
5411 #define bFM3_GPIO_EPFR08_SIN4S0 *((volatile unsigned int*)(0x4266C410UL))
\r
5412 #define bFM3_GPIO_EPFR08_SIN4S1 *((volatile unsigned int*)(0x4266C414UL))
\r
5413 #define bFM3_GPIO_EPFR08_SOT4B0 *((volatile unsigned int*)(0x4266C418UL))
\r
5414 #define bFM3_GPIO_EPFR08_SOT4B1 *((volatile unsigned int*)(0x4266C41CUL))
\r
5415 #define bFM3_GPIO_EPFR08_SCK4B0 *((volatile unsigned int*)(0x4266C420UL))
\r
5416 #define bFM3_GPIO_EPFR08_SCK4B1 *((volatile unsigned int*)(0x4266C424UL))
\r
5417 #define bFM3_GPIO_EPFR08_SIN5S0 *((volatile unsigned int*)(0x4266C428UL))
\r
5418 #define bFM3_GPIO_EPFR08_SIN5S1 *((volatile unsigned int*)(0x4266C42CUL))
\r
5419 #define bFM3_GPIO_EPFR08_SOT5B0 *((volatile unsigned int*)(0x4266C430UL))
\r
5420 #define bFM3_GPIO_EPFR08_SOT5B1 *((volatile unsigned int*)(0x4266C434UL))
\r
5421 #define bFM3_GPIO_EPFR08_SCK5B0 *((volatile unsigned int*)(0x4266C438UL))
\r
5422 #define bFM3_GPIO_EPFR08_SCK5B1 *((volatile unsigned int*)(0x4266C43CUL))
\r
5423 #define bFM3_GPIO_EPFR08_SIN6S0 *((volatile unsigned int*)(0x4266C440UL))
\r
5424 #define bFM3_GPIO_EPFR08_SIN6S1 *((volatile unsigned int*)(0x4266C444UL))
\r
5425 #define bFM3_GPIO_EPFR08_SOT6B0 *((volatile unsigned int*)(0x4266C448UL))
\r
5426 #define bFM3_GPIO_EPFR08_SOT6B1 *((volatile unsigned int*)(0x4266C44CUL))
\r
5427 #define bFM3_GPIO_EPFR08_SCK6B0 *((volatile unsigned int*)(0x4266C450UL))
\r
5428 #define bFM3_GPIO_EPFR08_SCK6B1 *((volatile unsigned int*)(0x4266C454UL))
\r
5429 #define bFM3_GPIO_EPFR08_SIN7S0 *((volatile unsigned int*)(0x4266C458UL))
\r
5430 #define bFM3_GPIO_EPFR08_SIN7S1 *((volatile unsigned int*)(0x4266C45CUL))
\r
5431 #define bFM3_GPIO_EPFR08_SOT7B0 *((volatile unsigned int*)(0x4266C460UL))
\r
5432 #define bFM3_GPIO_EPFR08_SOT7B1 *((volatile unsigned int*)(0x4266C464UL))
\r
5433 #define bFM3_GPIO_EPFR08_SCK7B0 *((volatile unsigned int*)(0x4266C468UL))
\r
5434 #define bFM3_GPIO_EPFR08_SCK7B1 *((volatile unsigned int*)(0x4266C46CUL))
\r
5435 #define bFM3_GPIO_EPFR09_QAIN0S0 *((volatile unsigned int*)(0x4266C480UL))
\r
5436 #define bFM3_GPIO_EPFR09_QAIN0S1 *((volatile unsigned int*)(0x4266C484UL))
\r
5437 #define bFM3_GPIO_EPFR09_QBIN0S0 *((volatile unsigned int*)(0x4266C488UL))
\r
5438 #define bFM3_GPIO_EPFR09_QBIN0S1 *((volatile unsigned int*)(0x4266C48CUL))
\r
5439 #define bFM3_GPIO_EPFR09_QZIN0S0 *((volatile unsigned int*)(0x4266C490UL))
\r
5440 #define bFM3_GPIO_EPFR09_QZIN0S1 *((volatile unsigned int*)(0x4266C494UL))
\r
5441 #define bFM3_GPIO_EPFR09_QAIN1S0 *((volatile unsigned int*)(0x4266C498UL))
\r
5442 #define bFM3_GPIO_EPFR09_QAIN1S1 *((volatile unsigned int*)(0x4266C49CUL))
\r
5443 #define bFM3_GPIO_EPFR09_QBIN1S0 *((volatile unsigned int*)(0x4266C4A0UL))
\r
5444 #define bFM3_GPIO_EPFR09_QBIN1S1 *((volatile unsigned int*)(0x4266C4A4UL))
\r
5445 #define bFM3_GPIO_EPFR09_QZIN1S0 *((volatile unsigned int*)(0x4266C4A8UL))
\r
5446 #define bFM3_GPIO_EPFR09_QZIN1S1 *((volatile unsigned int*)(0x4266C4ACUL))
\r
5447 #define bFM3_GPIO_EPFR09_ADTRG0S0 *((volatile unsigned int*)(0x4266C4B0UL))
\r
5448 #define bFM3_GPIO_EPFR09_ADTRG0S1 *((volatile unsigned int*)(0x4266C4B4UL))
\r
5449 #define bFM3_GPIO_EPFR09_ADTRG0S2 *((volatile unsigned int*)(0x4266C4B8UL))
\r
5450 #define bFM3_GPIO_EPFR09_ADTRG0S3 *((volatile unsigned int*)(0x4266C4BCUL))
\r
5451 #define bFM3_GPIO_EPFR09_ADTRG1S0 *((volatile unsigned int*)(0x4266C4C0UL))
\r
5452 #define bFM3_GPIO_EPFR09_ADTRG1S1 *((volatile unsigned int*)(0x4266C4C4UL))
\r
5453 #define bFM3_GPIO_EPFR09_ADTRG1S2 *((volatile unsigned int*)(0x4266C4C8UL))
\r
5454 #define bFM3_GPIO_EPFR09_ADTRG1S3 *((volatile unsigned int*)(0x4266C4CCUL))
\r
5455 #define bFM3_GPIO_EPFR09_ADTRG2S0 *((volatile unsigned int*)(0x4266C4D0UL))
\r
5456 #define bFM3_GPIO_EPFR09_ADTRG2S1 *((volatile unsigned int*)(0x4266C4D4UL))
\r
5457 #define bFM3_GPIO_EPFR09_ADTRG2S2 *((volatile unsigned int*)(0x4266C4D8UL))
\r
5458 #define bFM3_GPIO_EPFR09_ADTRG2S3 *((volatile unsigned int*)(0x4266C4DCUL))
\r
5459 #define bFM3_GPIO_EPFR09_CRX0S0 *((volatile unsigned int*)(0x4266C4E0UL))
\r
5460 #define bFM3_GPIO_EPFR09_CRX0S1 *((volatile unsigned int*)(0x4266C4E4UL))
\r
5461 #define bFM3_GPIO_EPFR09_CTX0E0 *((volatile unsigned int*)(0x4266C4E8UL))
\r
5462 #define bFM3_GPIO_EPFR09_CTX0E1 *((volatile unsigned int*)(0x4266C4ECUL))
\r
5463 #define bFM3_GPIO_EPFR09_CRX1S0 *((volatile unsigned int*)(0x4266C4F0UL))
\r
5464 #define bFM3_GPIO_EPFR09_CRX1S1 *((volatile unsigned int*)(0x4266C4F4UL))
\r
5465 #define bFM3_GPIO_EPFR09_CTX1E0 *((volatile unsigned int*)(0x4266C4F8UL))
\r
5466 #define bFM3_GPIO_EPFR09_CTX1E1 *((volatile unsigned int*)(0x4266C4FCUL))
\r
5467 #define bFM3_GPIO_EPFR10_UEDEFB *((volatile unsigned int*)(0x4266C500UL))
\r
5468 #define bFM3_GPIO_EPFR10_UEDTHB *((volatile unsigned int*)(0x4266C504UL))
\r
5469 #define bFM3_GPIO_EPFR10_TESTB *((volatile unsigned int*)(0x4266C508UL))
\r
5470 #define bFM3_GPIO_EPFR10_UEWEXE *((volatile unsigned int*)(0x4266C50CUL))
\r
5471 #define bFM3_GPIO_EPFR10_UEDQME *((volatile unsigned int*)(0x4266C510UL))
\r
5472 #define bFM3_GPIO_EPFR10_UEOEXE *((volatile unsigned int*)(0x4266C514UL))
\r
5473 #define bFM3_GPIO_EPFR10_UEFLSE *((volatile unsigned int*)(0x4266C518UL))
\r
5474 #define bFM3_GPIO_EPFR10_UECS1E *((volatile unsigned int*)(0x4266C51CUL))
\r
5475 #define bFM3_GPIO_EPFR10_UECS2E *((volatile unsigned int*)(0x4266C520UL))
\r
5476 #define bFM3_GPIO_EPFR10_UECS3E *((volatile unsigned int*)(0x4266C524UL))
\r
5477 #define bFM3_GPIO_EPFR10_UECS4E *((volatile unsigned int*)(0x4266C528UL))
\r
5478 #define bFM3_GPIO_EPFR10_UECS5E *((volatile unsigned int*)(0x4266C52CUL))
\r
5479 #define bFM3_GPIO_EPFR10_UECS6E *((volatile unsigned int*)(0x4266C530UL))
\r
5480 #define bFM3_GPIO_EPFR10_UECS7E *((volatile unsigned int*)(0x4266C534UL))
\r
5481 #define bFM3_GPIO_EPFR10_UEAOOE *((volatile unsigned int*)(0x4266C538UL))
\r
5482 #define bFM3_GPIO_EPFR10_UEA08E *((volatile unsigned int*)(0x4266C53CUL))
\r
5483 #define bFM3_GPIO_EPFR10_UEA09E *((volatile unsigned int*)(0x4266C540UL))
\r
5484 #define bFM3_GPIO_EPFR10_UEA10E *((volatile unsigned int*)(0x4266C544UL))
\r
5485 #define bFM3_GPIO_EPFR10_UEA11E *((volatile unsigned int*)(0x4266C548UL))
\r
5486 #define bFM3_GPIO_EPFR10_UEA12E *((volatile unsigned int*)(0x4266C54CUL))
\r
5487 #define bFM3_GPIO_EPFR10_UEA13E *((volatile unsigned int*)(0x4266C550UL))
\r
5488 #define bFM3_GPIO_EPFR10_UEA14E *((volatile unsigned int*)(0x4266C554UL))
\r
5489 #define bFM3_GPIO_EPFR10_UEA15E *((volatile unsigned int*)(0x4266C558UL))
\r
5490 #define bFM3_GPIO_EPFR10_UEA16E *((volatile unsigned int*)(0x4266C55CUL))
\r
5491 #define bFM3_GPIO_EPFR10_UEA17E *((volatile unsigned int*)(0x4266C560UL))
\r
5492 #define bFM3_GPIO_EPFR10_UEA18E *((volatile unsigned int*)(0x4266C564UL))
\r
5493 #define bFM3_GPIO_EPFR10_UEA19E *((volatile unsigned int*)(0x4266C568UL))
\r
5494 #define bFM3_GPIO_EPFR10_UEA20E *((volatile unsigned int*)(0x4266C56CUL))
\r
5495 #define bFM3_GPIO_EPFR10_UEA21E *((volatile unsigned int*)(0x4266C570UL))
\r
5496 #define bFM3_GPIO_EPFR10_UEA22E *((volatile unsigned int*)(0x4266C574UL))
\r
5497 #define bFM3_GPIO_EPFR10_UEA23E *((volatile unsigned int*)(0x4266C578UL))
\r
5498 #define bFM3_GPIO_EPFR10_UEA24E *((volatile unsigned int*)(0x4266C57CUL))
\r
5500 /* Low voltage detection registers */
\r
5501 #define bFM3_LVD_LVD_CTL_SVHI0 *((volatile unsigned int*)(0x426A0008UL))
\r
5502 #define bFM3_LVD_LVD_CTL_SVHI1 *((volatile unsigned int*)(0x426A000CUL))
\r
5503 #define bFM3_LVD_LVD_CTL_SVHI2 *((volatile unsigned int*)(0x426A0010UL))
\r
5504 #define bFM3_LVD_LVD_CTL_SVHI3 *((volatile unsigned int*)(0x426A0014UL))
\r
5505 #define bFM3_LVD_LVD_CTL_LVDIE *((volatile unsigned int*)(0x426A001CUL))
\r
5506 #define bFM3_LVD_LVD_STR_LVDIR *((volatile unsigned int*)(0x426A009CUL))
\r
5507 #define bFM3_LVD_LVD_CLR_LVDCL *((volatile unsigned int*)(0x426A011CUL))
\r
5508 #define bFM3_LVD_LVD_STR2_LVDIRDY *((volatile unsigned int*)(0x426A021CUL))
\r
5510 /* USB clock registers */
\r
5511 #define bFM3_USBCLK_UCCR_UCEN *((volatile unsigned int*)(0x426C0000UL))
\r
5512 #define bFM3_USBCLK_UCCR_UCSEL *((volatile unsigned int*)(0x426C0004UL))
\r
5513 #define bFM3_USBCLK_UPCR1_UPLLEN *((volatile unsigned int*)(0x426C0080UL))
\r
5514 #define bFM3_USBCLK_UPCR1_UPINC *((volatile unsigned int*)(0x426C0084UL))
\r
5515 #define bFM3_USBCLK_UPCR2_UPOWT0 *((volatile unsigned int*)(0x426C0100UL))
\r
5516 #define bFM3_USBCLK_UPCR2_UPOWT1 *((volatile unsigned int*)(0x426C0104UL))
\r
5517 #define bFM3_USBCLK_UPCR2_UPOWT2 *((volatile unsigned int*)(0x426C0108UL))
\r
5518 #define bFM3_USBCLK_UPCR3_UPLLK0 *((volatile unsigned int*)(0x426C0180UL))
\r
5519 #define bFM3_USBCLK_UPCR3_UPLLK1 *((volatile unsigned int*)(0x426C0184UL))
\r
5520 #define bFM3_USBCLK_UPCR3_UPLLK2 *((volatile unsigned int*)(0x426C0188UL))
\r
5521 #define bFM3_USBCLK_UPCR3_UPLLK3 *((volatile unsigned int*)(0x426C018CUL))
\r
5522 #define bFM3_USBCLK_UPCR3_UPLLK4 *((volatile unsigned int*)(0x426C0190UL))
\r
5523 #define bFM3_USBCLK_UPCR4_UPLLN0 *((volatile unsigned int*)(0x426C0200UL))
\r
5524 #define bFM3_USBCLK_UPCR4_UPLLN1 *((volatile unsigned int*)(0x426C0204UL))
\r
5525 #define bFM3_USBCLK_UPCR4_UPLLN2 *((volatile unsigned int*)(0x426C0208UL))
\r
5526 #define bFM3_USBCLK_UPCR4_UPLLN3 *((volatile unsigned int*)(0x426C020CUL))
\r
5527 #define bFM3_USBCLK_UPCR4_UPLLN4 *((volatile unsigned int*)(0x426C0210UL))
\r
5528 #define bFM3_USBCLK_UP_STR_UPRDY *((volatile unsigned int*)(0x426C0280UL))
\r
5529 #define bFM3_USBCLK_UPINT_ENR_UPCSE *((volatile unsigned int*)(0x426C0300UL))
\r
5530 #define bFM3_USBCLK_UPINT_CLR_UPCSC *((volatile unsigned int*)(0x426C0380UL))
\r
5531 #define bFM3_USBCLK_UPINT_STR_UPCSI *((volatile unsigned int*)(0x426C0400UL))
\r
5532 #define bFM3_USBCLK_USBEN_USBEN *((volatile unsigned int*)(0x426C0600UL))
\r
5534 /* CAN prescaler register */
\r
5535 #define bFM3_CANPRES_CANPRE_CANPRE0 *((volatile unsigned int*)(0x426E0000UL))
\r
5536 #define bFM3_CANPRES_CANPRE_CANPRE1 *((volatile unsigned int*)(0x426E0004UL))
\r
5537 #define bFM3_CANPRES_CANPRE_CANPRE2 *((volatile unsigned int*)(0x426E0008UL))
\r
5538 #define bFM3_CANPRES_CANPRE_CANPRE3 *((volatile unsigned int*)(0x426E000CUL))
\r
5540 /* UART asynchronous channel 0 registers */
\r
5541 #define bFM3_MFS0_UART_SMR_SOE *((volatile unsigned int*)(0x42700000UL))
\r
5542 #define bFM3_MFS0_UART_SMR_BDS *((volatile unsigned int*)(0x42700008UL))
\r
5543 #define bFM3_MFS0_UART_SMR_SBL *((volatile unsigned int*)(0x4270000CUL))
\r
5544 #define bFM3_MFS0_UART_SMR_WUCR *((volatile unsigned int*)(0x42700010UL))
\r
5545 #define bFM3_MFS0_UART_SMR_MD0 *((volatile unsigned int*)(0x42700014UL))
\r
5546 #define bFM3_MFS0_UART_SMR_MD1 *((volatile unsigned int*)(0x42700018UL))
\r
5547 #define bFM3_MFS0_UART_SMR_MD2 *((volatile unsigned int*)(0x4270001CUL))
\r
5548 #define bFM3_MFS0_UART_SCR_TXE *((volatile unsigned int*)(0x42700020UL))
\r
5549 #define bFM3_MFS0_UART_SCR_RXE *((volatile unsigned int*)(0x42700024UL))
\r
5550 #define bFM3_MFS0_UART_SCR_TBIE *((volatile unsigned int*)(0x42700028UL))
\r
5551 #define bFM3_MFS0_UART_SCR_TIE *((volatile unsigned int*)(0x4270002CUL))
\r
5552 #define bFM3_MFS0_UART_SCR_RIE *((volatile unsigned int*)(0x42700030UL))
\r
5553 #define bFM3_MFS0_UART_SCR_UPCL *((volatile unsigned int*)(0x4270003CUL))
\r
5554 #define bFM3_MFS0_UART_ESCR_L0 *((volatile unsigned int*)(0x42700080UL))
\r
5555 #define bFM3_MFS0_UART_ESCR_L1 *((volatile unsigned int*)(0x42700084UL))
\r
5556 #define bFM3_MFS0_UART_ESCR_L2 *((volatile unsigned int*)(0x42700088UL))
\r
5557 #define bFM3_MFS0_UART_ESCR_P *((volatile unsigned int*)(0x4270008CUL))
\r
5558 #define bFM3_MFS0_UART_ESCR_PEN *((volatile unsigned int*)(0x42700090UL))
\r
5559 #define bFM3_MFS0_UART_ESCR_INV *((volatile unsigned int*)(0x42700094UL))
\r
5560 #define bFM3_MFS0_UART_ESCR_ESBL *((volatile unsigned int*)(0x42700098UL))
\r
5561 #define bFM3_MFS0_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270009CUL))
\r
5562 #define bFM3_MFS0_UART_SSR_TBI *((volatile unsigned int*)(0x427000A0UL))
\r
5563 #define bFM3_MFS0_UART_SSR_TDRE *((volatile unsigned int*)(0x427000A4UL))
\r
5564 #define bFM3_MFS0_UART_SSR_RDRF *((volatile unsigned int*)(0x427000A8UL))
\r
5565 #define bFM3_MFS0_UART_SSR_ORE *((volatile unsigned int*)(0x427000ACUL))
\r
5566 #define bFM3_MFS0_UART_SSR_FRE *((volatile unsigned int*)(0x427000B0UL))
\r
5567 #define bFM3_MFS0_UART_SSR_PE *((volatile unsigned int*)(0x427000B4UL))
\r
5568 #define bFM3_MFS0_UART_SSR_REC *((volatile unsigned int*)(0x427000BCUL))
\r
5569 #define bFM3_MFS0_UART_RDR_AD *((volatile unsigned int*)(0x42700120UL))
\r
5570 #define bFM3_MFS0_UART_TDR_AD *((volatile unsigned int*)(0x42700120UL))
\r
5571 #define bFM3_MFS0_UART_BGR_EXT *((volatile unsigned int*)(0x427001BCUL))
\r
5572 #define bFM3_MFS0_UART_BGR1_EXT *((volatile unsigned int*)(0x427001BCUL))
\r
5574 /* UART synchronous channel 0 registers */
\r
5575 #define bFM3_MFS0_CSIO_SMR_SOE *((volatile unsigned int*)(0x42700000UL))
\r
5576 #define bFM3_MFS0_CSIO_SMR_SCKE *((volatile unsigned int*)(0x42700004UL))
\r
5577 #define bFM3_MFS0_CSIO_SMR_BDS *((volatile unsigned int*)(0x42700008UL))
\r
5578 #define bFM3_MFS0_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270000CUL))
\r
5579 #define bFM3_MFS0_CSIO_SMR_WUCR *((volatile unsigned int*)(0x42700010UL))
\r
5580 #define bFM3_MFS0_CSIO_SMR_MD0 *((volatile unsigned int*)(0x42700014UL))
\r
5581 #define bFM3_MFS0_CSIO_SMR_MD1 *((volatile unsigned int*)(0x42700018UL))
\r
5582 #define bFM3_MFS0_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270001CUL))
\r
5583 #define bFM3_MFS0_CSIO_SCR_TXE *((volatile unsigned int*)(0x42700020UL))
\r
5584 #define bFM3_MFS0_CSIO_SCR_RXE *((volatile unsigned int*)(0x42700024UL))
\r
5585 #define bFM3_MFS0_CSIO_SCR_TBIE *((volatile unsigned int*)(0x42700028UL))
\r
5586 #define bFM3_MFS0_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270002CUL))
\r
5587 #define bFM3_MFS0_CSIO_SCR_RIE *((volatile unsigned int*)(0x42700030UL))
\r
5588 #define bFM3_MFS0_CSIO_SCR_SPI *((volatile unsigned int*)(0x42700034UL))
\r
5589 #define bFM3_MFS0_CSIO_SCR_MS *((volatile unsigned int*)(0x42700038UL))
\r
5590 #define bFM3_MFS0_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270003CUL))
\r
5591 #define bFM3_MFS0_CSIO_ESCR_L0 *((volatile unsigned int*)(0x42700080UL))
\r
5592 #define bFM3_MFS0_CSIO_ESCR_L1 *((volatile unsigned int*)(0x42700084UL))
\r
5593 #define bFM3_MFS0_CSIO_ESCR_L2 *((volatile unsigned int*)(0x42700088UL))
\r
5594 #define bFM3_MFS0_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270008CUL))
\r
5595 #define bFM3_MFS0_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x42700090UL))
\r
5596 #define bFM3_MFS0_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270009CUL))
\r
5597 #define bFM3_MFS0_CSIO_SSR_TBI *((volatile unsigned int*)(0x427000A0UL))
\r
5598 #define bFM3_MFS0_CSIO_SSR_TDRE *((volatile unsigned int*)(0x427000A4UL))
\r
5599 #define bFM3_MFS0_CSIO_SSR_RDRF *((volatile unsigned int*)(0x427000A8UL))
\r
5600 #define bFM3_MFS0_CSIO_SSR_ORE *((volatile unsigned int*)(0x427000ACUL))
\r
5601 #define bFM3_MFS0_CSIO_SSR_REC *((volatile unsigned int*)(0x427000BCUL))
\r
5603 /* UART LIN channel 0 registers */
\r
5604 #define bFM3_MFS0_LIN_SMR_SOE *((volatile unsigned int*)(0x42700000UL))
\r
5605 #define bFM3_MFS0_LIN_SMR_SBL *((volatile unsigned int*)(0x4270000CUL))
\r
5606 #define bFM3_MFS0_LIN_SMR_WUCR *((volatile unsigned int*)(0x42700010UL))
\r
5607 #define bFM3_MFS0_LIN_SMR_MD0 *((volatile unsigned int*)(0x42700014UL))
\r
5608 #define bFM3_MFS0_LIN_SMR_MD1 *((volatile unsigned int*)(0x42700018UL))
\r
5609 #define bFM3_MFS0_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270001CUL))
\r
5610 #define bFM3_MFS0_LIN_SCR_TXE *((volatile unsigned int*)(0x42700020UL))
\r
5611 #define bFM3_MFS0_LIN_SCR_RXE *((volatile unsigned int*)(0x42700024UL))
\r
5612 #define bFM3_MFS0_LIN_SCR_TBIE *((volatile unsigned int*)(0x42700028UL))
\r
5613 #define bFM3_MFS0_LIN_SCR_TIE *((volatile unsigned int*)(0x4270002CUL))
\r
5614 #define bFM3_MFS0_LIN_SCR_RIE *((volatile unsigned int*)(0x42700030UL))
\r
5615 #define bFM3_MFS0_LIN_SCR_LBR *((volatile unsigned int*)(0x42700034UL))
\r
5616 #define bFM3_MFS0_LIN_SCR_MS *((volatile unsigned int*)(0x42700038UL))
\r
5617 #define bFM3_MFS0_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270003CUL))
\r
5618 #define bFM3_MFS0_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x42700080UL))
\r
5619 #define bFM3_MFS0_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x42700084UL))
\r
5620 #define bFM3_MFS0_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x42700088UL))
\r
5621 #define bFM3_MFS0_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270008CUL))
\r
5622 #define bFM3_MFS0_LIN_ESCR_LBIE *((volatile unsigned int*)(0x42700090UL))
\r
5623 #define bFM3_MFS0_LIN_ESCR_ESBL *((volatile unsigned int*)(0x42700098UL))
\r
5624 #define bFM3_MFS0_LIN_SSR_TBI *((volatile unsigned int*)(0x427000A0UL))
\r
5625 #define bFM3_MFS0_LIN_SSR_TDRE *((volatile unsigned int*)(0x427000A4UL))
\r
5626 #define bFM3_MFS0_LIN_SSR_RDRF *((volatile unsigned int*)(0x427000A8UL))
\r
5627 #define bFM3_MFS0_LIN_SSR_ORE *((volatile unsigned int*)(0x427000ACUL))
\r
5628 #define bFM3_MFS0_LIN_SSR_FRE *((volatile unsigned int*)(0x427000B0UL))
\r
5629 #define bFM3_MFS0_LIN_SSR_LBD *((volatile unsigned int*)(0x427000B4UL))
\r
5630 #define bFM3_MFS0_LIN_SSR_REC *((volatile unsigned int*)(0x427000BCUL))
\r
5631 #define bFM3_MFS0_LIN_BGR_EXT *((volatile unsigned int*)(0x427001BCUL))
\r
5632 #define bFM3_MFS0_LIN_BGR1_EXT *((volatile unsigned int*)(0x427001BCUL))
\r
5634 /* I2C channel 0 registers */
\r
5635 #define bFM3_MFS0_I2C_SMR_ITST0 *((volatile unsigned int*)(0x42700000UL))
\r
5636 #define bFM3_MFS0_I2C_SMR_ITST1 *((volatile unsigned int*)(0x42700004UL))
\r
5637 #define bFM3_MFS0_I2C_SMR_TIE *((volatile unsigned int*)(0x42700008UL))
\r
5638 #define bFM3_MFS0_I2C_SMR_RIE *((volatile unsigned int*)(0x4270000CUL))
\r
5639 #define bFM3_MFS0_I2C_SMR_WUCR *((volatile unsigned int*)(0x42700010UL))
\r
5640 #define bFM3_MFS0_I2C_SMR_MD0 *((volatile unsigned int*)(0x42700014UL))
\r
5641 #define bFM3_MFS0_I2C_SMR_MD1 *((volatile unsigned int*)(0x42700018UL))
\r
5642 #define bFM3_MFS0_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270001CUL))
\r
5643 #define bFM3_MFS0_I2C_IBCR_INT *((volatile unsigned int*)(0x42700020UL))
\r
5644 #define bFM3_MFS0_I2C_IBCR_BER *((volatile unsigned int*)(0x42700024UL))
\r
5645 #define bFM3_MFS0_I2C_IBCR_INTE *((volatile unsigned int*)(0x42700028UL))
\r
5646 #define bFM3_MFS0_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270002CUL))
\r
5647 #define bFM3_MFS0_I2C_IBCR_WSEL *((volatile unsigned int*)(0x42700030UL))
\r
5648 #define bFM3_MFS0_I2C_IBCR_ACKE *((volatile unsigned int*)(0x42700034UL))
\r
5649 #define bFM3_MFS0_I2C_IBCR_ACT *((volatile unsigned int*)(0x42700038UL))
\r
5650 #define bFM3_MFS0_I2C_IBCR_SCC *((volatile unsigned int*)(0x42700038UL))
\r
5651 #define bFM3_MFS0_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270003CUL))
\r
5652 #define bFM3_MFS0_I2C_IBSR_BB *((volatile unsigned int*)(0x42700080UL))
\r
5653 #define bFM3_MFS0_I2C_IBSR_SPC *((volatile unsigned int*)(0x42700084UL))
\r
5654 #define bFM3_MFS0_I2C_IBSR_RSC *((volatile unsigned int*)(0x42700088UL))
\r
5655 #define bFM3_MFS0_I2C_IBSR_AL *((volatile unsigned int*)(0x4270008CUL))
\r
5656 #define bFM3_MFS0_I2C_IBSR_TRX *((volatile unsigned int*)(0x42700090UL))
\r
5657 #define bFM3_MFS0_I2C_IBSR_RSA *((volatile unsigned int*)(0x42700094UL))
\r
5658 #define bFM3_MFS0_I2C_IBSR_RACK *((volatile unsigned int*)(0x42700098UL))
\r
5659 #define bFM3_MFS0_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270009CUL))
\r
5660 #define bFM3_MFS0_I2C_SSR_TBI *((volatile unsigned int*)(0x427000A0UL))
\r
5661 #define bFM3_MFS0_I2C_SSR_TDRE *((volatile unsigned int*)(0x427000A4UL))
\r
5662 #define bFM3_MFS0_I2C_SSR_RDRF *((volatile unsigned int*)(0x427000A8UL))
\r
5663 #define bFM3_MFS0_I2C_SSR_ORE *((volatile unsigned int*)(0x427000ACUL))
\r
5664 #define bFM3_MFS0_I2C_SSR_TBIE *((volatile unsigned int*)(0x427000B0UL))
\r
5665 #define bFM3_MFS0_I2C_SSR_DMA *((volatile unsigned int*)(0x427000B4UL))
\r
5666 #define bFM3_MFS0_I2C_SSR_TSET *((volatile unsigned int*)(0x427000B8UL))
\r
5667 #define bFM3_MFS0_I2C_SSR_REC *((volatile unsigned int*)(0x427000BCUL))
\r
5668 #define bFM3_MFS0_I2C_ISBA_SA0 *((volatile unsigned int*)(0x42700200UL))
\r
5669 #define bFM3_MFS0_I2C_ISBA_SA1 *((volatile unsigned int*)(0x42700204UL))
\r
5670 #define bFM3_MFS0_I2C_ISBA_SA2 *((volatile unsigned int*)(0x42700208UL))
\r
5671 #define bFM3_MFS0_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270020CUL))
\r
5672 #define bFM3_MFS0_I2C_ISBA_SA4 *((volatile unsigned int*)(0x42700210UL))
\r
5673 #define bFM3_MFS0_I2C_ISBA_SA5 *((volatile unsigned int*)(0x42700214UL))
\r
5674 #define bFM3_MFS0_I2C_ISBA_SA6 *((volatile unsigned int*)(0x42700218UL))
\r
5675 #define bFM3_MFS0_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270021CUL))
\r
5676 #define bFM3_MFS0_I2C_ISMK_SM0 *((volatile unsigned int*)(0x42700220UL))
\r
5677 #define bFM3_MFS0_I2C_ISMK_SM1 *((volatile unsigned int*)(0x42700224UL))
\r
5678 #define bFM3_MFS0_I2C_ISMK_SM2 *((volatile unsigned int*)(0x42700228UL))
\r
5679 #define bFM3_MFS0_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270022CUL))
\r
5680 #define bFM3_MFS0_I2C_ISMK_SM4 *((volatile unsigned int*)(0x42700230UL))
\r
5681 #define bFM3_MFS0_I2C_ISMK_SM5 *((volatile unsigned int*)(0x42700234UL))
\r
5682 #define bFM3_MFS0_I2C_ISMK_SM6 *((volatile unsigned int*)(0x42700238UL))
\r
5683 #define bFM3_MFS0_I2C_ISMK_EN *((volatile unsigned int*)(0x4270023CUL))
\r
5685 /* UART asynchronous channel 1 registers */
\r
5686 #define bFM3_MFS1_UART_SMR_SOE *((volatile unsigned int*)(0x42702000UL))
\r
5687 #define bFM3_MFS1_UART_SMR_BDS *((volatile unsigned int*)(0x42702008UL))
\r
5688 #define bFM3_MFS1_UART_SMR_SBL *((volatile unsigned int*)(0x4270200CUL))
\r
5689 #define bFM3_MFS1_UART_SMR_WUCR *((volatile unsigned int*)(0x42702010UL))
\r
5690 #define bFM3_MFS1_UART_SMR_MD0 *((volatile unsigned int*)(0x42702014UL))
\r
5691 #define bFM3_MFS1_UART_SMR_MD1 *((volatile unsigned int*)(0x42702018UL))
\r
5692 #define bFM3_MFS1_UART_SMR_MD2 *((volatile unsigned int*)(0x4270201CUL))
\r
5693 #define bFM3_MFS1_UART_SCR_TXE *((volatile unsigned int*)(0x42702020UL))
\r
5694 #define bFM3_MFS1_UART_SCR_RXE *((volatile unsigned int*)(0x42702024UL))
\r
5695 #define bFM3_MFS1_UART_SCR_TBIE *((volatile unsigned int*)(0x42702028UL))
\r
5696 #define bFM3_MFS1_UART_SCR_TIE *((volatile unsigned int*)(0x4270202CUL))
\r
5697 #define bFM3_MFS1_UART_SCR_RIE *((volatile unsigned int*)(0x42702030UL))
\r
5698 #define bFM3_MFS1_UART_SCR_UPCL *((volatile unsigned int*)(0x4270203CUL))
\r
5699 #define bFM3_MFS1_UART_ESCR_L0 *((volatile unsigned int*)(0x42702080UL))
\r
5700 #define bFM3_MFS1_UART_ESCR_L1 *((volatile unsigned int*)(0x42702084UL))
\r
5701 #define bFM3_MFS1_UART_ESCR_L2 *((volatile unsigned int*)(0x42702088UL))
\r
5702 #define bFM3_MFS1_UART_ESCR_P *((volatile unsigned int*)(0x4270208CUL))
\r
5703 #define bFM3_MFS1_UART_ESCR_PEN *((volatile unsigned int*)(0x42702090UL))
\r
5704 #define bFM3_MFS1_UART_ESCR_INV *((volatile unsigned int*)(0x42702094UL))
\r
5705 #define bFM3_MFS1_UART_ESCR_ESBL *((volatile unsigned int*)(0x42702098UL))
\r
5706 #define bFM3_MFS1_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270209CUL))
\r
5707 #define bFM3_MFS1_UART_SSR_TBI *((volatile unsigned int*)(0x427020A0UL))
\r
5708 #define bFM3_MFS1_UART_SSR_TDRE *((volatile unsigned int*)(0x427020A4UL))
\r
5709 #define bFM3_MFS1_UART_SSR_RDRF *((volatile unsigned int*)(0x427020A8UL))
\r
5710 #define bFM3_MFS1_UART_SSR_ORE *((volatile unsigned int*)(0x427020ACUL))
\r
5711 #define bFM3_MFS1_UART_SSR_FRE *((volatile unsigned int*)(0x427020B0UL))
\r
5712 #define bFM3_MFS1_UART_SSR_PE *((volatile unsigned int*)(0x427020B4UL))
\r
5713 #define bFM3_MFS1_UART_SSR_REC *((volatile unsigned int*)(0x427020BCUL))
\r
5714 #define bFM3_MFS1_UART_RDR_AD *((volatile unsigned int*)(0x42702120UL))
\r
5715 #define bFM3_MFS1_UART_TDR_AD *((volatile unsigned int*)(0x42702120UL))
\r
5716 #define bFM3_MFS1_UART_BGR_EXT *((volatile unsigned int*)(0x427021BCUL))
\r
5717 #define bFM3_MFS1_UART_BGR1_EXT *((volatile unsigned int*)(0x427021BCUL))
\r
5719 /* UART synchronous channel 1 registers */
\r
5720 #define bFM3_MFS1_CSIO_SMR_SOE *((volatile unsigned int*)(0x42702000UL))
\r
5721 #define bFM3_MFS1_CSIO_SMR_SCKE *((volatile unsigned int*)(0x42702004UL))
\r
5722 #define bFM3_MFS1_CSIO_SMR_BDS *((volatile unsigned int*)(0x42702008UL))
\r
5723 #define bFM3_MFS1_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270200CUL))
\r
5724 #define bFM3_MFS1_CSIO_SMR_WUCR *((volatile unsigned int*)(0x42702010UL))
\r
5725 #define bFM3_MFS1_CSIO_SMR_MD0 *((volatile unsigned int*)(0x42702014UL))
\r
5726 #define bFM3_MFS1_CSIO_SMR_MD1 *((volatile unsigned int*)(0x42702018UL))
\r
5727 #define bFM3_MFS1_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270201CUL))
\r
5728 #define bFM3_MFS1_CSIO_SCR_TXE *((volatile unsigned int*)(0x42702020UL))
\r
5729 #define bFM3_MFS1_CSIO_SCR_RXE *((volatile unsigned int*)(0x42702024UL))
\r
5730 #define bFM3_MFS1_CSIO_SCR_TBIE *((volatile unsigned int*)(0x42702028UL))
\r
5731 #define bFM3_MFS1_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270202CUL))
\r
5732 #define bFM3_MFS1_CSIO_SCR_RIE *((volatile unsigned int*)(0x42702030UL))
\r
5733 #define bFM3_MFS1_CSIO_SCR_SPI *((volatile unsigned int*)(0x42702034UL))
\r
5734 #define bFM3_MFS1_CSIO_SCR_MS *((volatile unsigned int*)(0x42702038UL))
\r
5735 #define bFM3_MFS1_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270203CUL))
\r
5736 #define bFM3_MFS1_CSIO_ESCR_L0 *((volatile unsigned int*)(0x42702080UL))
\r
5737 #define bFM3_MFS1_CSIO_ESCR_L1 *((volatile unsigned int*)(0x42702084UL))
\r
5738 #define bFM3_MFS1_CSIO_ESCR_L2 *((volatile unsigned int*)(0x42702088UL))
\r
5739 #define bFM3_MFS1_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270208CUL))
\r
5740 #define bFM3_MFS1_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x42702090UL))
\r
5741 #define bFM3_MFS1_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270209CUL))
\r
5742 #define bFM3_MFS1_CSIO_SSR_TBI *((volatile unsigned int*)(0x427020A0UL))
\r
5743 #define bFM3_MFS1_CSIO_SSR_TDRE *((volatile unsigned int*)(0x427020A4UL))
\r
5744 #define bFM3_MFS1_CSIO_SSR_RDRF *((volatile unsigned int*)(0x427020A8UL))
\r
5745 #define bFM3_MFS1_CSIO_SSR_ORE *((volatile unsigned int*)(0x427020ACUL))
\r
5746 #define bFM3_MFS1_CSIO_SSR_REC *((volatile unsigned int*)(0x427020BCUL))
\r
5748 /* UART LIN channel 1 registers */
\r
5749 #define bFM3_MFS1_LIN_SMR_SOE *((volatile unsigned int*)(0x42702000UL))
\r
5750 #define bFM3_MFS1_LIN_SMR_SBL *((volatile unsigned int*)(0x4270200CUL))
\r
5751 #define bFM3_MFS1_LIN_SMR_WUCR *((volatile unsigned int*)(0x42702010UL))
\r
5752 #define bFM3_MFS1_LIN_SMR_MD0 *((volatile unsigned int*)(0x42702014UL))
\r
5753 #define bFM3_MFS1_LIN_SMR_MD1 *((volatile unsigned int*)(0x42702018UL))
\r
5754 #define bFM3_MFS1_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270201CUL))
\r
5755 #define bFM3_MFS1_LIN_SCR_TXE *((volatile unsigned int*)(0x42702020UL))
\r
5756 #define bFM3_MFS1_LIN_SCR_RXE *((volatile unsigned int*)(0x42702024UL))
\r
5757 #define bFM3_MFS1_LIN_SCR_TBIE *((volatile unsigned int*)(0x42702028UL))
\r
5758 #define bFM3_MFS1_LIN_SCR_TIE *((volatile unsigned int*)(0x4270202CUL))
\r
5759 #define bFM3_MFS1_LIN_SCR_RIE *((volatile unsigned int*)(0x42702030UL))
\r
5760 #define bFM3_MFS1_LIN_SCR_LBR *((volatile unsigned int*)(0x42702034UL))
\r
5761 #define bFM3_MFS1_LIN_SCR_MS *((volatile unsigned int*)(0x42702038UL))
\r
5762 #define bFM3_MFS1_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270203CUL))
\r
5763 #define bFM3_MFS1_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x42702080UL))
\r
5764 #define bFM3_MFS1_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x42702084UL))
\r
5765 #define bFM3_MFS1_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x42702088UL))
\r
5766 #define bFM3_MFS1_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270208CUL))
\r
5767 #define bFM3_MFS1_LIN_ESCR_LBIE *((volatile unsigned int*)(0x42702090UL))
\r
5768 #define bFM3_MFS1_LIN_ESCR_ESBL *((volatile unsigned int*)(0x42702098UL))
\r
5769 #define bFM3_MFS1_LIN_SSR_TBI *((volatile unsigned int*)(0x427020A0UL))
\r
5770 #define bFM3_MFS1_LIN_SSR_TDRE *((volatile unsigned int*)(0x427020A4UL))
\r
5771 #define bFM3_MFS1_LIN_SSR_RDRF *((volatile unsigned int*)(0x427020A8UL))
\r
5772 #define bFM3_MFS1_LIN_SSR_ORE *((volatile unsigned int*)(0x427020ACUL))
\r
5773 #define bFM3_MFS1_LIN_SSR_FRE *((volatile unsigned int*)(0x427020B0UL))
\r
5774 #define bFM3_MFS1_LIN_SSR_LBD *((volatile unsigned int*)(0x427020B4UL))
\r
5775 #define bFM3_MFS1_LIN_SSR_REC *((volatile unsigned int*)(0x427020BCUL))
\r
5776 #define bFM3_MFS1_LIN_BGR_EXT *((volatile unsigned int*)(0x427021BCUL))
\r
5777 #define bFM3_MFS1_LIN_BGR1_EXT *((volatile unsigned int*)(0x427021BCUL))
\r
5779 /* I2C channel 1 registers */
\r
5780 #define bFM3_MFS1_I2C_SMR_ITST0 *((volatile unsigned int*)(0x42702000UL))
\r
5781 #define bFM3_MFS1_I2C_SMR_ITST1 *((volatile unsigned int*)(0x42702004UL))
\r
5782 #define bFM3_MFS1_I2C_SMR_TIE *((volatile unsigned int*)(0x42702008UL))
\r
5783 #define bFM3_MFS1_I2C_SMR_RIE *((volatile unsigned int*)(0x4270200CUL))
\r
5784 #define bFM3_MFS1_I2C_SMR_WUCR *((volatile unsigned int*)(0x42702010UL))
\r
5785 #define bFM3_MFS1_I2C_SMR_MD0 *((volatile unsigned int*)(0x42702014UL))
\r
5786 #define bFM3_MFS1_I2C_SMR_MD1 *((volatile unsigned int*)(0x42702018UL))
\r
5787 #define bFM3_MFS1_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270201CUL))
\r
5788 #define bFM3_MFS1_I2C_IBCR_INT *((volatile unsigned int*)(0x42702020UL))
\r
5789 #define bFM3_MFS1_I2C_IBCR_BER *((volatile unsigned int*)(0x42702024UL))
\r
5790 #define bFM3_MFS1_I2C_IBCR_INTE *((volatile unsigned int*)(0x42702028UL))
\r
5791 #define bFM3_MFS1_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270202CUL))
\r
5792 #define bFM3_MFS1_I2C_IBCR_WSEL *((volatile unsigned int*)(0x42702030UL))
\r
5793 #define bFM3_MFS1_I2C_IBCR_ACKE *((volatile unsigned int*)(0x42702034UL))
\r
5794 #define bFM3_MFS1_I2C_IBCR_ACT *((volatile unsigned int*)(0x42702038UL))
\r
5795 #define bFM3_MFS1_I2C_IBCR_SCC *((volatile unsigned int*)(0x42702038UL))
\r
5796 #define bFM3_MFS1_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270203CUL))
\r
5797 #define bFM3_MFS1_I2C_IBSR_BB *((volatile unsigned int*)(0x42702080UL))
\r
5798 #define bFM3_MFS1_I2C_IBSR_SPC *((volatile unsigned int*)(0x42702084UL))
\r
5799 #define bFM3_MFS1_I2C_IBSR_RSC *((volatile unsigned int*)(0x42702088UL))
\r
5800 #define bFM3_MFS1_I2C_IBSR_AL *((volatile unsigned int*)(0x4270208CUL))
\r
5801 #define bFM3_MFS1_I2C_IBSR_TRX *((volatile unsigned int*)(0x42702090UL))
\r
5802 #define bFM3_MFS1_I2C_IBSR_RSA *((volatile unsigned int*)(0x42702094UL))
\r
5803 #define bFM3_MFS1_I2C_IBSR_RACK *((volatile unsigned int*)(0x42702098UL))
\r
5804 #define bFM3_MFS1_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270209CUL))
\r
5805 #define bFM3_MFS1_I2C_SSR_TBI *((volatile unsigned int*)(0x427020A0UL))
\r
5806 #define bFM3_MFS1_I2C_SSR_TDRE *((volatile unsigned int*)(0x427020A4UL))
\r
5807 #define bFM3_MFS1_I2C_SSR_RDRF *((volatile unsigned int*)(0x427020A8UL))
\r
5808 #define bFM3_MFS1_I2C_SSR_ORE *((volatile unsigned int*)(0x427020ACUL))
\r
5809 #define bFM3_MFS1_I2C_SSR_TBIE *((volatile unsigned int*)(0x427020B0UL))
\r
5810 #define bFM3_MFS1_I2C_SSR_DMA *((volatile unsigned int*)(0x427020B4UL))
\r
5811 #define bFM3_MFS1_I2C_SSR_TSET *((volatile unsigned int*)(0x427020B8UL))
\r
5812 #define bFM3_MFS1_I2C_SSR_REC *((volatile unsigned int*)(0x427020BCUL))
\r
5813 #define bFM3_MFS1_I2C_ISBA_SA0 *((volatile unsigned int*)(0x42702200UL))
\r
5814 #define bFM3_MFS1_I2C_ISBA_SA1 *((volatile unsigned int*)(0x42702204UL))
\r
5815 #define bFM3_MFS1_I2C_ISBA_SA2 *((volatile unsigned int*)(0x42702208UL))
\r
5816 #define bFM3_MFS1_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270220CUL))
\r
5817 #define bFM3_MFS1_I2C_ISBA_SA4 *((volatile unsigned int*)(0x42702210UL))
\r
5818 #define bFM3_MFS1_I2C_ISBA_SA5 *((volatile unsigned int*)(0x42702214UL))
\r
5819 #define bFM3_MFS1_I2C_ISBA_SA6 *((volatile unsigned int*)(0x42702218UL))
\r
5820 #define bFM3_MFS1_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270221CUL))
\r
5821 #define bFM3_MFS1_I2C_ISMK_SM0 *((volatile unsigned int*)(0x42702220UL))
\r
5822 #define bFM3_MFS1_I2C_ISMK_SM1 *((volatile unsigned int*)(0x42702224UL))
\r
5823 #define bFM3_MFS1_I2C_ISMK_SM2 *((volatile unsigned int*)(0x42702228UL))
\r
5824 #define bFM3_MFS1_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270222CUL))
\r
5825 #define bFM3_MFS1_I2C_ISMK_SM4 *((volatile unsigned int*)(0x42702230UL))
\r
5826 #define bFM3_MFS1_I2C_ISMK_SM5 *((volatile unsigned int*)(0x42702234UL))
\r
5827 #define bFM3_MFS1_I2C_ISMK_SM6 *((volatile unsigned int*)(0x42702238UL))
\r
5828 #define bFM3_MFS1_I2C_ISMK_EN *((volatile unsigned int*)(0x4270223CUL))
\r
5830 /* UART asynchronous channel 2 registers */
\r
5831 #define bFM3_MFS2_UART_SMR_SOE *((volatile unsigned int*)(0x42704000UL))
\r
5832 #define bFM3_MFS2_UART_SMR_BDS *((volatile unsigned int*)(0x42704008UL))
\r
5833 #define bFM3_MFS2_UART_SMR_SBL *((volatile unsigned int*)(0x4270400CUL))
\r
5834 #define bFM3_MFS2_UART_SMR_WUCR *((volatile unsigned int*)(0x42704010UL))
\r
5835 #define bFM3_MFS2_UART_SMR_MD0 *((volatile unsigned int*)(0x42704014UL))
\r
5836 #define bFM3_MFS2_UART_SMR_MD1 *((volatile unsigned int*)(0x42704018UL))
\r
5837 #define bFM3_MFS2_UART_SMR_MD2 *((volatile unsigned int*)(0x4270401CUL))
\r
5838 #define bFM3_MFS2_UART_SCR_TXE *((volatile unsigned int*)(0x42704020UL))
\r
5839 #define bFM3_MFS2_UART_SCR_RXE *((volatile unsigned int*)(0x42704024UL))
\r
5840 #define bFM3_MFS2_UART_SCR_TBIE *((volatile unsigned int*)(0x42704028UL))
\r
5841 #define bFM3_MFS2_UART_SCR_TIE *((volatile unsigned int*)(0x4270402CUL))
\r
5842 #define bFM3_MFS2_UART_SCR_RIE *((volatile unsigned int*)(0x42704030UL))
\r
5843 #define bFM3_MFS2_UART_SCR_UPCL *((volatile unsigned int*)(0x4270403CUL))
\r
5844 #define bFM3_MFS2_UART_ESCR_L0 *((volatile unsigned int*)(0x42704080UL))
\r
5845 #define bFM3_MFS2_UART_ESCR_L1 *((volatile unsigned int*)(0x42704084UL))
\r
5846 #define bFM3_MFS2_UART_ESCR_L2 *((volatile unsigned int*)(0x42704088UL))
\r
5847 #define bFM3_MFS2_UART_ESCR_P *((volatile unsigned int*)(0x4270408CUL))
\r
5848 #define bFM3_MFS2_UART_ESCR_PEN *((volatile unsigned int*)(0x42704090UL))
\r
5849 #define bFM3_MFS2_UART_ESCR_INV *((volatile unsigned int*)(0x42704094UL))
\r
5850 #define bFM3_MFS2_UART_ESCR_ESBL *((volatile unsigned int*)(0x42704098UL))
\r
5851 #define bFM3_MFS2_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270409CUL))
\r
5852 #define bFM3_MFS2_UART_SSR_TBI *((volatile unsigned int*)(0x427040A0UL))
\r
5853 #define bFM3_MFS2_UART_SSR_TDRE *((volatile unsigned int*)(0x427040A4UL))
\r
5854 #define bFM3_MFS2_UART_SSR_RDRF *((volatile unsigned int*)(0x427040A8UL))
\r
5855 #define bFM3_MFS2_UART_SSR_ORE *((volatile unsigned int*)(0x427040ACUL))
\r
5856 #define bFM3_MFS2_UART_SSR_FRE *((volatile unsigned int*)(0x427040B0UL))
\r
5857 #define bFM3_MFS2_UART_SSR_PE *((volatile unsigned int*)(0x427040B4UL))
\r
5858 #define bFM3_MFS2_UART_SSR_REC *((volatile unsigned int*)(0x427040BCUL))
\r
5859 #define bFM3_MFS2_UART_RDR_AD *((volatile unsigned int*)(0x42704120UL))
\r
5860 #define bFM3_MFS2_UART_TDR_AD *((volatile unsigned int*)(0x42704120UL))
\r
5861 #define bFM3_MFS2_UART_BGR_EXT *((volatile unsigned int*)(0x427041BCUL))
\r
5862 #define bFM3_MFS2_UART_BGR1_EXT *((volatile unsigned int*)(0x427041BCUL))
\r
5864 /* UART synchronous channel 2 registers */
\r
5865 #define bFM3_MFS2_CSIO_SMR_SOE *((volatile unsigned int*)(0x42704000UL))
\r
5866 #define bFM3_MFS2_CSIO_SMR_SCKE *((volatile unsigned int*)(0x42704004UL))
\r
5867 #define bFM3_MFS2_CSIO_SMR_BDS *((volatile unsigned int*)(0x42704008UL))
\r
5868 #define bFM3_MFS2_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270400CUL))
\r
5869 #define bFM3_MFS2_CSIO_SMR_WUCR *((volatile unsigned int*)(0x42704010UL))
\r
5870 #define bFM3_MFS2_CSIO_SMR_MD0 *((volatile unsigned int*)(0x42704014UL))
\r
5871 #define bFM3_MFS2_CSIO_SMR_MD1 *((volatile unsigned int*)(0x42704018UL))
\r
5872 #define bFM3_MFS2_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270401CUL))
\r
5873 #define bFM3_MFS2_CSIO_SCR_TXE *((volatile unsigned int*)(0x42704020UL))
\r
5874 #define bFM3_MFS2_CSIO_SCR_RXE *((volatile unsigned int*)(0x42704024UL))
\r
5875 #define bFM3_MFS2_CSIO_SCR_TBIE *((volatile unsigned int*)(0x42704028UL))
\r
5876 #define bFM3_MFS2_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270402CUL))
\r
5877 #define bFM3_MFS2_CSIO_SCR_RIE *((volatile unsigned int*)(0x42704030UL))
\r
5878 #define bFM3_MFS2_CSIO_SCR_SPI *((volatile unsigned int*)(0x42704034UL))
\r
5879 #define bFM3_MFS2_CSIO_SCR_MS *((volatile unsigned int*)(0x42704038UL))
\r
5880 #define bFM3_MFS2_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270403CUL))
\r
5881 #define bFM3_MFS2_CSIO_ESCR_L0 *((volatile unsigned int*)(0x42704080UL))
\r
5882 #define bFM3_MFS2_CSIO_ESCR_L1 *((volatile unsigned int*)(0x42704084UL))
\r
5883 #define bFM3_MFS2_CSIO_ESCR_L2 *((volatile unsigned int*)(0x42704088UL))
\r
5884 #define bFM3_MFS2_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270408CUL))
\r
5885 #define bFM3_MFS2_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x42704090UL))
\r
5886 #define bFM3_MFS2_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270409CUL))
\r
5887 #define bFM3_MFS2_CSIO_SSR_TBI *((volatile unsigned int*)(0x427040A0UL))
\r
5888 #define bFM3_MFS2_CSIO_SSR_TDRE *((volatile unsigned int*)(0x427040A4UL))
\r
5889 #define bFM3_MFS2_CSIO_SSR_RDRF *((volatile unsigned int*)(0x427040A8UL))
\r
5890 #define bFM3_MFS2_CSIO_SSR_ORE *((volatile unsigned int*)(0x427040ACUL))
\r
5891 #define bFM3_MFS2_CSIO_SSR_REC *((volatile unsigned int*)(0x427040BCUL))
\r
5893 /* UART LIN channel 2 registers */
\r
5894 #define bFM3_MFS2_LIN_SMR_SOE *((volatile unsigned int*)(0x42704000UL))
\r
5895 #define bFM3_MFS2_LIN_SMR_SBL *((volatile unsigned int*)(0x4270400CUL))
\r
5896 #define bFM3_MFS2_LIN_SMR_WUCR *((volatile unsigned int*)(0x42704010UL))
\r
5897 #define bFM3_MFS2_LIN_SMR_MD0 *((volatile unsigned int*)(0x42704014UL))
\r
5898 #define bFM3_MFS2_LIN_SMR_MD1 *((volatile unsigned int*)(0x42704018UL))
\r
5899 #define bFM3_MFS2_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270401CUL))
\r
5900 #define bFM3_MFS2_LIN_SCR_TXE *((volatile unsigned int*)(0x42704020UL))
\r
5901 #define bFM3_MFS2_LIN_SCR_RXE *((volatile unsigned int*)(0x42704024UL))
\r
5902 #define bFM3_MFS2_LIN_SCR_TBIE *((volatile unsigned int*)(0x42704028UL))
\r
5903 #define bFM3_MFS2_LIN_SCR_TIE *((volatile unsigned int*)(0x4270402CUL))
\r
5904 #define bFM3_MFS2_LIN_SCR_RIE *((volatile unsigned int*)(0x42704030UL))
\r
5905 #define bFM3_MFS2_LIN_SCR_LBR *((volatile unsigned int*)(0x42704034UL))
\r
5906 #define bFM3_MFS2_LIN_SCR_MS *((volatile unsigned int*)(0x42704038UL))
\r
5907 #define bFM3_MFS2_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270403CUL))
\r
5908 #define bFM3_MFS2_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x42704080UL))
\r
5909 #define bFM3_MFS2_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x42704084UL))
\r
5910 #define bFM3_MFS2_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x42704088UL))
\r
5911 #define bFM3_MFS2_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270408CUL))
\r
5912 #define bFM3_MFS2_LIN_ESCR_LBIE *((volatile unsigned int*)(0x42704090UL))
\r
5913 #define bFM3_MFS2_LIN_ESCR_ESBL *((volatile unsigned int*)(0x42704098UL))
\r
5914 #define bFM3_MFS2_LIN_SSR_TBI *((volatile unsigned int*)(0x427040A0UL))
\r
5915 #define bFM3_MFS2_LIN_SSR_TDRE *((volatile unsigned int*)(0x427040A4UL))
\r
5916 #define bFM3_MFS2_LIN_SSR_RDRF *((volatile unsigned int*)(0x427040A8UL))
\r
5917 #define bFM3_MFS2_LIN_SSR_ORE *((volatile unsigned int*)(0x427040ACUL))
\r
5918 #define bFM3_MFS2_LIN_SSR_FRE *((volatile unsigned int*)(0x427040B0UL))
\r
5919 #define bFM3_MFS2_LIN_SSR_LBD *((volatile unsigned int*)(0x427040B4UL))
\r
5920 #define bFM3_MFS2_LIN_SSR_REC *((volatile unsigned int*)(0x427040BCUL))
\r
5921 #define bFM3_MFS2_LIN_BGR_EXT *((volatile unsigned int*)(0x427041BCUL))
\r
5922 #define bFM3_MFS2_LIN_BGR1_EXT *((volatile unsigned int*)(0x427041BCUL))
\r
5924 /* I2C channel 2 registers */
\r
5925 #define bFM3_MFS2_I2C_SMR_ITST0 *((volatile unsigned int*)(0x42704000UL))
\r
5926 #define bFM3_MFS2_I2C_SMR_ITST1 *((volatile unsigned int*)(0x42704004UL))
\r
5927 #define bFM3_MFS2_I2C_SMR_TIE *((volatile unsigned int*)(0x42704008UL))
\r
5928 #define bFM3_MFS2_I2C_SMR_RIE *((volatile unsigned int*)(0x4270400CUL))
\r
5929 #define bFM3_MFS2_I2C_SMR_WUCR *((volatile unsigned int*)(0x42704010UL))
\r
5930 #define bFM3_MFS2_I2C_SMR_MD0 *((volatile unsigned int*)(0x42704014UL))
\r
5931 #define bFM3_MFS2_I2C_SMR_MD1 *((volatile unsigned int*)(0x42704018UL))
\r
5932 #define bFM3_MFS2_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270401CUL))
\r
5933 #define bFM3_MFS2_I2C_IBCR_INT *((volatile unsigned int*)(0x42704020UL))
\r
5934 #define bFM3_MFS2_I2C_IBCR_BER *((volatile unsigned int*)(0x42704024UL))
\r
5935 #define bFM3_MFS2_I2C_IBCR_INTE *((volatile unsigned int*)(0x42704028UL))
\r
5936 #define bFM3_MFS2_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270402CUL))
\r
5937 #define bFM3_MFS2_I2C_IBCR_WSEL *((volatile unsigned int*)(0x42704030UL))
\r
5938 #define bFM3_MFS2_I2C_IBCR_ACKE *((volatile unsigned int*)(0x42704034UL))
\r
5939 #define bFM3_MFS2_I2C_IBCR_ACT *((volatile unsigned int*)(0x42704038UL))
\r
5940 #define bFM3_MFS2_I2C_IBCR_SCC *((volatile unsigned int*)(0x42704038UL))
\r
5941 #define bFM3_MFS2_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270403CUL))
\r
5942 #define bFM3_MFS2_I2C_IBSR_BB *((volatile unsigned int*)(0x42704080UL))
\r
5943 #define bFM3_MFS2_I2C_IBSR_SPC *((volatile unsigned int*)(0x42704084UL))
\r
5944 #define bFM3_MFS2_I2C_IBSR_RSC *((volatile unsigned int*)(0x42704088UL))
\r
5945 #define bFM3_MFS2_I2C_IBSR_AL *((volatile unsigned int*)(0x4270408CUL))
\r
5946 #define bFM3_MFS2_I2C_IBSR_TRX *((volatile unsigned int*)(0x42704090UL))
\r
5947 #define bFM3_MFS2_I2C_IBSR_RSA *((volatile unsigned int*)(0x42704094UL))
\r
5948 #define bFM3_MFS2_I2C_IBSR_RACK *((volatile unsigned int*)(0x42704098UL))
\r
5949 #define bFM3_MFS2_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270409CUL))
\r
5950 #define bFM3_MFS2_I2C_SSR_TBI *((volatile unsigned int*)(0x427040A0UL))
\r
5951 #define bFM3_MFS2_I2C_SSR_TDRE *((volatile unsigned int*)(0x427040A4UL))
\r
5952 #define bFM3_MFS2_I2C_SSR_RDRF *((volatile unsigned int*)(0x427040A8UL))
\r
5953 #define bFM3_MFS2_I2C_SSR_ORE *((volatile unsigned int*)(0x427040ACUL))
\r
5954 #define bFM3_MFS2_I2C_SSR_TBIE *((volatile unsigned int*)(0x427040B0UL))
\r
5955 #define bFM3_MFS2_I2C_SSR_DMA *((volatile unsigned int*)(0x427040B4UL))
\r
5956 #define bFM3_MFS2_I2C_SSR_TSET *((volatile unsigned int*)(0x427040B8UL))
\r
5957 #define bFM3_MFS2_I2C_SSR_REC *((volatile unsigned int*)(0x427040BCUL))
\r
5958 #define bFM3_MFS2_I2C_ISBA_SA0 *((volatile unsigned int*)(0x42704200UL))
\r
5959 #define bFM3_MFS2_I2C_ISBA_SA1 *((volatile unsigned int*)(0x42704204UL))
\r
5960 #define bFM3_MFS2_I2C_ISBA_SA2 *((volatile unsigned int*)(0x42704208UL))
\r
5961 #define bFM3_MFS2_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270420CUL))
\r
5962 #define bFM3_MFS2_I2C_ISBA_SA4 *((volatile unsigned int*)(0x42704210UL))
\r
5963 #define bFM3_MFS2_I2C_ISBA_SA5 *((volatile unsigned int*)(0x42704214UL))
\r
5964 #define bFM3_MFS2_I2C_ISBA_SA6 *((volatile unsigned int*)(0x42704218UL))
\r
5965 #define bFM3_MFS2_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270421CUL))
\r
5966 #define bFM3_MFS2_I2C_ISMK_SM0 *((volatile unsigned int*)(0x42704220UL))
\r
5967 #define bFM3_MFS2_I2C_ISMK_SM1 *((volatile unsigned int*)(0x42704224UL))
\r
5968 #define bFM3_MFS2_I2C_ISMK_SM2 *((volatile unsigned int*)(0x42704228UL))
\r
5969 #define bFM3_MFS2_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270422CUL))
\r
5970 #define bFM3_MFS2_I2C_ISMK_SM4 *((volatile unsigned int*)(0x42704230UL))
\r
5971 #define bFM3_MFS2_I2C_ISMK_SM5 *((volatile unsigned int*)(0x42704234UL))
\r
5972 #define bFM3_MFS2_I2C_ISMK_SM6 *((volatile unsigned int*)(0x42704238UL))
\r
5973 #define bFM3_MFS2_I2C_ISMK_EN *((volatile unsigned int*)(0x4270423CUL))
\r
5975 /* UART asynchronous channel 3 registers */
\r
5976 #define bFM3_MFS3_UART_SMR_SOE *((volatile unsigned int*)(0x42706000UL))
\r
5977 #define bFM3_MFS3_UART_SMR_BDS *((volatile unsigned int*)(0x42706008UL))
\r
5978 #define bFM3_MFS3_UART_SMR_SBL *((volatile unsigned int*)(0x4270600CUL))
\r
5979 #define bFM3_MFS3_UART_SMR_WUCR *((volatile unsigned int*)(0x42706010UL))
\r
5980 #define bFM3_MFS3_UART_SMR_MD0 *((volatile unsigned int*)(0x42706014UL))
\r
5981 #define bFM3_MFS3_UART_SMR_MD1 *((volatile unsigned int*)(0x42706018UL))
\r
5982 #define bFM3_MFS3_UART_SMR_MD2 *((volatile unsigned int*)(0x4270601CUL))
\r
5983 #define bFM3_MFS3_UART_SCR_TXE *((volatile unsigned int*)(0x42706020UL))
\r
5984 #define bFM3_MFS3_UART_SCR_RXE *((volatile unsigned int*)(0x42706024UL))
\r
5985 #define bFM3_MFS3_UART_SCR_TBIE *((volatile unsigned int*)(0x42706028UL))
\r
5986 #define bFM3_MFS3_UART_SCR_TIE *((volatile unsigned int*)(0x4270602CUL))
\r
5987 #define bFM3_MFS3_UART_SCR_RIE *((volatile unsigned int*)(0x42706030UL))
\r
5988 #define bFM3_MFS3_UART_SCR_UPCL *((volatile unsigned int*)(0x4270603CUL))
\r
5989 #define bFM3_MFS3_UART_ESCR_L0 *((volatile unsigned int*)(0x42706080UL))
\r
5990 #define bFM3_MFS3_UART_ESCR_L1 *((volatile unsigned int*)(0x42706084UL))
\r
5991 #define bFM3_MFS3_UART_ESCR_L2 *((volatile unsigned int*)(0x42706088UL))
\r
5992 #define bFM3_MFS3_UART_ESCR_P *((volatile unsigned int*)(0x4270608CUL))
\r
5993 #define bFM3_MFS3_UART_ESCR_PEN *((volatile unsigned int*)(0x42706090UL))
\r
5994 #define bFM3_MFS3_UART_ESCR_INV *((volatile unsigned int*)(0x42706094UL))
\r
5995 #define bFM3_MFS3_UART_ESCR_ESBL *((volatile unsigned int*)(0x42706098UL))
\r
5996 #define bFM3_MFS3_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270609CUL))
\r
5997 #define bFM3_MFS3_UART_SSR_TBI *((volatile unsigned int*)(0x427060A0UL))
\r
5998 #define bFM3_MFS3_UART_SSR_TDRE *((volatile unsigned int*)(0x427060A4UL))
\r
5999 #define bFM3_MFS3_UART_SSR_RDRF *((volatile unsigned int*)(0x427060A8UL))
\r
6000 #define bFM3_MFS3_UART_SSR_ORE *((volatile unsigned int*)(0x427060ACUL))
\r
6001 #define bFM3_MFS3_UART_SSR_FRE *((volatile unsigned int*)(0x427060B0UL))
\r
6002 #define bFM3_MFS3_UART_SSR_PE *((volatile unsigned int*)(0x427060B4UL))
\r
6003 #define bFM3_MFS3_UART_SSR_REC *((volatile unsigned int*)(0x427060BCUL))
\r
6004 #define bFM3_MFS3_UART_RDR_AD *((volatile unsigned int*)(0x42706120UL))
\r
6005 #define bFM3_MFS3_UART_TDR_AD *((volatile unsigned int*)(0x42706120UL))
\r
6006 #define bFM3_MFS3_UART_BGR_EXT *((volatile unsigned int*)(0x427061BCUL))
\r
6007 #define bFM3_MFS3_UART_BGR1_EXT *((volatile unsigned int*)(0x427061BCUL))
\r
6009 /* UART synchronous channel 3 registers */
\r
6010 #define bFM3_MFS3_CSIO_SMR_SOE *((volatile unsigned int*)(0x42706000UL))
\r
6011 #define bFM3_MFS3_CSIO_SMR_SCKE *((volatile unsigned int*)(0x42706004UL))
\r
6012 #define bFM3_MFS3_CSIO_SMR_BDS *((volatile unsigned int*)(0x42706008UL))
\r
6013 #define bFM3_MFS3_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270600CUL))
\r
6014 #define bFM3_MFS3_CSIO_SMR_WUCR *((volatile unsigned int*)(0x42706010UL))
\r
6015 #define bFM3_MFS3_CSIO_SMR_MD0 *((volatile unsigned int*)(0x42706014UL))
\r
6016 #define bFM3_MFS3_CSIO_SMR_MD1 *((volatile unsigned int*)(0x42706018UL))
\r
6017 #define bFM3_MFS3_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270601CUL))
\r
6018 #define bFM3_MFS3_CSIO_SCR_TXE *((volatile unsigned int*)(0x42706020UL))
\r
6019 #define bFM3_MFS3_CSIO_SCR_RXE *((volatile unsigned int*)(0x42706024UL))
\r
6020 #define bFM3_MFS3_CSIO_SCR_TBIE *((volatile unsigned int*)(0x42706028UL))
\r
6021 #define bFM3_MFS3_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270602CUL))
\r
6022 #define bFM3_MFS3_CSIO_SCR_RIE *((volatile unsigned int*)(0x42706030UL))
\r
6023 #define bFM3_MFS3_CSIO_SCR_SPI *((volatile unsigned int*)(0x42706034UL))
\r
6024 #define bFM3_MFS3_CSIO_SCR_MS *((volatile unsigned int*)(0x42706038UL))
\r
6025 #define bFM3_MFS3_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270603CUL))
\r
6026 #define bFM3_MFS3_CSIO_ESCR_L0 *((volatile unsigned int*)(0x42706080UL))
\r
6027 #define bFM3_MFS3_CSIO_ESCR_L1 *((volatile unsigned int*)(0x42706084UL))
\r
6028 #define bFM3_MFS3_CSIO_ESCR_L2 *((volatile unsigned int*)(0x42706088UL))
\r
6029 #define bFM3_MFS3_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270608CUL))
\r
6030 #define bFM3_MFS3_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x42706090UL))
\r
6031 #define bFM3_MFS3_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270609CUL))
\r
6032 #define bFM3_MFS3_CSIO_SSR_TBI *((volatile unsigned int*)(0x427060A0UL))
\r
6033 #define bFM3_MFS3_CSIO_SSR_TDRE *((volatile unsigned int*)(0x427060A4UL))
\r
6034 #define bFM3_MFS3_CSIO_SSR_RDRF *((volatile unsigned int*)(0x427060A8UL))
\r
6035 #define bFM3_MFS3_CSIO_SSR_ORE *((volatile unsigned int*)(0x427060ACUL))
\r
6036 #define bFM3_MFS3_CSIO_SSR_REC *((volatile unsigned int*)(0x427060BCUL))
\r
6038 /* UART LIN channel 3 registers */
\r
6039 #define bFM3_MFS3_LIN_SMR_SOE *((volatile unsigned int*)(0x42706000UL))
\r
6040 #define bFM3_MFS3_LIN_SMR_SBL *((volatile unsigned int*)(0x4270600CUL))
\r
6041 #define bFM3_MFS3_LIN_SMR_WUCR *((volatile unsigned int*)(0x42706010UL))
\r
6042 #define bFM3_MFS3_LIN_SMR_MD0 *((volatile unsigned int*)(0x42706014UL))
\r
6043 #define bFM3_MFS3_LIN_SMR_MD1 *((volatile unsigned int*)(0x42706018UL))
\r
6044 #define bFM3_MFS3_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270601CUL))
\r
6045 #define bFM3_MFS3_LIN_SCR_TXE *((volatile unsigned int*)(0x42706020UL))
\r
6046 #define bFM3_MFS3_LIN_SCR_RXE *((volatile unsigned int*)(0x42706024UL))
\r
6047 #define bFM3_MFS3_LIN_SCR_TBIE *((volatile unsigned int*)(0x42706028UL))
\r
6048 #define bFM3_MFS3_LIN_SCR_TIE *((volatile unsigned int*)(0x4270602CUL))
\r
6049 #define bFM3_MFS3_LIN_SCR_RIE *((volatile unsigned int*)(0x42706030UL))
\r
6050 #define bFM3_MFS3_LIN_SCR_LBR *((volatile unsigned int*)(0x42706034UL))
\r
6051 #define bFM3_MFS3_LIN_SCR_MS *((volatile unsigned int*)(0x42706038UL))
\r
6052 #define bFM3_MFS3_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270603CUL))
\r
6053 #define bFM3_MFS3_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x42706080UL))
\r
6054 #define bFM3_MFS3_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x42706084UL))
\r
6055 #define bFM3_MFS3_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x42706088UL))
\r
6056 #define bFM3_MFS3_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270608CUL))
\r
6057 #define bFM3_MFS3_LIN_ESCR_LBIE *((volatile unsigned int*)(0x42706090UL))
\r
6058 #define bFM3_MFS3_LIN_ESCR_ESBL *((volatile unsigned int*)(0x42706098UL))
\r
6059 #define bFM3_MFS3_LIN_SSR_TBI *((volatile unsigned int*)(0x427060A0UL))
\r
6060 #define bFM3_MFS3_LIN_SSR_TDRE *((volatile unsigned int*)(0x427060A4UL))
\r
6061 #define bFM3_MFS3_LIN_SSR_RDRF *((volatile unsigned int*)(0x427060A8UL))
\r
6062 #define bFM3_MFS3_LIN_SSR_ORE *((volatile unsigned int*)(0x427060ACUL))
\r
6063 #define bFM3_MFS3_LIN_SSR_FRE *((volatile unsigned int*)(0x427060B0UL))
\r
6064 #define bFM3_MFS3_LIN_SSR_LBD *((volatile unsigned int*)(0x427060B4UL))
\r
6065 #define bFM3_MFS3_LIN_SSR_REC *((volatile unsigned int*)(0x427060BCUL))
\r
6066 #define bFM3_MFS3_LIN_BGR_EXT *((volatile unsigned int*)(0x427061BCUL))
\r
6067 #define bFM3_MFS3_LIN_BGR1_EXT *((volatile unsigned int*)(0x427061BCUL))
\r
6069 /* I2C channel 3 registers */
\r
6070 #define bFM3_MFS3_I2C_SMR_ITST0 *((volatile unsigned int*)(0x42706000UL))
\r
6071 #define bFM3_MFS3_I2C_SMR_ITST1 *((volatile unsigned int*)(0x42706004UL))
\r
6072 #define bFM3_MFS3_I2C_SMR_TIE *((volatile unsigned int*)(0x42706008UL))
\r
6073 #define bFM3_MFS3_I2C_SMR_RIE *((volatile unsigned int*)(0x4270600CUL))
\r
6074 #define bFM3_MFS3_I2C_SMR_WUCR *((volatile unsigned int*)(0x42706010UL))
\r
6075 #define bFM3_MFS3_I2C_SMR_MD0 *((volatile unsigned int*)(0x42706014UL))
\r
6076 #define bFM3_MFS3_I2C_SMR_MD1 *((volatile unsigned int*)(0x42706018UL))
\r
6077 #define bFM3_MFS3_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270601CUL))
\r
6078 #define bFM3_MFS3_I2C_IBCR_INT *((volatile unsigned int*)(0x42706020UL))
\r
6079 #define bFM3_MFS3_I2C_IBCR_BER *((volatile unsigned int*)(0x42706024UL))
\r
6080 #define bFM3_MFS3_I2C_IBCR_INTE *((volatile unsigned int*)(0x42706028UL))
\r
6081 #define bFM3_MFS3_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270602CUL))
\r
6082 #define bFM3_MFS3_I2C_IBCR_WSEL *((volatile unsigned int*)(0x42706030UL))
\r
6083 #define bFM3_MFS3_I2C_IBCR_ACKE *((volatile unsigned int*)(0x42706034UL))
\r
6084 #define bFM3_MFS3_I2C_IBCR_ACT *((volatile unsigned int*)(0x42706038UL))
\r
6085 #define bFM3_MFS3_I2C_IBCR_SCC *((volatile unsigned int*)(0x42706038UL))
\r
6086 #define bFM3_MFS3_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270603CUL))
\r
6087 #define bFM3_MFS3_I2C_IBSR_BB *((volatile unsigned int*)(0x42706080UL))
\r
6088 #define bFM3_MFS3_I2C_IBSR_SPC *((volatile unsigned int*)(0x42706084UL))
\r
6089 #define bFM3_MFS3_I2C_IBSR_RSC *((volatile unsigned int*)(0x42706088UL))
\r
6090 #define bFM3_MFS3_I2C_IBSR_AL *((volatile unsigned int*)(0x4270608CUL))
\r
6091 #define bFM3_MFS3_I2C_IBSR_TRX *((volatile unsigned int*)(0x42706090UL))
\r
6092 #define bFM3_MFS3_I2C_IBSR_RSA *((volatile unsigned int*)(0x42706094UL))
\r
6093 #define bFM3_MFS3_I2C_IBSR_RACK *((volatile unsigned int*)(0x42706098UL))
\r
6094 #define bFM3_MFS3_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270609CUL))
\r
6095 #define bFM3_MFS3_I2C_SSR_TBI *((volatile unsigned int*)(0x427060A0UL))
\r
6096 #define bFM3_MFS3_I2C_SSR_TDRE *((volatile unsigned int*)(0x427060A4UL))
\r
6097 #define bFM3_MFS3_I2C_SSR_RDRF *((volatile unsigned int*)(0x427060A8UL))
\r
6098 #define bFM3_MFS3_I2C_SSR_ORE *((volatile unsigned int*)(0x427060ACUL))
\r
6099 #define bFM3_MFS3_I2C_SSR_TBIE *((volatile unsigned int*)(0x427060B0UL))
\r
6100 #define bFM3_MFS3_I2C_SSR_DMA *((volatile unsigned int*)(0x427060B4UL))
\r
6101 #define bFM3_MFS3_I2C_SSR_TSET *((volatile unsigned int*)(0x427060B8UL))
\r
6102 #define bFM3_MFS3_I2C_SSR_REC *((volatile unsigned int*)(0x427060BCUL))
\r
6103 #define bFM3_MFS3_I2C_ISBA_SA0 *((volatile unsigned int*)(0x42706200UL))
\r
6104 #define bFM3_MFS3_I2C_ISBA_SA1 *((volatile unsigned int*)(0x42706204UL))
\r
6105 #define bFM3_MFS3_I2C_ISBA_SA2 *((volatile unsigned int*)(0x42706208UL))
\r
6106 #define bFM3_MFS3_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270620CUL))
\r
6107 #define bFM3_MFS3_I2C_ISBA_SA4 *((volatile unsigned int*)(0x42706210UL))
\r
6108 #define bFM3_MFS3_I2C_ISBA_SA5 *((volatile unsigned int*)(0x42706214UL))
\r
6109 #define bFM3_MFS3_I2C_ISBA_SA6 *((volatile unsigned int*)(0x42706218UL))
\r
6110 #define bFM3_MFS3_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270621CUL))
\r
6111 #define bFM3_MFS3_I2C_ISMK_SM0 *((volatile unsigned int*)(0x42706220UL))
\r
6112 #define bFM3_MFS3_I2C_ISMK_SM1 *((volatile unsigned int*)(0x42706224UL))
\r
6113 #define bFM3_MFS3_I2C_ISMK_SM2 *((volatile unsigned int*)(0x42706228UL))
\r
6114 #define bFM3_MFS3_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270622CUL))
\r
6115 #define bFM3_MFS3_I2C_ISMK_SM4 *((volatile unsigned int*)(0x42706230UL))
\r
6116 #define bFM3_MFS3_I2C_ISMK_SM5 *((volatile unsigned int*)(0x42706234UL))
\r
6117 #define bFM3_MFS3_I2C_ISMK_SM6 *((volatile unsigned int*)(0x42706238UL))
\r
6118 #define bFM3_MFS3_I2C_ISMK_EN *((volatile unsigned int*)(0x4270623CUL))
\r
6120 /* UART asynchronous channel 4 registers */
\r
6121 #define bFM3_MFS4_UART_SMR_SOE *((volatile unsigned int*)(0x42708000UL))
\r
6122 #define bFM3_MFS4_UART_SMR_BDS *((volatile unsigned int*)(0x42708008UL))
\r
6123 #define bFM3_MFS4_UART_SMR_SBL *((volatile unsigned int*)(0x4270800CUL))
\r
6124 #define bFM3_MFS4_UART_SMR_WUCR *((volatile unsigned int*)(0x42708010UL))
\r
6125 #define bFM3_MFS4_UART_SMR_MD0 *((volatile unsigned int*)(0x42708014UL))
\r
6126 #define bFM3_MFS4_UART_SMR_MD1 *((volatile unsigned int*)(0x42708018UL))
\r
6127 #define bFM3_MFS4_UART_SMR_MD2 *((volatile unsigned int*)(0x4270801CUL))
\r
6128 #define bFM3_MFS4_UART_SCR_TXE *((volatile unsigned int*)(0x42708020UL))
\r
6129 #define bFM3_MFS4_UART_SCR_RXE *((volatile unsigned int*)(0x42708024UL))
\r
6130 #define bFM3_MFS4_UART_SCR_TBIE *((volatile unsigned int*)(0x42708028UL))
\r
6131 #define bFM3_MFS4_UART_SCR_TIE *((volatile unsigned int*)(0x4270802CUL))
\r
6132 #define bFM3_MFS4_UART_SCR_RIE *((volatile unsigned int*)(0x42708030UL))
\r
6133 #define bFM3_MFS4_UART_SCR_UPCL *((volatile unsigned int*)(0x4270803CUL))
\r
6134 #define bFM3_MFS4_UART_ESCR_L0 *((volatile unsigned int*)(0x42708080UL))
\r
6135 #define bFM3_MFS4_UART_ESCR_L1 *((volatile unsigned int*)(0x42708084UL))
\r
6136 #define bFM3_MFS4_UART_ESCR_L2 *((volatile unsigned int*)(0x42708088UL))
\r
6137 #define bFM3_MFS4_UART_ESCR_P *((volatile unsigned int*)(0x4270808CUL))
\r
6138 #define bFM3_MFS4_UART_ESCR_PEN *((volatile unsigned int*)(0x42708090UL))
\r
6139 #define bFM3_MFS4_UART_ESCR_INV *((volatile unsigned int*)(0x42708094UL))
\r
6140 #define bFM3_MFS4_UART_ESCR_ESBL *((volatile unsigned int*)(0x42708098UL))
\r
6141 #define bFM3_MFS4_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270809CUL))
\r
6142 #define bFM3_MFS4_UART_SSR_TBI *((volatile unsigned int*)(0x427080A0UL))
\r
6143 #define bFM3_MFS4_UART_SSR_TDRE *((volatile unsigned int*)(0x427080A4UL))
\r
6144 #define bFM3_MFS4_UART_SSR_RDRF *((volatile unsigned int*)(0x427080A8UL))
\r
6145 #define bFM3_MFS4_UART_SSR_ORE *((volatile unsigned int*)(0x427080ACUL))
\r
6146 #define bFM3_MFS4_UART_SSR_FRE *((volatile unsigned int*)(0x427080B0UL))
\r
6147 #define bFM3_MFS4_UART_SSR_PE *((volatile unsigned int*)(0x427080B4UL))
\r
6148 #define bFM3_MFS4_UART_SSR_REC *((volatile unsigned int*)(0x427080BCUL))
\r
6149 #define bFM3_MFS4_UART_RDR_AD *((volatile unsigned int*)(0x42708120UL))
\r
6150 #define bFM3_MFS4_UART_TDR_AD *((volatile unsigned int*)(0x42708120UL))
\r
6151 #define bFM3_MFS4_UART_BGR_EXT *((volatile unsigned int*)(0x427081BCUL))
\r
6152 #define bFM3_MFS4_UART_BGR1_EXT *((volatile unsigned int*)(0x427081BCUL))
\r
6153 #define bFM3_MFS4_UART_FCR_FE1 *((volatile unsigned int*)(0x42708280UL))
\r
6154 #define bFM3_MFS4_UART_FCR_FE2 *((volatile unsigned int*)(0x42708284UL))
\r
6155 #define bFM3_MFS4_UART_FCR_FCL1 *((volatile unsigned int*)(0x42708288UL))
\r
6156 #define bFM3_MFS4_UART_FCR_FCL2 *((volatile unsigned int*)(0x4270828CUL))
\r
6157 #define bFM3_MFS4_UART_FCR_FSET *((volatile unsigned int*)(0x42708290UL))
\r
6158 #define bFM3_MFS4_UART_FCR_FLD *((volatile unsigned int*)(0x42708294UL))
\r
6159 #define bFM3_MFS4_UART_FCR_FLST *((volatile unsigned int*)(0x42708298UL))
\r
6160 #define bFM3_MFS4_UART_FCR_FSEL *((volatile unsigned int*)(0x427082A0UL))
\r
6161 #define bFM3_MFS4_UART_FCR_FTIE *((volatile unsigned int*)(0x427082A4UL))
\r
6162 #define bFM3_MFS4_UART_FCR_FDRQ *((volatile unsigned int*)(0x427082A8UL))
\r
6163 #define bFM3_MFS4_UART_FCR_FRIE *((volatile unsigned int*)(0x427082ACUL))
\r
6164 #define bFM3_MFS4_UART_FCR_FLSTE *((volatile unsigned int*)(0x427082B0UL))
\r
6165 #define bFM3_MFS4_UART_FCR_FTST0 *((volatile unsigned int*)(0x427082B8UL))
\r
6166 #define bFM3_MFS4_UART_FCR_FTST1 *((volatile unsigned int*)(0x427082BCUL))
\r
6167 #define bFM3_MFS4_UART_FCR0_FE1 *((volatile unsigned int*)(0x42708280UL))
\r
6168 #define bFM3_MFS4_UART_FCR0_FE2 *((volatile unsigned int*)(0x42708284UL))
\r
6169 #define bFM3_MFS4_UART_FCR0_FCL1 *((volatile unsigned int*)(0x42708288UL))
\r
6170 #define bFM3_MFS4_UART_FCR0_FCL2 *((volatile unsigned int*)(0x4270828CUL))
\r
6171 #define bFM3_MFS4_UART_FCR0_FSET *((volatile unsigned int*)(0x42708290UL))
\r
6172 #define bFM3_MFS4_UART_FCR0_FLD *((volatile unsigned int*)(0x42708294UL))
\r
6173 #define bFM3_MFS4_UART_FCR0_FLST *((volatile unsigned int*)(0x42708298UL))
\r
6174 #define bFM3_MFS4_UART_FCR1_FSEL *((volatile unsigned int*)(0x427082A0UL))
\r
6175 #define bFM3_MFS4_UART_FCR1_FTIE *((volatile unsigned int*)(0x427082A4UL))
\r
6176 #define bFM3_MFS4_UART_FCR1_FDRQ *((volatile unsigned int*)(0x427082A8UL))
\r
6177 #define bFM3_MFS4_UART_FCR1_FRIE *((volatile unsigned int*)(0x427082ACUL))
\r
6178 #define bFM3_MFS4_UART_FCR1_FLSTE *((volatile unsigned int*)(0x427082B0UL))
\r
6179 #define bFM3_MFS4_UART_FCR1_FTST0 *((volatile unsigned int*)(0x427082B8UL))
\r
6180 #define bFM3_MFS4_UART_FCR1_FTST1 *((volatile unsigned int*)(0x427082BCUL))
\r
6181 #define bFM3_MFS4_UART_FBYTE_FD0 *((volatile unsigned int*)(0x42708300UL))
\r
6182 #define bFM3_MFS4_UART_FBYTE_FD1 *((volatile unsigned int*)(0x42708304UL))
\r
6183 #define bFM3_MFS4_UART_FBYTE_FD2 *((volatile unsigned int*)(0x42708308UL))
\r
6184 #define bFM3_MFS4_UART_FBYTE_FD3 *((volatile unsigned int*)(0x4270830CUL))
\r
6185 #define bFM3_MFS4_UART_FBYTE_FD4 *((volatile unsigned int*)(0x42708310UL))
\r
6186 #define bFM3_MFS4_UART_FBYTE_FD5 *((volatile unsigned int*)(0x42708314UL))
\r
6187 #define bFM3_MFS4_UART_FBYTE_FD6 *((volatile unsigned int*)(0x42708318UL))
\r
6188 #define bFM3_MFS4_UART_FBYTE_FD7 *((volatile unsigned int*)(0x4270831CUL))
\r
6189 #define bFM3_MFS4_UART_FBYTE_FD8 *((volatile unsigned int*)(0x42708320UL))
\r
6190 #define bFM3_MFS4_UART_FBYTE_FD9 *((volatile unsigned int*)(0x42708324UL))
\r
6191 #define bFM3_MFS4_UART_FBYTE_FD10 *((volatile unsigned int*)(0x42708328UL))
\r
6192 #define bFM3_MFS4_UART_FBYTE_FD11 *((volatile unsigned int*)(0x4270832CUL))
\r
6193 #define bFM3_MFS4_UART_FBYTE_FD12 *((volatile unsigned int*)(0x42708330UL))
\r
6194 #define bFM3_MFS4_UART_FBYTE_FD13 *((volatile unsigned int*)(0x42708334UL))
\r
6195 #define bFM3_MFS4_UART_FBYTE_FD14 *((volatile unsigned int*)(0x42708338UL))
\r
6196 #define bFM3_MFS4_UART_FBYTE_FD15 *((volatile unsigned int*)(0x4270833CUL))
\r
6197 #define bFM3_MFS4_UART_FBYTE1_FD0 *((volatile unsigned int*)(0x42708300UL))
\r
6198 #define bFM3_MFS4_UART_FBYTE1_FD1 *((volatile unsigned int*)(0x42708304UL))
\r
6199 #define bFM3_MFS4_UART_FBYTE1_FD2 *((volatile unsigned int*)(0x42708308UL))
\r
6200 #define bFM3_MFS4_UART_FBYTE1_FD3 *((volatile unsigned int*)(0x4270830CUL))
\r
6201 #define bFM3_MFS4_UART_FBYTE1_FD4 *((volatile unsigned int*)(0x42708310UL))
\r
6202 #define bFM3_MFS4_UART_FBYTE1_FD5 *((volatile unsigned int*)(0x42708314UL))
\r
6203 #define bFM3_MFS4_UART_FBYTE1_FD6 *((volatile unsigned int*)(0x42708318UL))
\r
6204 #define bFM3_MFS4_UART_FBYTE1_FD7 *((volatile unsigned int*)(0x4270831CUL))
\r
6205 #define bFM3_MFS4_UART_FBYTE2_FD8 *((volatile unsigned int*)(0x42708320UL))
\r
6206 #define bFM3_MFS4_UART_FBYTE2_FD9 *((volatile unsigned int*)(0x42708324UL))
\r
6207 #define bFM3_MFS4_UART_FBYTE2_FD10 *((volatile unsigned int*)(0x42708328UL))
\r
6208 #define bFM3_MFS4_UART_FBYTE2_FD11 *((volatile unsigned int*)(0x4270832CUL))
\r
6209 #define bFM3_MFS4_UART_FBYTE2_FD12 *((volatile unsigned int*)(0x42708330UL))
\r
6210 #define bFM3_MFS4_UART_FBYTE2_FD13 *((volatile unsigned int*)(0x42708334UL))
\r
6211 #define bFM3_MFS4_UART_FBYTE2_FD14 *((volatile unsigned int*)(0x42708338UL))
\r
6212 #define bFM3_MFS4_UART_FBYTE2_FD15 *((volatile unsigned int*)(0x4270833CUL))
\r
6214 /* UART synchronous channel 4 registers */
\r
6215 #define bFM3_MFS4_CSIO_SMR_SOE *((volatile unsigned int*)(0x42708000UL))
\r
6216 #define bFM3_MFS4_CSIO_SMR_SCKE *((volatile unsigned int*)(0x42708004UL))
\r
6217 #define bFM3_MFS4_CSIO_SMR_BDS *((volatile unsigned int*)(0x42708008UL))
\r
6218 #define bFM3_MFS4_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270800CUL))
\r
6219 #define bFM3_MFS4_CSIO_SMR_WUCR *((volatile unsigned int*)(0x42708010UL))
\r
6220 #define bFM3_MFS4_CSIO_SMR_MD0 *((volatile unsigned int*)(0x42708014UL))
\r
6221 #define bFM3_MFS4_CSIO_SMR_MD1 *((volatile unsigned int*)(0x42708018UL))
\r
6222 #define bFM3_MFS4_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270801CUL))
\r
6223 #define bFM3_MFS4_CSIO_SCR_TXE *((volatile unsigned int*)(0x42708020UL))
\r
6224 #define bFM3_MFS4_CSIO_SCR_RXE *((volatile unsigned int*)(0x42708024UL))
\r
6225 #define bFM3_MFS4_CSIO_SCR_TBIE *((volatile unsigned int*)(0x42708028UL))
\r
6226 #define bFM3_MFS4_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270802CUL))
\r
6227 #define bFM3_MFS4_CSIO_SCR_RIE *((volatile unsigned int*)(0x42708030UL))
\r
6228 #define bFM3_MFS4_CSIO_SCR_SPI *((volatile unsigned int*)(0x42708034UL))
\r
6229 #define bFM3_MFS4_CSIO_SCR_MS *((volatile unsigned int*)(0x42708038UL))
\r
6230 #define bFM3_MFS4_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270803CUL))
\r
6231 #define bFM3_MFS4_CSIO_ESCR_L0 *((volatile unsigned int*)(0x42708080UL))
\r
6232 #define bFM3_MFS4_CSIO_ESCR_L1 *((volatile unsigned int*)(0x42708084UL))
\r
6233 #define bFM3_MFS4_CSIO_ESCR_L2 *((volatile unsigned int*)(0x42708088UL))
\r
6234 #define bFM3_MFS4_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270808CUL))
\r
6235 #define bFM3_MFS4_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x42708090UL))
\r
6236 #define bFM3_MFS4_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270809CUL))
\r
6237 #define bFM3_MFS4_CSIO_SSR_TBI *((volatile unsigned int*)(0x427080A0UL))
\r
6238 #define bFM3_MFS4_CSIO_SSR_TDRE *((volatile unsigned int*)(0x427080A4UL))
\r
6239 #define bFM3_MFS4_CSIO_SSR_RDRF *((volatile unsigned int*)(0x427080A8UL))
\r
6240 #define bFM3_MFS4_CSIO_SSR_ORE *((volatile unsigned int*)(0x427080ACUL))
\r
6241 #define bFM3_MFS4_CSIO_SSR_REC *((volatile unsigned int*)(0x427080BCUL))
\r
6242 #define bFM3_MFS4_CSIO_FCR_FE1 *((volatile unsigned int*)(0x42708280UL))
\r
6243 #define bFM3_MFS4_CSIO_FCR_FE2 *((volatile unsigned int*)(0x42708284UL))
\r
6244 #define bFM3_MFS4_CSIO_FCR_FCL1 *((volatile unsigned int*)(0x42708288UL))
\r
6245 #define bFM3_MFS4_CSIO_FCR_FCL2 *((volatile unsigned int*)(0x4270828CUL))
\r
6246 #define bFM3_MFS4_CSIO_FCR_FSET *((volatile unsigned int*)(0x42708290UL))
\r
6247 #define bFM3_MFS4_CSIO_FCR_FLD *((volatile unsigned int*)(0x42708294UL))
\r
6248 #define bFM3_MFS4_CSIO_FCR_FLST *((volatile unsigned int*)(0x42708298UL))
\r
6249 #define bFM3_MFS4_CSIO_FCR_FSEL *((volatile unsigned int*)(0x427082A0UL))
\r
6250 #define bFM3_MFS4_CSIO_FCR_FTIE *((volatile unsigned int*)(0x427082A4UL))
\r
6251 #define bFM3_MFS4_CSIO_FCR_FDRQ *((volatile unsigned int*)(0x427082A8UL))
\r
6252 #define bFM3_MFS4_CSIO_FCR_FRIE *((volatile unsigned int*)(0x427082ACUL))
\r
6253 #define bFM3_MFS4_CSIO_FCR_FLSTE *((volatile unsigned int*)(0x427082B0UL))
\r
6254 #define bFM3_MFS4_CSIO_FCR_FTST0 *((volatile unsigned int*)(0x427082B8UL))
\r
6255 #define bFM3_MFS4_CSIO_FCR_FTST1 *((volatile unsigned int*)(0x427082BCUL))
\r
6256 #define bFM3_MFS4_CSIO_FCR0_FE1 *((volatile unsigned int*)(0x42708280UL))
\r
6257 #define bFM3_MFS4_CSIO_FCR0_FE2 *((volatile unsigned int*)(0x42708284UL))
\r
6258 #define bFM3_MFS4_CSIO_FCR0_FCL1 *((volatile unsigned int*)(0x42708288UL))
\r
6259 #define bFM3_MFS4_CSIO_FCR0_FCL2 *((volatile unsigned int*)(0x4270828CUL))
\r
6260 #define bFM3_MFS4_CSIO_FCR0_FSET *((volatile unsigned int*)(0x42708290UL))
\r
6261 #define bFM3_MFS4_CSIO_FCR0_FLD *((volatile unsigned int*)(0x42708294UL))
\r
6262 #define bFM3_MFS4_CSIO_FCR0_FLST *((volatile unsigned int*)(0x42708298UL))
\r
6263 #define bFM3_MFS4_CSIO_FCR1_FSEL *((volatile unsigned int*)(0x427082A0UL))
\r
6264 #define bFM3_MFS4_CSIO_FCR1_FTIE *((volatile unsigned int*)(0x427082A4UL))
\r
6265 #define bFM3_MFS4_CSIO_FCR1_FDRQ *((volatile unsigned int*)(0x427082A8UL))
\r
6266 #define bFM3_MFS4_CSIO_FCR1_FRIE *((volatile unsigned int*)(0x427082ACUL))
\r
6267 #define bFM3_MFS4_CSIO_FCR1_FLSTE *((volatile unsigned int*)(0x427082B0UL))
\r
6268 #define bFM3_MFS4_CSIO_FCR1_FTST0 *((volatile unsigned int*)(0x427082B8UL))
\r
6269 #define bFM3_MFS4_CSIO_FCR1_FTST1 *((volatile unsigned int*)(0x427082BCUL))
\r
6270 #define bFM3_MFS4_CSIO_FBYTE_FD0 *((volatile unsigned int*)(0x42708300UL))
\r
6271 #define bFM3_MFS4_CSIO_FBYTE_FD1 *((volatile unsigned int*)(0x42708304UL))
\r
6272 #define bFM3_MFS4_CSIO_FBYTE_FD2 *((volatile unsigned int*)(0x42708308UL))
\r
6273 #define bFM3_MFS4_CSIO_FBYTE_FD3 *((volatile unsigned int*)(0x4270830CUL))
\r
6274 #define bFM3_MFS4_CSIO_FBYTE_FD4 *((volatile unsigned int*)(0x42708310UL))
\r
6275 #define bFM3_MFS4_CSIO_FBYTE_FD5 *((volatile unsigned int*)(0x42708314UL))
\r
6276 #define bFM3_MFS4_CSIO_FBYTE_FD6 *((volatile unsigned int*)(0x42708318UL))
\r
6277 #define bFM3_MFS4_CSIO_FBYTE_FD7 *((volatile unsigned int*)(0x4270831CUL))
\r
6278 #define bFM3_MFS4_CSIO_FBYTE_FD8 *((volatile unsigned int*)(0x42708320UL))
\r
6279 #define bFM3_MFS4_CSIO_FBYTE_FD9 *((volatile unsigned int*)(0x42708324UL))
\r
6280 #define bFM3_MFS4_CSIO_FBYTE_FD10 *((volatile unsigned int*)(0x42708328UL))
\r
6281 #define bFM3_MFS4_CSIO_FBYTE_FD11 *((volatile unsigned int*)(0x4270832CUL))
\r
6282 #define bFM3_MFS4_CSIO_FBYTE_FD12 *((volatile unsigned int*)(0x42708330UL))
\r
6283 #define bFM3_MFS4_CSIO_FBYTE_FD13 *((volatile unsigned int*)(0x42708334UL))
\r
6284 #define bFM3_MFS4_CSIO_FBYTE_FD14 *((volatile unsigned int*)(0x42708338UL))
\r
6285 #define bFM3_MFS4_CSIO_FBYTE_FD15 *((volatile unsigned int*)(0x4270833CUL))
\r
6286 #define bFM3_MFS4_CSIO_FBYTE1_FD0 *((volatile unsigned int*)(0x42708300UL))
\r
6287 #define bFM3_MFS4_CSIO_FBYTE1_FD1 *((volatile unsigned int*)(0x42708304UL))
\r
6288 #define bFM3_MFS4_CSIO_FBYTE1_FD2 *((volatile unsigned int*)(0x42708308UL))
\r
6289 #define bFM3_MFS4_CSIO_FBYTE1_FD3 *((volatile unsigned int*)(0x4270830CUL))
\r
6290 #define bFM3_MFS4_CSIO_FBYTE1_FD4 *((volatile unsigned int*)(0x42708310UL))
\r
6291 #define bFM3_MFS4_CSIO_FBYTE1_FD5 *((volatile unsigned int*)(0x42708314UL))
\r
6292 #define bFM3_MFS4_CSIO_FBYTE1_FD6 *((volatile unsigned int*)(0x42708318UL))
\r
6293 #define bFM3_MFS4_CSIO_FBYTE1_FD7 *((volatile unsigned int*)(0x4270831CUL))
\r
6294 #define bFM3_MFS4_CSIO_FBYTE2_FD8 *((volatile unsigned int*)(0x42708340UL))
\r
6295 #define bFM3_MFS4_CSIO_FBYTE2_FD9 *((volatile unsigned int*)(0x42708344UL))
\r
6296 #define bFM3_MFS4_CSIO_FBYTE2_FD10 *((volatile unsigned int*)(0x42708348UL))
\r
6297 #define bFM3_MFS4_CSIO_FBYTE2_FD11 *((volatile unsigned int*)(0x4270834CUL))
\r
6298 #define bFM3_MFS4_CSIO_FBYTE2_FD12 *((volatile unsigned int*)(0x42708350UL))
\r
6299 #define bFM3_MFS4_CSIO_FBYTE2_FD13 *((volatile unsigned int*)(0x42708354UL))
\r
6300 #define bFM3_MFS4_CSIO_FBYTE2_FD14 *((volatile unsigned int*)(0x42708358UL))
\r
6301 #define bFM3_MFS4_CSIO_FBYTE2_FD15 *((volatile unsigned int*)(0x4270835CUL))
\r
6303 /* UART LIN channel 4 registers */
\r
6304 #define bFM3_MFS4_LIN_SMR_SOE *((volatile unsigned int*)(0x42708000UL))
\r
6305 #define bFM3_MFS4_LIN_SMR_SBL *((volatile unsigned int*)(0x4270800CUL))
\r
6306 #define bFM3_MFS4_LIN_SMR_WUCR *((volatile unsigned int*)(0x42708010UL))
\r
6307 #define bFM3_MFS4_LIN_SMR_MD0 *((volatile unsigned int*)(0x42708014UL))
\r
6308 #define bFM3_MFS4_LIN_SMR_MD1 *((volatile unsigned int*)(0x42708018UL))
\r
6309 #define bFM3_MFS4_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270801CUL))
\r
6310 #define bFM3_MFS4_LIN_SCR_TXE *((volatile unsigned int*)(0x42708020UL))
\r
6311 #define bFM3_MFS4_LIN_SCR_RXE *((volatile unsigned int*)(0x42708024UL))
\r
6312 #define bFM3_MFS4_LIN_SCR_TBIE *((volatile unsigned int*)(0x42708028UL))
\r
6313 #define bFM3_MFS4_LIN_SCR_TIE *((volatile unsigned int*)(0x4270802CUL))
\r
6314 #define bFM3_MFS4_LIN_SCR_RIE *((volatile unsigned int*)(0x42708030UL))
\r
6315 #define bFM3_MFS4_LIN_SCR_LBR *((volatile unsigned int*)(0x42708034UL))
\r
6316 #define bFM3_MFS4_LIN_SCR_MS *((volatile unsigned int*)(0x42708038UL))
\r
6317 #define bFM3_MFS4_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270803CUL))
\r
6318 #define bFM3_MFS4_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x42708080UL))
\r
6319 #define bFM3_MFS4_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x42708084UL))
\r
6320 #define bFM3_MFS4_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x42708088UL))
\r
6321 #define bFM3_MFS4_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270808CUL))
\r
6322 #define bFM3_MFS4_LIN_ESCR_LBIE *((volatile unsigned int*)(0x42708090UL))
\r
6323 #define bFM3_MFS4_LIN_ESCR_ESBL *((volatile unsigned int*)(0x42708098UL))
\r
6324 #define bFM3_MFS4_LIN_SSR_TBI *((volatile unsigned int*)(0x427080A0UL))
\r
6325 #define bFM3_MFS4_LIN_SSR_TDRE *((volatile unsigned int*)(0x427080A4UL))
\r
6326 #define bFM3_MFS4_LIN_SSR_RDRF *((volatile unsigned int*)(0x427080A8UL))
\r
6327 #define bFM3_MFS4_LIN_SSR_ORE *((volatile unsigned int*)(0x427080ACUL))
\r
6328 #define bFM3_MFS4_LIN_SSR_FRE *((volatile unsigned int*)(0x427080B0UL))
\r
6329 #define bFM3_MFS4_LIN_SSR_LBD *((volatile unsigned int*)(0x427080B4UL))
\r
6330 #define bFM3_MFS4_LIN_SSR_REC *((volatile unsigned int*)(0x427080BCUL))
\r
6331 #define bFM3_MFS4_LIN_BGR_EXT *((volatile unsigned int*)(0x427081BCUL))
\r
6332 #define bFM3_MFS4_LIN_BGR1_EXT *((volatile unsigned int*)(0x427081BCUL))
\r
6333 #define bFM3_MFS4_LIN_FCR_FE1 *((volatile unsigned int*)(0x42708280UL))
\r
6334 #define bFM3_MFS4_LIN_FCR_FE2 *((volatile unsigned int*)(0x42708284UL))
\r
6335 #define bFM3_MFS4_LIN_FCR_FCL1 *((volatile unsigned int*)(0x42708288UL))
\r
6336 #define bFM3_MFS4_LIN_FCR_FCL2 *((volatile unsigned int*)(0x4270828CUL))
\r
6337 #define bFM3_MFS4_LIN_FCR_FSET *((volatile unsigned int*)(0x42708290UL))
\r
6338 #define bFM3_MFS4_LIN_FCR_FLD *((volatile unsigned int*)(0x42708294UL))
\r
6339 #define bFM3_MFS4_LIN_FCR_FLST *((volatile unsigned int*)(0x42708298UL))
\r
6340 #define bFM3_MFS4_LIN_FCR_FSEL *((volatile unsigned int*)(0x427082A0UL))
\r
6341 #define bFM3_MFS4_LIN_FCR_FTIE *((volatile unsigned int*)(0x427082A4UL))
\r
6342 #define bFM3_MFS4_LIN_FCR_FDRQ *((volatile unsigned int*)(0x427082A8UL))
\r
6343 #define bFM3_MFS4_LIN_FCR_FRIE *((volatile unsigned int*)(0x427082ACUL))
\r
6344 #define bFM3_MFS4_LIN_FCR_FLSTE *((volatile unsigned int*)(0x427082B0UL))
\r
6345 #define bFM3_MFS4_LIN_FCR_FTST0 *((volatile unsigned int*)(0x427082B8UL))
\r
6346 #define bFM3_MFS4_LIN_FCR_FTST1 *((volatile unsigned int*)(0x427082BCUL))
\r
6347 #define bFM3_MFS4_LIN_FCR0_FE1 *((volatile unsigned int*)(0x42708280UL))
\r
6348 #define bFM3_MFS4_LIN_FCR0_FE2 *((volatile unsigned int*)(0x42708284UL))
\r
6349 #define bFM3_MFS4_LIN_FCR0_FCL1 *((volatile unsigned int*)(0x42708288UL))
\r
6350 #define bFM3_MFS4_LIN_FCR0_FCL2 *((volatile unsigned int*)(0x4270828CUL))
\r
6351 #define bFM3_MFS4_LIN_FCR0_FSET *((volatile unsigned int*)(0x42708290UL))
\r
6352 #define bFM3_MFS4_LIN_FCR0_FLD *((volatile unsigned int*)(0x42708294UL))
\r
6353 #define bFM3_MFS4_LIN_FCR0_FLST *((volatile unsigned int*)(0x42708298UL))
\r
6354 #define bFM3_MFS4_LIN_FCR1_FSEL *((volatile unsigned int*)(0x427082A0UL))
\r
6355 #define bFM3_MFS4_LIN_FCR1_FTIE *((volatile unsigned int*)(0x427082A4UL))
\r
6356 #define bFM3_MFS4_LIN_FCR1_FDRQ *((volatile unsigned int*)(0x427082A8UL))
\r
6357 #define bFM3_MFS4_LIN_FCR1_FRIE *((volatile unsigned int*)(0x427082ACUL))
\r
6358 #define bFM3_MFS4_LIN_FCR1_FLSTE *((volatile unsigned int*)(0x427082B0UL))
\r
6359 #define bFM3_MFS4_LIN_FCR1_FTST0 *((volatile unsigned int*)(0x427082B8UL))
\r
6360 #define bFM3_MFS4_LIN_FCR1_FTST1 *((volatile unsigned int*)(0x427082BCUL))
\r
6361 #define bFM3_MFS4_LIN_FBYTE_FD0 *((volatile unsigned int*)(0x42708300UL))
\r
6362 #define bFM3_MFS4_LIN_FBYTE_FD1 *((volatile unsigned int*)(0x42708304UL))
\r
6363 #define bFM3_MFS4_LIN_FBYTE_FD2 *((volatile unsigned int*)(0x42708308UL))
\r
6364 #define bFM3_MFS4_LIN_FBYTE_FD3 *((volatile unsigned int*)(0x4270830CUL))
\r
6365 #define bFM3_MFS4_LIN_FBYTE_FD4 *((volatile unsigned int*)(0x42708310UL))
\r
6366 #define bFM3_MFS4_LIN_FBYTE_FD5 *((volatile unsigned int*)(0x42708314UL))
\r
6367 #define bFM3_MFS4_LIN_FBYTE_FD6 *((volatile unsigned int*)(0x42708318UL))
\r
6368 #define bFM3_MFS4_LIN_FBYTE_FD7 *((volatile unsigned int*)(0x4270831CUL))
\r
6369 #define bFM3_MFS4_LIN_FBYTE_FD8 *((volatile unsigned int*)(0x42708320UL))
\r
6370 #define bFM3_MFS4_LIN_FBYTE_FD9 *((volatile unsigned int*)(0x42708324UL))
\r
6371 #define bFM3_MFS4_LIN_FBYTE_FD10 *((volatile unsigned int*)(0x42708328UL))
\r
6372 #define bFM3_MFS4_LIN_FBYTE_FD11 *((volatile unsigned int*)(0x4270832CUL))
\r
6373 #define bFM3_MFS4_LIN_FBYTE_FD12 *((volatile unsigned int*)(0x42708330UL))
\r
6374 #define bFM3_MFS4_LIN_FBYTE_FD13 *((volatile unsigned int*)(0x42708334UL))
\r
6375 #define bFM3_MFS4_LIN_FBYTE_FD14 *((volatile unsigned int*)(0x42708338UL))
\r
6376 #define bFM3_MFS4_LIN_FBYTE_FD15 *((volatile unsigned int*)(0x4270833CUL))
\r
6377 #define bFM3_MFS4_LIN_FBYTE1_FD0 *((volatile unsigned int*)(0x42708300UL))
\r
6378 #define bFM3_MFS4_LIN_FBYTE1_FD1 *((volatile unsigned int*)(0x42708304UL))
\r
6379 #define bFM3_MFS4_LIN_FBYTE1_FD2 *((volatile unsigned int*)(0x42708308UL))
\r
6380 #define bFM3_MFS4_LIN_FBYTE1_FD3 *((volatile unsigned int*)(0x4270830CUL))
\r
6381 #define bFM3_MFS4_LIN_FBYTE1_FD4 *((volatile unsigned int*)(0x42708310UL))
\r
6382 #define bFM3_MFS4_LIN_FBYTE1_FD5 *((volatile unsigned int*)(0x42708314UL))
\r
6383 #define bFM3_MFS4_LIN_FBYTE1_FD6 *((volatile unsigned int*)(0x42708318UL))
\r
6384 #define bFM3_MFS4_LIN_FBYTE1_FD7 *((volatile unsigned int*)(0x4270831CUL))
\r
6385 #define bFM3_MFS4_LIN_FBYTE2_FD8 *((volatile unsigned int*)(0x42708340UL))
\r
6386 #define bFM3_MFS4_LIN_FBYTE2_FD9 *((volatile unsigned int*)(0x42708344UL))
\r
6387 #define bFM3_MFS4_LIN_FBYTE2_FD10 *((volatile unsigned int*)(0x42708348UL))
\r
6388 #define bFM3_MFS4_LIN_FBYTE2_FD11 *((volatile unsigned int*)(0x4270834CUL))
\r
6389 #define bFM3_MFS4_LIN_FBYTE2_FD12 *((volatile unsigned int*)(0x42708350UL))
\r
6390 #define bFM3_MFS4_LIN_FBYTE2_FD13 *((volatile unsigned int*)(0x42708354UL))
\r
6391 #define bFM3_MFS4_LIN_FBYTE2_FD14 *((volatile unsigned int*)(0x42708358UL))
\r
6392 #define bFM3_MFS4_LIN_FBYTE2_FD15 *((volatile unsigned int*)(0x4270835CUL))
\r
6394 /* I2C channel 4 registers */
\r
6395 #define bFM3_MFS4_I2C_SMR_ITST0 *((volatile unsigned int*)(0x42708000UL))
\r
6396 #define bFM3_MFS4_I2C_SMR_ITST1 *((volatile unsigned int*)(0x42708004UL))
\r
6397 #define bFM3_MFS4_I2C_SMR_TIE *((volatile unsigned int*)(0x42708008UL))
\r
6398 #define bFM3_MFS4_I2C_SMR_RIE *((volatile unsigned int*)(0x4270800CUL))
\r
6399 #define bFM3_MFS4_I2C_SMR_WUCR *((volatile unsigned int*)(0x42708010UL))
\r
6400 #define bFM3_MFS4_I2C_SMR_MD0 *((volatile unsigned int*)(0x42708014UL))
\r
6401 #define bFM3_MFS4_I2C_SMR_MD1 *((volatile unsigned int*)(0x42708018UL))
\r
6402 #define bFM3_MFS4_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270801CUL))
\r
6403 #define bFM3_MFS4_I2C_IBCR_INT *((volatile unsigned int*)(0x42708020UL))
\r
6404 #define bFM3_MFS4_I2C_IBCR_BER *((volatile unsigned int*)(0x42708024UL))
\r
6405 #define bFM3_MFS4_I2C_IBCR_INTE *((volatile unsigned int*)(0x42708028UL))
\r
6406 #define bFM3_MFS4_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270802CUL))
\r
6407 #define bFM3_MFS4_I2C_IBCR_WSEL *((volatile unsigned int*)(0x42708030UL))
\r
6408 #define bFM3_MFS4_I2C_IBCR_ACKE *((volatile unsigned int*)(0x42708034UL))
\r
6409 #define bFM3_MFS4_I2C_IBCR_ACT *((volatile unsigned int*)(0x42708038UL))
\r
6410 #define bFM3_MFS4_I2C_IBCR_SCC *((volatile unsigned int*)(0x42708038UL))
\r
6411 #define bFM3_MFS4_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270803CUL))
\r
6412 #define bFM3_MFS4_I2C_IBSR_BB *((volatile unsigned int*)(0x42708080UL))
\r
6413 #define bFM3_MFS4_I2C_IBSR_SPC *((volatile unsigned int*)(0x42708084UL))
\r
6414 #define bFM3_MFS4_I2C_IBSR_RSC *((volatile unsigned int*)(0x42708088UL))
\r
6415 #define bFM3_MFS4_I2C_IBSR_AL *((volatile unsigned int*)(0x4270808CUL))
\r
6416 #define bFM3_MFS4_I2C_IBSR_TRX *((volatile unsigned int*)(0x42708090UL))
\r
6417 #define bFM3_MFS4_I2C_IBSR_RSA *((volatile unsigned int*)(0x42708094UL))
\r
6418 #define bFM3_MFS4_I2C_IBSR_RACK *((volatile unsigned int*)(0x42708098UL))
\r
6419 #define bFM3_MFS4_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270809CUL))
\r
6420 #define bFM3_MFS4_I2C_SSR_TBI *((volatile unsigned int*)(0x427080A0UL))
\r
6421 #define bFM3_MFS4_I2C_SSR_TDRE *((volatile unsigned int*)(0x427080A4UL))
\r
6422 #define bFM3_MFS4_I2C_SSR_RDRF *((volatile unsigned int*)(0x427080A8UL))
\r
6423 #define bFM3_MFS4_I2C_SSR_ORE *((volatile unsigned int*)(0x427080ACUL))
\r
6424 #define bFM3_MFS4_I2C_SSR_TBIE *((volatile unsigned int*)(0x427080B0UL))
\r
6425 #define bFM3_MFS4_I2C_SSR_DMA *((volatile unsigned int*)(0x427080B4UL))
\r
6426 #define bFM3_MFS4_I2C_SSR_TSET *((volatile unsigned int*)(0x427080B8UL))
\r
6427 #define bFM3_MFS4_I2C_SSR_REC *((volatile unsigned int*)(0x427080BCUL))
\r
6428 #define bFM3_MFS4_I2C_ISBA_SA0 *((volatile unsigned int*)(0x42708200UL))
\r
6429 #define bFM3_MFS4_I2C_ISBA_SA1 *((volatile unsigned int*)(0x42708204UL))
\r
6430 #define bFM3_MFS4_I2C_ISBA_SA2 *((volatile unsigned int*)(0x42708208UL))
\r
6431 #define bFM3_MFS4_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270820CUL))
\r
6432 #define bFM3_MFS4_I2C_ISBA_SA4 *((volatile unsigned int*)(0x42708210UL))
\r
6433 #define bFM3_MFS4_I2C_ISBA_SA5 *((volatile unsigned int*)(0x42708214UL))
\r
6434 #define bFM3_MFS4_I2C_ISBA_SA6 *((volatile unsigned int*)(0x42708218UL))
\r
6435 #define bFM3_MFS4_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270821CUL))
\r
6436 #define bFM3_MFS4_I2C_ISMK_SM0 *((volatile unsigned int*)(0x42708220UL))
\r
6437 #define bFM3_MFS4_I2C_ISMK_SM1 *((volatile unsigned int*)(0x42708224UL))
\r
6438 #define bFM3_MFS4_I2C_ISMK_SM2 *((volatile unsigned int*)(0x42708228UL))
\r
6439 #define bFM3_MFS4_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270822CUL))
\r
6440 #define bFM3_MFS4_I2C_ISMK_SM4 *((volatile unsigned int*)(0x42708230UL))
\r
6441 #define bFM3_MFS4_I2C_ISMK_SM5 *((volatile unsigned int*)(0x42708234UL))
\r
6442 #define bFM3_MFS4_I2C_ISMK_SM6 *((volatile unsigned int*)(0x42708238UL))
\r
6443 #define bFM3_MFS4_I2C_ISMK_EN *((volatile unsigned int*)(0x4270823CUL))
\r
6444 #define bFM3_MFS4_I2C_FCR_FE1 *((volatile unsigned int*)(0x42708280UL))
\r
6445 #define bFM3_MFS4_I2C_FCR_FE2 *((volatile unsigned int*)(0x42708284UL))
\r
6446 #define bFM3_MFS4_I2C_FCR_FCL1 *((volatile unsigned int*)(0x42708288UL))
\r
6447 #define bFM3_MFS4_I2C_FCR_FCL2 *((volatile unsigned int*)(0x4270828CUL))
\r
6448 #define bFM3_MFS4_I2C_FCR_FSET *((volatile unsigned int*)(0x42708290UL))
\r
6449 #define bFM3_MFS4_I2C_FCR_FLD *((volatile unsigned int*)(0x42708294UL))
\r
6450 #define bFM3_MFS4_I2C_FCR_FLST *((volatile unsigned int*)(0x42708298UL))
\r
6451 #define bFM3_MFS4_I2C_FCR_FSEL *((volatile unsigned int*)(0x427082A0UL))
\r
6452 #define bFM3_MFS4_I2C_FCR_FTIE *((volatile unsigned int*)(0x427082A4UL))
\r
6453 #define bFM3_MFS4_I2C_FCR_FDRQ *((volatile unsigned int*)(0x427082A8UL))
\r
6454 #define bFM3_MFS4_I2C_FCR_FRIE *((volatile unsigned int*)(0x427082ACUL))
\r
6455 #define bFM3_MFS4_I2C_FCR_FLSTE *((volatile unsigned int*)(0x427082B0UL))
\r
6456 #define bFM3_MFS4_I2C_FCR_FTST0 *((volatile unsigned int*)(0x427082B8UL))
\r
6457 #define bFM3_MFS4_I2C_FCR_FTST1 *((volatile unsigned int*)(0x427082BCUL))
\r
6458 #define bFM3_MFS4_I2C_FCR0_FE1 *((volatile unsigned int*)(0x42708280UL))
\r
6459 #define bFM3_MFS4_I2C_FCR0_FE2 *((volatile unsigned int*)(0x42708284UL))
\r
6460 #define bFM3_MFS4_I2C_FCR0_FCL1 *((volatile unsigned int*)(0x42708288UL))
\r
6461 #define bFM3_MFS4_I2C_FCR0_FCL2 *((volatile unsigned int*)(0x4270828CUL))
\r
6462 #define bFM3_MFS4_I2C_FCR0_FSET *((volatile unsigned int*)(0x42708290UL))
\r
6463 #define bFM3_MFS4_I2C_FCR0_FLD *((volatile unsigned int*)(0x42708294UL))
\r
6464 #define bFM3_MFS4_I2C_FCR0_FLST *((volatile unsigned int*)(0x42708298UL))
\r
6465 #define bFM3_MFS4_I2C_FCR1_FSEL *((volatile unsigned int*)(0x427082A0UL))
\r
6466 #define bFM3_MFS4_I2C_FCR1_FTIE *((volatile unsigned int*)(0x427082A4UL))
\r
6467 #define bFM3_MFS4_I2C_FCR1_FDRQ *((volatile unsigned int*)(0x427082A8UL))
\r
6468 #define bFM3_MFS4_I2C_FCR1_FRIE *((volatile unsigned int*)(0x427082ACUL))
\r
6469 #define bFM3_MFS4_I2C_FCR1_FLSTE *((volatile unsigned int*)(0x427082B0UL))
\r
6470 #define bFM3_MFS4_I2C_FCR1_FTST0 *((volatile unsigned int*)(0x427082B8UL))
\r
6471 #define bFM3_MFS4_I2C_FCR1_FTST1 *((volatile unsigned int*)(0x427082BCUL))
\r
6472 #define bFM3_MFS4_I2C_FBYTE_FD0 *((volatile unsigned int*)(0x42708300UL))
\r
6473 #define bFM3_MFS4_I2C_FBYTE_FD1 *((volatile unsigned int*)(0x42708304UL))
\r
6474 #define bFM3_MFS4_I2C_FBYTE_FD2 *((volatile unsigned int*)(0x42708308UL))
\r
6475 #define bFM3_MFS4_I2C_FBYTE_FD3 *((volatile unsigned int*)(0x4270830CUL))
\r
6476 #define bFM3_MFS4_I2C_FBYTE_FD4 *((volatile unsigned int*)(0x42708310UL))
\r
6477 #define bFM3_MFS4_I2C_FBYTE_FD5 *((volatile unsigned int*)(0x42708314UL))
\r
6478 #define bFM3_MFS4_I2C_FBYTE_FD6 *((volatile unsigned int*)(0x42708318UL))
\r
6479 #define bFM3_MFS4_I2C_FBYTE_FD7 *((volatile unsigned int*)(0x4270831CUL))
\r
6480 #define bFM3_MFS4_I2C_FBYTE_FD8 *((volatile unsigned int*)(0x42708320UL))
\r
6481 #define bFM3_MFS4_I2C_FBYTE_FD9 *((volatile unsigned int*)(0x42708324UL))
\r
6482 #define bFM3_MFS4_I2C_FBYTE_FD10 *((volatile unsigned int*)(0x42708328UL))
\r
6483 #define bFM3_MFS4_I2C_FBYTE_FD11 *((volatile unsigned int*)(0x4270832CUL))
\r
6484 #define bFM3_MFS4_I2C_FBYTE_FD12 *((volatile unsigned int*)(0x42708330UL))
\r
6485 #define bFM3_MFS4_I2C_FBYTE_FD13 *((volatile unsigned int*)(0x42708334UL))
\r
6486 #define bFM3_MFS4_I2C_FBYTE_FD14 *((volatile unsigned int*)(0x42708338UL))
\r
6487 #define bFM3_MFS4_I2C_FBYTE_FD15 *((volatile unsigned int*)(0x4270833CUL))
\r
6488 #define bFM3_MFS4_I2C_FBYTE1_FD0 *((volatile unsigned int*)(0x42708300UL))
\r
6489 #define bFM3_MFS4_I2C_FBYTE1_FD1 *((volatile unsigned int*)(0x42708304UL))
\r
6490 #define bFM3_MFS4_I2C_FBYTE1_FD2 *((volatile unsigned int*)(0x42708308UL))
\r
6491 #define bFM3_MFS4_I2C_FBYTE1_FD3 *((volatile unsigned int*)(0x4270830CUL))
\r
6492 #define bFM3_MFS4_I2C_FBYTE1_FD4 *((volatile unsigned int*)(0x42708310UL))
\r
6493 #define bFM3_MFS4_I2C_FBYTE1_FD5 *((volatile unsigned int*)(0x42708314UL))
\r
6494 #define bFM3_MFS4_I2C_FBYTE1_FD6 *((volatile unsigned int*)(0x42708318UL))
\r
6495 #define bFM3_MFS4_I2C_FBYTE1_FD7 *((volatile unsigned int*)(0x4270831CUL))
\r
6496 #define bFM3_MFS4_I2C_FBYTE2_FD8 *((volatile unsigned int*)(0x42708340UL))
\r
6497 #define bFM3_MFS4_I2C_FBYTE2_FD9 *((volatile unsigned int*)(0x42708344UL))
\r
6498 #define bFM3_MFS4_I2C_FBYTE2_FD10 *((volatile unsigned int*)(0x42708348UL))
\r
6499 #define bFM3_MFS4_I2C_FBYTE2_FD11 *((volatile unsigned int*)(0x4270834CUL))
\r
6500 #define bFM3_MFS4_I2C_FBYTE2_FD12 *((volatile unsigned int*)(0x42708350UL))
\r
6501 #define bFM3_MFS4_I2C_FBYTE2_FD13 *((volatile unsigned int*)(0x42708354UL))
\r
6502 #define bFM3_MFS4_I2C_FBYTE2_FD14 *((volatile unsigned int*)(0x42708358UL))
\r
6503 #define bFM3_MFS4_I2C_FBYTE2_FD15 *((volatile unsigned int*)(0x4270835CUL))
\r
6505 /* UART asynchronous channel 5 registers */
\r
6506 #define bFM3_MFS5_UART_SMR_SOE *((volatile unsigned int*)(0x4270A000UL))
\r
6507 #define bFM3_MFS5_UART_SMR_BDS *((volatile unsigned int*)(0x4270A008UL))
\r
6508 #define bFM3_MFS5_UART_SMR_SBL *((volatile unsigned int*)(0x4270A00CUL))
\r
6509 #define bFM3_MFS5_UART_SMR_WUCR *((volatile unsigned int*)(0x4270A010UL))
\r
6510 #define bFM3_MFS5_UART_SMR_MD0 *((volatile unsigned int*)(0x4270A014UL))
\r
6511 #define bFM3_MFS5_UART_SMR_MD1 *((volatile unsigned int*)(0x4270A018UL))
\r
6512 #define bFM3_MFS5_UART_SMR_MD2 *((volatile unsigned int*)(0x4270A01CUL))
\r
6513 #define bFM3_MFS5_UART_SCR_TXE *((volatile unsigned int*)(0x4270A020UL))
\r
6514 #define bFM3_MFS5_UART_SCR_RXE *((volatile unsigned int*)(0x4270A024UL))
\r
6515 #define bFM3_MFS5_UART_SCR_TBIE *((volatile unsigned int*)(0x4270A028UL))
\r
6516 #define bFM3_MFS5_UART_SCR_TIE *((volatile unsigned int*)(0x4270A02CUL))
\r
6517 #define bFM3_MFS5_UART_SCR_RIE *((volatile unsigned int*)(0x4270A030UL))
\r
6518 #define bFM3_MFS5_UART_SCR_UPCL *((volatile unsigned int*)(0x4270A03CUL))
\r
6519 #define bFM3_MFS5_UART_ESCR_L0 *((volatile unsigned int*)(0x4270A080UL))
\r
6520 #define bFM3_MFS5_UART_ESCR_L1 *((volatile unsigned int*)(0x4270A084UL))
\r
6521 #define bFM3_MFS5_UART_ESCR_L2 *((volatile unsigned int*)(0x4270A088UL))
\r
6522 #define bFM3_MFS5_UART_ESCR_P *((volatile unsigned int*)(0x4270A08CUL))
\r
6523 #define bFM3_MFS5_UART_ESCR_PEN *((volatile unsigned int*)(0x4270A090UL))
\r
6524 #define bFM3_MFS5_UART_ESCR_INV *((volatile unsigned int*)(0x4270A094UL))
\r
6525 #define bFM3_MFS5_UART_ESCR_ESBL *((volatile unsigned int*)(0x4270A098UL))
\r
6526 #define bFM3_MFS5_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270A09CUL))
\r
6527 #define bFM3_MFS5_UART_SSR_TBI *((volatile unsigned int*)(0x4270A0A0UL))
\r
6528 #define bFM3_MFS5_UART_SSR_TDRE *((volatile unsigned int*)(0x4270A0A4UL))
\r
6529 #define bFM3_MFS5_UART_SSR_RDRF *((volatile unsigned int*)(0x4270A0A8UL))
\r
6530 #define bFM3_MFS5_UART_SSR_ORE *((volatile unsigned int*)(0x4270A0ACUL))
\r
6531 #define bFM3_MFS5_UART_SSR_FRE *((volatile unsigned int*)(0x4270A0B0UL))
\r
6532 #define bFM3_MFS5_UART_SSR_PE *((volatile unsigned int*)(0x4270A0B4UL))
\r
6533 #define bFM3_MFS5_UART_SSR_REC *((volatile unsigned int*)(0x4270A0BCUL))
\r
6534 #define bFM3_MFS5_UART_RDR_AD *((volatile unsigned int*)(0x4270A120UL))
\r
6535 #define bFM3_MFS5_UART_TDR_AD *((volatile unsigned int*)(0x4270A120UL))
\r
6536 #define bFM3_MFS5_UART_BGR_EXT *((volatile unsigned int*)(0x4270A1BCUL))
\r
6537 #define bFM3_MFS5_UART_BGR1_EXT *((volatile unsigned int*)(0x4270A1BCUL))
\r
6538 #define bFM3_MFS5_UART_FCR_FE1 *((volatile unsigned int*)(0x4270A280UL))
\r
6539 #define bFM3_MFS5_UART_FCR_FE2 *((volatile unsigned int*)(0x4270A284UL))
\r
6540 #define bFM3_MFS5_UART_FCR_FCL1 *((volatile unsigned int*)(0x4270A288UL))
\r
6541 #define bFM3_MFS5_UART_FCR_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
\r
6542 #define bFM3_MFS5_UART_FCR_FSET *((volatile unsigned int*)(0x4270A290UL))
\r
6543 #define bFM3_MFS5_UART_FCR_FLD *((volatile unsigned int*)(0x4270A294UL))
\r
6544 #define bFM3_MFS5_UART_FCR_FLST *((volatile unsigned int*)(0x4270A298UL))
\r
6545 #define bFM3_MFS5_UART_FCR_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
\r
6546 #define bFM3_MFS5_UART_FCR_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
\r
6547 #define bFM3_MFS5_UART_FCR_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
\r
6548 #define bFM3_MFS5_UART_FCR_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
\r
6549 #define bFM3_MFS5_UART_FCR_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
\r
6550 #define bFM3_MFS5_UART_FCR_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
\r
6551 #define bFM3_MFS5_UART_FCR_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
\r
6552 #define bFM3_MFS5_UART_FCR0_FE1 *((volatile unsigned int*)(0x4270A280UL))
\r
6553 #define bFM3_MFS5_UART_FCR0_FE2 *((volatile unsigned int*)(0x4270A284UL))
\r
6554 #define bFM3_MFS5_UART_FCR0_FCL1 *((volatile unsigned int*)(0x4270A288UL))
\r
6555 #define bFM3_MFS5_UART_FCR0_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
\r
6556 #define bFM3_MFS5_UART_FCR0_FSET *((volatile unsigned int*)(0x4270A290UL))
\r
6557 #define bFM3_MFS5_UART_FCR0_FLD *((volatile unsigned int*)(0x4270A294UL))
\r
6558 #define bFM3_MFS5_UART_FCR0_FLST *((volatile unsigned int*)(0x4270A298UL))
\r
6559 #define bFM3_MFS5_UART_FCR1_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
\r
6560 #define bFM3_MFS5_UART_FCR1_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
\r
6561 #define bFM3_MFS5_UART_FCR1_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
\r
6562 #define bFM3_MFS5_UART_FCR1_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
\r
6563 #define bFM3_MFS5_UART_FCR1_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
\r
6564 #define bFM3_MFS5_UART_FCR1_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
\r
6565 #define bFM3_MFS5_UART_FCR1_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
\r
6566 #define bFM3_MFS5_UART_FBYTE_FD0 *((volatile unsigned int*)(0x4270A300UL))
\r
6567 #define bFM3_MFS5_UART_FBYTE_FD1 *((volatile unsigned int*)(0x4270A304UL))
\r
6568 #define bFM3_MFS5_UART_FBYTE_FD2 *((volatile unsigned int*)(0x4270A308UL))
\r
6569 #define bFM3_MFS5_UART_FBYTE_FD3 *((volatile unsigned int*)(0x4270A30CUL))
\r
6570 #define bFM3_MFS5_UART_FBYTE_FD4 *((volatile unsigned int*)(0x4270A310UL))
\r
6571 #define bFM3_MFS5_UART_FBYTE_FD5 *((volatile unsigned int*)(0x4270A314UL))
\r
6572 #define bFM3_MFS5_UART_FBYTE_FD6 *((volatile unsigned int*)(0x4270A318UL))
\r
6573 #define bFM3_MFS5_UART_FBYTE_FD7 *((volatile unsigned int*)(0x4270A31CUL))
\r
6574 #define bFM3_MFS5_UART_FBYTE_FD8 *((volatile unsigned int*)(0x4270A320UL))
\r
6575 #define bFM3_MFS5_UART_FBYTE_FD9 *((volatile unsigned int*)(0x4270A324UL))
\r
6576 #define bFM3_MFS5_UART_FBYTE_FD10 *((volatile unsigned int*)(0x4270A328UL))
\r
6577 #define bFM3_MFS5_UART_FBYTE_FD11 *((volatile unsigned int*)(0x4270A32CUL))
\r
6578 #define bFM3_MFS5_UART_FBYTE_FD12 *((volatile unsigned int*)(0x4270A330UL))
\r
6579 #define bFM3_MFS5_UART_FBYTE_FD13 *((volatile unsigned int*)(0x4270A334UL))
\r
6580 #define bFM3_MFS5_UART_FBYTE_FD14 *((volatile unsigned int*)(0x4270A338UL))
\r
6581 #define bFM3_MFS5_UART_FBYTE_FD15 *((volatile unsigned int*)(0x4270A33CUL))
\r
6582 #define bFM3_MFS5_UART_FBYTE1_FD0 *((volatile unsigned int*)(0x4270A300UL))
\r
6583 #define bFM3_MFS5_UART_FBYTE1_FD1 *((volatile unsigned int*)(0x4270A304UL))
\r
6584 #define bFM3_MFS5_UART_FBYTE1_FD2 *((volatile unsigned int*)(0x4270A308UL))
\r
6585 #define bFM3_MFS5_UART_FBYTE1_FD3 *((volatile unsigned int*)(0x4270A30CUL))
\r
6586 #define bFM3_MFS5_UART_FBYTE1_FD4 *((volatile unsigned int*)(0x4270A310UL))
\r
6587 #define bFM3_MFS5_UART_FBYTE1_FD5 *((volatile unsigned int*)(0x4270A314UL))
\r
6588 #define bFM3_MFS5_UART_FBYTE1_FD6 *((volatile unsigned int*)(0x4270A318UL))
\r
6589 #define bFM3_MFS5_UART_FBYTE1_FD7 *((volatile unsigned int*)(0x4270A31CUL))
\r
6590 #define bFM3_MFS5_UART_FBYTE2_FD8 *((volatile unsigned int*)(0x4270A320UL))
\r
6591 #define bFM3_MFS5_UART_FBYTE2_FD9 *((volatile unsigned int*)(0x4270A324UL))
\r
6592 #define bFM3_MFS5_UART_FBYTE2_FD10 *((volatile unsigned int*)(0x4270A328UL))
\r
6593 #define bFM3_MFS5_UART_FBYTE2_FD11 *((volatile unsigned int*)(0x4270A32CUL))
\r
6594 #define bFM3_MFS5_UART_FBYTE2_FD12 *((volatile unsigned int*)(0x4270A330UL))
\r
6595 #define bFM3_MFS5_UART_FBYTE2_FD13 *((volatile unsigned int*)(0x4270A334UL))
\r
6596 #define bFM3_MFS5_UART_FBYTE2_FD14 *((volatile unsigned int*)(0x4270A338UL))
\r
6597 #define bFM3_MFS5_UART_FBYTE2_FD15 *((volatile unsigned int*)(0x4270A33CUL))
\r
6599 /* UART synchronous channel 5 registers */
\r
6600 #define bFM3_MFS5_CSIO_SMR_SOE *((volatile unsigned int*)(0x4270A000UL))
\r
6601 #define bFM3_MFS5_CSIO_SMR_SCKE *((volatile unsigned int*)(0x4270A004UL))
\r
6602 #define bFM3_MFS5_CSIO_SMR_BDS *((volatile unsigned int*)(0x4270A008UL))
\r
6603 #define bFM3_MFS5_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270A00CUL))
\r
6604 #define bFM3_MFS5_CSIO_SMR_WUCR *((volatile unsigned int*)(0x4270A010UL))
\r
6605 #define bFM3_MFS5_CSIO_SMR_MD0 *((volatile unsigned int*)(0x4270A014UL))
\r
6606 #define bFM3_MFS5_CSIO_SMR_MD1 *((volatile unsigned int*)(0x4270A018UL))
\r
6607 #define bFM3_MFS5_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270A01CUL))
\r
6608 #define bFM3_MFS5_CSIO_SCR_TXE *((volatile unsigned int*)(0x4270A020UL))
\r
6609 #define bFM3_MFS5_CSIO_SCR_RXE *((volatile unsigned int*)(0x4270A024UL))
\r
6610 #define bFM3_MFS5_CSIO_SCR_TBIE *((volatile unsigned int*)(0x4270A028UL))
\r
6611 #define bFM3_MFS5_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270A02CUL))
\r
6612 #define bFM3_MFS5_CSIO_SCR_RIE *((volatile unsigned int*)(0x4270A030UL))
\r
6613 #define bFM3_MFS5_CSIO_SCR_SPI *((volatile unsigned int*)(0x4270A034UL))
\r
6614 #define bFM3_MFS5_CSIO_SCR_MS *((volatile unsigned int*)(0x4270A038UL))
\r
6615 #define bFM3_MFS5_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270A03CUL))
\r
6616 #define bFM3_MFS5_CSIO_ESCR_L0 *((volatile unsigned int*)(0x4270A080UL))
\r
6617 #define bFM3_MFS5_CSIO_ESCR_L1 *((volatile unsigned int*)(0x4270A084UL))
\r
6618 #define bFM3_MFS5_CSIO_ESCR_L2 *((volatile unsigned int*)(0x4270A088UL))
\r
6619 #define bFM3_MFS5_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270A08CUL))
\r
6620 #define bFM3_MFS5_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x4270A090UL))
\r
6621 #define bFM3_MFS5_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270A09CUL))
\r
6622 #define bFM3_MFS5_CSIO_SSR_TBI *((volatile unsigned int*)(0x4270A0A0UL))
\r
6623 #define bFM3_MFS5_CSIO_SSR_TDRE *((volatile unsigned int*)(0x4270A0A4UL))
\r
6624 #define bFM3_MFS5_CSIO_SSR_RDRF *((volatile unsigned int*)(0x4270A0A8UL))
\r
6625 #define bFM3_MFS5_CSIO_SSR_ORE *((volatile unsigned int*)(0x4270A0ACUL))
\r
6626 #define bFM3_MFS5_CSIO_SSR_REC *((volatile unsigned int*)(0x4270A0BCUL))
\r
6627 #define bFM3_MFS5_CSIO_FCR_FE1 *((volatile unsigned int*)(0x4270A280UL))
\r
6628 #define bFM3_MFS5_CSIO_FCR_FE2 *((volatile unsigned int*)(0x4270A284UL))
\r
6629 #define bFM3_MFS5_CSIO_FCR_FCL1 *((volatile unsigned int*)(0x4270A288UL))
\r
6630 #define bFM3_MFS5_CSIO_FCR_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
\r
6631 #define bFM3_MFS5_CSIO_FCR_FSET *((volatile unsigned int*)(0x4270A290UL))
\r
6632 #define bFM3_MFS5_CSIO_FCR_FLD *((volatile unsigned int*)(0x4270A294UL))
\r
6633 #define bFM3_MFS5_CSIO_FCR_FLST *((volatile unsigned int*)(0x4270A298UL))
\r
6634 #define bFM3_MFS5_CSIO_FCR_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
\r
6635 #define bFM3_MFS5_CSIO_FCR_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
\r
6636 #define bFM3_MFS5_CSIO_FCR_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
\r
6637 #define bFM3_MFS5_CSIO_FCR_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
\r
6638 #define bFM3_MFS5_CSIO_FCR_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
\r
6639 #define bFM3_MFS5_CSIO_FCR_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
\r
6640 #define bFM3_MFS5_CSIO_FCR_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
\r
6641 #define bFM3_MFS5_CSIO_FCR0_FE1 *((volatile unsigned int*)(0x4270A280UL))
\r
6642 #define bFM3_MFS5_CSIO_FCR0_FE2 *((volatile unsigned int*)(0x4270A284UL))
\r
6643 #define bFM3_MFS5_CSIO_FCR0_FCL1 *((volatile unsigned int*)(0x4270A288UL))
\r
6644 #define bFM3_MFS5_CSIO_FCR0_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
\r
6645 #define bFM3_MFS5_CSIO_FCR0_FSET *((volatile unsigned int*)(0x4270A290UL))
\r
6646 #define bFM3_MFS5_CSIO_FCR0_FLD *((volatile unsigned int*)(0x4270A294UL))
\r
6647 #define bFM3_MFS5_CSIO_FCR0_FLST *((volatile unsigned int*)(0x4270A298UL))
\r
6648 #define bFM3_MFS5_CSIO_FCR1_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
\r
6649 #define bFM3_MFS5_CSIO_FCR1_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
\r
6650 #define bFM3_MFS5_CSIO_FCR1_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
\r
6651 #define bFM3_MFS5_CSIO_FCR1_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
\r
6652 #define bFM3_MFS5_CSIO_FCR1_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
\r
6653 #define bFM3_MFS5_CSIO_FCR1_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
\r
6654 #define bFM3_MFS5_CSIO_FCR1_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
\r
6655 #define bFM3_MFS5_CSIO_FBYTE_FD0 *((volatile unsigned int*)(0x4270A300UL))
\r
6656 #define bFM3_MFS5_CSIO_FBYTE_FD1 *((volatile unsigned int*)(0x4270A304UL))
\r
6657 #define bFM3_MFS5_CSIO_FBYTE_FD2 *((volatile unsigned int*)(0x4270A308UL))
\r
6658 #define bFM3_MFS5_CSIO_FBYTE_FD3 *((volatile unsigned int*)(0x4270A30CUL))
\r
6659 #define bFM3_MFS5_CSIO_FBYTE_FD4 *((volatile unsigned int*)(0x4270A310UL))
\r
6660 #define bFM3_MFS5_CSIO_FBYTE_FD5 *((volatile unsigned int*)(0x4270A314UL))
\r
6661 #define bFM3_MFS5_CSIO_FBYTE_FD6 *((volatile unsigned int*)(0x4270A318UL))
\r
6662 #define bFM3_MFS5_CSIO_FBYTE_FD7 *((volatile unsigned int*)(0x4270A31CUL))
\r
6663 #define bFM3_MFS5_CSIO_FBYTE_FD8 *((volatile unsigned int*)(0x4270A320UL))
\r
6664 #define bFM3_MFS5_CSIO_FBYTE_FD9 *((volatile unsigned int*)(0x4270A324UL))
\r
6665 #define bFM3_MFS5_CSIO_FBYTE_FD10 *((volatile unsigned int*)(0x4270A328UL))
\r
6666 #define bFM3_MFS5_CSIO_FBYTE_FD11 *((volatile unsigned int*)(0x4270A32CUL))
\r
6667 #define bFM3_MFS5_CSIO_FBYTE_FD12 *((volatile unsigned int*)(0x4270A330UL))
\r
6668 #define bFM3_MFS5_CSIO_FBYTE_FD13 *((volatile unsigned int*)(0x4270A334UL))
\r
6669 #define bFM3_MFS5_CSIO_FBYTE_FD14 *((volatile unsigned int*)(0x4270A338UL))
\r
6670 #define bFM3_MFS5_CSIO_FBYTE_FD15 *((volatile unsigned int*)(0x4270A33CUL))
\r
6671 #define bFM3_MFS5_CSIO_FBYTE1_FD0 *((volatile unsigned int*)(0x4270A300UL))
\r
6672 #define bFM3_MFS5_CSIO_FBYTE1_FD1 *((volatile unsigned int*)(0x4270A304UL))
\r
6673 #define bFM3_MFS5_CSIO_FBYTE1_FD2 *((volatile unsigned int*)(0x4270A308UL))
\r
6674 #define bFM3_MFS5_CSIO_FBYTE1_FD3 *((volatile unsigned int*)(0x4270A30CUL))
\r
6675 #define bFM3_MFS5_CSIO_FBYTE1_FD4 *((volatile unsigned int*)(0x4270A310UL))
\r
6676 #define bFM3_MFS5_CSIO_FBYTE1_FD5 *((volatile unsigned int*)(0x4270A314UL))
\r
6677 #define bFM3_MFS5_CSIO_FBYTE1_FD6 *((volatile unsigned int*)(0x4270A318UL))
\r
6678 #define bFM3_MFS5_CSIO_FBYTE1_FD7 *((volatile unsigned int*)(0x4270A31CUL))
\r
6679 #define bFM3_MFS5_CSIO_FBYTE2_FD8 *((volatile unsigned int*)(0x4270A340UL))
\r
6680 #define bFM3_MFS5_CSIO_FBYTE2_FD9 *((volatile unsigned int*)(0x4270A344UL))
\r
6681 #define bFM3_MFS5_CSIO_FBYTE2_FD10 *((volatile unsigned int*)(0x4270A348UL))
\r
6682 #define bFM3_MFS5_CSIO_FBYTE2_FD11 *((volatile unsigned int*)(0x4270A34CUL))
\r
6683 #define bFM3_MFS5_CSIO_FBYTE2_FD12 *((volatile unsigned int*)(0x4270A350UL))
\r
6684 #define bFM3_MFS5_CSIO_FBYTE2_FD13 *((volatile unsigned int*)(0x4270A354UL))
\r
6685 #define bFM3_MFS5_CSIO_FBYTE2_FD14 *((volatile unsigned int*)(0x4270A358UL))
\r
6686 #define bFM3_MFS5_CSIO_FBYTE2_FD15 *((volatile unsigned int*)(0x4270A35CUL))
\r
6688 /* UART LIN channel 5 registers */
\r
6689 #define bFM3_MFS5_LIN_SMR_SOE *((volatile unsigned int*)(0x4270A000UL))
\r
6690 #define bFM3_MFS5_LIN_SMR_SBL *((volatile unsigned int*)(0x4270A00CUL))
\r
6691 #define bFM3_MFS5_LIN_SMR_WUCR *((volatile unsigned int*)(0x4270A010UL))
\r
6692 #define bFM3_MFS5_LIN_SMR_MD0 *((volatile unsigned int*)(0x4270A014UL))
\r
6693 #define bFM3_MFS5_LIN_SMR_MD1 *((volatile unsigned int*)(0x4270A018UL))
\r
6694 #define bFM3_MFS5_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270A01CUL))
\r
6695 #define bFM3_MFS5_LIN_SCR_TXE *((volatile unsigned int*)(0x4270A020UL))
\r
6696 #define bFM3_MFS5_LIN_SCR_RXE *((volatile unsigned int*)(0x4270A024UL))
\r
6697 #define bFM3_MFS5_LIN_SCR_TBIE *((volatile unsigned int*)(0x4270A028UL))
\r
6698 #define bFM3_MFS5_LIN_SCR_TIE *((volatile unsigned int*)(0x4270A02CUL))
\r
6699 #define bFM3_MFS5_LIN_SCR_RIE *((volatile unsigned int*)(0x4270A030UL))
\r
6700 #define bFM3_MFS5_LIN_SCR_LBR *((volatile unsigned int*)(0x4270A034UL))
\r
6701 #define bFM3_MFS5_LIN_SCR_MS *((volatile unsigned int*)(0x4270A038UL))
\r
6702 #define bFM3_MFS5_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270A03CUL))
\r
6703 #define bFM3_MFS5_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x4270A080UL))
\r
6704 #define bFM3_MFS5_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x4270A084UL))
\r
6705 #define bFM3_MFS5_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x4270A088UL))
\r
6706 #define bFM3_MFS5_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270A08CUL))
\r
6707 #define bFM3_MFS5_LIN_ESCR_LBIE *((volatile unsigned int*)(0x4270A090UL))
\r
6708 #define bFM3_MFS5_LIN_ESCR_ESBL *((volatile unsigned int*)(0x4270A098UL))
\r
6709 #define bFM3_MFS5_LIN_SSR_TBI *((volatile unsigned int*)(0x4270A0A0UL))
\r
6710 #define bFM3_MFS5_LIN_SSR_TDRE *((volatile unsigned int*)(0x4270A0A4UL))
\r
6711 #define bFM3_MFS5_LIN_SSR_RDRF *((volatile unsigned int*)(0x4270A0A8UL))
\r
6712 #define bFM3_MFS5_LIN_SSR_ORE *((volatile unsigned int*)(0x4270A0ACUL))
\r
6713 #define bFM3_MFS5_LIN_SSR_FRE *((volatile unsigned int*)(0x4270A0B0UL))
\r
6714 #define bFM3_MFS5_LIN_SSR_LBD *((volatile unsigned int*)(0x4270A0B4UL))
\r
6715 #define bFM3_MFS5_LIN_SSR_REC *((volatile unsigned int*)(0x4270A0BCUL))
\r
6716 #define bFM3_MFS5_LIN_BGR_EXT *((volatile unsigned int*)(0x4270A1BCUL))
\r
6717 #define bFM3_MFS5_LIN_BGR1_EXT *((volatile unsigned int*)(0x4270A1BCUL))
\r
6718 #define bFM3_MFS5_LIN_FCR_FE1 *((volatile unsigned int*)(0x4270A280UL))
\r
6719 #define bFM3_MFS5_LIN_FCR_FE2 *((volatile unsigned int*)(0x4270A284UL))
\r
6720 #define bFM3_MFS5_LIN_FCR_FCL1 *((volatile unsigned int*)(0x4270A288UL))
\r
6721 #define bFM3_MFS5_LIN_FCR_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
\r
6722 #define bFM3_MFS5_LIN_FCR_FSET *((volatile unsigned int*)(0x4270A290UL))
\r
6723 #define bFM3_MFS5_LIN_FCR_FLD *((volatile unsigned int*)(0x4270A294UL))
\r
6724 #define bFM3_MFS5_LIN_FCR_FLST *((volatile unsigned int*)(0x4270A298UL))
\r
6725 #define bFM3_MFS5_LIN_FCR_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
\r
6726 #define bFM3_MFS5_LIN_FCR_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
\r
6727 #define bFM3_MFS5_LIN_FCR_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
\r
6728 #define bFM3_MFS5_LIN_FCR_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
\r
6729 #define bFM3_MFS5_LIN_FCR_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
\r
6730 #define bFM3_MFS5_LIN_FCR_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
\r
6731 #define bFM3_MFS5_LIN_FCR_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
\r
6732 #define bFM3_MFS5_LIN_FCR0_FE1 *((volatile unsigned int*)(0x4270A280UL))
\r
6733 #define bFM3_MFS5_LIN_FCR0_FE2 *((volatile unsigned int*)(0x4270A284UL))
\r
6734 #define bFM3_MFS5_LIN_FCR0_FCL1 *((volatile unsigned int*)(0x4270A288UL))
\r
6735 #define bFM3_MFS5_LIN_FCR0_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
\r
6736 #define bFM3_MFS5_LIN_FCR0_FSET *((volatile unsigned int*)(0x4270A290UL))
\r
6737 #define bFM3_MFS5_LIN_FCR0_FLD *((volatile unsigned int*)(0x4270A294UL))
\r
6738 #define bFM3_MFS5_LIN_FCR0_FLST *((volatile unsigned int*)(0x4270A298UL))
\r
6739 #define bFM3_MFS5_LIN_FCR1_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
\r
6740 #define bFM3_MFS5_LIN_FCR1_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
\r
6741 #define bFM3_MFS5_LIN_FCR1_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
\r
6742 #define bFM3_MFS5_LIN_FCR1_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
\r
6743 #define bFM3_MFS5_LIN_FCR1_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
\r
6744 #define bFM3_MFS5_LIN_FCR1_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
\r
6745 #define bFM3_MFS5_LIN_FCR1_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
\r
6746 #define bFM3_MFS5_LIN_FBYTE_FD0 *((volatile unsigned int*)(0x4270A300UL))
\r
6747 #define bFM3_MFS5_LIN_FBYTE_FD1 *((volatile unsigned int*)(0x4270A304UL))
\r
6748 #define bFM3_MFS5_LIN_FBYTE_FD2 *((volatile unsigned int*)(0x4270A308UL))
\r
6749 #define bFM3_MFS5_LIN_FBYTE_FD3 *((volatile unsigned int*)(0x4270A30CUL))
\r
6750 #define bFM3_MFS5_LIN_FBYTE_FD4 *((volatile unsigned int*)(0x4270A310UL))
\r
6751 #define bFM3_MFS5_LIN_FBYTE_FD5 *((volatile unsigned int*)(0x4270A314UL))
\r
6752 #define bFM3_MFS5_LIN_FBYTE_FD6 *((volatile unsigned int*)(0x4270A318UL))
\r
6753 #define bFM3_MFS5_LIN_FBYTE_FD7 *((volatile unsigned int*)(0x4270A31CUL))
\r
6754 #define bFM3_MFS5_LIN_FBYTE_FD8 *((volatile unsigned int*)(0x4270A320UL))
\r
6755 #define bFM3_MFS5_LIN_FBYTE_FD9 *((volatile unsigned int*)(0x4270A324UL))
\r
6756 #define bFM3_MFS5_LIN_FBYTE_FD10 *((volatile unsigned int*)(0x4270A328UL))
\r
6757 #define bFM3_MFS5_LIN_FBYTE_FD11 *((volatile unsigned int*)(0x4270A32CUL))
\r
6758 #define bFM3_MFS5_LIN_FBYTE_FD12 *((volatile unsigned int*)(0x4270A330UL))
\r
6759 #define bFM3_MFS5_LIN_FBYTE_FD13 *((volatile unsigned int*)(0x4270A334UL))
\r
6760 #define bFM3_MFS5_LIN_FBYTE_FD14 *((volatile unsigned int*)(0x4270A338UL))
\r
6761 #define bFM3_MFS5_LIN_FBYTE_FD15 *((volatile unsigned int*)(0x4270A33CUL))
\r
6762 #define bFM3_MFS5_LIN_FBYTE1_FD0 *((volatile unsigned int*)(0x4270A300UL))
\r
6763 #define bFM3_MFS5_LIN_FBYTE1_FD1 *((volatile unsigned int*)(0x4270A304UL))
\r
6764 #define bFM3_MFS5_LIN_FBYTE1_FD2 *((volatile unsigned int*)(0x4270A308UL))
\r
6765 #define bFM3_MFS5_LIN_FBYTE1_FD3 *((volatile unsigned int*)(0x4270A30CUL))
\r
6766 #define bFM3_MFS5_LIN_FBYTE1_FD4 *((volatile unsigned int*)(0x4270A310UL))
\r
6767 #define bFM3_MFS5_LIN_FBYTE1_FD5 *((volatile unsigned int*)(0x4270A314UL))
\r
6768 #define bFM3_MFS5_LIN_FBYTE1_FD6 *((volatile unsigned int*)(0x4270A318UL))
\r
6769 #define bFM3_MFS5_LIN_FBYTE1_FD7 *((volatile unsigned int*)(0x4270A31CUL))
\r
6770 #define bFM3_MFS5_LIN_FBYTE2_FD8 *((volatile unsigned int*)(0x4270A340UL))
\r
6771 #define bFM3_MFS5_LIN_FBYTE2_FD9 *((volatile unsigned int*)(0x4270A344UL))
\r
6772 #define bFM3_MFS5_LIN_FBYTE2_FD10 *((volatile unsigned int*)(0x4270A348UL))
\r
6773 #define bFM3_MFS5_LIN_FBYTE2_FD11 *((volatile unsigned int*)(0x4270A34CUL))
\r
6774 #define bFM3_MFS5_LIN_FBYTE2_FD12 *((volatile unsigned int*)(0x4270A350UL))
\r
6775 #define bFM3_MFS5_LIN_FBYTE2_FD13 *((volatile unsigned int*)(0x4270A354UL))
\r
6776 #define bFM3_MFS5_LIN_FBYTE2_FD14 *((volatile unsigned int*)(0x4270A358UL))
\r
6777 #define bFM3_MFS5_LIN_FBYTE2_FD15 *((volatile unsigned int*)(0x4270A35CUL))
\r
6779 /* I2C channel 5 registers */
\r
6780 #define bFM3_MFS5_I2C_SMR_ITST0 *((volatile unsigned int*)(0x4270A000UL))
\r
6781 #define bFM3_MFS5_I2C_SMR_ITST1 *((volatile unsigned int*)(0x4270A004UL))
\r
6782 #define bFM3_MFS5_I2C_SMR_TIE *((volatile unsigned int*)(0x4270A008UL))
\r
6783 #define bFM3_MFS5_I2C_SMR_RIE *((volatile unsigned int*)(0x4270A00CUL))
\r
6784 #define bFM3_MFS5_I2C_SMR_WUCR *((volatile unsigned int*)(0x4270A010UL))
\r
6785 #define bFM3_MFS5_I2C_SMR_MD0 *((volatile unsigned int*)(0x4270A014UL))
\r
6786 #define bFM3_MFS5_I2C_SMR_MD1 *((volatile unsigned int*)(0x4270A018UL))
\r
6787 #define bFM3_MFS5_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270A01CUL))
\r
6788 #define bFM3_MFS5_I2C_IBCR_INT *((volatile unsigned int*)(0x4270A020UL))
\r
6789 #define bFM3_MFS5_I2C_IBCR_BER *((volatile unsigned int*)(0x4270A024UL))
\r
6790 #define bFM3_MFS5_I2C_IBCR_INTE *((volatile unsigned int*)(0x4270A028UL))
\r
6791 #define bFM3_MFS5_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270A02CUL))
\r
6792 #define bFM3_MFS5_I2C_IBCR_WSEL *((volatile unsigned int*)(0x4270A030UL))
\r
6793 #define bFM3_MFS5_I2C_IBCR_ACKE *((volatile unsigned int*)(0x4270A034UL))
\r
6794 #define bFM3_MFS5_I2C_IBCR_ACT *((volatile unsigned int*)(0x4270A038UL))
\r
6795 #define bFM3_MFS5_I2C_IBCR_SCC *((volatile unsigned int*)(0x4270A038UL))
\r
6796 #define bFM3_MFS5_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270A03CUL))
\r
6797 #define bFM3_MFS5_I2C_IBSR_BB *((volatile unsigned int*)(0x4270A080UL))
\r
6798 #define bFM3_MFS5_I2C_IBSR_SPC *((volatile unsigned int*)(0x4270A084UL))
\r
6799 #define bFM3_MFS5_I2C_IBSR_RSC *((volatile unsigned int*)(0x4270A088UL))
\r
6800 #define bFM3_MFS5_I2C_IBSR_AL *((volatile unsigned int*)(0x4270A08CUL))
\r
6801 #define bFM3_MFS5_I2C_IBSR_TRX *((volatile unsigned int*)(0x4270A090UL))
\r
6802 #define bFM3_MFS5_I2C_IBSR_RSA *((volatile unsigned int*)(0x4270A094UL))
\r
6803 #define bFM3_MFS5_I2C_IBSR_RACK *((volatile unsigned int*)(0x4270A098UL))
\r
6804 #define bFM3_MFS5_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270A09CUL))
\r
6805 #define bFM3_MFS5_I2C_SSR_TBI *((volatile unsigned int*)(0x4270A0A0UL))
\r
6806 #define bFM3_MFS5_I2C_SSR_TDRE *((volatile unsigned int*)(0x4270A0A4UL))
\r
6807 #define bFM3_MFS5_I2C_SSR_RDRF *((volatile unsigned int*)(0x4270A0A8UL))
\r
6808 #define bFM3_MFS5_I2C_SSR_ORE *((volatile unsigned int*)(0x4270A0ACUL))
\r
6809 #define bFM3_MFS5_I2C_SSR_TBIE *((volatile unsigned int*)(0x4270A0B0UL))
\r
6810 #define bFM3_MFS5_I2C_SSR_DMA *((volatile unsigned int*)(0x4270A0B4UL))
\r
6811 #define bFM3_MFS5_I2C_SSR_TSET *((volatile unsigned int*)(0x4270A0B8UL))
\r
6812 #define bFM3_MFS5_I2C_SSR_REC *((volatile unsigned int*)(0x4270A0BCUL))
\r
6813 #define bFM3_MFS5_I2C_ISBA_SA0 *((volatile unsigned int*)(0x4270A200UL))
\r
6814 #define bFM3_MFS5_I2C_ISBA_SA1 *((volatile unsigned int*)(0x4270A204UL))
\r
6815 #define bFM3_MFS5_I2C_ISBA_SA2 *((volatile unsigned int*)(0x4270A208UL))
\r
6816 #define bFM3_MFS5_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270A20CUL))
\r
6817 #define bFM3_MFS5_I2C_ISBA_SA4 *((volatile unsigned int*)(0x4270A210UL))
\r
6818 #define bFM3_MFS5_I2C_ISBA_SA5 *((volatile unsigned int*)(0x4270A214UL))
\r
6819 #define bFM3_MFS5_I2C_ISBA_SA6 *((volatile unsigned int*)(0x4270A218UL))
\r
6820 #define bFM3_MFS5_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270A21CUL))
\r
6821 #define bFM3_MFS5_I2C_ISMK_SM0 *((volatile unsigned int*)(0x4270A220UL))
\r
6822 #define bFM3_MFS5_I2C_ISMK_SM1 *((volatile unsigned int*)(0x4270A224UL))
\r
6823 #define bFM3_MFS5_I2C_ISMK_SM2 *((volatile unsigned int*)(0x4270A228UL))
\r
6824 #define bFM3_MFS5_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270A22CUL))
\r
6825 #define bFM3_MFS5_I2C_ISMK_SM4 *((volatile unsigned int*)(0x4270A230UL))
\r
6826 #define bFM3_MFS5_I2C_ISMK_SM5 *((volatile unsigned int*)(0x4270A234UL))
\r
6827 #define bFM3_MFS5_I2C_ISMK_SM6 *((volatile unsigned int*)(0x4270A238UL))
\r
6828 #define bFM3_MFS5_I2C_ISMK_EN *((volatile unsigned int*)(0x4270A23CUL))
\r
6829 #define bFM3_MFS5_I2C_FCR_FE1 *((volatile unsigned int*)(0x4270A280UL))
\r
6830 #define bFM3_MFS5_I2C_FCR_FE2 *((volatile unsigned int*)(0x4270A284UL))
\r
6831 #define bFM3_MFS5_I2C_FCR_FCL1 *((volatile unsigned int*)(0x4270A288UL))
\r
6832 #define bFM3_MFS5_I2C_FCR_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
\r
6833 #define bFM3_MFS5_I2C_FCR_FSET *((volatile unsigned int*)(0x4270A290UL))
\r
6834 #define bFM3_MFS5_I2C_FCR_FLD *((volatile unsigned int*)(0x4270A294UL))
\r
6835 #define bFM3_MFS5_I2C_FCR_FLST *((volatile unsigned int*)(0x4270A298UL))
\r
6836 #define bFM3_MFS5_I2C_FCR_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
\r
6837 #define bFM3_MFS5_I2C_FCR_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
\r
6838 #define bFM3_MFS5_I2C_FCR_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
\r
6839 #define bFM3_MFS5_I2C_FCR_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
\r
6840 #define bFM3_MFS5_I2C_FCR_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
\r
6841 #define bFM3_MFS5_I2C_FCR_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
\r
6842 #define bFM3_MFS5_I2C_FCR_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
\r
6843 #define bFM3_MFS5_I2C_FCR0_FE1 *((volatile unsigned int*)(0x4270A280UL))
\r
6844 #define bFM3_MFS5_I2C_FCR0_FE2 *((volatile unsigned int*)(0x4270A284UL))
\r
6845 #define bFM3_MFS5_I2C_FCR0_FCL1 *((volatile unsigned int*)(0x4270A288UL))
\r
6846 #define bFM3_MFS5_I2C_FCR0_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
\r
6847 #define bFM3_MFS5_I2C_FCR0_FSET *((volatile unsigned int*)(0x4270A290UL))
\r
6848 #define bFM3_MFS5_I2C_FCR0_FLD *((volatile unsigned int*)(0x4270A294UL))
\r
6849 #define bFM3_MFS5_I2C_FCR0_FLST *((volatile unsigned int*)(0x4270A298UL))
\r
6850 #define bFM3_MFS5_I2C_FCR1_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
\r
6851 #define bFM3_MFS5_I2C_FCR1_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
\r
6852 #define bFM3_MFS5_I2C_FCR1_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
\r
6853 #define bFM3_MFS5_I2C_FCR1_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
\r
6854 #define bFM3_MFS5_I2C_FCR1_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
\r
6855 #define bFM3_MFS5_I2C_FCR1_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
\r
6856 #define bFM3_MFS5_I2C_FCR1_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
\r
6857 #define bFM3_MFS5_I2C_FBYTE_FD0 *((volatile unsigned int*)(0x4270A300UL))
\r
6858 #define bFM3_MFS5_I2C_FBYTE_FD1 *((volatile unsigned int*)(0x4270A304UL))
\r
6859 #define bFM3_MFS5_I2C_FBYTE_FD2 *((volatile unsigned int*)(0x4270A308UL))
\r
6860 #define bFM3_MFS5_I2C_FBYTE_FD3 *((volatile unsigned int*)(0x4270A30CUL))
\r
6861 #define bFM3_MFS5_I2C_FBYTE_FD4 *((volatile unsigned int*)(0x4270A310UL))
\r
6862 #define bFM3_MFS5_I2C_FBYTE_FD5 *((volatile unsigned int*)(0x4270A314UL))
\r
6863 #define bFM3_MFS5_I2C_FBYTE_FD6 *((volatile unsigned int*)(0x4270A318UL))
\r
6864 #define bFM3_MFS5_I2C_FBYTE_FD7 *((volatile unsigned int*)(0x4270A31CUL))
\r
6865 #define bFM3_MFS5_I2C_FBYTE_FD8 *((volatile unsigned int*)(0x4270A320UL))
\r
6866 #define bFM3_MFS5_I2C_FBYTE_FD9 *((volatile unsigned int*)(0x4270A324UL))
\r
6867 #define bFM3_MFS5_I2C_FBYTE_FD10 *((volatile unsigned int*)(0x4270A328UL))
\r
6868 #define bFM3_MFS5_I2C_FBYTE_FD11 *((volatile unsigned int*)(0x4270A32CUL))
\r
6869 #define bFM3_MFS5_I2C_FBYTE_FD12 *((volatile unsigned int*)(0x4270A330UL))
\r
6870 #define bFM3_MFS5_I2C_FBYTE_FD13 *((volatile unsigned int*)(0x4270A334UL))
\r
6871 #define bFM3_MFS5_I2C_FBYTE_FD14 *((volatile unsigned int*)(0x4270A338UL))
\r
6872 #define bFM3_MFS5_I2C_FBYTE_FD15 *((volatile unsigned int*)(0x4270A33CUL))
\r
6873 #define bFM3_MFS5_I2C_FBYTE1_FD0 *((volatile unsigned int*)(0x4270A300UL))
\r
6874 #define bFM3_MFS5_I2C_FBYTE1_FD1 *((volatile unsigned int*)(0x4270A304UL))
\r
6875 #define bFM3_MFS5_I2C_FBYTE1_FD2 *((volatile unsigned int*)(0x4270A308UL))
\r
6876 #define bFM3_MFS5_I2C_FBYTE1_FD3 *((volatile unsigned int*)(0x4270A30CUL))
\r
6877 #define bFM3_MFS5_I2C_FBYTE1_FD4 *((volatile unsigned int*)(0x4270A310UL))
\r
6878 #define bFM3_MFS5_I2C_FBYTE1_FD5 *((volatile unsigned int*)(0x4270A314UL))
\r
6879 #define bFM3_MFS5_I2C_FBYTE1_FD6 *((volatile unsigned int*)(0x4270A318UL))
\r
6880 #define bFM3_MFS5_I2C_FBYTE1_FD7 *((volatile unsigned int*)(0x4270A31CUL))
\r
6881 #define bFM3_MFS5_I2C_FBYTE2_FD8 *((volatile unsigned int*)(0x4270A340UL))
\r
6882 #define bFM3_MFS5_I2C_FBYTE2_FD9 *((volatile unsigned int*)(0x4270A344UL))
\r
6883 #define bFM3_MFS5_I2C_FBYTE2_FD10 *((volatile unsigned int*)(0x4270A348UL))
\r
6884 #define bFM3_MFS5_I2C_FBYTE2_FD11 *((volatile unsigned int*)(0x4270A34CUL))
\r
6885 #define bFM3_MFS5_I2C_FBYTE2_FD12 *((volatile unsigned int*)(0x4270A350UL))
\r
6886 #define bFM3_MFS5_I2C_FBYTE2_FD13 *((volatile unsigned int*)(0x4270A354UL))
\r
6887 #define bFM3_MFS5_I2C_FBYTE2_FD14 *((volatile unsigned int*)(0x4270A358UL))
\r
6888 #define bFM3_MFS5_I2C_FBYTE2_FD15 *((volatile unsigned int*)(0x4270A35CUL))
\r
6890 /* UART asynchronous channel 6 registers */
\r
6891 #define bFM3_MFS6_UART_SMR_SOE *((volatile unsigned int*)(0x4270C000UL))
\r
6892 #define bFM3_MFS6_UART_SMR_BDS *((volatile unsigned int*)(0x4270C008UL))
\r
6893 #define bFM3_MFS6_UART_SMR_SBL *((volatile unsigned int*)(0x4270C00CUL))
\r
6894 #define bFM3_MFS6_UART_SMR_WUCR *((volatile unsigned int*)(0x4270C010UL))
\r
6895 #define bFM3_MFS6_UART_SMR_MD0 *((volatile unsigned int*)(0x4270C014UL))
\r
6896 #define bFM3_MFS6_UART_SMR_MD1 *((volatile unsigned int*)(0x4270C018UL))
\r
6897 #define bFM3_MFS6_UART_SMR_MD2 *((volatile unsigned int*)(0x4270C01CUL))
\r
6898 #define bFM3_MFS6_UART_SCR_TXE *((volatile unsigned int*)(0x4270C020UL))
\r
6899 #define bFM3_MFS6_UART_SCR_RXE *((volatile unsigned int*)(0x4270C024UL))
\r
6900 #define bFM3_MFS6_UART_SCR_TBIE *((volatile unsigned int*)(0x4270C028UL))
\r
6901 #define bFM3_MFS6_UART_SCR_TIE *((volatile unsigned int*)(0x4270C02CUL))
\r
6902 #define bFM3_MFS6_UART_SCR_RIE *((volatile unsigned int*)(0x4270C030UL))
\r
6903 #define bFM3_MFS6_UART_SCR_UPCL *((volatile unsigned int*)(0x4270C03CUL))
\r
6904 #define bFM3_MFS6_UART_ESCR_L0 *((volatile unsigned int*)(0x4270C080UL))
\r
6905 #define bFM3_MFS6_UART_ESCR_L1 *((volatile unsigned int*)(0x4270C084UL))
\r
6906 #define bFM3_MFS6_UART_ESCR_L2 *((volatile unsigned int*)(0x4270C088UL))
\r
6907 #define bFM3_MFS6_UART_ESCR_P *((volatile unsigned int*)(0x4270C08CUL))
\r
6908 #define bFM3_MFS6_UART_ESCR_PEN *((volatile unsigned int*)(0x4270C090UL))
\r
6909 #define bFM3_MFS6_UART_ESCR_INV *((volatile unsigned int*)(0x4270C094UL))
\r
6910 #define bFM3_MFS6_UART_ESCR_ESBL *((volatile unsigned int*)(0x4270C098UL))
\r
6911 #define bFM3_MFS6_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270C09CUL))
\r
6912 #define bFM3_MFS6_UART_SSR_TBI *((volatile unsigned int*)(0x4270C0A0UL))
\r
6913 #define bFM3_MFS6_UART_SSR_TDRE *((volatile unsigned int*)(0x4270C0A4UL))
\r
6914 #define bFM3_MFS6_UART_SSR_RDRF *((volatile unsigned int*)(0x4270C0A8UL))
\r
6915 #define bFM3_MFS6_UART_SSR_ORE *((volatile unsigned int*)(0x4270C0ACUL))
\r
6916 #define bFM3_MFS6_UART_SSR_FRE *((volatile unsigned int*)(0x4270C0B0UL))
\r
6917 #define bFM3_MFS6_UART_SSR_PE *((volatile unsigned int*)(0x4270C0B4UL))
\r
6918 #define bFM3_MFS6_UART_SSR_REC *((volatile unsigned int*)(0x4270C0BCUL))
\r
6919 #define bFM3_MFS6_UART_RDR_AD *((volatile unsigned int*)(0x4270C120UL))
\r
6920 #define bFM3_MFS6_UART_TDR_AD *((volatile unsigned int*)(0x4270C120UL))
\r
6921 #define bFM3_MFS6_UART_BGR_EXT *((volatile unsigned int*)(0x4270C1BCUL))
\r
6922 #define bFM3_MFS6_UART_BGR1_EXT *((volatile unsigned int*)(0x4270C1BCUL))
\r
6923 #define bFM3_MFS6_UART_FCR_FE1 *((volatile unsigned int*)(0x4270C280UL))
\r
6924 #define bFM3_MFS6_UART_FCR_FE2 *((volatile unsigned int*)(0x4270C284UL))
\r
6925 #define bFM3_MFS6_UART_FCR_FCL1 *((volatile unsigned int*)(0x4270C288UL))
\r
6926 #define bFM3_MFS6_UART_FCR_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
\r
6927 #define bFM3_MFS6_UART_FCR_FSET *((volatile unsigned int*)(0x4270C290UL))
\r
6928 #define bFM3_MFS6_UART_FCR_FLD *((volatile unsigned int*)(0x4270C294UL))
\r
6929 #define bFM3_MFS6_UART_FCR_FLST *((volatile unsigned int*)(0x4270C298UL))
\r
6930 #define bFM3_MFS6_UART_FCR_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
\r
6931 #define bFM3_MFS6_UART_FCR_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
\r
6932 #define bFM3_MFS6_UART_FCR_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
\r
6933 #define bFM3_MFS6_UART_FCR_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
\r
6934 #define bFM3_MFS6_UART_FCR_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
\r
6935 #define bFM3_MFS6_UART_FCR_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
\r
6936 #define bFM3_MFS6_UART_FCR_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
\r
6937 #define bFM3_MFS6_UART_FCR0_FE1 *((volatile unsigned int*)(0x4270C280UL))
\r
6938 #define bFM3_MFS6_UART_FCR0_FE2 *((volatile unsigned int*)(0x4270C284UL))
\r
6939 #define bFM3_MFS6_UART_FCR0_FCL1 *((volatile unsigned int*)(0x4270C288UL))
\r
6940 #define bFM3_MFS6_UART_FCR0_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
\r
6941 #define bFM3_MFS6_UART_FCR0_FSET *((volatile unsigned int*)(0x4270C290UL))
\r
6942 #define bFM3_MFS6_UART_FCR0_FLD *((volatile unsigned int*)(0x4270C294UL))
\r
6943 #define bFM3_MFS6_UART_FCR0_FLST *((volatile unsigned int*)(0x4270C298UL))
\r
6944 #define bFM3_MFS6_UART_FCR1_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
\r
6945 #define bFM3_MFS6_UART_FCR1_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
\r
6946 #define bFM3_MFS6_UART_FCR1_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
\r
6947 #define bFM3_MFS6_UART_FCR1_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
\r
6948 #define bFM3_MFS6_UART_FCR1_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
\r
6949 #define bFM3_MFS6_UART_FCR1_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
\r
6950 #define bFM3_MFS6_UART_FCR1_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
\r
6951 #define bFM3_MFS6_UART_FBYTE_FD0 *((volatile unsigned int*)(0x4270C300UL))
\r
6952 #define bFM3_MFS6_UART_FBYTE_FD1 *((volatile unsigned int*)(0x4270C304UL))
\r
6953 #define bFM3_MFS6_UART_FBYTE_FD2 *((volatile unsigned int*)(0x4270C308UL))
\r
6954 #define bFM3_MFS6_UART_FBYTE_FD3 *((volatile unsigned int*)(0x4270C30CUL))
\r
6955 #define bFM3_MFS6_UART_FBYTE_FD4 *((volatile unsigned int*)(0x4270C310UL))
\r
6956 #define bFM3_MFS6_UART_FBYTE_FD5 *((volatile unsigned int*)(0x4270C314UL))
\r
6957 #define bFM3_MFS6_UART_FBYTE_FD6 *((volatile unsigned int*)(0x4270C318UL))
\r
6958 #define bFM3_MFS6_UART_FBYTE_FD7 *((volatile unsigned int*)(0x4270C31CUL))
\r
6959 #define bFM3_MFS6_UART_FBYTE_FD8 *((volatile unsigned int*)(0x4270C320UL))
\r
6960 #define bFM3_MFS6_UART_FBYTE_FD9 *((volatile unsigned int*)(0x4270C324UL))
\r
6961 #define bFM3_MFS6_UART_FBYTE_FD10 *((volatile unsigned int*)(0x4270C328UL))
\r
6962 #define bFM3_MFS6_UART_FBYTE_FD11 *((volatile unsigned int*)(0x4270C32CUL))
\r
6963 #define bFM3_MFS6_UART_FBYTE_FD12 *((volatile unsigned int*)(0x4270C330UL))
\r
6964 #define bFM3_MFS6_UART_FBYTE_FD13 *((volatile unsigned int*)(0x4270C334UL))
\r
6965 #define bFM3_MFS6_UART_FBYTE_FD14 *((volatile unsigned int*)(0x4270C338UL))
\r
6966 #define bFM3_MFS6_UART_FBYTE_FD15 *((volatile unsigned int*)(0x4270C33CUL))
\r
6967 #define bFM3_MFS6_UART_FBYTE1_FD0 *((volatile unsigned int*)(0x4270C300UL))
\r
6968 #define bFM3_MFS6_UART_FBYTE1_FD1 *((volatile unsigned int*)(0x4270C304UL))
\r
6969 #define bFM3_MFS6_UART_FBYTE1_FD2 *((volatile unsigned int*)(0x4270C308UL))
\r
6970 #define bFM3_MFS6_UART_FBYTE1_FD3 *((volatile unsigned int*)(0x4270C30CUL))
\r
6971 #define bFM3_MFS6_UART_FBYTE1_FD4 *((volatile unsigned int*)(0x4270C310UL))
\r
6972 #define bFM3_MFS6_UART_FBYTE1_FD5 *((volatile unsigned int*)(0x4270C314UL))
\r
6973 #define bFM3_MFS6_UART_FBYTE1_FD6 *((volatile unsigned int*)(0x4270C318UL))
\r
6974 #define bFM3_MFS6_UART_FBYTE1_FD7 *((volatile unsigned int*)(0x4270C31CUL))
\r
6975 #define bFM3_MFS6_UART_FBYTE2_FD8 *((volatile unsigned int*)(0x4270C320UL))
\r
6976 #define bFM3_MFS6_UART_FBYTE2_FD9 *((volatile unsigned int*)(0x4270C324UL))
\r
6977 #define bFM3_MFS6_UART_FBYTE2_FD10 *((volatile unsigned int*)(0x4270C328UL))
\r
6978 #define bFM3_MFS6_UART_FBYTE2_FD11 *((volatile unsigned int*)(0x4270C32CUL))
\r
6979 #define bFM3_MFS6_UART_FBYTE2_FD12 *((volatile unsigned int*)(0x4270C330UL))
\r
6980 #define bFM3_MFS6_UART_FBYTE2_FD13 *((volatile unsigned int*)(0x4270C334UL))
\r
6981 #define bFM3_MFS6_UART_FBYTE2_FD14 *((volatile unsigned int*)(0x4270C338UL))
\r
6982 #define bFM3_MFS6_UART_FBYTE2_FD15 *((volatile unsigned int*)(0x4270C33CUL))
\r
6984 /* UART synchronous channel 6 registers */
\r
6985 #define bFM3_MFS6_CSIO_SMR_SOE *((volatile unsigned int*)(0x4270C000UL))
\r
6986 #define bFM3_MFS6_CSIO_SMR_SCKE *((volatile unsigned int*)(0x4270C004UL))
\r
6987 #define bFM3_MFS6_CSIO_SMR_BDS *((volatile unsigned int*)(0x4270C008UL))
\r
6988 #define bFM3_MFS6_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270C00CUL))
\r
6989 #define bFM3_MFS6_CSIO_SMR_WUCR *((volatile unsigned int*)(0x4270C010UL))
\r
6990 #define bFM3_MFS6_CSIO_SMR_MD0 *((volatile unsigned int*)(0x4270C014UL))
\r
6991 #define bFM3_MFS6_CSIO_SMR_MD1 *((volatile unsigned int*)(0x4270C018UL))
\r
6992 #define bFM3_MFS6_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270C01CUL))
\r
6993 #define bFM3_MFS6_CSIO_SCR_TXE *((volatile unsigned int*)(0x4270C020UL))
\r
6994 #define bFM3_MFS6_CSIO_SCR_RXE *((volatile unsigned int*)(0x4270C024UL))
\r
6995 #define bFM3_MFS6_CSIO_SCR_TBIE *((volatile unsigned int*)(0x4270C028UL))
\r
6996 #define bFM3_MFS6_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270C02CUL))
\r
6997 #define bFM3_MFS6_CSIO_SCR_RIE *((volatile unsigned int*)(0x4270C030UL))
\r
6998 #define bFM3_MFS6_CSIO_SCR_SPI *((volatile unsigned int*)(0x4270C034UL))
\r
6999 #define bFM3_MFS6_CSIO_SCR_MS *((volatile unsigned int*)(0x4270C038UL))
\r
7000 #define bFM3_MFS6_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270C03CUL))
\r
7001 #define bFM3_MFS6_CSIO_ESCR_L0 *((volatile unsigned int*)(0x4270C080UL))
\r
7002 #define bFM3_MFS6_CSIO_ESCR_L1 *((volatile unsigned int*)(0x4270C084UL))
\r
7003 #define bFM3_MFS6_CSIO_ESCR_L2 *((volatile unsigned int*)(0x4270C088UL))
\r
7004 #define bFM3_MFS6_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270C08CUL))
\r
7005 #define bFM3_MFS6_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x4270C090UL))
\r
7006 #define bFM3_MFS6_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270C09CUL))
\r
7007 #define bFM3_MFS6_CSIO_SSR_TBI *((volatile unsigned int*)(0x4270C0A0UL))
\r
7008 #define bFM3_MFS6_CSIO_SSR_TDRE *((volatile unsigned int*)(0x4270C0A4UL))
\r
7009 #define bFM3_MFS6_CSIO_SSR_RDRF *((volatile unsigned int*)(0x4270C0A8UL))
\r
7010 #define bFM3_MFS6_CSIO_SSR_ORE *((volatile unsigned int*)(0x4270C0ACUL))
\r
7011 #define bFM3_MFS6_CSIO_SSR_REC *((volatile unsigned int*)(0x4270C0BCUL))
\r
7012 #define bFM3_MFS6_CSIO_FCR_FE1 *((volatile unsigned int*)(0x4270C280UL))
\r
7013 #define bFM3_MFS6_CSIO_FCR_FE2 *((volatile unsigned int*)(0x4270C284UL))
\r
7014 #define bFM3_MFS6_CSIO_FCR_FCL1 *((volatile unsigned int*)(0x4270C288UL))
\r
7015 #define bFM3_MFS6_CSIO_FCR_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
\r
7016 #define bFM3_MFS6_CSIO_FCR_FSET *((volatile unsigned int*)(0x4270C290UL))
\r
7017 #define bFM3_MFS6_CSIO_FCR_FLD *((volatile unsigned int*)(0x4270C294UL))
\r
7018 #define bFM3_MFS6_CSIO_FCR_FLST *((volatile unsigned int*)(0x4270C298UL))
\r
7019 #define bFM3_MFS6_CSIO_FCR_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
\r
7020 #define bFM3_MFS6_CSIO_FCR_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
\r
7021 #define bFM3_MFS6_CSIO_FCR_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
\r
7022 #define bFM3_MFS6_CSIO_FCR_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
\r
7023 #define bFM3_MFS6_CSIO_FCR_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
\r
7024 #define bFM3_MFS6_CSIO_FCR_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
\r
7025 #define bFM3_MFS6_CSIO_FCR_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
\r
7026 #define bFM3_MFS6_CSIO_FCR0_FE1 *((volatile unsigned int*)(0x4270C280UL))
\r
7027 #define bFM3_MFS6_CSIO_FCR0_FE2 *((volatile unsigned int*)(0x4270C284UL))
\r
7028 #define bFM3_MFS6_CSIO_FCR0_FCL1 *((volatile unsigned int*)(0x4270C288UL))
\r
7029 #define bFM3_MFS6_CSIO_FCR0_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
\r
7030 #define bFM3_MFS6_CSIO_FCR0_FSET *((volatile unsigned int*)(0x4270C290UL))
\r
7031 #define bFM3_MFS6_CSIO_FCR0_FLD *((volatile unsigned int*)(0x4270C294UL))
\r
7032 #define bFM3_MFS6_CSIO_FCR0_FLST *((volatile unsigned int*)(0x4270C298UL))
\r
7033 #define bFM3_MFS6_CSIO_FCR1_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
\r
7034 #define bFM3_MFS6_CSIO_FCR1_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
\r
7035 #define bFM3_MFS6_CSIO_FCR1_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
\r
7036 #define bFM3_MFS6_CSIO_FCR1_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
\r
7037 #define bFM3_MFS6_CSIO_FCR1_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
\r
7038 #define bFM3_MFS6_CSIO_FCR1_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
\r
7039 #define bFM3_MFS6_CSIO_FCR1_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
\r
7040 #define bFM3_MFS6_CSIO_FBYTE_FD0 *((volatile unsigned int*)(0x4270C300UL))
\r
7041 #define bFM3_MFS6_CSIO_FBYTE_FD1 *((volatile unsigned int*)(0x4270C304UL))
\r
7042 #define bFM3_MFS6_CSIO_FBYTE_FD2 *((volatile unsigned int*)(0x4270C308UL))
\r
7043 #define bFM3_MFS6_CSIO_FBYTE_FD3 *((volatile unsigned int*)(0x4270C30CUL))
\r
7044 #define bFM3_MFS6_CSIO_FBYTE_FD4 *((volatile unsigned int*)(0x4270C310UL))
\r
7045 #define bFM3_MFS6_CSIO_FBYTE_FD5 *((volatile unsigned int*)(0x4270C314UL))
\r
7046 #define bFM3_MFS6_CSIO_FBYTE_FD6 *((volatile unsigned int*)(0x4270C318UL))
\r
7047 #define bFM3_MFS6_CSIO_FBYTE_FD7 *((volatile unsigned int*)(0x4270C31CUL))
\r
7048 #define bFM3_MFS6_CSIO_FBYTE_FD8 *((volatile unsigned int*)(0x4270C320UL))
\r
7049 #define bFM3_MFS6_CSIO_FBYTE_FD9 *((volatile unsigned int*)(0x4270C324UL))
\r
7050 #define bFM3_MFS6_CSIO_FBYTE_FD10 *((volatile unsigned int*)(0x4270C328UL))
\r
7051 #define bFM3_MFS6_CSIO_FBYTE_FD11 *((volatile unsigned int*)(0x4270C32CUL))
\r
7052 #define bFM3_MFS6_CSIO_FBYTE_FD12 *((volatile unsigned int*)(0x4270C330UL))
\r
7053 #define bFM3_MFS6_CSIO_FBYTE_FD13 *((volatile unsigned int*)(0x4270C334UL))
\r
7054 #define bFM3_MFS6_CSIO_FBYTE_FD14 *((volatile unsigned int*)(0x4270C338UL))
\r
7055 #define bFM3_MFS6_CSIO_FBYTE_FD15 *((volatile unsigned int*)(0x4270C33CUL))
\r
7056 #define bFM3_MFS6_CSIO_FBYTE1_FD0 *((volatile unsigned int*)(0x4270C300UL))
\r
7057 #define bFM3_MFS6_CSIO_FBYTE1_FD1 *((volatile unsigned int*)(0x4270C304UL))
\r
7058 #define bFM3_MFS6_CSIO_FBYTE1_FD2 *((volatile unsigned int*)(0x4270C308UL))
\r
7059 #define bFM3_MFS6_CSIO_FBYTE1_FD3 *((volatile unsigned int*)(0x4270C30CUL))
\r
7060 #define bFM3_MFS6_CSIO_FBYTE1_FD4 *((volatile unsigned int*)(0x4270C310UL))
\r
7061 #define bFM3_MFS6_CSIO_FBYTE1_FD5 *((volatile unsigned int*)(0x4270C314UL))
\r
7062 #define bFM3_MFS6_CSIO_FBYTE1_FD6 *((volatile unsigned int*)(0x4270C318UL))
\r
7063 #define bFM3_MFS6_CSIO_FBYTE1_FD7 *((volatile unsigned int*)(0x4270C31CUL))
\r
7064 #define bFM3_MFS6_CSIO_FBYTE2_FD8 *((volatile unsigned int*)(0x4270C340UL))
\r
7065 #define bFM3_MFS6_CSIO_FBYTE2_FD9 *((volatile unsigned int*)(0x4270C344UL))
\r
7066 #define bFM3_MFS6_CSIO_FBYTE2_FD10 *((volatile unsigned int*)(0x4270C348UL))
\r
7067 #define bFM3_MFS6_CSIO_FBYTE2_FD11 *((volatile unsigned int*)(0x4270C34CUL))
\r
7068 #define bFM3_MFS6_CSIO_FBYTE2_FD12 *((volatile unsigned int*)(0x4270C350UL))
\r
7069 #define bFM3_MFS6_CSIO_FBYTE2_FD13 *((volatile unsigned int*)(0x4270C354UL))
\r
7070 #define bFM3_MFS6_CSIO_FBYTE2_FD14 *((volatile unsigned int*)(0x4270C358UL))
\r
7071 #define bFM3_MFS6_CSIO_FBYTE2_FD15 *((volatile unsigned int*)(0x4270C35CUL))
\r
7073 /* UART LIN channel 6 registers */
\r
7074 #define bFM3_MFS6_LIN_SMR_SOE *((volatile unsigned int*)(0x4270C000UL))
\r
7075 #define bFM3_MFS6_LIN_SMR_SBL *((volatile unsigned int*)(0x4270C00CUL))
\r
7076 #define bFM3_MFS6_LIN_SMR_WUCR *((volatile unsigned int*)(0x4270C010UL))
\r
7077 #define bFM3_MFS6_LIN_SMR_MD0 *((volatile unsigned int*)(0x4270C014UL))
\r
7078 #define bFM3_MFS6_LIN_SMR_MD1 *((volatile unsigned int*)(0x4270C018UL))
\r
7079 #define bFM3_MFS6_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270C01CUL))
\r
7080 #define bFM3_MFS6_LIN_SCR_TXE *((volatile unsigned int*)(0x4270C020UL))
\r
7081 #define bFM3_MFS6_LIN_SCR_RXE *((volatile unsigned int*)(0x4270C024UL))
\r
7082 #define bFM3_MFS6_LIN_SCR_TBIE *((volatile unsigned int*)(0x4270C028UL))
\r
7083 #define bFM3_MFS6_LIN_SCR_TIE *((volatile unsigned int*)(0x4270C02CUL))
\r
7084 #define bFM3_MFS6_LIN_SCR_RIE *((volatile unsigned int*)(0x4270C030UL))
\r
7085 #define bFM3_MFS6_LIN_SCR_LBR *((volatile unsigned int*)(0x4270C034UL))
\r
7086 #define bFM3_MFS6_LIN_SCR_MS *((volatile unsigned int*)(0x4270C038UL))
\r
7087 #define bFM3_MFS6_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270C03CUL))
\r
7088 #define bFM3_MFS6_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x4270C080UL))
\r
7089 #define bFM3_MFS6_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x4270C084UL))
\r
7090 #define bFM3_MFS6_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x4270C088UL))
\r
7091 #define bFM3_MFS6_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270C08CUL))
\r
7092 #define bFM3_MFS6_LIN_ESCR_LBIE *((volatile unsigned int*)(0x4270C090UL))
\r
7093 #define bFM3_MFS6_LIN_ESCR_ESBL *((volatile unsigned int*)(0x4270C098UL))
\r
7094 #define bFM3_MFS6_LIN_SSR_TBI *((volatile unsigned int*)(0x4270C0A0UL))
\r
7095 #define bFM3_MFS6_LIN_SSR_TDRE *((volatile unsigned int*)(0x4270C0A4UL))
\r
7096 #define bFM3_MFS6_LIN_SSR_RDRF *((volatile unsigned int*)(0x4270C0A8UL))
\r
7097 #define bFM3_MFS6_LIN_SSR_ORE *((volatile unsigned int*)(0x4270C0ACUL))
\r
7098 #define bFM3_MFS6_LIN_SSR_FRE *((volatile unsigned int*)(0x4270C0B0UL))
\r
7099 #define bFM3_MFS6_LIN_SSR_LBD *((volatile unsigned int*)(0x4270C0B4UL))
\r
7100 #define bFM3_MFS6_LIN_SSR_REC *((volatile unsigned int*)(0x4270C0BCUL))
\r
7101 #define bFM3_MFS6_LIN_BGR_EXT *((volatile unsigned int*)(0x4270C1BCUL))
\r
7102 #define bFM3_MFS6_LIN_BGR1_EXT *((volatile unsigned int*)(0x4270C1BCUL))
\r
7103 #define bFM3_MFS6_LIN_FCR_FE1 *((volatile unsigned int*)(0x4270C280UL))
\r
7104 #define bFM3_MFS6_LIN_FCR_FE2 *((volatile unsigned int*)(0x4270C284UL))
\r
7105 #define bFM3_MFS6_LIN_FCR_FCL1 *((volatile unsigned int*)(0x4270C288UL))
\r
7106 #define bFM3_MFS6_LIN_FCR_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
\r
7107 #define bFM3_MFS6_LIN_FCR_FSET *((volatile unsigned int*)(0x4270C290UL))
\r
7108 #define bFM3_MFS6_LIN_FCR_FLD *((volatile unsigned int*)(0x4270C294UL))
\r
7109 #define bFM3_MFS6_LIN_FCR_FLST *((volatile unsigned int*)(0x4270C298UL))
\r
7110 #define bFM3_MFS6_LIN_FCR_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
\r
7111 #define bFM3_MFS6_LIN_FCR_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
\r
7112 #define bFM3_MFS6_LIN_FCR_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
\r
7113 #define bFM3_MFS6_LIN_FCR_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
\r
7114 #define bFM3_MFS6_LIN_FCR_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
\r
7115 #define bFM3_MFS6_LIN_FCR_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
\r
7116 #define bFM3_MFS6_LIN_FCR_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
\r
7117 #define bFM3_MFS6_LIN_FCR0_FE1 *((volatile unsigned int*)(0x4270C280UL))
\r
7118 #define bFM3_MFS6_LIN_FCR0_FE2 *((volatile unsigned int*)(0x4270C284UL))
\r
7119 #define bFM3_MFS6_LIN_FCR0_FCL1 *((volatile unsigned int*)(0x4270C288UL))
\r
7120 #define bFM3_MFS6_LIN_FCR0_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
\r
7121 #define bFM3_MFS6_LIN_FCR0_FSET *((volatile unsigned int*)(0x4270C290UL))
\r
7122 #define bFM3_MFS6_LIN_FCR0_FLD *((volatile unsigned int*)(0x4270C294UL))
\r
7123 #define bFM3_MFS6_LIN_FCR0_FLST *((volatile unsigned int*)(0x4270C298UL))
\r
7124 #define bFM3_MFS6_LIN_FCR1_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
\r
7125 #define bFM3_MFS6_LIN_FCR1_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
\r
7126 #define bFM3_MFS6_LIN_FCR1_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
\r
7127 #define bFM3_MFS6_LIN_FCR1_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
\r
7128 #define bFM3_MFS6_LIN_FCR1_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
\r
7129 #define bFM3_MFS6_LIN_FCR1_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
\r
7130 #define bFM3_MFS6_LIN_FCR1_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
\r
7131 #define bFM3_MFS6_LIN_FBYTE_FD0 *((volatile unsigned int*)(0x4270C300UL))
\r
7132 #define bFM3_MFS6_LIN_FBYTE_FD1 *((volatile unsigned int*)(0x4270C304UL))
\r
7133 #define bFM3_MFS6_LIN_FBYTE_FD2 *((volatile unsigned int*)(0x4270C308UL))
\r
7134 #define bFM3_MFS6_LIN_FBYTE_FD3 *((volatile unsigned int*)(0x4270C30CUL))
\r
7135 #define bFM3_MFS6_LIN_FBYTE_FD4 *((volatile unsigned int*)(0x4270C310UL))
\r
7136 #define bFM3_MFS6_LIN_FBYTE_FD5 *((volatile unsigned int*)(0x4270C314UL))
\r
7137 #define bFM3_MFS6_LIN_FBYTE_FD6 *((volatile unsigned int*)(0x4270C318UL))
\r
7138 #define bFM3_MFS6_LIN_FBYTE_FD7 *((volatile unsigned int*)(0x4270C31CUL))
\r
7139 #define bFM3_MFS6_LIN_FBYTE_FD8 *((volatile unsigned int*)(0x4270C320UL))
\r
7140 #define bFM3_MFS6_LIN_FBYTE_FD9 *((volatile unsigned int*)(0x4270C324UL))
\r
7141 #define bFM3_MFS6_LIN_FBYTE_FD10 *((volatile unsigned int*)(0x4270C328UL))
\r
7142 #define bFM3_MFS6_LIN_FBYTE_FD11 *((volatile unsigned int*)(0x4270C32CUL))
\r
7143 #define bFM3_MFS6_LIN_FBYTE_FD12 *((volatile unsigned int*)(0x4270C330UL))
\r
7144 #define bFM3_MFS6_LIN_FBYTE_FD13 *((volatile unsigned int*)(0x4270C334UL))
\r
7145 #define bFM3_MFS6_LIN_FBYTE_FD14 *((volatile unsigned int*)(0x4270C338UL))
\r
7146 #define bFM3_MFS6_LIN_FBYTE_FD15 *((volatile unsigned int*)(0x4270C33CUL))
\r
7147 #define bFM3_MFS6_LIN_FBYTE1_FD0 *((volatile unsigned int*)(0x4270C300UL))
\r
7148 #define bFM3_MFS6_LIN_FBYTE1_FD1 *((volatile unsigned int*)(0x4270C304UL))
\r
7149 #define bFM3_MFS6_LIN_FBYTE1_FD2 *((volatile unsigned int*)(0x4270C308UL))
\r
7150 #define bFM3_MFS6_LIN_FBYTE1_FD3 *((volatile unsigned int*)(0x4270C30CUL))
\r
7151 #define bFM3_MFS6_LIN_FBYTE1_FD4 *((volatile unsigned int*)(0x4270C310UL))
\r
7152 #define bFM3_MFS6_LIN_FBYTE1_FD5 *((volatile unsigned int*)(0x4270C314UL))
\r
7153 #define bFM3_MFS6_LIN_FBYTE1_FD6 *((volatile unsigned int*)(0x4270C318UL))
\r
7154 #define bFM3_MFS6_LIN_FBYTE1_FD7 *((volatile unsigned int*)(0x4270C31CUL))
\r
7155 #define bFM3_MFS6_LIN_FBYTE2_FD8 *((volatile unsigned int*)(0x4270C340UL))
\r
7156 #define bFM3_MFS6_LIN_FBYTE2_FD9 *((volatile unsigned int*)(0x4270C344UL))
\r
7157 #define bFM3_MFS6_LIN_FBYTE2_FD10 *((volatile unsigned int*)(0x4270C348UL))
\r
7158 #define bFM3_MFS6_LIN_FBYTE2_FD11 *((volatile unsigned int*)(0x4270C34CUL))
\r
7159 #define bFM3_MFS6_LIN_FBYTE2_FD12 *((volatile unsigned int*)(0x4270C350UL))
\r
7160 #define bFM3_MFS6_LIN_FBYTE2_FD13 *((volatile unsigned int*)(0x4270C354UL))
\r
7161 #define bFM3_MFS6_LIN_FBYTE2_FD14 *((volatile unsigned int*)(0x4270C358UL))
\r
7162 #define bFM3_MFS6_LIN_FBYTE2_FD15 *((volatile unsigned int*)(0x4270C35CUL))
\r
7164 /* I2C channel 6 registers */
\r
7165 #define bFM3_MFS6_I2C_SMR_ITST0 *((volatile unsigned int*)(0x4270C000UL))
\r
7166 #define bFM3_MFS6_I2C_SMR_ITST1 *((volatile unsigned int*)(0x4270C004UL))
\r
7167 #define bFM3_MFS6_I2C_SMR_TIE *((volatile unsigned int*)(0x4270C008UL))
\r
7168 #define bFM3_MFS6_I2C_SMR_RIE *((volatile unsigned int*)(0x4270C00CUL))
\r
7169 #define bFM3_MFS6_I2C_SMR_WUCR *((volatile unsigned int*)(0x4270C010UL))
\r
7170 #define bFM3_MFS6_I2C_SMR_MD0 *((volatile unsigned int*)(0x4270C014UL))
\r
7171 #define bFM3_MFS6_I2C_SMR_MD1 *((volatile unsigned int*)(0x4270C018UL))
\r
7172 #define bFM3_MFS6_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270C01CUL))
\r
7173 #define bFM3_MFS6_I2C_IBCR_INT *((volatile unsigned int*)(0x4270C020UL))
\r
7174 #define bFM3_MFS6_I2C_IBCR_BER *((volatile unsigned int*)(0x4270C024UL))
\r
7175 #define bFM3_MFS6_I2C_IBCR_INTE *((volatile unsigned int*)(0x4270C028UL))
\r
7176 #define bFM3_MFS6_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270C02CUL))
\r
7177 #define bFM3_MFS6_I2C_IBCR_WSEL *((volatile unsigned int*)(0x4270C030UL))
\r
7178 #define bFM3_MFS6_I2C_IBCR_ACKE *((volatile unsigned int*)(0x4270C034UL))
\r
7179 #define bFM3_MFS6_I2C_IBCR_ACT *((volatile unsigned int*)(0x4270C038UL))
\r
7180 #define bFM3_MFS6_I2C_IBCR_SCC *((volatile unsigned int*)(0x4270C038UL))
\r
7181 #define bFM3_MFS6_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270C03CUL))
\r
7182 #define bFM3_MFS6_I2C_IBSR_BB *((volatile unsigned int*)(0x4270C080UL))
\r
7183 #define bFM3_MFS6_I2C_IBSR_SPC *((volatile unsigned int*)(0x4270C084UL))
\r
7184 #define bFM3_MFS6_I2C_IBSR_RSC *((volatile unsigned int*)(0x4270C088UL))
\r
7185 #define bFM3_MFS6_I2C_IBSR_AL *((volatile unsigned int*)(0x4270C08CUL))
\r
7186 #define bFM3_MFS6_I2C_IBSR_TRX *((volatile unsigned int*)(0x4270C090UL))
\r
7187 #define bFM3_MFS6_I2C_IBSR_RSA *((volatile unsigned int*)(0x4270C094UL))
\r
7188 #define bFM3_MFS6_I2C_IBSR_RACK *((volatile unsigned int*)(0x4270C098UL))
\r
7189 #define bFM3_MFS6_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270C09CUL))
\r
7190 #define bFM3_MFS6_I2C_SSR_TBI *((volatile unsigned int*)(0x4270C0A0UL))
\r
7191 #define bFM3_MFS6_I2C_SSR_TDRE *((volatile unsigned int*)(0x4270C0A4UL))
\r
7192 #define bFM3_MFS6_I2C_SSR_RDRF *((volatile unsigned int*)(0x4270C0A8UL))
\r
7193 #define bFM3_MFS6_I2C_SSR_ORE *((volatile unsigned int*)(0x4270C0ACUL))
\r
7194 #define bFM3_MFS6_I2C_SSR_TBIE *((volatile unsigned int*)(0x4270C0B0UL))
\r
7195 #define bFM3_MFS6_I2C_SSR_DMA *((volatile unsigned int*)(0x4270C0B4UL))
\r
7196 #define bFM3_MFS6_I2C_SSR_TSET *((volatile unsigned int*)(0x4270C0B8UL))
\r
7197 #define bFM3_MFS6_I2C_SSR_REC *((volatile unsigned int*)(0x4270C0BCUL))
\r
7198 #define bFM3_MFS6_I2C_ISBA_SA0 *((volatile unsigned int*)(0x4270C200UL))
\r
7199 #define bFM3_MFS6_I2C_ISBA_SA1 *((volatile unsigned int*)(0x4270C204UL))
\r
7200 #define bFM3_MFS6_I2C_ISBA_SA2 *((volatile unsigned int*)(0x4270C208UL))
\r
7201 #define bFM3_MFS6_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270C20CUL))
\r
7202 #define bFM3_MFS6_I2C_ISBA_SA4 *((volatile unsigned int*)(0x4270C210UL))
\r
7203 #define bFM3_MFS6_I2C_ISBA_SA5 *((volatile unsigned int*)(0x4270C214UL))
\r
7204 #define bFM3_MFS6_I2C_ISBA_SA6 *((volatile unsigned int*)(0x4270C218UL))
\r
7205 #define bFM3_MFS6_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270C21CUL))
\r
7206 #define bFM3_MFS6_I2C_ISMK_SM0 *((volatile unsigned int*)(0x4270C220UL))
\r
7207 #define bFM3_MFS6_I2C_ISMK_SM1 *((volatile unsigned int*)(0x4270C224UL))
\r
7208 #define bFM3_MFS6_I2C_ISMK_SM2 *((volatile unsigned int*)(0x4270C228UL))
\r
7209 #define bFM3_MFS6_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270C22CUL))
\r
7210 #define bFM3_MFS6_I2C_ISMK_SM4 *((volatile unsigned int*)(0x4270C230UL))
\r
7211 #define bFM3_MFS6_I2C_ISMK_SM5 *((volatile unsigned int*)(0x4270C234UL))
\r
7212 #define bFM3_MFS6_I2C_ISMK_SM6 *((volatile unsigned int*)(0x4270C238UL))
\r
7213 #define bFM3_MFS6_I2C_ISMK_EN *((volatile unsigned int*)(0x4270C23CUL))
\r
7214 #define bFM3_MFS6_I2C_FCR_FE1 *((volatile unsigned int*)(0x4270C280UL))
\r
7215 #define bFM3_MFS6_I2C_FCR_FE2 *((volatile unsigned int*)(0x4270C284UL))
\r
7216 #define bFM3_MFS6_I2C_FCR_FCL1 *((volatile unsigned int*)(0x4270C288UL))
\r
7217 #define bFM3_MFS6_I2C_FCR_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
\r
7218 #define bFM3_MFS6_I2C_FCR_FSET *((volatile unsigned int*)(0x4270C290UL))
\r
7219 #define bFM3_MFS6_I2C_FCR_FLD *((volatile unsigned int*)(0x4270C294UL))
\r
7220 #define bFM3_MFS6_I2C_FCR_FLST *((volatile unsigned int*)(0x4270C298UL))
\r
7221 #define bFM3_MFS6_I2C_FCR_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
\r
7222 #define bFM3_MFS6_I2C_FCR_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
\r
7223 #define bFM3_MFS6_I2C_FCR_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
\r
7224 #define bFM3_MFS6_I2C_FCR_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
\r
7225 #define bFM3_MFS6_I2C_FCR_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
\r
7226 #define bFM3_MFS6_I2C_FCR_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
\r
7227 #define bFM3_MFS6_I2C_FCR_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
\r
7228 #define bFM3_MFS6_I2C_FCR0_FE1 *((volatile unsigned int*)(0x4270C280UL))
\r
7229 #define bFM3_MFS6_I2C_FCR0_FE2 *((volatile unsigned int*)(0x4270C284UL))
\r
7230 #define bFM3_MFS6_I2C_FCR0_FCL1 *((volatile unsigned int*)(0x4270C288UL))
\r
7231 #define bFM3_MFS6_I2C_FCR0_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
\r
7232 #define bFM3_MFS6_I2C_FCR0_FSET *((volatile unsigned int*)(0x4270C290UL))
\r
7233 #define bFM3_MFS6_I2C_FCR0_FLD *((volatile unsigned int*)(0x4270C294UL))
\r
7234 #define bFM3_MFS6_I2C_FCR0_FLST *((volatile unsigned int*)(0x4270C298UL))
\r
7235 #define bFM3_MFS6_I2C_FCR1_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
\r
7236 #define bFM3_MFS6_I2C_FCR1_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
\r
7237 #define bFM3_MFS6_I2C_FCR1_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
\r
7238 #define bFM3_MFS6_I2C_FCR1_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
\r
7239 #define bFM3_MFS6_I2C_FCR1_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
\r
7240 #define bFM3_MFS6_I2C_FCR1_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
\r
7241 #define bFM3_MFS6_I2C_FCR1_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
\r
7242 #define bFM3_MFS6_I2C_FBYTE_FD0 *((volatile unsigned int*)(0x4270C300UL))
\r
7243 #define bFM3_MFS6_I2C_FBYTE_FD1 *((volatile unsigned int*)(0x4270C304UL))
\r
7244 #define bFM3_MFS6_I2C_FBYTE_FD2 *((volatile unsigned int*)(0x4270C308UL))
\r
7245 #define bFM3_MFS6_I2C_FBYTE_FD3 *((volatile unsigned int*)(0x4270C30CUL))
\r
7246 #define bFM3_MFS6_I2C_FBYTE_FD4 *((volatile unsigned int*)(0x4270C310UL))
\r
7247 #define bFM3_MFS6_I2C_FBYTE_FD5 *((volatile unsigned int*)(0x4270C314UL))
\r
7248 #define bFM3_MFS6_I2C_FBYTE_FD6 *((volatile unsigned int*)(0x4270C318UL))
\r
7249 #define bFM3_MFS6_I2C_FBYTE_FD7 *((volatile unsigned int*)(0x4270C31CUL))
\r
7250 #define bFM3_MFS6_I2C_FBYTE_FD8 *((volatile unsigned int*)(0x4270C320UL))
\r
7251 #define bFM3_MFS6_I2C_FBYTE_FD9 *((volatile unsigned int*)(0x4270C324UL))
\r
7252 #define bFM3_MFS6_I2C_FBYTE_FD10 *((volatile unsigned int*)(0x4270C328UL))
\r
7253 #define bFM3_MFS6_I2C_FBYTE_FD11 *((volatile unsigned int*)(0x4270C32CUL))
\r
7254 #define bFM3_MFS6_I2C_FBYTE_FD12 *((volatile unsigned int*)(0x4270C330UL))
\r
7255 #define bFM3_MFS6_I2C_FBYTE_FD13 *((volatile unsigned int*)(0x4270C334UL))
\r
7256 #define bFM3_MFS6_I2C_FBYTE_FD14 *((volatile unsigned int*)(0x4270C338UL))
\r
7257 #define bFM3_MFS6_I2C_FBYTE_FD15 *((volatile unsigned int*)(0x4270C33CUL))
\r
7258 #define bFM3_MFS6_I2C_FBYTE1_FD0 *((volatile unsigned int*)(0x4270C300UL))
\r
7259 #define bFM3_MFS6_I2C_FBYTE1_FD1 *((volatile unsigned int*)(0x4270C304UL))
\r
7260 #define bFM3_MFS6_I2C_FBYTE1_FD2 *((volatile unsigned int*)(0x4270C308UL))
\r
7261 #define bFM3_MFS6_I2C_FBYTE1_FD3 *((volatile unsigned int*)(0x4270C30CUL))
\r
7262 #define bFM3_MFS6_I2C_FBYTE1_FD4 *((volatile unsigned int*)(0x4270C310UL))
\r
7263 #define bFM3_MFS6_I2C_FBYTE1_FD5 *((volatile unsigned int*)(0x4270C314UL))
\r
7264 #define bFM3_MFS6_I2C_FBYTE1_FD6 *((volatile unsigned int*)(0x4270C318UL))
\r
7265 #define bFM3_MFS6_I2C_FBYTE1_FD7 *((volatile unsigned int*)(0x4270C31CUL))
\r
7266 #define bFM3_MFS6_I2C_FBYTE2_FD8 *((volatile unsigned int*)(0x4270C340UL))
\r
7267 #define bFM3_MFS6_I2C_FBYTE2_FD9 *((volatile unsigned int*)(0x4270C344UL))
\r
7268 #define bFM3_MFS6_I2C_FBYTE2_FD10 *((volatile unsigned int*)(0x4270C348UL))
\r
7269 #define bFM3_MFS6_I2C_FBYTE2_FD11 *((volatile unsigned int*)(0x4270C34CUL))
\r
7270 #define bFM3_MFS6_I2C_FBYTE2_FD12 *((volatile unsigned int*)(0x4270C350UL))
\r
7271 #define bFM3_MFS6_I2C_FBYTE2_FD13 *((volatile unsigned int*)(0x4270C354UL))
\r
7272 #define bFM3_MFS6_I2C_FBYTE2_FD14 *((volatile unsigned int*)(0x4270C358UL))
\r
7273 #define bFM3_MFS6_I2C_FBYTE2_FD15 *((volatile unsigned int*)(0x4270C35CUL))
\r
7275 /* UART asynchronous channel 7 registers */
\r
7276 #define bFM3_MFS7_UART_SMR_SOE *((volatile unsigned int*)(0x4270E000UL))
\r
7277 #define bFM3_MFS7_UART_SMR_BDS *((volatile unsigned int*)(0x4270E008UL))
\r
7278 #define bFM3_MFS7_UART_SMR_SBL *((volatile unsigned int*)(0x4270E00CUL))
\r
7279 #define bFM3_MFS7_UART_SMR_WUCR *((volatile unsigned int*)(0x4270E010UL))
\r
7280 #define bFM3_MFS7_UART_SMR_MD0 *((volatile unsigned int*)(0x4270E014UL))
\r
7281 #define bFM3_MFS7_UART_SMR_MD1 *((volatile unsigned int*)(0x4270E018UL))
\r
7282 #define bFM3_MFS7_UART_SMR_MD2 *((volatile unsigned int*)(0x4270E01CUL))
\r
7283 #define bFM3_MFS7_UART_SCR_TXE *((volatile unsigned int*)(0x4270E020UL))
\r
7284 #define bFM3_MFS7_UART_SCR_RXE *((volatile unsigned int*)(0x4270E024UL))
\r
7285 #define bFM3_MFS7_UART_SCR_TBIE *((volatile unsigned int*)(0x4270E028UL))
\r
7286 #define bFM3_MFS7_UART_SCR_TIE *((volatile unsigned int*)(0x4270E02CUL))
\r
7287 #define bFM3_MFS7_UART_SCR_RIE *((volatile unsigned int*)(0x4270E030UL))
\r
7288 #define bFM3_MFS7_UART_SCR_UPCL *((volatile unsigned int*)(0x4270E03CUL))
\r
7289 #define bFM3_MFS7_UART_ESCR_L0 *((volatile unsigned int*)(0x4270E080UL))
\r
7290 #define bFM3_MFS7_UART_ESCR_L1 *((volatile unsigned int*)(0x4270E084UL))
\r
7291 #define bFM3_MFS7_UART_ESCR_L2 *((volatile unsigned int*)(0x4270E088UL))
\r
7292 #define bFM3_MFS7_UART_ESCR_P *((volatile unsigned int*)(0x4270E08CUL))
\r
7293 #define bFM3_MFS7_UART_ESCR_PEN *((volatile unsigned int*)(0x4270E090UL))
\r
7294 #define bFM3_MFS7_UART_ESCR_INV *((volatile unsigned int*)(0x4270E094UL))
\r
7295 #define bFM3_MFS7_UART_ESCR_ESBL *((volatile unsigned int*)(0x4270E098UL))
\r
7296 #define bFM3_MFS7_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270E09CUL))
\r
7297 #define bFM3_MFS7_UART_SSR_TBI *((volatile unsigned int*)(0x4270E0A0UL))
\r
7298 #define bFM3_MFS7_UART_SSR_TDRE *((volatile unsigned int*)(0x4270E0A4UL))
\r
7299 #define bFM3_MFS7_UART_SSR_RDRF *((volatile unsigned int*)(0x4270E0A8UL))
\r
7300 #define bFM3_MFS7_UART_SSR_ORE *((volatile unsigned int*)(0x4270E0ACUL))
\r
7301 #define bFM3_MFS7_UART_SSR_FRE *((volatile unsigned int*)(0x4270E0B0UL))
\r
7302 #define bFM3_MFS7_UART_SSR_PE *((volatile unsigned int*)(0x4270E0B4UL))
\r
7303 #define bFM3_MFS7_UART_SSR_REC *((volatile unsigned int*)(0x4270E0BCUL))
\r
7304 #define bFM3_MFS7_UART_RDR_AD *((volatile unsigned int*)(0x4270E120UL))
\r
7305 #define bFM3_MFS7_UART_TDR_AD *((volatile unsigned int*)(0x4270E120UL))
\r
7306 #define bFM3_MFS7_UART_BGR_EXT *((volatile unsigned int*)(0x4270E1BCUL))
\r
7307 #define bFM3_MFS7_UART_BGR1_EXT *((volatile unsigned int*)(0x4270E1BCUL))
\r
7308 #define bFM3_MFS7_UART_FCR_FE1 *((volatile unsigned int*)(0x4270E280UL))
\r
7309 #define bFM3_MFS7_UART_FCR_FE2 *((volatile unsigned int*)(0x4270E284UL))
\r
7310 #define bFM3_MFS7_UART_FCR_FCL1 *((volatile unsigned int*)(0x4270E288UL))
\r
7311 #define bFM3_MFS7_UART_FCR_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
\r
7312 #define bFM3_MFS7_UART_FCR_FSET *((volatile unsigned int*)(0x4270E290UL))
\r
7313 #define bFM3_MFS7_UART_FCR_FLD *((volatile unsigned int*)(0x4270E294UL))
\r
7314 #define bFM3_MFS7_UART_FCR_FLST *((volatile unsigned int*)(0x4270E298UL))
\r
7315 #define bFM3_MFS7_UART_FCR_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
\r
7316 #define bFM3_MFS7_UART_FCR_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
\r
7317 #define bFM3_MFS7_UART_FCR_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
\r
7318 #define bFM3_MFS7_UART_FCR_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
\r
7319 #define bFM3_MFS7_UART_FCR_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
\r
7320 #define bFM3_MFS7_UART_FCR_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
\r
7321 #define bFM3_MFS7_UART_FCR_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
\r
7322 #define bFM3_MFS7_UART_FCR0_FE1 *((volatile unsigned int*)(0x4270E280UL))
\r
7323 #define bFM3_MFS7_UART_FCR0_FE2 *((volatile unsigned int*)(0x4270E284UL))
\r
7324 #define bFM3_MFS7_UART_FCR0_FCL1 *((volatile unsigned int*)(0x4270E288UL))
\r
7325 #define bFM3_MFS7_UART_FCR0_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
\r
7326 #define bFM3_MFS7_UART_FCR0_FSET *((volatile unsigned int*)(0x4270E290UL))
\r
7327 #define bFM3_MFS7_UART_FCR0_FLD *((volatile unsigned int*)(0x4270E294UL))
\r
7328 #define bFM3_MFS7_UART_FCR0_FLST *((volatile unsigned int*)(0x4270E298UL))
\r
7329 #define bFM3_MFS7_UART_FCR1_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
\r
7330 #define bFM3_MFS7_UART_FCR1_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
\r
7331 #define bFM3_MFS7_UART_FCR1_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
\r
7332 #define bFM3_MFS7_UART_FCR1_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
\r
7333 #define bFM3_MFS7_UART_FCR1_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
\r
7334 #define bFM3_MFS7_UART_FCR1_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
\r
7335 #define bFM3_MFS7_UART_FCR1_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
\r
7336 #define bFM3_MFS7_UART_FBYTE_FD0 *((volatile unsigned int*)(0x4270E300UL))
\r
7337 #define bFM3_MFS7_UART_FBYTE_FD1 *((volatile unsigned int*)(0x4270E304UL))
\r
7338 #define bFM3_MFS7_UART_FBYTE_FD2 *((volatile unsigned int*)(0x4270E308UL))
\r
7339 #define bFM3_MFS7_UART_FBYTE_FD3 *((volatile unsigned int*)(0x4270E30CUL))
\r
7340 #define bFM3_MFS7_UART_FBYTE_FD4 *((volatile unsigned int*)(0x4270E310UL))
\r
7341 #define bFM3_MFS7_UART_FBYTE_FD5 *((volatile unsigned int*)(0x4270E314UL))
\r
7342 #define bFM3_MFS7_UART_FBYTE_FD6 *((volatile unsigned int*)(0x4270E318UL))
\r
7343 #define bFM3_MFS7_UART_FBYTE_FD7 *((volatile unsigned int*)(0x4270E31CUL))
\r
7344 #define bFM3_MFS7_UART_FBYTE_FD8 *((volatile unsigned int*)(0x4270E320UL))
\r
7345 #define bFM3_MFS7_UART_FBYTE_FD9 *((volatile unsigned int*)(0x4270E324UL))
\r
7346 #define bFM3_MFS7_UART_FBYTE_FD10 *((volatile unsigned int*)(0x4270E328UL))
\r
7347 #define bFM3_MFS7_UART_FBYTE_FD11 *((volatile unsigned int*)(0x4270E32CUL))
\r
7348 #define bFM3_MFS7_UART_FBYTE_FD12 *((volatile unsigned int*)(0x4270E330UL))
\r
7349 #define bFM3_MFS7_UART_FBYTE_FD13 *((volatile unsigned int*)(0x4270E334UL))
\r
7350 #define bFM3_MFS7_UART_FBYTE_FD14 *((volatile unsigned int*)(0x4270E338UL))
\r
7351 #define bFM3_MFS7_UART_FBYTE_FD15 *((volatile unsigned int*)(0x4270E33CUL))
\r
7352 #define bFM3_MFS7_UART_FBYTE1_FD0 *((volatile unsigned int*)(0x4270E300UL))
\r
7353 #define bFM3_MFS7_UART_FBYTE1_FD1 *((volatile unsigned int*)(0x4270E304UL))
\r
7354 #define bFM3_MFS7_UART_FBYTE1_FD2 *((volatile unsigned int*)(0x4270E308UL))
\r
7355 #define bFM3_MFS7_UART_FBYTE1_FD3 *((volatile unsigned int*)(0x4270E30CUL))
\r
7356 #define bFM3_MFS7_UART_FBYTE1_FD4 *((volatile unsigned int*)(0x4270E310UL))
\r
7357 #define bFM3_MFS7_UART_FBYTE1_FD5 *((volatile unsigned int*)(0x4270E314UL))
\r
7358 #define bFM3_MFS7_UART_FBYTE1_FD6 *((volatile unsigned int*)(0x4270E318UL))
\r
7359 #define bFM3_MFS7_UART_FBYTE1_FD7 *((volatile unsigned int*)(0x4270E31CUL))
\r
7360 #define bFM3_MFS7_UART_FBYTE2_FD8 *((volatile unsigned int*)(0x4270E320UL))
\r
7361 #define bFM3_MFS7_UART_FBYTE2_FD9 *((volatile unsigned int*)(0x4270E324UL))
\r
7362 #define bFM3_MFS7_UART_FBYTE2_FD10 *((volatile unsigned int*)(0x4270E328UL))
\r
7363 #define bFM3_MFS7_UART_FBYTE2_FD11 *((volatile unsigned int*)(0x4270E32CUL))
\r
7364 #define bFM3_MFS7_UART_FBYTE2_FD12 *((volatile unsigned int*)(0x4270E330UL))
\r
7365 #define bFM3_MFS7_UART_FBYTE2_FD13 *((volatile unsigned int*)(0x4270E334UL))
\r
7366 #define bFM3_MFS7_UART_FBYTE2_FD14 *((volatile unsigned int*)(0x4270E338UL))
\r
7367 #define bFM3_MFS7_UART_FBYTE2_FD15 *((volatile unsigned int*)(0x4270E33CUL))
\r
7369 /* UART synchronous channel 7 registers */
\r
7370 #define bFM3_MFS7_CSIO_SMR_SOE *((volatile unsigned int*)(0x4270E000UL))
\r
7371 #define bFM3_MFS7_CSIO_SMR_SCKE *((volatile unsigned int*)(0x4270E004UL))
\r
7372 #define bFM3_MFS7_CSIO_SMR_BDS *((volatile unsigned int*)(0x4270E008UL))
\r
7373 #define bFM3_MFS7_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270E00CUL))
\r
7374 #define bFM3_MFS7_CSIO_SMR_WUCR *((volatile unsigned int*)(0x4270E010UL))
\r
7375 #define bFM3_MFS7_CSIO_SMR_MD0 *((volatile unsigned int*)(0x4270E014UL))
\r
7376 #define bFM3_MFS7_CSIO_SMR_MD1 *((volatile unsigned int*)(0x4270E018UL))
\r
7377 #define bFM3_MFS7_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270E01CUL))
\r
7378 #define bFM3_MFS7_CSIO_SCR_TXE *((volatile unsigned int*)(0x4270E020UL))
\r
7379 #define bFM3_MFS7_CSIO_SCR_RXE *((volatile unsigned int*)(0x4270E024UL))
\r
7380 #define bFM3_MFS7_CSIO_SCR_TBIE *((volatile unsigned int*)(0x4270E028UL))
\r
7381 #define bFM3_MFS7_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270E02CUL))
\r
7382 #define bFM3_MFS7_CSIO_SCR_RIE *((volatile unsigned int*)(0x4270E030UL))
\r
7383 #define bFM3_MFS7_CSIO_SCR_SPI *((volatile unsigned int*)(0x4270E034UL))
\r
7384 #define bFM3_MFS7_CSIO_SCR_MS *((volatile unsigned int*)(0x4270E038UL))
\r
7385 #define bFM3_MFS7_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270E03CUL))
\r
7386 #define bFM3_MFS7_CSIO_ESCR_L0 *((volatile unsigned int*)(0x4270E080UL))
\r
7387 #define bFM3_MFS7_CSIO_ESCR_L1 *((volatile unsigned int*)(0x4270E084UL))
\r
7388 #define bFM3_MFS7_CSIO_ESCR_L2 *((volatile unsigned int*)(0x4270E088UL))
\r
7389 #define bFM3_MFS7_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270E08CUL))
\r
7390 #define bFM3_MFS7_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x4270E090UL))
\r
7391 #define bFM3_MFS7_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270E09CUL))
\r
7392 #define bFM3_MFS7_CSIO_SSR_TBI *((volatile unsigned int*)(0x4270E0A0UL))
\r
7393 #define bFM3_MFS7_CSIO_SSR_TDRE *((volatile unsigned int*)(0x4270E0A4UL))
\r
7394 #define bFM3_MFS7_CSIO_SSR_RDRF *((volatile unsigned int*)(0x4270E0A8UL))
\r
7395 #define bFM3_MFS7_CSIO_SSR_ORE *((volatile unsigned int*)(0x4270E0ACUL))
\r
7396 #define bFM3_MFS7_CSIO_SSR_REC *((volatile unsigned int*)(0x4270E0BCUL))
\r
7397 #define bFM3_MFS7_CSIO_FCR_FE1 *((volatile unsigned int*)(0x4270E280UL))
\r
7398 #define bFM3_MFS7_CSIO_FCR_FE2 *((volatile unsigned int*)(0x4270E284UL))
\r
7399 #define bFM3_MFS7_CSIO_FCR_FCL1 *((volatile unsigned int*)(0x4270E288UL))
\r
7400 #define bFM3_MFS7_CSIO_FCR_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
\r
7401 #define bFM3_MFS7_CSIO_FCR_FSET *((volatile unsigned int*)(0x4270E290UL))
\r
7402 #define bFM3_MFS7_CSIO_FCR_FLD *((volatile unsigned int*)(0x4270E294UL))
\r
7403 #define bFM3_MFS7_CSIO_FCR_FLST *((volatile unsigned int*)(0x4270E298UL))
\r
7404 #define bFM3_MFS7_CSIO_FCR_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
\r
7405 #define bFM3_MFS7_CSIO_FCR_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
\r
7406 #define bFM3_MFS7_CSIO_FCR_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
\r
7407 #define bFM3_MFS7_CSIO_FCR_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
\r
7408 #define bFM3_MFS7_CSIO_FCR_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
\r
7409 #define bFM3_MFS7_CSIO_FCR_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
\r
7410 #define bFM3_MFS7_CSIO_FCR_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
\r
7411 #define bFM3_MFS7_CSIO_FCR0_FE1 *((volatile unsigned int*)(0x4270E280UL))
\r
7412 #define bFM3_MFS7_CSIO_FCR0_FE2 *((volatile unsigned int*)(0x4270E284UL))
\r
7413 #define bFM3_MFS7_CSIO_FCR0_FCL1 *((volatile unsigned int*)(0x4270E288UL))
\r
7414 #define bFM3_MFS7_CSIO_FCR0_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
\r
7415 #define bFM3_MFS7_CSIO_FCR0_FSET *((volatile unsigned int*)(0x4270E290UL))
\r
7416 #define bFM3_MFS7_CSIO_FCR0_FLD *((volatile unsigned int*)(0x4270E294UL))
\r
7417 #define bFM3_MFS7_CSIO_FCR0_FLST *((volatile unsigned int*)(0x4270E298UL))
\r
7418 #define bFM3_MFS7_CSIO_FCR1_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
\r
7419 #define bFM3_MFS7_CSIO_FCR1_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
\r
7420 #define bFM3_MFS7_CSIO_FCR1_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
\r
7421 #define bFM3_MFS7_CSIO_FCR1_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
\r
7422 #define bFM3_MFS7_CSIO_FCR1_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
\r
7423 #define bFM3_MFS7_CSIO_FCR1_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
\r
7424 #define bFM3_MFS7_CSIO_FCR1_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
\r
7425 #define bFM3_MFS7_CSIO_FBYTE_FD0 *((volatile unsigned int*)(0x4270E300UL))
\r
7426 #define bFM3_MFS7_CSIO_FBYTE_FD1 *((volatile unsigned int*)(0x4270E304UL))
\r
7427 #define bFM3_MFS7_CSIO_FBYTE_FD2 *((volatile unsigned int*)(0x4270E308UL))
\r
7428 #define bFM3_MFS7_CSIO_FBYTE_FD3 *((volatile unsigned int*)(0x4270E30CUL))
\r
7429 #define bFM3_MFS7_CSIO_FBYTE_FD4 *((volatile unsigned int*)(0x4270E310UL))
\r
7430 #define bFM3_MFS7_CSIO_FBYTE_FD5 *((volatile unsigned int*)(0x4270E314UL))
\r
7431 #define bFM3_MFS7_CSIO_FBYTE_FD6 *((volatile unsigned int*)(0x4270E318UL))
\r
7432 #define bFM3_MFS7_CSIO_FBYTE_FD7 *((volatile unsigned int*)(0x4270E31CUL))
\r
7433 #define bFM3_MFS7_CSIO_FBYTE_FD8 *((volatile unsigned int*)(0x4270E320UL))
\r
7434 #define bFM3_MFS7_CSIO_FBYTE_FD9 *((volatile unsigned int*)(0x4270E324UL))
\r
7435 #define bFM3_MFS7_CSIO_FBYTE_FD10 *((volatile unsigned int*)(0x4270E328UL))
\r
7436 #define bFM3_MFS7_CSIO_FBYTE_FD11 *((volatile unsigned int*)(0x4270E32CUL))
\r
7437 #define bFM3_MFS7_CSIO_FBYTE_FD12 *((volatile unsigned int*)(0x4270E330UL))
\r
7438 #define bFM3_MFS7_CSIO_FBYTE_FD13 *((volatile unsigned int*)(0x4270E334UL))
\r
7439 #define bFM3_MFS7_CSIO_FBYTE_FD14 *((volatile unsigned int*)(0x4270E338UL))
\r
7440 #define bFM3_MFS7_CSIO_FBYTE_FD15 *((volatile unsigned int*)(0x4270E33CUL))
\r
7441 #define bFM3_MFS7_CSIO_FBYTE1_FD0 *((volatile unsigned int*)(0x4270E300UL))
\r
7442 #define bFM3_MFS7_CSIO_FBYTE1_FD1 *((volatile unsigned int*)(0x4270E304UL))
\r
7443 #define bFM3_MFS7_CSIO_FBYTE1_FD2 *((volatile unsigned int*)(0x4270E308UL))
\r
7444 #define bFM3_MFS7_CSIO_FBYTE1_FD3 *((volatile unsigned int*)(0x4270E30CUL))
\r
7445 #define bFM3_MFS7_CSIO_FBYTE1_FD4 *((volatile unsigned int*)(0x4270E310UL))
\r
7446 #define bFM3_MFS7_CSIO_FBYTE1_FD5 *((volatile unsigned int*)(0x4270E314UL))
\r
7447 #define bFM3_MFS7_CSIO_FBYTE1_FD6 *((volatile unsigned int*)(0x4270E318UL))
\r
7448 #define bFM3_MFS7_CSIO_FBYTE1_FD7 *((volatile unsigned int*)(0x4270E31CUL))
\r
7449 #define bFM3_MFS7_CSIO_FBYTE2_FD8 *((volatile unsigned int*)(0x4270E340UL))
\r
7450 #define bFM3_MFS7_CSIO_FBYTE2_FD9 *((volatile unsigned int*)(0x4270E344UL))
\r
7451 #define bFM3_MFS7_CSIO_FBYTE2_FD10 *((volatile unsigned int*)(0x4270E348UL))
\r
7452 #define bFM3_MFS7_CSIO_FBYTE2_FD11 *((volatile unsigned int*)(0x4270E34CUL))
\r
7453 #define bFM3_MFS7_CSIO_FBYTE2_FD12 *((volatile unsigned int*)(0x4270E350UL))
\r
7454 #define bFM3_MFS7_CSIO_FBYTE2_FD13 *((volatile unsigned int*)(0x4270E354UL))
\r
7455 #define bFM3_MFS7_CSIO_FBYTE2_FD14 *((volatile unsigned int*)(0x4270E358UL))
\r
7456 #define bFM3_MFS7_CSIO_FBYTE2_FD15 *((volatile unsigned int*)(0x4270E35CUL))
\r
7458 /* UART LIN channel 7 registers */
\r
7459 #define bFM3_MFS7_LIN_SMR_SOE *((volatile unsigned int*)(0x4270E000UL))
\r
7460 #define bFM3_MFS7_LIN_SMR_SBL *((volatile unsigned int*)(0x4270E00CUL))
\r
7461 #define bFM3_MFS7_LIN_SMR_WUCR *((volatile unsigned int*)(0x4270E010UL))
\r
7462 #define bFM3_MFS7_LIN_SMR_MD0 *((volatile unsigned int*)(0x4270E014UL))
\r
7463 #define bFM3_MFS7_LIN_SMR_MD1 *((volatile unsigned int*)(0x4270E018UL))
\r
7464 #define bFM3_MFS7_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270E01CUL))
\r
7465 #define bFM3_MFS7_LIN_SCR_TXE *((volatile unsigned int*)(0x4270E020UL))
\r
7466 #define bFM3_MFS7_LIN_SCR_RXE *((volatile unsigned int*)(0x4270E024UL))
\r
7467 #define bFM3_MFS7_LIN_SCR_TBIE *((volatile unsigned int*)(0x4270E028UL))
\r
7468 #define bFM3_MFS7_LIN_SCR_TIE *((volatile unsigned int*)(0x4270E02CUL))
\r
7469 #define bFM3_MFS7_LIN_SCR_RIE *((volatile unsigned int*)(0x4270E030UL))
\r
7470 #define bFM3_MFS7_LIN_SCR_LBR *((volatile unsigned int*)(0x4270E034UL))
\r
7471 #define bFM3_MFS7_LIN_SCR_MS *((volatile unsigned int*)(0x4270E038UL))
\r
7472 #define bFM3_MFS7_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270E03CUL))
\r
7473 #define bFM3_MFS7_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x4270E080UL))
\r
7474 #define bFM3_MFS7_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x4270E084UL))
\r
7475 #define bFM3_MFS7_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x4270E088UL))
\r
7476 #define bFM3_MFS7_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270E08CUL))
\r
7477 #define bFM3_MFS7_LIN_ESCR_LBIE *((volatile unsigned int*)(0x4270E090UL))
\r
7478 #define bFM3_MFS7_LIN_ESCR_ESBL *((volatile unsigned int*)(0x4270E098UL))
\r
7479 #define bFM3_MFS7_LIN_SSR_TBI *((volatile unsigned int*)(0x4270E0A0UL))
\r
7480 #define bFM3_MFS7_LIN_SSR_TDRE *((volatile unsigned int*)(0x4270E0A4UL))
\r
7481 #define bFM3_MFS7_LIN_SSR_RDRF *((volatile unsigned int*)(0x4270E0A8UL))
\r
7482 #define bFM3_MFS7_LIN_SSR_ORE *((volatile unsigned int*)(0x4270E0ACUL))
\r
7483 #define bFM3_MFS7_LIN_SSR_FRE *((volatile unsigned int*)(0x4270E0B0UL))
\r
7484 #define bFM3_MFS7_LIN_SSR_LBD *((volatile unsigned int*)(0x4270E0B4UL))
\r
7485 #define bFM3_MFS7_LIN_SSR_REC *((volatile unsigned int*)(0x4270E0BCUL))
\r
7486 #define bFM3_MFS7_LIN_BGR_EXT *((volatile unsigned int*)(0x4270E1BCUL))
\r
7487 #define bFM3_MFS7_LIN_BGR1_EXT *((volatile unsigned int*)(0x4270E1BCUL))
\r
7488 #define bFM3_MFS7_LIN_FCR_FE1 *((volatile unsigned int*)(0x4270E280UL))
\r
7489 #define bFM3_MFS7_LIN_FCR_FE2 *((volatile unsigned int*)(0x4270E284UL))
\r
7490 #define bFM3_MFS7_LIN_FCR_FCL1 *((volatile unsigned int*)(0x4270E288UL))
\r
7491 #define bFM3_MFS7_LIN_FCR_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
\r
7492 #define bFM3_MFS7_LIN_FCR_FSET *((volatile unsigned int*)(0x4270E290UL))
\r
7493 #define bFM3_MFS7_LIN_FCR_FLD *((volatile unsigned int*)(0x4270E294UL))
\r
7494 #define bFM3_MFS7_LIN_FCR_FLST *((volatile unsigned int*)(0x4270E298UL))
\r
7495 #define bFM3_MFS7_LIN_FCR_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
\r
7496 #define bFM3_MFS7_LIN_FCR_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
\r
7497 #define bFM3_MFS7_LIN_FCR_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
\r
7498 #define bFM3_MFS7_LIN_FCR_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
\r
7499 #define bFM3_MFS7_LIN_FCR_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
\r
7500 #define bFM3_MFS7_LIN_FCR_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
\r
7501 #define bFM3_MFS7_LIN_FCR_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
\r
7502 #define bFM3_MFS7_LIN_FCR0_FE1 *((volatile unsigned int*)(0x4270E280UL))
\r
7503 #define bFM3_MFS7_LIN_FCR0_FE2 *((volatile unsigned int*)(0x4270E284UL))
\r
7504 #define bFM3_MFS7_LIN_FCR0_FCL1 *((volatile unsigned int*)(0x4270E288UL))
\r
7505 #define bFM3_MFS7_LIN_FCR0_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
\r
7506 #define bFM3_MFS7_LIN_FCR0_FSET *((volatile unsigned int*)(0x4270E290UL))
\r
7507 #define bFM3_MFS7_LIN_FCR0_FLD *((volatile unsigned int*)(0x4270E294UL))
\r
7508 #define bFM3_MFS7_LIN_FCR0_FLST *((volatile unsigned int*)(0x4270E298UL))
\r
7509 #define bFM3_MFS7_LIN_FCR1_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
\r
7510 #define bFM3_MFS7_LIN_FCR1_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
\r
7511 #define bFM3_MFS7_LIN_FCR1_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
\r
7512 #define bFM3_MFS7_LIN_FCR1_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
\r
7513 #define bFM3_MFS7_LIN_FCR1_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
\r
7514 #define bFM3_MFS7_LIN_FCR1_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
\r
7515 #define bFM3_MFS7_LIN_FCR1_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
\r
7516 #define bFM3_MFS7_LIN_FBYTE_FD0 *((volatile unsigned int*)(0x4270E300UL))
\r
7517 #define bFM3_MFS7_LIN_FBYTE_FD1 *((volatile unsigned int*)(0x4270E304UL))
\r
7518 #define bFM3_MFS7_LIN_FBYTE_FD2 *((volatile unsigned int*)(0x4270E308UL))
\r
7519 #define bFM3_MFS7_LIN_FBYTE_FD3 *((volatile unsigned int*)(0x4270E30CUL))
\r
7520 #define bFM3_MFS7_LIN_FBYTE_FD4 *((volatile unsigned int*)(0x4270E310UL))
\r
7521 #define bFM3_MFS7_LIN_FBYTE_FD5 *((volatile unsigned int*)(0x4270E314UL))
\r
7522 #define bFM3_MFS7_LIN_FBYTE_FD6 *((volatile unsigned int*)(0x4270E318UL))
\r
7523 #define bFM3_MFS7_LIN_FBYTE_FD7 *((volatile unsigned int*)(0x4270E31CUL))
\r
7524 #define bFM3_MFS7_LIN_FBYTE_FD8 *((volatile unsigned int*)(0x4270E320UL))
\r
7525 #define bFM3_MFS7_LIN_FBYTE_FD9 *((volatile unsigned int*)(0x4270E324UL))
\r
7526 #define bFM3_MFS7_LIN_FBYTE_FD10 *((volatile unsigned int*)(0x4270E328UL))
\r
7527 #define bFM3_MFS7_LIN_FBYTE_FD11 *((volatile unsigned int*)(0x4270E32CUL))
\r
7528 #define bFM3_MFS7_LIN_FBYTE_FD12 *((volatile unsigned int*)(0x4270E330UL))
\r
7529 #define bFM3_MFS7_LIN_FBYTE_FD13 *((volatile unsigned int*)(0x4270E334UL))
\r
7530 #define bFM3_MFS7_LIN_FBYTE_FD14 *((volatile unsigned int*)(0x4270E338UL))
\r
7531 #define bFM3_MFS7_LIN_FBYTE_FD15 *((volatile unsigned int*)(0x4270E33CUL))
\r
7532 #define bFM3_MFS7_LIN_FBYTE1_FD0 *((volatile unsigned int*)(0x4270E300UL))
\r
7533 #define bFM3_MFS7_LIN_FBYTE1_FD1 *((volatile unsigned int*)(0x4270E304UL))
\r
7534 #define bFM3_MFS7_LIN_FBYTE1_FD2 *((volatile unsigned int*)(0x4270E308UL))
\r
7535 #define bFM3_MFS7_LIN_FBYTE1_FD3 *((volatile unsigned int*)(0x4270E30CUL))
\r
7536 #define bFM3_MFS7_LIN_FBYTE1_FD4 *((volatile unsigned int*)(0x4270E310UL))
\r
7537 #define bFM3_MFS7_LIN_FBYTE1_FD5 *((volatile unsigned int*)(0x4270E314UL))
\r
7538 #define bFM3_MFS7_LIN_FBYTE1_FD6 *((volatile unsigned int*)(0x4270E318UL))
\r
7539 #define bFM3_MFS7_LIN_FBYTE1_FD7 *((volatile unsigned int*)(0x4270E31CUL))
\r
7540 #define bFM3_MFS7_LIN_FBYTE2_FD8 *((volatile unsigned int*)(0x4270E340UL))
\r
7541 #define bFM3_MFS7_LIN_FBYTE2_FD9 *((volatile unsigned int*)(0x4270E344UL))
\r
7542 #define bFM3_MFS7_LIN_FBYTE2_FD10 *((volatile unsigned int*)(0x4270E348UL))
\r
7543 #define bFM3_MFS7_LIN_FBYTE2_FD11 *((volatile unsigned int*)(0x4270E34CUL))
\r
7544 #define bFM3_MFS7_LIN_FBYTE2_FD12 *((volatile unsigned int*)(0x4270E350UL))
\r
7545 #define bFM3_MFS7_LIN_FBYTE2_FD13 *((volatile unsigned int*)(0x4270E354UL))
\r
7546 #define bFM3_MFS7_LIN_FBYTE2_FD14 *((volatile unsigned int*)(0x4270E358UL))
\r
7547 #define bFM3_MFS7_LIN_FBYTE2_FD15 *((volatile unsigned int*)(0x4270E35CUL))
\r
7549 /* I2C channel 7 registers */
\r
7550 #define bFM3_MFS7_I2C_SMR_ITST0 *((volatile unsigned int*)(0x4270E000UL))
\r
7551 #define bFM3_MFS7_I2C_SMR_ITST1 *((volatile unsigned int*)(0x4270E004UL))
\r
7552 #define bFM3_MFS7_I2C_SMR_TIE *((volatile unsigned int*)(0x4270E008UL))
\r
7553 #define bFM3_MFS7_I2C_SMR_RIE *((volatile unsigned int*)(0x4270E00CUL))
\r
7554 #define bFM3_MFS7_I2C_SMR_WUCR *((volatile unsigned int*)(0x4270E010UL))
\r
7555 #define bFM3_MFS7_I2C_SMR_MD0 *((volatile unsigned int*)(0x4270E014UL))
\r
7556 #define bFM3_MFS7_I2C_SMR_MD1 *((volatile unsigned int*)(0x4270E018UL))
\r
7557 #define bFM3_MFS7_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270E01CUL))
\r
7558 #define bFM3_MFS7_I2C_IBCR_INT *((volatile unsigned int*)(0x4270E020UL))
\r
7559 #define bFM3_MFS7_I2C_IBCR_BER *((volatile unsigned int*)(0x4270E024UL))
\r
7560 #define bFM3_MFS7_I2C_IBCR_INTE *((volatile unsigned int*)(0x4270E028UL))
\r
7561 #define bFM3_MFS7_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270E02CUL))
\r
7562 #define bFM3_MFS7_I2C_IBCR_WSEL *((volatile unsigned int*)(0x4270E030UL))
\r
7563 #define bFM3_MFS7_I2C_IBCR_ACKE *((volatile unsigned int*)(0x4270E034UL))
\r
7564 #define bFM3_MFS7_I2C_IBCR_ACT *((volatile unsigned int*)(0x4270E038UL))
\r
7565 #define bFM3_MFS7_I2C_IBCR_SCC *((volatile unsigned int*)(0x4270E038UL))
\r
7566 #define bFM3_MFS7_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270E03CUL))
\r
7567 #define bFM3_MFS7_I2C_IBSR_BB *((volatile unsigned int*)(0x4270E080UL))
\r
7568 #define bFM3_MFS7_I2C_IBSR_SPC *((volatile unsigned int*)(0x4270E084UL))
\r
7569 #define bFM3_MFS7_I2C_IBSR_RSC *((volatile unsigned int*)(0x4270E088UL))
\r
7570 #define bFM3_MFS7_I2C_IBSR_AL *((volatile unsigned int*)(0x4270E08CUL))
\r
7571 #define bFM3_MFS7_I2C_IBSR_TRX *((volatile unsigned int*)(0x4270E090UL))
\r
7572 #define bFM3_MFS7_I2C_IBSR_RSA *((volatile unsigned int*)(0x4270E094UL))
\r
7573 #define bFM3_MFS7_I2C_IBSR_RACK *((volatile unsigned int*)(0x4270E098UL))
\r
7574 #define bFM3_MFS7_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270E09CUL))
\r
7575 #define bFM3_MFS7_I2C_SSR_TBI *((volatile unsigned int*)(0x4270E0A0UL))
\r
7576 #define bFM3_MFS7_I2C_SSR_TDRE *((volatile unsigned int*)(0x4270E0A4UL))
\r
7577 #define bFM3_MFS7_I2C_SSR_RDRF *((volatile unsigned int*)(0x4270E0A8UL))
\r
7578 #define bFM3_MFS7_I2C_SSR_ORE *((volatile unsigned int*)(0x4270E0ACUL))
\r
7579 #define bFM3_MFS7_I2C_SSR_TBIE *((volatile unsigned int*)(0x4270E0B0UL))
\r
7580 #define bFM3_MFS7_I2C_SSR_DMA *((volatile unsigned int*)(0x4270E0B4UL))
\r
7581 #define bFM3_MFS7_I2C_SSR_TSET *((volatile unsigned int*)(0x4270E0B8UL))
\r
7582 #define bFM3_MFS7_I2C_SSR_REC *((volatile unsigned int*)(0x4270E0BCUL))
\r
7583 #define bFM3_MFS7_I2C_ISBA_SA0 *((volatile unsigned int*)(0x4270E200UL))
\r
7584 #define bFM3_MFS7_I2C_ISBA_SA1 *((volatile unsigned int*)(0x4270E204UL))
\r
7585 #define bFM3_MFS7_I2C_ISBA_SA2 *((volatile unsigned int*)(0x4270E208UL))
\r
7586 #define bFM3_MFS7_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270E20CUL))
\r
7587 #define bFM3_MFS7_I2C_ISBA_SA4 *((volatile unsigned int*)(0x4270E210UL))
\r
7588 #define bFM3_MFS7_I2C_ISBA_SA5 *((volatile unsigned int*)(0x4270E214UL))
\r
7589 #define bFM3_MFS7_I2C_ISBA_SA6 *((volatile unsigned int*)(0x4270E218UL))
\r
7590 #define bFM3_MFS7_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270E21CUL))
\r
7591 #define bFM3_MFS7_I2C_ISMK_SM0 *((volatile unsigned int*)(0x4270E220UL))
\r
7592 #define bFM3_MFS7_I2C_ISMK_SM1 *((volatile unsigned int*)(0x4270E224UL))
\r
7593 #define bFM3_MFS7_I2C_ISMK_SM2 *((volatile unsigned int*)(0x4270E228UL))
\r
7594 #define bFM3_MFS7_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270E22CUL))
\r
7595 #define bFM3_MFS7_I2C_ISMK_SM4 *((volatile unsigned int*)(0x4270E230UL))
\r
7596 #define bFM3_MFS7_I2C_ISMK_SM5 *((volatile unsigned int*)(0x4270E234UL))
\r
7597 #define bFM3_MFS7_I2C_ISMK_SM6 *((volatile unsigned int*)(0x4270E238UL))
\r
7598 #define bFM3_MFS7_I2C_ISMK_EN *((volatile unsigned int*)(0x4270E23CUL))
\r
7599 #define bFM3_MFS7_I2C_FCR_FE1 *((volatile unsigned int*)(0x4270E280UL))
\r
7600 #define bFM3_MFS7_I2C_FCR_FE2 *((volatile unsigned int*)(0x4270E284UL))
\r
7601 #define bFM3_MFS7_I2C_FCR_FCL1 *((volatile unsigned int*)(0x4270E288UL))
\r
7602 #define bFM3_MFS7_I2C_FCR_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
\r
7603 #define bFM3_MFS7_I2C_FCR_FSET *((volatile unsigned int*)(0x4270E290UL))
\r
7604 #define bFM3_MFS7_I2C_FCR_FLD *((volatile unsigned int*)(0x4270E294UL))
\r
7605 #define bFM3_MFS7_I2C_FCR_FLST *((volatile unsigned int*)(0x4270E298UL))
\r
7606 #define bFM3_MFS7_I2C_FCR_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
\r
7607 #define bFM3_MFS7_I2C_FCR_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
\r
7608 #define bFM3_MFS7_I2C_FCR_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
\r
7609 #define bFM3_MFS7_I2C_FCR_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
\r
7610 #define bFM3_MFS7_I2C_FCR_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
\r
7611 #define bFM3_MFS7_I2C_FCR_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
\r
7612 #define bFM3_MFS7_I2C_FCR_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
\r
7613 #define bFM3_MFS7_I2C_FCR0_FE1 *((volatile unsigned int*)(0x4270E280UL))
\r
7614 #define bFM3_MFS7_I2C_FCR0_FE2 *((volatile unsigned int*)(0x4270E284UL))
\r
7615 #define bFM3_MFS7_I2C_FCR0_FCL1 *((volatile unsigned int*)(0x4270E288UL))
\r
7616 #define bFM3_MFS7_I2C_FCR0_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
\r
7617 #define bFM3_MFS7_I2C_FCR0_FSET *((volatile unsigned int*)(0x4270E290UL))
\r
7618 #define bFM3_MFS7_I2C_FCR0_FLD *((volatile unsigned int*)(0x4270E294UL))
\r
7619 #define bFM3_MFS7_I2C_FCR0_FLST *((volatile unsigned int*)(0x4270E298UL))
\r
7620 #define bFM3_MFS7_I2C_FCR1_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
\r
7621 #define bFM3_MFS7_I2C_FCR1_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
\r
7622 #define bFM3_MFS7_I2C_FCR1_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
\r
7623 #define bFM3_MFS7_I2C_FCR1_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
\r
7624 #define bFM3_MFS7_I2C_FCR1_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
\r
7625 #define bFM3_MFS7_I2C_FCR1_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
\r
7626 #define bFM3_MFS7_I2C_FCR1_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
\r
7627 #define bFM3_MFS7_I2C_FBYTE_FD0 *((volatile unsigned int*)(0x4270E300UL))
\r
7628 #define bFM3_MFS7_I2C_FBYTE_FD1 *((volatile unsigned int*)(0x4270E304UL))
\r
7629 #define bFM3_MFS7_I2C_FBYTE_FD2 *((volatile unsigned int*)(0x4270E308UL))
\r
7630 #define bFM3_MFS7_I2C_FBYTE_FD3 *((volatile unsigned int*)(0x4270E30CUL))
\r
7631 #define bFM3_MFS7_I2C_FBYTE_FD4 *((volatile unsigned int*)(0x4270E310UL))
\r
7632 #define bFM3_MFS7_I2C_FBYTE_FD5 *((volatile unsigned int*)(0x4270E314UL))
\r
7633 #define bFM3_MFS7_I2C_FBYTE_FD6 *((volatile unsigned int*)(0x4270E318UL))
\r
7634 #define bFM3_MFS7_I2C_FBYTE_FD7 *((volatile unsigned int*)(0x4270E31CUL))
\r
7635 #define bFM3_MFS7_I2C_FBYTE_FD8 *((volatile unsigned int*)(0x4270E320UL))
\r
7636 #define bFM3_MFS7_I2C_FBYTE_FD9 *((volatile unsigned int*)(0x4270E324UL))
\r
7637 #define bFM3_MFS7_I2C_FBYTE_FD10 *((volatile unsigned int*)(0x4270E328UL))
\r
7638 #define bFM3_MFS7_I2C_FBYTE_FD11 *((volatile unsigned int*)(0x4270E32CUL))
\r
7639 #define bFM3_MFS7_I2C_FBYTE_FD12 *((volatile unsigned int*)(0x4270E330UL))
\r
7640 #define bFM3_MFS7_I2C_FBYTE_FD13 *((volatile unsigned int*)(0x4270E334UL))
\r
7641 #define bFM3_MFS7_I2C_FBYTE_FD14 *((volatile unsigned int*)(0x4270E338UL))
\r
7642 #define bFM3_MFS7_I2C_FBYTE_FD15 *((volatile unsigned int*)(0x4270E33CUL))
\r
7643 #define bFM3_MFS7_I2C_FBYTE1_FD0 *((volatile unsigned int*)(0x4270E300UL))
\r
7644 #define bFM3_MFS7_I2C_FBYTE1_FD1 *((volatile unsigned int*)(0x4270E304UL))
\r
7645 #define bFM3_MFS7_I2C_FBYTE1_FD2 *((volatile unsigned int*)(0x4270E308UL))
\r
7646 #define bFM3_MFS7_I2C_FBYTE1_FD3 *((volatile unsigned int*)(0x4270E30CUL))
\r
7647 #define bFM3_MFS7_I2C_FBYTE1_FD4 *((volatile unsigned int*)(0x4270E310UL))
\r
7648 #define bFM3_MFS7_I2C_FBYTE1_FD5 *((volatile unsigned int*)(0x4270E314UL))
\r
7649 #define bFM3_MFS7_I2C_FBYTE1_FD6 *((volatile unsigned int*)(0x4270E318UL))
\r
7650 #define bFM3_MFS7_I2C_FBYTE1_FD7 *((volatile unsigned int*)(0x4270E31CUL))
\r
7651 #define bFM3_MFS7_I2C_FBYTE2_FD8 *((volatile unsigned int*)(0x4270E340UL))
\r
7652 #define bFM3_MFS7_I2C_FBYTE2_FD9 *((volatile unsigned int*)(0x4270E344UL))
\r
7653 #define bFM3_MFS7_I2C_FBYTE2_FD10 *((volatile unsigned int*)(0x4270E348UL))
\r
7654 #define bFM3_MFS7_I2C_FBYTE2_FD11 *((volatile unsigned int*)(0x4270E34CUL))
\r
7655 #define bFM3_MFS7_I2C_FBYTE2_FD12 *((volatile unsigned int*)(0x4270E350UL))
\r
7656 #define bFM3_MFS7_I2C_FBYTE2_FD13 *((volatile unsigned int*)(0x4270E354UL))
\r
7657 #define bFM3_MFS7_I2C_FBYTE2_FD14 *((volatile unsigned int*)(0x4270E358UL))
\r
7658 #define bFM3_MFS7_I2C_FBYTE2_FD15 *((volatile unsigned int*)(0x4270E35CUL))
\r
7660 /* CRC registers */
\r
7661 #define bFM3_CRC_CRCCR_INIT *((volatile unsigned int*)(0x42720000UL))
\r
7662 #define bFM3_CRC_CRCCR_CRC32 *((volatile unsigned int*)(0x42720004UL))
\r
7663 #define bFM3_CRC_CRCCR_LTLEND *((volatile unsigned int*)(0x42720008UL))
\r
7664 #define bFM3_CRC_CRCCR_LSBFST *((volatile unsigned int*)(0x4272000CUL))
\r
7665 #define bFM3_CRC_CRCCR_CRCLTE *((volatile unsigned int*)(0x42720010UL))
\r
7666 #define bFM3_CRC_CRCCR_CRCLSF *((volatile unsigned int*)(0x42720014UL))
\r
7667 #define bFM3_CRC_CRCCR_FXOR *((volatile unsigned int*)(0x42720018UL))
\r
7669 /* Watch counter registers */
\r
7670 #define bFM3_WC_WCRD_CTR0 *((volatile unsigned int*)(0x42740000UL))
\r
7671 #define bFM3_WC_WCRD_CTR1 *((volatile unsigned int*)(0x42740004UL))
\r
7672 #define bFM3_WC_WCRD_CTR2 *((volatile unsigned int*)(0x42740008UL))
\r
7673 #define bFM3_WC_WCRD_CTR3 *((volatile unsigned int*)(0x4274000CUL))
\r
7674 #define bFM3_WC_WCRD_CTR4 *((volatile unsigned int*)(0x42740010UL))
\r
7675 #define bFM3_WC_WCRD_CTR5 *((volatile unsigned int*)(0x42740014UL))
\r
7676 #define bFM3_WC_WCRL_RLC0 *((volatile unsigned int*)(0x42740020UL))
\r
7677 #define bFM3_WC_WCRL_RLC1 *((volatile unsigned int*)(0x42740024UL))
\r
7678 #define bFM3_WC_WCRL_RLC2 *((volatile unsigned int*)(0x42740028UL))
\r
7679 #define bFM3_WC_WCRL_RLC3 *((volatile unsigned int*)(0x4274002CUL))
\r
7680 #define bFM3_WC_WCRL_RLC4 *((volatile unsigned int*)(0x42740030UL))
\r
7681 #define bFM3_WC_WCRL_RLC5 *((volatile unsigned int*)(0x42740034UL))
\r
7682 #define bFM3_WC_WCCR_WCIF *((volatile unsigned int*)(0x42740040UL))
\r
7683 #define bFM3_WC_WCCR_WCIE *((volatile unsigned int*)(0x42740044UL))
\r
7684 #define bFM3_WC_WCCR_CS0 *((volatile unsigned int*)(0x42740048UL))
\r
7685 #define bFM3_WC_WCCR_CS1 *((volatile unsigned int*)(0x4274004CUL))
\r
7686 #define bFM3_WC_WCCR_WCOP *((volatile unsigned int*)(0x42740058UL))
\r
7687 #define bFM3_WC_WCCR_WCEN *((volatile unsigned int*)(0x4274005CUL))
\r
7688 #define bFM3_WC_CLK_SEL_SEL_IN *((volatile unsigned int*)(0x42740200UL))
\r
7689 #define bFM3_WC_CLK_SEL_SEL_OUT *((volatile unsigned int*)(0x42740220UL))
\r
7690 #define bFM3_WC_CLK_EN_CLK_EN *((volatile unsigned int*)(0x42740280UL))
\r
7691 #define bFM3_WC_CLK_EN_CLK_EN_R *((volatile unsigned int*)(0x42740284UL))
\r
7693 /* External bus interface registers */
\r
7694 #define bFM3_EXBUS_MODE0_WDTH0 *((volatile unsigned int*)(0x427E0000UL))
\r
7695 #define bFM3_EXBUS_MODE0_WDTH1 *((volatile unsigned int*)(0x427E0004UL))
\r
7696 #define bFM3_EXBUS_MODE0_RBMON *((volatile unsigned int*)(0x427E0008UL))
\r
7697 #define bFM3_EXBUS_MODE0_WEOFF *((volatile unsigned int*)(0x427E000CUL))
\r
7698 #define bFM3_EXBUS_MODE0_PAGE *((volatile unsigned int*)(0x427E0014UL))
\r
7699 #define bFM3_EXBUS_MODE0_TEST *((volatile unsigned int*)(0x427E0018UL))
\r
7700 #define bFM3_EXBUS_MODE1_WDTH0 *((volatile unsigned int*)(0x427E0080UL))
\r
7701 #define bFM3_EXBUS_MODE1_WDTH1 *((volatile unsigned int*)(0x427E0084UL))
\r
7702 #define bFM3_EXBUS_MODE1_RBMON *((volatile unsigned int*)(0x427E0088UL))
\r
7703 #define bFM3_EXBUS_MODE1_WEOFF *((volatile unsigned int*)(0x427E008CUL))
\r
7704 #define bFM3_EXBUS_MODE1_PAGE *((volatile unsigned int*)(0x427E0094UL))
\r
7705 #define bFM3_EXBUS_MODE1_TEST *((volatile unsigned int*)(0x427E0098UL))
\r
7706 #define bFM3_EXBUS_MODE2_WDTH0 *((volatile unsigned int*)(0x427E0100UL))
\r
7707 #define bFM3_EXBUS_MODE2_WDTH1 *((volatile unsigned int*)(0x427E0104UL))
\r
7708 #define bFM3_EXBUS_MODE2_RBMON *((volatile unsigned int*)(0x427E0108UL))
\r
7709 #define bFM3_EXBUS_MODE2_WEOFF *((volatile unsigned int*)(0x427E010CUL))
\r
7710 #define bFM3_EXBUS_MODE2_PAGE *((volatile unsigned int*)(0x427E0114UL))
\r
7711 #define bFM3_EXBUS_MODE2_TEST *((volatile unsigned int*)(0x427E0118UL))
\r
7712 #define bFM3_EXBUS_MODE3_WDTH0 *((volatile unsigned int*)(0x427E0180UL))
\r
7713 #define bFM3_EXBUS_MODE3_WDTH1 *((volatile unsigned int*)(0x427E0184UL))
\r
7714 #define bFM3_EXBUS_MODE3_RBMON *((volatile unsigned int*)(0x427E0188UL))
\r
7715 #define bFM3_EXBUS_MODE3_WEOFF *((volatile unsigned int*)(0x427E018CUL))
\r
7716 #define bFM3_EXBUS_MODE3_PAGE *((volatile unsigned int*)(0x427E0194UL))
\r
7717 #define bFM3_EXBUS_MODE3_TEST *((volatile unsigned int*)(0x427E0198UL))
\r
7718 #define bFM3_EXBUS_MODE7_WDTH0 *((volatile unsigned int*)(0x427E0380UL))
\r
7719 #define bFM3_EXBUS_MODE7_WDTH1 *((volatile unsigned int*)(0x427E0384UL))
\r
7720 #define bFM3_EXBUS_MODE7_RBMON *((volatile unsigned int*)(0x427E0388UL))
\r
7721 #define bFM3_EXBUS_MODE7_WEOFF *((volatile unsigned int*)(0x427E038CUL))
\r
7722 #define bFM3_EXBUS_MODE7_PAGE *((volatile unsigned int*)(0x427E0394UL))
\r
7723 #define bFM3_EXBUS_MODE7_TEST *((volatile unsigned int*)(0x427E0398UL))
\r
7724 #define bFM3_EXBUS_TIM0_RACC0 *((volatile unsigned int*)(0x427E0400UL))
\r
7725 #define bFM3_EXBUS_TIM0_RACC1 *((volatile unsigned int*)(0x427E0404UL))
\r
7726 #define bFM3_EXBUS_TIM0_RACC2 *((volatile unsigned int*)(0x427E0408UL))
\r
7727 #define bFM3_EXBUS_TIM0_RACC3 *((volatile unsigned int*)(0x427E040CUL))
\r
7728 #define bFM3_EXBUS_TIM0_RADC0 *((volatile unsigned int*)(0x427E0410UL))
\r
7729 #define bFM3_EXBUS_TIM0_RADC1 *((volatile unsigned int*)(0x427E0414UL))
\r
7730 #define bFM3_EXBUS_TIM0_RADC2 *((volatile unsigned int*)(0x427E0418UL))
\r
7731 #define bFM3_EXBUS_TIM0_RADC3 *((volatile unsigned int*)(0x427E041CUL))
\r
7732 #define bFM3_EXBUS_TIM0_FRADC0 *((volatile unsigned int*)(0x427E0420UL))
\r
7733 #define bFM3_EXBUS_TIM0_FRADC1 *((volatile unsigned int*)(0x427E0424UL))
\r
7734 #define bFM3_EXBUS_TIM0_FRADC2 *((volatile unsigned int*)(0x427E0428UL))
\r
7735 #define bFM3_EXBUS_TIM0_FRADC3 *((volatile unsigned int*)(0x427E042CUL))
\r
7736 #define bFM3_EXBUS_TIM0_RIDLC0 *((volatile unsigned int*)(0x427E0430UL))
\r
7737 #define bFM3_EXBUS_TIM0_RIDLC1 *((volatile unsigned int*)(0x427E0434UL))
\r
7738 #define bFM3_EXBUS_TIM0_RIDLC2 *((volatile unsigned int*)(0x427E0438UL))
\r
7739 #define bFM3_EXBUS_TIM0_RIDLC3 *((volatile unsigned int*)(0x427E043CUL))
\r
7740 #define bFM3_EXBUS_TIM0_WACC0 *((volatile unsigned int*)(0x427E0440UL))
\r
7741 #define bFM3_EXBUS_TIM0_WACC1 *((volatile unsigned int*)(0x427E0444UL))
\r
7742 #define bFM3_EXBUS_TIM0_WACC2 *((volatile unsigned int*)(0x427E0448UL))
\r
7743 #define bFM3_EXBUS_TIM0_WACC3 *((volatile unsigned int*)(0x427E044CUL))
\r
7744 #define bFM3_EXBUS_TIM0_WADC0 *((volatile unsigned int*)(0x427E0450UL))
\r
7745 #define bFM3_EXBUS_TIM0_WADC1 *((volatile unsigned int*)(0x427E0454UL))
\r
7746 #define bFM3_EXBUS_TIM0_WADC2 *((volatile unsigned int*)(0x427E0458UL))
\r
7747 #define bFM3_EXBUS_TIM0_WADC3 *((volatile unsigned int*)(0x427E045CUL))
\r
7748 #define bFM3_EXBUS_TIM0_WWEC0 *((volatile unsigned int*)(0x427E0460UL))
\r
7749 #define bFM3_EXBUS_TIM0_WWEC1 *((volatile unsigned int*)(0x427E0464UL))
\r
7750 #define bFM3_EXBUS_TIM0_WWEC2 *((volatile unsigned int*)(0x427E0468UL))
\r
7751 #define bFM3_EXBUS_TIM0_WWEC3 *((volatile unsigned int*)(0x427E046CUL))
\r
7752 #define bFM3_EXBUS_TIM0_WIDLC0 *((volatile unsigned int*)(0x427E0470UL))
\r
7753 #define bFM3_EXBUS_TIM0_WIDLC1 *((volatile unsigned int*)(0x427E0474UL))
\r
7754 #define bFM3_EXBUS_TIM0_WIDLC2 *((volatile unsigned int*)(0x427E0478UL))
\r
7755 #define bFM3_EXBUS_TIM0_WIDLC3 *((volatile unsigned int*)(0x427E047CUL))
\r
7756 #define bFM3_EXBUS_TIM1_RACC0 *((volatile unsigned int*)(0x427E0480UL))
\r
7757 #define bFM3_EXBUS_TIM1_RACC1 *((volatile unsigned int*)(0x427E0484UL))
\r
7758 #define bFM3_EXBUS_TIM1_RACC2 *((volatile unsigned int*)(0x427E0488UL))
\r
7759 #define bFM3_EXBUS_TIM1_RACC3 *((volatile unsigned int*)(0x427E048CUL))
\r
7760 #define bFM3_EXBUS_TIM1_RADC0 *((volatile unsigned int*)(0x427E0490UL))
\r
7761 #define bFM3_EXBUS_TIM1_RADC1 *((volatile unsigned int*)(0x427E0494UL))
\r
7762 #define bFM3_EXBUS_TIM1_RADC2 *((volatile unsigned int*)(0x427E0498UL))
\r
7763 #define bFM3_EXBUS_TIM1_RADC3 *((volatile unsigned int*)(0x427E049CUL))
\r
7764 #define bFM3_EXBUS_TIM1_FRADC0 *((volatile unsigned int*)(0x427E04A0UL))
\r
7765 #define bFM3_EXBUS_TIM1_FRADC1 *((volatile unsigned int*)(0x427E04A4UL))
\r
7766 #define bFM3_EXBUS_TIM1_FRADC2 *((volatile unsigned int*)(0x427E04A8UL))
\r
7767 #define bFM3_EXBUS_TIM1_FRADC3 *((volatile unsigned int*)(0x427E04ACUL))
\r
7768 #define bFM3_EXBUS_TIM1_RIDLC0 *((volatile unsigned int*)(0x427E04B0UL))
\r
7769 #define bFM3_EXBUS_TIM1_RIDLC1 *((volatile unsigned int*)(0x427E04B4UL))
\r
7770 #define bFM3_EXBUS_TIM1_RIDLC2 *((volatile unsigned int*)(0x427E04B8UL))
\r
7771 #define bFM3_EXBUS_TIM1_RIDLC3 *((volatile unsigned int*)(0x427E04BCUL))
\r
7772 #define bFM3_EXBUS_TIM1_WACC0 *((volatile unsigned int*)(0x427E04C0UL))
\r
7773 #define bFM3_EXBUS_TIM1_WACC1 *((volatile unsigned int*)(0x427E04C4UL))
\r
7774 #define bFM3_EXBUS_TIM1_WACC2 *((volatile unsigned int*)(0x427E04C8UL))
\r
7775 #define bFM3_EXBUS_TIM1_WACC3 *((volatile unsigned int*)(0x427E04CCUL))
\r
7776 #define bFM3_EXBUS_TIM1_WADC0 *((volatile unsigned int*)(0x427E04D0UL))
\r
7777 #define bFM3_EXBUS_TIM1_WADC1 *((volatile unsigned int*)(0x427E04D4UL))
\r
7778 #define bFM3_EXBUS_TIM1_WADC2 *((volatile unsigned int*)(0x427E04D8UL))
\r
7779 #define bFM3_EXBUS_TIM1_WADC3 *((volatile unsigned int*)(0x427E04DCUL))
\r
7780 #define bFM3_EXBUS_TIM1_WWEC0 *((volatile unsigned int*)(0x427E04E0UL))
\r
7781 #define bFM3_EXBUS_TIM1_WWEC1 *((volatile unsigned int*)(0x427E04E4UL))
\r
7782 #define bFM3_EXBUS_TIM1_WWEC2 *((volatile unsigned int*)(0x427E04E8UL))
\r
7783 #define bFM3_EXBUS_TIM1_WWEC3 *((volatile unsigned int*)(0x427E04ECUL))
\r
7784 #define bFM3_EXBUS_TIM1_WIDLC0 *((volatile unsigned int*)(0x427E04F0UL))
\r
7785 #define bFM3_EXBUS_TIM1_WIDLC1 *((volatile unsigned int*)(0x427E04F4UL))
\r
7786 #define bFM3_EXBUS_TIM1_WIDLC2 *((volatile unsigned int*)(0x427E04F8UL))
\r
7787 #define bFM3_EXBUS_TIM1_WIDLC3 *((volatile unsigned int*)(0x427E04FCUL))
\r
7788 #define bFM3_EXBUS_TIM2_RACC0 *((volatile unsigned int*)(0x427E0500UL))
\r
7789 #define bFM3_EXBUS_TIM2_RACC1 *((volatile unsigned int*)(0x427E0504UL))
\r
7790 #define bFM3_EXBUS_TIM2_RACC2 *((volatile unsigned int*)(0x427E0508UL))
\r
7791 #define bFM3_EXBUS_TIM2_RACC3 *((volatile unsigned int*)(0x427E050CUL))
\r
7792 #define bFM3_EXBUS_TIM2_RADC0 *((volatile unsigned int*)(0x427E0510UL))
\r
7793 #define bFM3_EXBUS_TIM2_RADC1 *((volatile unsigned int*)(0x427E0514UL))
\r
7794 #define bFM3_EXBUS_TIM2_RADC2 *((volatile unsigned int*)(0x427E0518UL))
\r
7795 #define bFM3_EXBUS_TIM2_RADC3 *((volatile unsigned int*)(0x427E051CUL))
\r
7796 #define bFM3_EXBUS_TIM2_FRADC0 *((volatile unsigned int*)(0x427E0520UL))
\r
7797 #define bFM3_EXBUS_TIM2_FRADC1 *((volatile unsigned int*)(0x427E0524UL))
\r
7798 #define bFM3_EXBUS_TIM2_FRADC2 *((volatile unsigned int*)(0x427E0528UL))
\r
7799 #define bFM3_EXBUS_TIM2_FRADC3 *((volatile unsigned int*)(0x427E052CUL))
\r
7800 #define bFM3_EXBUS_TIM2_RIDLC0 *((volatile unsigned int*)(0x427E0530UL))
\r
7801 #define bFM3_EXBUS_TIM2_RIDLC1 *((volatile unsigned int*)(0x427E0534UL))
\r
7802 #define bFM3_EXBUS_TIM2_RIDLC2 *((volatile unsigned int*)(0x427E0538UL))
\r
7803 #define bFM3_EXBUS_TIM2_RIDLC3 *((volatile unsigned int*)(0x427E053CUL))
\r
7804 #define bFM3_EXBUS_TIM2_WACC0 *((volatile unsigned int*)(0x427E0540UL))
\r
7805 #define bFM3_EXBUS_TIM2_WACC1 *((volatile unsigned int*)(0x427E0544UL))
\r
7806 #define bFM3_EXBUS_TIM2_WACC2 *((volatile unsigned int*)(0x427E0548UL))
\r
7807 #define bFM3_EXBUS_TIM2_WACC3 *((volatile unsigned int*)(0x427E054CUL))
\r
7808 #define bFM3_EXBUS_TIM2_WADC0 *((volatile unsigned int*)(0x427E0550UL))
\r
7809 #define bFM3_EXBUS_TIM2_WADC1 *((volatile unsigned int*)(0x427E0554UL))
\r
7810 #define bFM3_EXBUS_TIM2_WADC2 *((volatile unsigned int*)(0x427E0558UL))
\r
7811 #define bFM3_EXBUS_TIM2_WADC3 *((volatile unsigned int*)(0x427E055CUL))
\r
7812 #define bFM3_EXBUS_TIM2_WWEC0 *((volatile unsigned int*)(0x427E0560UL))
\r
7813 #define bFM3_EXBUS_TIM2_WWEC1 *((volatile unsigned int*)(0x427E0564UL))
\r
7814 #define bFM3_EXBUS_TIM2_WWEC2 *((volatile unsigned int*)(0x427E0568UL))
\r
7815 #define bFM3_EXBUS_TIM2_WWEC3 *((volatile unsigned int*)(0x427E056CUL))
\r
7816 #define bFM3_EXBUS_TIM2_WIDLC0 *((volatile unsigned int*)(0x427E0570UL))
\r
7817 #define bFM3_EXBUS_TIM2_WIDLC1 *((volatile unsigned int*)(0x427E0574UL))
\r
7818 #define bFM3_EXBUS_TIM2_WIDLC2 *((volatile unsigned int*)(0x427E0578UL))
\r
7819 #define bFM3_EXBUS_TIM2_WIDLC3 *((volatile unsigned int*)(0x427E057CUL))
\r
7820 #define bFM3_EXBUS_TIM3_RACC0 *((volatile unsigned int*)(0x427E0580UL))
\r
7821 #define bFM3_EXBUS_TIM3_RACC1 *((volatile unsigned int*)(0x427E0584UL))
\r
7822 #define bFM3_EXBUS_TIM3_RACC2 *((volatile unsigned int*)(0x427E0588UL))
\r
7823 #define bFM3_EXBUS_TIM3_RACC3 *((volatile unsigned int*)(0x427E058CUL))
\r
7824 #define bFM3_EXBUS_TIM3_RADC0 *((volatile unsigned int*)(0x427E0590UL))
\r
7825 #define bFM3_EXBUS_TIM3_RADC1 *((volatile unsigned int*)(0x427E0594UL))
\r
7826 #define bFM3_EXBUS_TIM3_RADC2 *((volatile unsigned int*)(0x427E0598UL))
\r
7827 #define bFM3_EXBUS_TIM3_RADC3 *((volatile unsigned int*)(0x427E059CUL))
\r
7828 #define bFM3_EXBUS_TIM3_FRADC0 *((volatile unsigned int*)(0x427E05A0UL))
\r
7829 #define bFM3_EXBUS_TIM3_FRADC1 *((volatile unsigned int*)(0x427E05A4UL))
\r
7830 #define bFM3_EXBUS_TIM3_FRADC2 *((volatile unsigned int*)(0x427E05A8UL))
\r
7831 #define bFM3_EXBUS_TIM3_FRADC3 *((volatile unsigned int*)(0x427E05ACUL))
\r
7832 #define bFM3_EXBUS_TIM3_RIDLC0 *((volatile unsigned int*)(0x427E05B0UL))
\r
7833 #define bFM3_EXBUS_TIM3_RIDLC1 *((volatile unsigned int*)(0x427E05B4UL))
\r
7834 #define bFM3_EXBUS_TIM3_RIDLC2 *((volatile unsigned int*)(0x427E05B8UL))
\r
7835 #define bFM3_EXBUS_TIM3_RIDLC3 *((volatile unsigned int*)(0x427E05BCUL))
\r
7836 #define bFM3_EXBUS_TIM3_WACC0 *((volatile unsigned int*)(0x427E05C0UL))
\r
7837 #define bFM3_EXBUS_TIM3_WACC1 *((volatile unsigned int*)(0x427E05C4UL))
\r
7838 #define bFM3_EXBUS_TIM3_WACC2 *((volatile unsigned int*)(0x427E05C8UL))
\r
7839 #define bFM3_EXBUS_TIM3_WACC3 *((volatile unsigned int*)(0x427E05CCUL))
\r
7840 #define bFM3_EXBUS_TIM3_WADC0 *((volatile unsigned int*)(0x427E05D0UL))
\r
7841 #define bFM3_EXBUS_TIM3_WADC1 *((volatile unsigned int*)(0x427E05D4UL))
\r
7842 #define bFM3_EXBUS_TIM3_WADC2 *((volatile unsigned int*)(0x427E05D8UL))
\r
7843 #define bFM3_EXBUS_TIM3_WADC3 *((volatile unsigned int*)(0x427E05DCUL))
\r
7844 #define bFM3_EXBUS_TIM3_WWEC0 *((volatile unsigned int*)(0x427E05E0UL))
\r
7845 #define bFM3_EXBUS_TIM3_WWEC1 *((volatile unsigned int*)(0x427E05E4UL))
\r
7846 #define bFM3_EXBUS_TIM3_WWEC2 *((volatile unsigned int*)(0x427E05E8UL))
\r
7847 #define bFM3_EXBUS_TIM3_WWEC3 *((volatile unsigned int*)(0x427E05ECUL))
\r
7848 #define bFM3_EXBUS_TIM3_WIDLC0 *((volatile unsigned int*)(0x427E05F0UL))
\r
7849 #define bFM3_EXBUS_TIM3_WIDLC1 *((volatile unsigned int*)(0x427E05F4UL))
\r
7850 #define bFM3_EXBUS_TIM3_WIDLC2 *((volatile unsigned int*)(0x427E05F8UL))
\r
7851 #define bFM3_EXBUS_TIM3_WIDLC3 *((volatile unsigned int*)(0x427E05FCUL))
\r
7852 #define bFM3_EXBUS_TIM7_RACC0 *((volatile unsigned int*)(0x427E0780UL))
\r
7853 #define bFM3_EXBUS_TIM7_RACC1 *((volatile unsigned int*)(0x427E0784UL))
\r
7854 #define bFM3_EXBUS_TIM7_RACC2 *((volatile unsigned int*)(0x427E0788UL))
\r
7855 #define bFM3_EXBUS_TIM7_RACC3 *((volatile unsigned int*)(0x427E078CUL))
\r
7856 #define bFM3_EXBUS_TIM7_RADC0 *((volatile unsigned int*)(0x427E0790UL))
\r
7857 #define bFM3_EXBUS_TIM7_RADC1 *((volatile unsigned int*)(0x427E0794UL))
\r
7858 #define bFM3_EXBUS_TIM7_RADC2 *((volatile unsigned int*)(0x427E0798UL))
\r
7859 #define bFM3_EXBUS_TIM7_RADC3 *((volatile unsigned int*)(0x427E079CUL))
\r
7860 #define bFM3_EXBUS_TIM7_FRADC0 *((volatile unsigned int*)(0x427E07A0UL))
\r
7861 #define bFM3_EXBUS_TIM7_FRADC1 *((volatile unsigned int*)(0x427E07A4UL))
\r
7862 #define bFM3_EXBUS_TIM7_FRADC2 *((volatile unsigned int*)(0x427E07A8UL))
\r
7863 #define bFM3_EXBUS_TIM7_FRADC3 *((volatile unsigned int*)(0x427E07ACUL))
\r
7864 #define bFM3_EXBUS_TIM7_RIDLC0 *((volatile unsigned int*)(0x427E07B0UL))
\r
7865 #define bFM3_EXBUS_TIM7_RIDLC1 *((volatile unsigned int*)(0x427E07B4UL))
\r
7866 #define bFM3_EXBUS_TIM7_RIDLC2 *((volatile unsigned int*)(0x427E07B8UL))
\r
7867 #define bFM3_EXBUS_TIM7_RIDLC3 *((volatile unsigned int*)(0x427E07BCUL))
\r
7868 #define bFM3_EXBUS_TIM7_WACC0 *((volatile unsigned int*)(0x427E07C0UL))
\r
7869 #define bFM3_EXBUS_TIM7_WACC1 *((volatile unsigned int*)(0x427E07C4UL))
\r
7870 #define bFM3_EXBUS_TIM7_WACC2 *((volatile unsigned int*)(0x427E07C8UL))
\r
7871 #define bFM3_EXBUS_TIM7_WACC3 *((volatile unsigned int*)(0x427E07CCUL))
\r
7872 #define bFM3_EXBUS_TIM7_WADC0 *((volatile unsigned int*)(0x427E07D0UL))
\r
7873 #define bFM3_EXBUS_TIM7_WADC1 *((volatile unsigned int*)(0x427E07D4UL))
\r
7874 #define bFM3_EXBUS_TIM7_WADC2 *((volatile unsigned int*)(0x427E07D8UL))
\r
7875 #define bFM3_EXBUS_TIM7_WADC3 *((volatile unsigned int*)(0x427E07DCUL))
\r
7876 #define bFM3_EXBUS_TIM7_WWEC0 *((volatile unsigned int*)(0x427E07E0UL))
\r
7877 #define bFM3_EXBUS_TIM7_WWEC1 *((volatile unsigned int*)(0x427E07E4UL))
\r
7878 #define bFM3_EXBUS_TIM7_WWEC2 *((volatile unsigned int*)(0x427E07E8UL))
\r
7879 #define bFM3_EXBUS_TIM7_WWEC3 *((volatile unsigned int*)(0x427E07ECUL))
\r
7880 #define bFM3_EXBUS_TIM7_WIDLC0 *((volatile unsigned int*)(0x427E07F0UL))
\r
7881 #define bFM3_EXBUS_TIM7_WIDLC1 *((volatile unsigned int*)(0x427E07F4UL))
\r
7882 #define bFM3_EXBUS_TIM7_WIDLC2 *((volatile unsigned int*)(0x427E07F8UL))
\r
7883 #define bFM3_EXBUS_TIM7_WIDLC3 *((volatile unsigned int*)(0x427E07FCUL))
\r
7884 #define bFM3_EXBUS_AREA0_ADDR0 *((volatile unsigned int*)(0x427E0800UL))
\r
7885 #define bFM3_EXBUS_AREA0_ADDR1 *((volatile unsigned int*)(0x427E0804UL))
\r
7886 #define bFM3_EXBUS_AREA0_ADDR2 *((volatile unsigned int*)(0x427E0808UL))
\r
7887 #define bFM3_EXBUS_AREA0_ADDR3 *((volatile unsigned int*)(0x427E080CUL))
\r
7888 #define bFM3_EXBUS_AREA0_ADDR4 *((volatile unsigned int*)(0x427E0810UL))
\r
7889 #define bFM3_EXBUS_AREA0_ADDR5 *((volatile unsigned int*)(0x427E0814UL))
\r
7890 #define bFM3_EXBUS_AREA0_ADDR6 *((volatile unsigned int*)(0x427E0818UL))
\r
7891 #define bFM3_EXBUS_AREA0_ADDR7 *((volatile unsigned int*)(0x427E081CUL))
\r
7892 #define bFM3_EXBUS_AREA0_MASK0 *((volatile unsigned int*)(0x427E0840UL))
\r
7893 #define bFM3_EXBUS_AREA0_MASK1 *((volatile unsigned int*)(0x427E0844UL))
\r
7894 #define bFM3_EXBUS_AREA0_MASK2 *((volatile unsigned int*)(0x427E0848UL))
\r
7895 #define bFM3_EXBUS_AREA0_MASK3 *((volatile unsigned int*)(0x427E084CUL))
\r
7896 #define bFM3_EXBUS_AREA0_MASK4 *((volatile unsigned int*)(0x427E0850UL))
\r
7897 #define bFM3_EXBUS_AREA0_MASK5 *((volatile unsigned int*)(0x427E0854UL))
\r
7898 #define bFM3_EXBUS_AREA0_MASK6 *((volatile unsigned int*)(0x427E0858UL))
\r
7899 #define bFM3_EXBUS_AREA1_ADDR0 *((volatile unsigned int*)(0x427E0880UL))
\r
7900 #define bFM3_EXBUS_AREA1_ADDR1 *((volatile unsigned int*)(0x427E0884UL))
\r
7901 #define bFM3_EXBUS_AREA1_ADDR2 *((volatile unsigned int*)(0x427E0888UL))
\r
7902 #define bFM3_EXBUS_AREA1_ADDR3 *((volatile unsigned int*)(0x427E088CUL))
\r
7903 #define bFM3_EXBUS_AREA1_ADDR4 *((volatile unsigned int*)(0x427E0890UL))
\r
7904 #define bFM3_EXBUS_AREA1_ADDR5 *((volatile unsigned int*)(0x427E0894UL))
\r
7905 #define bFM3_EXBUS_AREA1_ADDR6 *((volatile unsigned int*)(0x427E0898UL))
\r
7906 #define bFM3_EXBUS_AREA1_ADDR7 *((volatile unsigned int*)(0x427E089CUL))
\r
7907 #define bFM3_EXBUS_AREA1_MASK0 *((volatile unsigned int*)(0x427E08C0UL))
\r
7908 #define bFM3_EXBUS_AREA1_MASK1 *((volatile unsigned int*)(0x427E08C4UL))
\r
7909 #define bFM3_EXBUS_AREA1_MASK2 *((volatile unsigned int*)(0x427E08C8UL))
\r
7910 #define bFM3_EXBUS_AREA1_MASK3 *((volatile unsigned int*)(0x427E08CCUL))
\r
7911 #define bFM3_EXBUS_AREA1_MASK4 *((volatile unsigned int*)(0x427E08D0UL))
\r
7912 #define bFM3_EXBUS_AREA1_MASK5 *((volatile unsigned int*)(0x427E08D4UL))
\r
7913 #define bFM3_EXBUS_AREA1_MASK6 *((volatile unsigned int*)(0x427E08D8UL))
\r
7914 #define bFM3_EXBUS_AREA2_ADDR0 *((volatile unsigned int*)(0x427E0900UL))
\r
7915 #define bFM3_EXBUS_AREA2_ADDR1 *((volatile unsigned int*)(0x427E0904UL))
\r
7916 #define bFM3_EXBUS_AREA2_ADDR2 *((volatile unsigned int*)(0x427E0908UL))
\r
7917 #define bFM3_EXBUS_AREA2_ADDR3 *((volatile unsigned int*)(0x427E090CUL))
\r
7918 #define bFM3_EXBUS_AREA2_ADDR4 *((volatile unsigned int*)(0x427E0910UL))
\r
7919 #define bFM3_EXBUS_AREA2_ADDR5 *((volatile unsigned int*)(0x427E0914UL))
\r
7920 #define bFM3_EXBUS_AREA2_ADDR6 *((volatile unsigned int*)(0x427E0918UL))
\r
7921 #define bFM3_EXBUS_AREA2_ADDR7 *((volatile unsigned int*)(0x427E091CUL))
\r
7922 #define bFM3_EXBUS_AREA2_MASK0 *((volatile unsigned int*)(0x427E0940UL))
\r
7923 #define bFM3_EXBUS_AREA2_MASK1 *((volatile unsigned int*)(0x427E0944UL))
\r
7924 #define bFM3_EXBUS_AREA2_MASK2 *((volatile unsigned int*)(0x427E0948UL))
\r
7925 #define bFM3_EXBUS_AREA2_MASK3 *((volatile unsigned int*)(0x427E094CUL))
\r
7926 #define bFM3_EXBUS_AREA2_MASK4 *((volatile unsigned int*)(0x427E0950UL))
\r
7927 #define bFM3_EXBUS_AREA2_MASK5 *((volatile unsigned int*)(0x427E0954UL))
\r
7928 #define bFM3_EXBUS_AREA2_MASK6 *((volatile unsigned int*)(0x427E0958UL))
\r
7929 #define bFM3_EXBUS_AREA3_ADDR0 *((volatile unsigned int*)(0x427E0980UL))
\r
7930 #define bFM3_EXBUS_AREA3_ADDR1 *((volatile unsigned int*)(0x427E0984UL))
\r
7931 #define bFM3_EXBUS_AREA3_ADDR2 *((volatile unsigned int*)(0x427E0988UL))
\r
7932 #define bFM3_EXBUS_AREA3_ADDR3 *((volatile unsigned int*)(0x427E098CUL))
\r
7933 #define bFM3_EXBUS_AREA3_ADDR4 *((volatile unsigned int*)(0x427E0990UL))
\r
7934 #define bFM3_EXBUS_AREA3_ADDR5 *((volatile unsigned int*)(0x427E0994UL))
\r
7935 #define bFM3_EXBUS_AREA3_ADDR6 *((volatile unsigned int*)(0x427E0998UL))
\r
7936 #define bFM3_EXBUS_AREA3_ADDR7 *((volatile unsigned int*)(0x427E099CUL))
\r
7937 #define bFM3_EXBUS_AREA3_MASK0 *((volatile unsigned int*)(0x427E09C0UL))
\r
7938 #define bFM3_EXBUS_AREA3_MASK1 *((volatile unsigned int*)(0x427E09C4UL))
\r
7939 #define bFM3_EXBUS_AREA3_MASK2 *((volatile unsigned int*)(0x427E09C8UL))
\r
7940 #define bFM3_EXBUS_AREA3_MASK3 *((volatile unsigned int*)(0x427E09CCUL))
\r
7941 #define bFM3_EXBUS_AREA3_MASK4 *((volatile unsigned int*)(0x427E09D0UL))
\r
7942 #define bFM3_EXBUS_AREA3_MASK5 *((volatile unsigned int*)(0x427E09D4UL))
\r
7943 #define bFM3_EXBUS_AREA3_MASK6 *((volatile unsigned int*)(0x427E09D8UL))
\r
7944 #define bFM3_EXBUS_AREA7_ADDR0 *((volatile unsigned int*)(0x427E0B80UL))
\r
7945 #define bFM3_EXBUS_AREA7_ADDR1 *((volatile unsigned int*)(0x427E0B84UL))
\r
7946 #define bFM3_EXBUS_AREA7_ADDR2 *((volatile unsigned int*)(0x427E0B88UL))
\r
7947 #define bFM3_EXBUS_AREA7_ADDR3 *((volatile unsigned int*)(0x427E0B8CUL))
\r
7948 #define bFM3_EXBUS_AREA7_ADDR4 *((volatile unsigned int*)(0x427E0B90UL))
\r
7949 #define bFM3_EXBUS_AREA7_ADDR5 *((volatile unsigned int*)(0x427E0B94UL))
\r
7950 #define bFM3_EXBUS_AREA7_ADDR6 *((volatile unsigned int*)(0x427E0B98UL))
\r
7951 #define bFM3_EXBUS_AREA7_ADDR7 *((volatile unsigned int*)(0x427E0B9CUL))
\r
7952 #define bFM3_EXBUS_AREA7_MASK0 *((volatile unsigned int*)(0x427E0BC0UL))
\r
7953 #define bFM3_EXBUS_AREA7_MASK1 *((volatile unsigned int*)(0x427E0BC4UL))
\r
7954 #define bFM3_EXBUS_AREA7_MASK2 *((volatile unsigned int*)(0x427E0BC8UL))
\r
7955 #define bFM3_EXBUS_AREA7_MASK3 *((volatile unsigned int*)(0x427E0BCCUL))
\r
7956 #define bFM3_EXBUS_AREA7_MASK4 *((volatile unsigned int*)(0x427E0BD0UL))
\r
7957 #define bFM3_EXBUS_AREA7_MASK5 *((volatile unsigned int*)(0x427E0BD4UL))
\r
7958 #define bFM3_EXBUS_AREA7_MASK6 *((volatile unsigned int*)(0x427E0BD8UL))
\r
7960 /* USB channel 0 registers */
\r
7961 #define bFM3_USB0_HCNT_HOST *((volatile unsigned int*)(0x42842000UL))
\r
7962 #define bFM3_USB0_HCNT_URST *((volatile unsigned int*)(0x42842004UL))
\r
7963 #define bFM3_USB0_HCNT_SOFIRE *((volatile unsigned int*)(0x42842008UL))
\r
7964 #define bFM3_USB0_HCNT_DIRE *((volatile unsigned int*)(0x4284200CUL))
\r
7965 #define bFM3_USB0_HCNT_CNNIRE *((volatile unsigned int*)(0x42842010UL))
\r
7966 #define bFM3_USB0_HCNT_CMPIRE *((volatile unsigned int*)(0x42842014UL))
\r
7967 #define bFM3_USB0_HCNT_URIRE *((volatile unsigned int*)(0x42842018UL))
\r
7968 #define bFM3_USB0_HCNT_RWKIRE *((volatile unsigned int*)(0x4284201CUL))
\r
7969 #define bFM3_USB0_HCNT_RETRY *((volatile unsigned int*)(0x42842020UL))
\r
7970 #define bFM3_USB0_HCNT_CANCEL *((volatile unsigned int*)(0x42842024UL))
\r
7971 #define bFM3_USB0_HCNT_SOFSTEP *((volatile unsigned int*)(0x42842028UL))
\r
7972 #define bFM3_USB0_HCNT0_HOST *((volatile unsigned int*)(0x42842000UL))
\r
7973 #define bFM3_USB0_HCNT0_URST *((volatile unsigned int*)(0x42842004UL))
\r
7974 #define bFM3_USB0_HCNT0_SOFIRE *((volatile unsigned int*)(0x42842008UL))
\r
7975 #define bFM3_USB0_HCNT0_DIRE *((volatile unsigned int*)(0x4284200CUL))
\r
7976 #define bFM3_USB0_HCNT0_CNNIRE *((volatile unsigned int*)(0x42842010UL))
\r
7977 #define bFM3_USB0_HCNT0_CMPIRE *((volatile unsigned int*)(0x42842014UL))
\r
7978 #define bFM3_USB0_HCNT0_URIRE *((volatile unsigned int*)(0x42842018UL))
\r
7979 #define bFM3_USB0_HCNT0_RWKIRE *((volatile unsigned int*)(0x4284201CUL))
\r
7980 #define bFM3_USB0_HCNT1_RETRY *((volatile unsigned int*)(0x42842020UL))
\r
7981 #define bFM3_USB0_HCNT1_CANCEL *((volatile unsigned int*)(0x42842024UL))
\r
7982 #define bFM3_USB0_HCNT1_SOFSTEP *((volatile unsigned int*)(0x42842028UL))
\r
7983 #define bFM3_USB0_HIRQ_SOFIRQ *((volatile unsigned int*)(0x42842080UL))
\r
7984 #define bFM3_USB0_HIRQ_DIRQ *((volatile unsigned int*)(0x42842084UL))
\r
7985 #define bFM3_USB0_HIRQ_CNNIRQ *((volatile unsigned int*)(0x42842088UL))
\r
7986 #define bFM3_USB0_HIRQ_CMPIRQ *((volatile unsigned int*)(0x4284208CUL))
\r
7987 #define bFM3_USB0_HIRQ_URIRQ *((volatile unsigned int*)(0x42842090UL))
\r
7988 #define bFM3_USB0_HIRQ_RWKIRQ *((volatile unsigned int*)(0x42842094UL))
\r
7989 #define bFM3_USB0_HIRQ_TCAN *((volatile unsigned int*)(0x4284209CUL))
\r
7990 #define bFM3_USB0_HERR_HS0 *((volatile unsigned int*)(0x428420A0UL))
\r
7991 #define bFM3_USB0_HERR_HS1 *((volatile unsigned int*)(0x428420A4UL))
\r
7992 #define bFM3_USB0_HERR_STUFF *((volatile unsigned int*)(0x428420A8UL))
\r
7993 #define bFM3_USB0_HERR_TGERR *((volatile unsigned int*)(0x428420ACUL))
\r
7994 #define bFM3_USB0_HERR_CRC *((volatile unsigned int*)(0x428420B0UL))
\r
7995 #define bFM3_USB0_HERR_TOUT *((volatile unsigned int*)(0x428420B4UL))
\r
7996 #define bFM3_USB0_HERR_RERR *((volatile unsigned int*)(0x428420B8UL))
\r
7997 #define bFM3_USB0_HERR_LSTOF *((volatile unsigned int*)(0x428420BCUL))
\r
7998 #define bFM3_USB0_HSTATE_CSTAT *((volatile unsigned int*)(0x42842100UL))
\r
7999 #define bFM3_USB0_HSTATE_TMODE *((volatile unsigned int*)(0x42842104UL))
\r
8000 #define bFM3_USB0_HSTATE_SUSP *((volatile unsigned int*)(0x42842108UL))
\r
8001 #define bFM3_USB0_HSTATE_SOFBUSY *((volatile unsigned int*)(0x4284210CUL))
\r
8002 #define bFM3_USB0_HSTATE_CLKSEL *((volatile unsigned int*)(0x42842110UL))
\r
8003 #define bFM3_USB0_HSTATE_ALIVE *((volatile unsigned int*)(0x42842114UL))
\r
8004 #define bFM3_USB0_HFCOMP_FRAMECOMP0 *((volatile unsigned int*)(0x42842120UL))
\r
8005 #define bFM3_USB0_HFCOMP_FRAMECOMP1 *((volatile unsigned int*)(0x42842124UL))
\r
8006 #define bFM3_USB0_HFCOMP_FRAMECOMP2 *((volatile unsigned int*)(0x42842128UL))
\r
8007 #define bFM3_USB0_HFCOMP_FRAMECOMP3 *((volatile unsigned int*)(0x4284212CUL))
\r
8008 #define bFM3_USB0_HFCOMP_FRAMECOMP4 *((volatile unsigned int*)(0x42842130UL))
\r
8009 #define bFM3_USB0_HFCOMP_FRAMECOMP5 *((volatile unsigned int*)(0x42842134UL))
\r
8010 #define bFM3_USB0_HFCOMP_FRAMECOMP6 *((volatile unsigned int*)(0x42842138UL))
\r
8011 #define bFM3_USB0_HFCOMP_FRAMECOMP7 *((volatile unsigned int*)(0x4284213CUL))
\r
8012 #define bFM3_USB0_HRTIMER_RTIMER0 *((volatile unsigned int*)(0x42842180UL))
\r
8013 #define bFM3_USB0_HRTIMER_RTIMER1 *((volatile unsigned int*)(0x42842184UL))
\r
8014 #define bFM3_USB0_HRTIMER_RTIMER2 *((volatile unsigned int*)(0x42842188UL))
\r
8015 #define bFM3_USB0_HRTIMER_RTIMER3 *((volatile unsigned int*)(0x4284218CUL))
\r
8016 #define bFM3_USB0_HRTIMER_RTIMER4 *((volatile unsigned int*)(0x42842190UL))
\r
8017 #define bFM3_USB0_HRTIMER_RTIMER5 *((volatile unsigned int*)(0x42842194UL))
\r
8018 #define bFM3_USB0_HRTIMER_RTIMER6 *((volatile unsigned int*)(0x42842198UL))
\r
8019 #define bFM3_USB0_HRTIMER_RTIMER7 *((volatile unsigned int*)(0x4284219CUL))
\r
8020 #define bFM3_USB0_HRTIMER_RTIMER8 *((volatile unsigned int*)(0x428421A0UL))
\r
8021 #define bFM3_USB0_HRTIMER_RTIMER9 *((volatile unsigned int*)(0x428421A4UL))
\r
8022 #define bFM3_USB0_HRTIMER_RTIMER10 *((volatile unsigned int*)(0x428421A8UL))
\r
8023 #define bFM3_USB0_HRTIMER_RTIMER11 *((volatile unsigned int*)(0x428421ACUL))
\r
8024 #define bFM3_USB0_HRTIMER_RTIMER12 *((volatile unsigned int*)(0x428421B0UL))
\r
8025 #define bFM3_USB0_HRTIMER_RTIMER13 *((volatile unsigned int*)(0x428421B4UL))
\r
8026 #define bFM3_USB0_HRTIMER_RTIMER14 *((volatile unsigned int*)(0x428421B8UL))
\r
8027 #define bFM3_USB0_HRTIMER_RTIMER15 *((volatile unsigned int*)(0x428421BCUL))
\r
8028 #define bFM3_USB0_HRTIMER0_RTIMER00 *((volatile unsigned int*)(0x42842180UL))
\r
8029 #define bFM3_USB0_HRTIMER0_RTIMER01 *((volatile unsigned int*)(0x42842184UL))
\r
8030 #define bFM3_USB0_HRTIMER0_RTIMER02 *((volatile unsigned int*)(0x42842188UL))
\r
8031 #define bFM3_USB0_HRTIMER0_RTIMER03 *((volatile unsigned int*)(0x4284218CUL))
\r
8032 #define bFM3_USB0_HRTIMER0_RTIMER04 *((volatile unsigned int*)(0x42842190UL))
\r
8033 #define bFM3_USB0_HRTIMER0_RTIMER05 *((volatile unsigned int*)(0x42842194UL))
\r
8034 #define bFM3_USB0_HRTIMER0_RTIMER06 *((volatile unsigned int*)(0x42842198UL))
\r
8035 #define bFM3_USB0_HRTIMER0_RTIMER07 *((volatile unsigned int*)(0x4284219CUL))
\r
8036 #define bFM3_USB0_HRTIMER1_RTIMER10 *((volatile unsigned int*)(0x428421A0UL))
\r
8037 #define bFM3_USB0_HRTIMER1_RTIMER11 *((volatile unsigned int*)(0x428421A4UL))
\r
8038 #define bFM3_USB0_HRTIMER1_RTIMER12 *((volatile unsigned int*)(0x428421A8UL))
\r
8039 #define bFM3_USB0_HRTIMER1_RTIMER13 *((volatile unsigned int*)(0x428421ACUL))
\r
8040 #define bFM3_USB0_HRTIMER1_RTIMER14 *((volatile unsigned int*)(0x428421B0UL))
\r
8041 #define bFM3_USB0_HRTIMER1_RTIMER15 *((volatile unsigned int*)(0x428421B4UL))
\r
8042 #define bFM3_USB0_HRTIMER1_RTIMER16 *((volatile unsigned int*)(0x428421B8UL))
\r
8043 #define bFM3_USB0_HRTIMER1_RTIMER17 *((volatile unsigned int*)(0x428421BCUL))
\r
8044 #define bFM3_USB0_HRTIMER2_RTIMER20 *((volatile unsigned int*)(0x42842200UL))
\r
8045 #define bFM3_USB0_HRTIMER2_RTIMER21 *((volatile unsigned int*)(0x42842204UL))
\r
8046 #define bFM3_USB0_HRTIMER2_RTIMER22 *((volatile unsigned int*)(0x42842208UL))
\r
8047 #define bFM3_USB0_HADR_ADDRESS0 *((volatile unsigned int*)(0x42842220UL))
\r
8048 #define bFM3_USB0_HADR_ADDRESS1 *((volatile unsigned int*)(0x42842224UL))
\r
8049 #define bFM3_USB0_HADR_ADDRESS2 *((volatile unsigned int*)(0x42842228UL))
\r
8050 #define bFM3_USB0_HADR_ADDRESS3 *((volatile unsigned int*)(0x4284222CUL))
\r
8051 #define bFM3_USB0_HADR_ADDRESS4 *((volatile unsigned int*)(0x42842230UL))
\r
8052 #define bFM3_USB0_HADR_ADDRESS5 *((volatile unsigned int*)(0x42842234UL))
\r
8053 #define bFM3_USB0_HADR_ADDRESS6 *((volatile unsigned int*)(0x42842238UL))
\r
8054 #define bFM3_USB0_HEOF_EOF0 *((volatile unsigned int*)(0x42842280UL))
\r
8055 #define bFM3_USB0_HEOF_EOF1 *((volatile unsigned int*)(0x42842284UL))
\r
8056 #define bFM3_USB0_HEOF_EOF2 *((volatile unsigned int*)(0x42842288UL))
\r
8057 #define bFM3_USB0_HEOF_EOF3 *((volatile unsigned int*)(0x4284228CUL))
\r
8058 #define bFM3_USB0_HEOF_EOF4 *((volatile unsigned int*)(0x42842290UL))
\r
8059 #define bFM3_USB0_HEOF_EOF5 *((volatile unsigned int*)(0x42842294UL))
\r
8060 #define bFM3_USB0_HEOF_EOF6 *((volatile unsigned int*)(0x42842298UL))
\r
8061 #define bFM3_USB0_HEOF_EOF7 *((volatile unsigned int*)(0x4284229CUL))
\r
8062 #define bFM3_USB0_HEOF_EOF8 *((volatile unsigned int*)(0x428422A0UL))
\r
8063 #define bFM3_USB0_HEOF_EOF9 *((volatile unsigned int*)(0x428422A4UL))
\r
8064 #define bFM3_USB0_HEOF_EOF10 *((volatile unsigned int*)(0x428422A8UL))
\r
8065 #define bFM3_USB0_HEOF_EOF11 *((volatile unsigned int*)(0x428422ACUL))
\r
8066 #define bFM3_USB0_HEOF_EOF12 *((volatile unsigned int*)(0x428422B0UL))
\r
8067 #define bFM3_USB0_HEOF_EOF13 *((volatile unsigned int*)(0x428422B4UL))
\r
8068 #define bFM3_USB0_HEOF_EOF14 *((volatile unsigned int*)(0x428422B8UL))
\r
8069 #define bFM3_USB0_HEOF_EOF15 *((volatile unsigned int*)(0x428422BCUL))
\r
8070 #define bFM3_USB0_HEOF0_EOF00 *((volatile unsigned int*)(0x42842280UL))
\r
8071 #define bFM3_USB0_HEOF0_EOF01 *((volatile unsigned int*)(0x42842284UL))
\r
8072 #define bFM3_USB0_HEOF0_EOF02 *((volatile unsigned int*)(0x42842288UL))
\r
8073 #define bFM3_USB0_HEOF0_EOF03 *((volatile unsigned int*)(0x4284228CUL))
\r
8074 #define bFM3_USB0_HEOF0_EOF04 *((volatile unsigned int*)(0x42842290UL))
\r
8075 #define bFM3_USB0_HEOF0_EOF05 *((volatile unsigned int*)(0x42842294UL))
\r
8076 #define bFM3_USB0_HEOF0_EOF06 *((volatile unsigned int*)(0x42842298UL))
\r
8077 #define bFM3_USB0_HEOF0_EOF07 *((volatile unsigned int*)(0x4284229CUL))
\r
8078 #define bFM3_USB0_HEOF1_EOF10 *((volatile unsigned int*)(0x428422A0UL))
\r
8079 #define bFM3_USB0_HEOF1_EOF11 *((volatile unsigned int*)(0x428422A4UL))
\r
8080 #define bFM3_USB0_HEOF1_EOF12 *((volatile unsigned int*)(0x428422A8UL))
\r
8081 #define bFM3_USB0_HEOF1_EOF13 *((volatile unsigned int*)(0x428422ACUL))
\r
8082 #define bFM3_USB0_HEOF1_EOF14 *((volatile unsigned int*)(0x428422B0UL))
\r
8083 #define bFM3_USB0_HEOF1_EOF15 *((volatile unsigned int*)(0x428422B4UL))
\r
8084 #define bFM3_USB0_HFRAME_FRAME0 *((volatile unsigned int*)(0x42842300UL))
\r
8085 #define bFM3_USB0_HFRAME_FRAME1 *((volatile unsigned int*)(0x42842304UL))
\r
8086 #define bFM3_USB0_HFRAME_FRAME2 *((volatile unsigned int*)(0x42842308UL))
\r
8087 #define bFM3_USB0_HFRAME_FRAME3 *((volatile unsigned int*)(0x4284230CUL))
\r
8088 #define bFM3_USB0_HFRAME_FRAME4 *((volatile unsigned int*)(0x42842310UL))
\r
8089 #define bFM3_USB0_HFRAME_FRAME5 *((volatile unsigned int*)(0x42842314UL))
\r
8090 #define bFM3_USB0_HFRAME_FRAME6 *((volatile unsigned int*)(0x42842318UL))
\r
8091 #define bFM3_USB0_HFRAME_FRAME7 *((volatile unsigned int*)(0x4284231CUL))
\r
8092 #define bFM3_USB0_HFRAME_FRAME8 *((volatile unsigned int*)(0x42842320UL))
\r
8093 #define bFM3_USB0_HFRAME_FRAME9 *((volatile unsigned int*)(0x42842324UL))
\r
8094 #define bFM3_USB0_HFRAME_FRAME10 *((volatile unsigned int*)(0x42842328UL))
\r
8095 #define bFM3_USB0_HFRAME0_FRAME00 *((volatile unsigned int*)(0x42842300UL))
\r
8096 #define bFM3_USB0_HFRAME0_FRAME01 *((volatile unsigned int*)(0x42842304UL))
\r
8097 #define bFM3_USB0_HFRAME0_FRAME02 *((volatile unsigned int*)(0x42842308UL))
\r
8098 #define bFM3_USB0_HFRAME0_FRAME03 *((volatile unsigned int*)(0x4284230CUL))
\r
8099 #define bFM3_USB0_HFRAME0_FRAME04 *((volatile unsigned int*)(0x42842310UL))
\r
8100 #define bFM3_USB0_HFRAME0_FRAME05 *((volatile unsigned int*)(0x42842314UL))
\r
8101 #define bFM3_USB0_HFRAME0_FRAME06 *((volatile unsigned int*)(0x42842318UL))
\r
8102 #define bFM3_USB0_HFRAME0_FRAME07 *((volatile unsigned int*)(0x4284231CUL))
\r
8103 #define bFM3_USB0_HFRAME1_FRAME10 *((volatile unsigned int*)(0x42842320UL))
\r
8104 #define bFM3_USB0_HFRAME1_FRAME11 *((volatile unsigned int*)(0x42842324UL))
\r
8105 #define bFM3_USB0_HFRAME1_FRAME12 *((volatile unsigned int*)(0x42842328UL))
\r
8106 #define bFM3_USB0_HFRAME1_FRAME13 *((volatile unsigned int*)(0x4284232CUL))
\r
8107 #define bFM3_USB0_HTOKEN_ENDPT0 *((volatile unsigned int*)(0x42842380UL))
\r
8108 #define bFM3_USB0_HTOKEN_ENDPT1 *((volatile unsigned int*)(0x42842384UL))
\r
8109 #define bFM3_USB0_HTOKEN_ENDPT2 *((volatile unsigned int*)(0x42842388UL))
\r
8110 #define bFM3_USB0_HTOKEN_ENDPT3 *((volatile unsigned int*)(0x4284238CUL))
\r
8111 #define bFM3_USB0_HTOKEN_TKNEN0 *((volatile unsigned int*)(0x42842390UL))
\r
8112 #define bFM3_USB0_HTOKEN_TKNEN1 *((volatile unsigned int*)(0x42842394UL))
\r
8113 #define bFM3_USB0_HTOKEN_TKNEN2 *((volatile unsigned int*)(0x42842398UL))
\r
8114 #define bFM3_USB0_HTOKEN_TGGL *((volatile unsigned int*)(0x4284239CUL))
\r
8115 #define bFM3_USB0_UDCC_PWC *((volatile unsigned int*)(0x42842400UL))
\r
8116 #define bFM3_USB0_UDCC_RFBK *((volatile unsigned int*)(0x42842404UL))
\r
8117 #define bFM3_USB0_UDCC_STALCLREN *((volatile unsigned int*)(0x4284240CUL))
\r
8118 #define bFM3_USB0_UDCC_USTP *((volatile unsigned int*)(0x42842410UL))
\r
8119 #define bFM3_USB0_UDCC_HCONX *((volatile unsigned int*)(0x42842414UL))
\r
8120 #define bFM3_USB0_UDCC_RESUM *((volatile unsigned int*)(0x42842418UL))
\r
8121 #define bFM3_USB0_UDCC_RST *((volatile unsigned int*)(0x4284241CUL))
\r
8122 #define bFM3_USB0_EP0C_PKS00 *((volatile unsigned int*)(0x42842480UL))
\r
8123 #define bFM3_USB0_EP0C_PKS01 *((volatile unsigned int*)(0x42842484UL))
\r
8124 #define bFM3_USB0_EP0C_PKS02 *((volatile unsigned int*)(0x42842488UL))
\r
8125 #define bFM3_USB0_EP0C_PKS03 *((volatile unsigned int*)(0x4284248CUL))
\r
8126 #define bFM3_USB0_EP0C_PKS04 *((volatile unsigned int*)(0x42842490UL))
\r
8127 #define bFM3_USB0_EP0C_PKS05 *((volatile unsigned int*)(0x42842494UL))
\r
8128 #define bFM3_USB0_EP0C_PKS06 *((volatile unsigned int*)(0x42842498UL))
\r
8129 #define bFM3_USB0_EP0C_STAL *((volatile unsigned int*)(0x428424A4UL))
\r
8130 #define bFM3_USB0_EP1C_PKS10 *((volatile unsigned int*)(0x42842500UL))
\r
8131 #define bFM3_USB0_EP1C_PKS11 *((volatile unsigned int*)(0x42842504UL))
\r
8132 #define bFM3_USB0_EP1C_PKS12 *((volatile unsigned int*)(0x42842508UL))
\r
8133 #define bFM3_USB0_EP1C_PKS13 *((volatile unsigned int*)(0x4284250CUL))
\r
8134 #define bFM3_USB0_EP1C_PKS14 *((volatile unsigned int*)(0x42842510UL))
\r
8135 #define bFM3_USB0_EP1C_PKS15 *((volatile unsigned int*)(0x42842514UL))
\r
8136 #define bFM3_USB0_EP1C_PKS16 *((volatile unsigned int*)(0x42842518UL))
\r
8137 #define bFM3_USB0_EP1C_PKS17 *((volatile unsigned int*)(0x4284251CUL))
\r
8138 #define bFM3_USB0_EP1C_PSK18 *((volatile unsigned int*)(0x42842520UL))
\r
8139 #define bFM3_USB0_EP1C_STAL *((volatile unsigned int*)(0x42842524UL))
\r
8140 #define bFM3_USB0_EP1C_NULE *((volatile unsigned int*)(0x42842528UL))
\r
8141 #define bFM3_USB0_EP1C_DMAE *((volatile unsigned int*)(0x4284252CUL))
\r
8142 #define bFM3_USB0_EP1C_DIR *((volatile unsigned int*)(0x42842530UL))
\r
8143 #define bFM3_USB0_EP1C_TYPE0 *((volatile unsigned int*)(0x42842534UL))
\r
8144 #define bFM3_USB0_EP1C_TYPE1 *((volatile unsigned int*)(0x42842538UL))
\r
8145 #define bFM3_USB0_EP1C_EPEN *((volatile unsigned int*)(0x4284253CUL))
\r
8146 #define bFM3_USB0_EP2C_PKS20 *((volatile unsigned int*)(0x42842580UL))
\r
8147 #define bFM3_USB0_EP2C_PKS21 *((volatile unsigned int*)(0x42842584UL))
\r
8148 #define bFM3_USB0_EP2C_PKS22 *((volatile unsigned int*)(0x42842588UL))
\r
8149 #define bFM3_USB0_EP2C_PKS23 *((volatile unsigned int*)(0x4284258CUL))
\r
8150 #define bFM3_USB0_EP2C_PKS24 *((volatile unsigned int*)(0x42842590UL))
\r
8151 #define bFM3_USB0_EP2C_PKS25 *((volatile unsigned int*)(0x42842594UL))
\r
8152 #define bFM3_USB0_EP2C_PKS26 *((volatile unsigned int*)(0x42842598UL))
\r
8153 #define bFM3_USB0_EP2C_STAL *((volatile unsigned int*)(0x428425A4UL))
\r
8154 #define bFM3_USB0_EP2C_NULE *((volatile unsigned int*)(0x428425A8UL))
\r
8155 #define bFM3_USB0_EP2C_DMAE *((volatile unsigned int*)(0x428425ACUL))
\r
8156 #define bFM3_USB0_EP2C_DIR *((volatile unsigned int*)(0x428425B0UL))
\r
8157 #define bFM3_USB0_EP2C_TYPE0 *((volatile unsigned int*)(0x428425B4UL))
\r
8158 #define bFM3_USB0_EP2C_TYPE1 *((volatile unsigned int*)(0x428425B8UL))
\r
8159 #define bFM3_USB0_EP2C_EPEN *((volatile unsigned int*)(0x428425BCUL))
\r
8160 #define bFM3_USB0_EP3C_PKS30 *((volatile unsigned int*)(0x42842600UL))
\r
8161 #define bFM3_USB0_EP3C_PKS31 *((volatile unsigned int*)(0x42842604UL))
\r
8162 #define bFM3_USB0_EP3C_PKS32 *((volatile unsigned int*)(0x42842608UL))
\r
8163 #define bFM3_USB0_EP3C_PKS33 *((volatile unsigned int*)(0x4284260CUL))
\r
8164 #define bFM3_USB0_EP3C_PKS34 *((volatile unsigned int*)(0x42842610UL))
\r
8165 #define bFM3_USB0_EP3C_PKS35 *((volatile unsigned int*)(0x42842614UL))
\r
8166 #define bFM3_USB0_EP3C_PKS36 *((volatile unsigned int*)(0x42842618UL))
\r
8167 #define bFM3_USB0_EP3C_STAL *((volatile unsigned int*)(0x42842624UL))
\r
8168 #define bFM3_USB0_EP3C_NULE *((volatile unsigned int*)(0x42842628UL))
\r
8169 #define bFM3_USB0_EP3C_DMAE *((volatile unsigned int*)(0x4284262CUL))
\r
8170 #define bFM3_USB0_EP3C_DIR *((volatile unsigned int*)(0x42842630UL))
\r
8171 #define bFM3_USB0_EP3C_TYPE0 *((volatile unsigned int*)(0x42842634UL))
\r
8172 #define bFM3_USB0_EP3C_TYPE1 *((volatile unsigned int*)(0x42842638UL))
\r
8173 #define bFM3_USB0_EP3C_EPEN *((volatile unsigned int*)(0x4284263CUL))
\r
8174 #define bFM3_USB0_EP4C_PKS40 *((volatile unsigned int*)(0x42842680UL))
\r
8175 #define bFM3_USB0_EP4C_PKS41 *((volatile unsigned int*)(0x42842684UL))
\r
8176 #define bFM3_USB0_EP4C_PKS42 *((volatile unsigned int*)(0x42842688UL))
\r
8177 #define bFM3_USB0_EP4C_PKS43 *((volatile unsigned int*)(0x4284268CUL))
\r
8178 #define bFM3_USB0_EP4C_PKS44 *((volatile unsigned int*)(0x42842690UL))
\r
8179 #define bFM3_USB0_EP4C_PKS45 *((volatile unsigned int*)(0x42842694UL))
\r
8180 #define bFM3_USB0_EP4C_PKS46 *((volatile unsigned int*)(0x42842698UL))
\r
8181 #define bFM3_USB0_EP4C_STAL *((volatile unsigned int*)(0x428426A4UL))
\r
8182 #define bFM3_USB0_EP4C_NULE *((volatile unsigned int*)(0x428426A8UL))
\r
8183 #define bFM3_USB0_EP4C_DMAE *((volatile unsigned int*)(0x428426ACUL))
\r
8184 #define bFM3_USB0_EP4C_DIR *((volatile unsigned int*)(0x428426B0UL))
\r
8185 #define bFM3_USB0_EP4C_TYPE0 *((volatile unsigned int*)(0x428426B4UL))
\r
8186 #define bFM3_USB0_EP4C_TYPE1 *((volatile unsigned int*)(0x428426B8UL))
\r
8187 #define bFM3_USB0_EP4C_EPEN *((volatile unsigned int*)(0x428426BCUL))
\r
8188 #define bFM3_USB0_EP5C_PKS50 *((volatile unsigned int*)(0x42842700UL))
\r
8189 #define bFM3_USB0_EP5C_PKS51 *((volatile unsigned int*)(0x42842704UL))
\r
8190 #define bFM3_USB0_EP5C_PKS52 *((volatile unsigned int*)(0x42842708UL))
\r
8191 #define bFM3_USB0_EP5C_PKS53 *((volatile unsigned int*)(0x4284270CUL))
\r
8192 #define bFM3_USB0_EP5C_PKS54 *((volatile unsigned int*)(0x42842710UL))
\r
8193 #define bFM3_USB0_EP5C_PKS55 *((volatile unsigned int*)(0x42842714UL))
\r
8194 #define bFM3_USB0_EP5C_PKS56 *((volatile unsigned int*)(0x42842718UL))
\r
8195 #define bFM3_USB0_EP5C_STAL *((volatile unsigned int*)(0x42842724UL))
\r
8196 #define bFM3_USB0_EP5C_NULE *((volatile unsigned int*)(0x42842728UL))
\r
8197 #define bFM3_USB0_EP5C_DMAE *((volatile unsigned int*)(0x4284272CUL))
\r
8198 #define bFM3_USB0_EP5C_DIR *((volatile unsigned int*)(0x42842730UL))
\r
8199 #define bFM3_USB0_EP5C_TYPE0 *((volatile unsigned int*)(0x42842734UL))
\r
8200 #define bFM3_USB0_EP5C_TYPE1 *((volatile unsigned int*)(0x42842738UL))
\r
8201 #define bFM3_USB0_EP5C_EPEN *((volatile unsigned int*)(0x4284273CUL))
\r
8202 #define bFM3_USB0_TMSP_TMSP0 *((volatile unsigned int*)(0x42842780UL))
\r
8203 #define bFM3_USB0_TMSP_TMSP1 *((volatile unsigned int*)(0x42842784UL))
\r
8204 #define bFM3_USB0_TMSP_TMSP2 *((volatile unsigned int*)(0x42842788UL))
\r
8205 #define bFM3_USB0_TMSP_TMSP3 *((volatile unsigned int*)(0x4284278CUL))
\r
8206 #define bFM3_USB0_TMSP_TMSP4 *((volatile unsigned int*)(0x42842790UL))
\r
8207 #define bFM3_USB0_TMSP_TMSP5 *((volatile unsigned int*)(0x42842794UL))
\r
8208 #define bFM3_USB0_TMSP_TMSP6 *((volatile unsigned int*)(0x42842798UL))
\r
8209 #define bFM3_USB0_TMSP_TMSP7 *((volatile unsigned int*)(0x4284279CUL))
\r
8210 #define bFM3_USB0_TMSP_TMSP8 *((volatile unsigned int*)(0x428427A0UL))
\r
8211 #define bFM3_USB0_TMSP_TMSP9 *((volatile unsigned int*)(0x428427A4UL))
\r
8212 #define bFM3_USB0_TMSP_TMSP10 *((volatile unsigned int*)(0x428427A8UL))
\r
8213 #define bFM3_USB0_UDCS_CONF *((volatile unsigned int*)(0x42842800UL))
\r
8214 #define bFM3_USB0_UDCS_SETP *((volatile unsigned int*)(0x42842804UL))
\r
8215 #define bFM3_USB0_UDCS_WKUP *((volatile unsigned int*)(0x42842808UL))
\r
8216 #define bFM3_USB0_UDCS_BRST *((volatile unsigned int*)(0x4284280CUL))
\r
8217 #define bFM3_USB0_UDCS_SOF *((volatile unsigned int*)(0x42842810UL))
\r
8218 #define bFM3_USB0_UDCS_SUSP *((volatile unsigned int*)(0x42842814UL))
\r
8219 #define bFM3_USB0_UDCIE_CONFIE *((volatile unsigned int*)(0x42842820UL))
\r
8220 #define bFM3_USB0_UDCIE_CONFN *((volatile unsigned int*)(0x42842824UL))
\r
8221 #define bFM3_USB0_UDCIE_WKUPIE *((volatile unsigned int*)(0x42842828UL))
\r
8222 #define bFM3_USB0_UDCIE_BRSTIE *((volatile unsigned int*)(0x4284282CUL))
\r
8223 #define bFM3_USB0_UDCIE_SOFIE *((volatile unsigned int*)(0x42842830UL))
\r
8224 #define bFM3_USB0_UDCIE_SUSPIE *((volatile unsigned int*)(0x42842834UL))
\r
8225 #define bFM3_USB0_EP0IS_DRQI *((volatile unsigned int*)(0x428428A8UL))
\r
8226 #define bFM3_USB0_EP0IS_DRQIIE *((volatile unsigned int*)(0x428428B8UL))
\r
8227 #define bFM3_USB0_EP0IS_BFINI *((volatile unsigned int*)(0x428428BCUL))
\r
8228 #define bFM3_USB0_EP0OS_SIZE0 *((volatile unsigned int*)(0x42842900UL))
\r
8229 #define bFM3_USB0_EP0OS_SIZE1 *((volatile unsigned int*)(0x42842904UL))
\r
8230 #define bFM3_USB0_EP0OS_SIZE2 *((volatile unsigned int*)(0x42842908UL))
\r
8231 #define bFM3_USB0_EP0OS_SIZE3 *((volatile unsigned int*)(0x4284290CUL))
\r
8232 #define bFM3_USB0_EP0OS_SIZE4 *((volatile unsigned int*)(0x42842910UL))
\r
8233 #define bFM3_USB0_EP0OS_SIZE5 *((volatile unsigned int*)(0x42842914UL))
\r
8234 #define bFM3_USB0_EP0OS_SIZE6 *((volatile unsigned int*)(0x42842918UL))
\r
8235 #define bFM3_USB0_EP0OS_SPK *((volatile unsigned int*)(0x42842924UL))
\r
8236 #define bFM3_USB0_EP0OS_DRQO *((volatile unsigned int*)(0x42842928UL))
\r
8237 #define bFM3_USB0_EP0OS_SPKIE *((volatile unsigned int*)(0x42842934UL))
\r
8238 #define bFM3_USB0_EP0OS_DRQOIE *((volatile unsigned int*)(0x42842938UL))
\r
8239 #define bFM3_USB0_EP0OS_BFINI *((volatile unsigned int*)(0x4284293CUL))
\r
8240 #define bFM3_USB0_EP1S_SIZE10 *((volatile unsigned int*)(0x42842980UL))
\r
8241 #define bFM3_USB0_EP1S_SIZE11 *((volatile unsigned int*)(0x42842984UL))
\r
8242 #define bFM3_USB0_EP1S_SIZE12 *((volatile unsigned int*)(0x42842988UL))
\r
8243 #define bFM3_USB0_EP1S_SIZE13 *((volatile unsigned int*)(0x4284298CUL))
\r
8244 #define bFM3_USB0_EP1S_SIZE14 *((volatile unsigned int*)(0x42842990UL))
\r
8245 #define bFM3_USB0_EP1S_SIZE15 *((volatile unsigned int*)(0x42842994UL))
\r
8246 #define bFM3_USB0_EP1S_SIZE16 *((volatile unsigned int*)(0x42842998UL))
\r
8247 #define bFM3_USB0_EP1S_SIZE17 *((volatile unsigned int*)(0x4284299CUL))
\r
8248 #define bFM3_USB0_EP1S_SPK *((volatile unsigned int*)(0x428429A4UL))
\r
8249 #define bFM3_USB0_EP1S_DRQ *((volatile unsigned int*)(0x428429A8UL))
\r
8250 #define bFM3_USB0_EP1S_BUSY *((volatile unsigned int*)(0x428429ACUL))
\r
8251 #define bFM3_USB0_EP1S_SPKIE *((volatile unsigned int*)(0x428429B4UL))
\r
8252 #define bFM3_USB0_EP1S_DRQIE *((volatile unsigned int*)(0x428429B8UL))
\r
8253 #define bFM3_USB0_EP1S_BFINI *((volatile unsigned int*)(0x428429BCUL))
\r
8254 #define bFM3_USB0_EP2S_SIZE20 *((volatile unsigned int*)(0x42842A00UL))
\r
8255 #define bFM3_USB0_EP2S_SIZE21 *((volatile unsigned int*)(0x42842A04UL))
\r
8256 #define bFM3_USB0_EP2S_SIZE22 *((volatile unsigned int*)(0x42842A08UL))
\r
8257 #define bFM3_USB0_EP2S_SIZE23 *((volatile unsigned int*)(0x42842A0CUL))
\r
8258 #define bFM3_USB0_EP2S_SIZE24 *((volatile unsigned int*)(0x42842A10UL))
\r
8259 #define bFM3_USB0_EP2S_SIZE25 *((volatile unsigned int*)(0x42842A14UL))
\r
8260 #define bFM3_USB0_EP2S_SIZE26 *((volatile unsigned int*)(0x42842A18UL))
\r
8261 #define bFM3_USB0_EP2S_SPK *((volatile unsigned int*)(0x42842A24UL))
\r
8262 #define bFM3_USB0_EP2S_DRQ *((volatile unsigned int*)(0x42842A28UL))
\r
8263 #define bFM3_USB0_EP2S_BUSY *((volatile unsigned int*)(0x42842A2CUL))
\r
8264 #define bFM3_USB0_EP2S_SPKIE *((volatile unsigned int*)(0x42842A34UL))
\r
8265 #define bFM3_USB0_EP2S_DRQIE *((volatile unsigned int*)(0x42842A38UL))
\r
8266 #define bFM3_USB0_EP2S_BFINI *((volatile unsigned int*)(0x42842A3CUL))
\r
8267 #define bFM3_USB0_EP3S_SIZE30 *((volatile unsigned int*)(0x42842A80UL))
\r
8268 #define bFM3_USB0_EP3S_SIZE31 *((volatile unsigned int*)(0x42842A84UL))
\r
8269 #define bFM3_USB0_EP3S_SIZE32 *((volatile unsigned int*)(0x42842A88UL))
\r
8270 #define bFM3_USB0_EP3S_SIZE33 *((volatile unsigned int*)(0x42842A8CUL))
\r
8271 #define bFM3_USB0_EP3S_SIZE34 *((volatile unsigned int*)(0x42842A90UL))
\r
8272 #define bFM3_USB0_EP3S_SIZE35 *((volatile unsigned int*)(0x42842A94UL))
\r
8273 #define bFM3_USB0_EP3S_SIZE36 *((volatile unsigned int*)(0x42842A98UL))
\r
8274 #define bFM3_USB0_EP3S_SPK *((volatile unsigned int*)(0x42842AA4UL))
\r
8275 #define bFM3_USB0_EP3S_DRQ *((volatile unsigned int*)(0x42842AA8UL))
\r
8276 #define bFM3_USB0_EP3S_BUSY *((volatile unsigned int*)(0x42842AACUL))
\r
8277 #define bFM3_USB0_EP3S_SPKIE *((volatile unsigned int*)(0x42842AB4UL))
\r
8278 #define bFM3_USB0_EP3S_DRQIE *((volatile unsigned int*)(0x42842AB8UL))
\r
8279 #define bFM3_USB0_EP3S_BFINI *((volatile unsigned int*)(0x42842ABCUL))
\r
8280 #define bFM3_USB0_EP4S_SIZE40 *((volatile unsigned int*)(0x42842B00UL))
\r
8281 #define bFM3_USB0_EP4S_SIZE41 *((volatile unsigned int*)(0x42842B04UL))
\r
8282 #define bFM3_USB0_EP4S_SIZE42 *((volatile unsigned int*)(0x42842B08UL))
\r
8283 #define bFM3_USB0_EP4S_SIZE43 *((volatile unsigned int*)(0x42842B0CUL))
\r
8284 #define bFM3_USB0_EP4S_SIZE44 *((volatile unsigned int*)(0x42842B10UL))
\r
8285 #define bFM3_USB0_EP4S_SIZE45 *((volatile unsigned int*)(0x42842B14UL))
\r
8286 #define bFM3_USB0_EP4S_SIZE46 *((volatile unsigned int*)(0x42842B18UL))
\r
8287 #define bFM3_USB0_EP4S_SPK *((volatile unsigned int*)(0x42842B24UL))
\r
8288 #define bFM3_USB0_EP4S_DRQ *((volatile unsigned int*)(0x42842B28UL))
\r
8289 #define bFM3_USB0_EP4S_BUSY *((volatile unsigned int*)(0x42842B2CUL))
\r
8290 #define bFM3_USB0_EP4S_SPKIE *((volatile unsigned int*)(0x42842B34UL))
\r
8291 #define bFM3_USB0_EP4S_DRQIE *((volatile unsigned int*)(0x42842B38UL))
\r
8292 #define bFM3_USB0_EP4S_BFINI *((volatile unsigned int*)(0x42842B3CUL))
\r
8293 #define bFM3_USB0_EP5S_SIZE50 *((volatile unsigned int*)(0x42842B80UL))
\r
8294 #define bFM3_USB0_EP5S_SIZE51 *((volatile unsigned int*)(0x42842B84UL))
\r
8295 #define bFM3_USB0_EP5S_SIZE52 *((volatile unsigned int*)(0x42842B88UL))
\r
8296 #define bFM3_USB0_EP5S_SIZE53 *((volatile unsigned int*)(0x42842B8CUL))
\r
8297 #define bFM3_USB0_EP5S_SIZE54 *((volatile unsigned int*)(0x42842B90UL))
\r
8298 #define bFM3_USB0_EP5S_SIZE55 *((volatile unsigned int*)(0x42842B94UL))
\r
8299 #define bFM3_USB0_EP5S_SIZE56 *((volatile unsigned int*)(0x42842B98UL))
\r
8300 #define bFM3_USB0_EP5S_SPK *((volatile unsigned int*)(0x42842BA4UL))
\r
8301 #define bFM3_USB0_EP5S_DRQ *((volatile unsigned int*)(0x42842BA8UL))
\r
8302 #define bFM3_USB0_EP5S_BUSY *((volatile unsigned int*)(0x42842BACUL))
\r
8303 #define bFM3_USB0_EP5S_SPKIE *((volatile unsigned int*)(0x42842BB4UL))
\r
8304 #define bFM3_USB0_EP5S_DRQIE *((volatile unsigned int*)(0x42842BB8UL))
\r
8305 #define bFM3_USB0_EP5S_BFINI *((volatile unsigned int*)(0x42842BBCUL))
\r
8307 /* DMA controller */
\r
8308 #define bFM3_DMAC_DMACR_DH0 *((volatile unsigned int*)(0x42C00060UL))
\r
8309 #define bFM3_DMAC_DMACR_DH1 *((volatile unsigned int*)(0x42C00064UL))
\r
8310 #define bFM3_DMAC_DMACR_DH2 *((volatile unsigned int*)(0x42C00068UL))
\r
8311 #define bFM3_DMAC_DMACR_DH3 *((volatile unsigned int*)(0x42C0006CUL))
\r
8312 #define bFM3_DMAC_DMACR_PR *((volatile unsigned int*)(0x42C00070UL))
\r
8313 #define bFM3_DMAC_DMACR_DS *((volatile unsigned int*)(0x42C00078UL))
\r
8314 #define bFM3_DMAC_DMACR_DE *((volatile unsigned int*)(0x42C0007CUL))
\r
8315 #define bFM3_DMAC_DMACA0_TC0 *((volatile unsigned int*)(0x42C00200UL))
\r
8316 #define bFM3_DMAC_DMACA0_TC1 *((volatile unsigned int*)(0x42C00204UL))
\r
8317 #define bFM3_DMAC_DMACA0_TC2 *((volatile unsigned int*)(0x42C00208UL))
\r
8318 #define bFM3_DMAC_DMACA0_TC3 *((volatile unsigned int*)(0x42C0020CUL))
\r
8319 #define bFM3_DMAC_DMACA0_TC4 *((volatile unsigned int*)(0x42C00210UL))
\r
8320 #define bFM3_DMAC_DMACA0_TC5 *((volatile unsigned int*)(0x42C00214UL))
\r
8321 #define bFM3_DMAC_DMACA0_TC6 *((volatile unsigned int*)(0x42C00218UL))
\r
8322 #define bFM3_DMAC_DMACA0_TC7 *((volatile unsigned int*)(0x42C0021CUL))
\r
8323 #define bFM3_DMAC_DMACA0_TC8 *((volatile unsigned int*)(0x42C00220UL))
\r
8324 #define bFM3_DMAC_DMACA0_TC9 *((volatile unsigned int*)(0x42C00224UL))
\r
8325 #define bFM3_DMAC_DMACA0_TC10 *((volatile unsigned int*)(0x42C00228UL))
\r
8326 #define bFM3_DMAC_DMACA0_TC11 *((volatile unsigned int*)(0x42C0022CUL))
\r
8327 #define bFM3_DMAC_DMACA0_TC12 *((volatile unsigned int*)(0x42C00230UL))
\r
8328 #define bFM3_DMAC_DMACA0_TC13 *((volatile unsigned int*)(0x42C00234UL))
\r
8329 #define bFM3_DMAC_DMACA0_TC14 *((volatile unsigned int*)(0x42C00238UL))
\r
8330 #define bFM3_DMAC_DMACA0_TC15 *((volatile unsigned int*)(0x42C0023CUL))
\r
8331 #define bFM3_DMAC_DMACA0_BC0 *((volatile unsigned int*)(0x42C00240UL))
\r
8332 #define bFM3_DMAC_DMACA0_BC1 *((volatile unsigned int*)(0x42C00244UL))
\r
8333 #define bFM3_DMAC_DMACA0_BC2 *((volatile unsigned int*)(0x42C00248UL))
\r
8334 #define bFM3_DMAC_DMACA0_BC3 *((volatile unsigned int*)(0x42C0024CUL))
\r
8335 #define bFM3_DMAC_DMACA0_IS0 *((volatile unsigned int*)(0x42C0025CUL))
\r
8336 #define bFM3_DMAC_DMACA0_IS1 *((volatile unsigned int*)(0x42C00260UL))
\r
8337 #define bFM3_DMAC_DMACA0_IS2 *((volatile unsigned int*)(0x42C00264UL))
\r
8338 #define bFM3_DMAC_DMACA0_IS3 *((volatile unsigned int*)(0x42C00268UL))
\r
8339 #define bFM3_DMAC_DMACA0_IS4 *((volatile unsigned int*)(0x42C0026CUL))
\r
8340 #define bFM3_DMAC_DMACA0_IS5 *((volatile unsigned int*)(0x42C00270UL))
\r
8341 #define bFM3_DMAC_DMACA0_ST *((volatile unsigned int*)(0x42C00274UL))
\r
8342 #define bFM3_DMAC_DMACA0_PB *((volatile unsigned int*)(0x42C00278UL))
\r
8343 #define bFM3_DMAC_DMACA0_EB *((volatile unsigned int*)(0x42C0027CUL))
\r
8344 #define bFM3_DMAC_DMACB0_EM *((volatile unsigned int*)(0x42C00280UL))
\r
8345 #define bFM3_DMAC_DMACB0_SS0 *((volatile unsigned int*)(0x42C002C0UL))
\r
8346 #define bFM3_DMAC_DMACB0_SS1 *((volatile unsigned int*)(0x42C002C4UL))
\r
8347 #define bFM3_DMAC_DMACB0_SS2 *((volatile unsigned int*)(0x42C002C8UL))
\r
8348 #define bFM3_DMAC_DMACB0_CI *((volatile unsigned int*)(0x42C002CCUL))
\r
8349 #define bFM3_DMAC_DMACB0_EI *((volatile unsigned int*)(0x42C002D0UL))
\r
8350 #define bFM3_DMAC_DMACB0_RD *((volatile unsigned int*)(0x42C002D4UL))
\r
8351 #define bFM3_DMAC_DMACB0_RS *((volatile unsigned int*)(0x42C002D8UL))
\r
8352 #define bFM3_DMAC_DMACB0_RC *((volatile unsigned int*)(0x42C002DCUL))
\r
8353 #define bFM3_DMAC_DMACB0_FD *((volatile unsigned int*)(0x42C002E0UL))
\r
8354 #define bFM3_DMAC_DMACB0_FS *((volatile unsigned int*)(0x42C002E4UL))
\r
8355 #define bFM3_DMAC_DMACB0_TW0 *((volatile unsigned int*)(0x42C002E8UL))
\r
8356 #define bFM3_DMAC_DMACB0_TW1 *((volatile unsigned int*)(0x42C002ECUL))
\r
8357 #define bFM3_DMAC_DMACB0_MS0 *((volatile unsigned int*)(0x42C002F0UL))
\r
8358 #define bFM3_DMAC_DMACB0_MS1 *((volatile unsigned int*)(0x42C002F4UL))
\r
8359 #define bFM3_DMAC_DMACA1_TC0 *((volatile unsigned int*)(0x42C00400UL))
\r
8360 #define bFM3_DMAC_DMACA1_TC1 *((volatile unsigned int*)(0x42C00404UL))
\r
8361 #define bFM3_DMAC_DMACA1_TC2 *((volatile unsigned int*)(0x42C00408UL))
\r
8362 #define bFM3_DMAC_DMACA1_TC3 *((volatile unsigned int*)(0x42C0040CUL))
\r
8363 #define bFM3_DMAC_DMACA1_TC4 *((volatile unsigned int*)(0x42C00410UL))
\r
8364 #define bFM3_DMAC_DMACA1_TC5 *((volatile unsigned int*)(0x42C00414UL))
\r
8365 #define bFM3_DMAC_DMACA1_TC6 *((volatile unsigned int*)(0x42C00418UL))
\r
8366 #define bFM3_DMAC_DMACA1_TC7 *((volatile unsigned int*)(0x42C0041CUL))
\r
8367 #define bFM3_DMAC_DMACA1_TC8 *((volatile unsigned int*)(0x42C00420UL))
\r
8368 #define bFM3_DMAC_DMACA1_TC9 *((volatile unsigned int*)(0x42C00424UL))
\r
8369 #define bFM3_DMAC_DMACA1_TC10 *((volatile unsigned int*)(0x42C00428UL))
\r
8370 #define bFM3_DMAC_DMACA1_TC11 *((volatile unsigned int*)(0x42C0042CUL))
\r
8371 #define bFM3_DMAC_DMACA1_TC12 *((volatile unsigned int*)(0x42C00430UL))
\r
8372 #define bFM3_DMAC_DMACA1_TC13 *((volatile unsigned int*)(0x42C00434UL))
\r
8373 #define bFM3_DMAC_DMACA1_TC14 *((volatile unsigned int*)(0x42C00438UL))
\r
8374 #define bFM3_DMAC_DMACA1_TC15 *((volatile unsigned int*)(0x42C0043CUL))
\r
8375 #define bFM3_DMAC_DMACA1_BC0 *((volatile unsigned int*)(0x42C00440UL))
\r
8376 #define bFM3_DMAC_DMACA1_BC1 *((volatile unsigned int*)(0x42C00444UL))
\r
8377 #define bFM3_DMAC_DMACA1_BC2 *((volatile unsigned int*)(0x42C00448UL))
\r
8378 #define bFM3_DMAC_DMACA1_BC3 *((volatile unsigned int*)(0x42C0044CUL))
\r
8379 #define bFM3_DMAC_DMACA1_IS0 *((volatile unsigned int*)(0x42C0045CUL))
\r
8380 #define bFM3_DMAC_DMACA1_IS1 *((volatile unsigned int*)(0x42C00460UL))
\r
8381 #define bFM3_DMAC_DMACA1_IS2 *((volatile unsigned int*)(0x42C00464UL))
\r
8382 #define bFM3_DMAC_DMACA1_IS3 *((volatile unsigned int*)(0x42C00468UL))
\r
8383 #define bFM3_DMAC_DMACA1_IS4 *((volatile unsigned int*)(0x42C0046CUL))
\r
8384 #define bFM3_DMAC_DMACA1_IS5 *((volatile unsigned int*)(0x42C00470UL))
\r
8385 #define bFM3_DMAC_DMACA1_ST *((volatile unsigned int*)(0x42C00474UL))
\r
8386 #define bFM3_DMAC_DMACA1_PB *((volatile unsigned int*)(0x42C00478UL))
\r
8387 #define bFM3_DMAC_DMACA1_EB *((volatile unsigned int*)(0x42C0047CUL))
\r
8388 #define bFM3_DMAC_DMACB1_EM *((volatile unsigned int*)(0x42C00480UL))
\r
8389 #define bFM3_DMAC_DMACB1_SS0 *((volatile unsigned int*)(0x42C004C0UL))
\r
8390 #define bFM3_DMAC_DMACB1_SS1 *((volatile unsigned int*)(0x42C004C4UL))
\r
8391 #define bFM3_DMAC_DMACB1_SS2 *((volatile unsigned int*)(0x42C004C8UL))
\r
8392 #define bFM3_DMAC_DMACB1_CI *((volatile unsigned int*)(0x42C004CCUL))
\r
8393 #define bFM3_DMAC_DMACB1_EI *((volatile unsigned int*)(0x42C004D0UL))
\r
8394 #define bFM3_DMAC_DMACB1_RD *((volatile unsigned int*)(0x42C004D4UL))
\r
8395 #define bFM3_DMAC_DMACB1_RS *((volatile unsigned int*)(0x42C004D8UL))
\r
8396 #define bFM3_DMAC_DMACB1_RC *((volatile unsigned int*)(0x42C004DCUL))
\r
8397 #define bFM3_DMAC_DMACB1_FD *((volatile unsigned int*)(0x42C004E0UL))
\r
8398 #define bFM3_DMAC_DMACB1_FS *((volatile unsigned int*)(0x42C004E4UL))
\r
8399 #define bFM3_DMAC_DMACB1_TW0 *((volatile unsigned int*)(0x42C004E8UL))
\r
8400 #define bFM3_DMAC_DMACB1_TW1 *((volatile unsigned int*)(0x42C004ECUL))
\r
8401 #define bFM3_DMAC_DMACB1_MS0 *((volatile unsigned int*)(0x42C004F0UL))
\r
8402 #define bFM3_DMAC_DMACB1_MS1 *((volatile unsigned int*)(0x42C004F4UL))
\r
8403 #define bFM3_DMAC_DMACA2_TC0 *((volatile unsigned int*)(0x42C00600UL))
\r
8404 #define bFM3_DMAC_DMACA2_TC1 *((volatile unsigned int*)(0x42C00604UL))
\r
8405 #define bFM3_DMAC_DMACA2_TC2 *((volatile unsigned int*)(0x42C00608UL))
\r
8406 #define bFM3_DMAC_DMACA2_TC3 *((volatile unsigned int*)(0x42C0060CUL))
\r
8407 #define bFM3_DMAC_DMACA2_TC4 *((volatile unsigned int*)(0x42C00610UL))
\r
8408 #define bFM3_DMAC_DMACA2_TC5 *((volatile unsigned int*)(0x42C00614UL))
\r
8409 #define bFM3_DMAC_DMACA2_TC6 *((volatile unsigned int*)(0x42C00618UL))
\r
8410 #define bFM3_DMAC_DMACA2_TC7 *((volatile unsigned int*)(0x42C0061CUL))
\r
8411 #define bFM3_DMAC_DMACA2_TC8 *((volatile unsigned int*)(0x42C00620UL))
\r
8412 #define bFM3_DMAC_DMACA2_TC9 *((volatile unsigned int*)(0x42C00624UL))
\r
8413 #define bFM3_DMAC_DMACA2_TC10 *((volatile unsigned int*)(0x42C00628UL))
\r
8414 #define bFM3_DMAC_DMACA2_TC11 *((volatile unsigned int*)(0x42C0062CUL))
\r
8415 #define bFM3_DMAC_DMACA2_TC12 *((volatile unsigned int*)(0x42C00630UL))
\r
8416 #define bFM3_DMAC_DMACA2_TC13 *((volatile unsigned int*)(0x42C00634UL))
\r
8417 #define bFM3_DMAC_DMACA2_TC14 *((volatile unsigned int*)(0x42C00638UL))
\r
8418 #define bFM3_DMAC_DMACA2_TC15 *((volatile unsigned int*)(0x42C0063CUL))
\r
8419 #define bFM3_DMAC_DMACA2_BC0 *((volatile unsigned int*)(0x42C00640UL))
\r
8420 #define bFM3_DMAC_DMACA2_BC1 *((volatile unsigned int*)(0x42C00644UL))
\r
8421 #define bFM3_DMAC_DMACA2_BC2 *((volatile unsigned int*)(0x42C00648UL))
\r
8422 #define bFM3_DMAC_DMACA2_BC3 *((volatile unsigned int*)(0x42C0064CUL))
\r
8423 #define bFM3_DMAC_DMACA2_IS0 *((volatile unsigned int*)(0x42C0065CUL))
\r
8424 #define bFM3_DMAC_DMACA2_IS1 *((volatile unsigned int*)(0x42C00660UL))
\r
8425 #define bFM3_DMAC_DMACA2_IS2 *((volatile unsigned int*)(0x42C00664UL))
\r
8426 #define bFM3_DMAC_DMACA2_IS3 *((volatile unsigned int*)(0x42C00668UL))
\r
8427 #define bFM3_DMAC_DMACA2_IS4 *((volatile unsigned int*)(0x42C0066CUL))
\r
8428 #define bFM3_DMAC_DMACA2_IS5 *((volatile unsigned int*)(0x42C00670UL))
\r
8429 #define bFM3_DMAC_DMACA2_ST *((volatile unsigned int*)(0x42C00674UL))
\r
8430 #define bFM3_DMAC_DMACA2_PB *((volatile unsigned int*)(0x42C00678UL))
\r
8431 #define bFM3_DMAC_DMACA2_EB *((volatile unsigned int*)(0x42C0067CUL))
\r
8432 #define bFM3_DMAC_DMACB2_EM *((volatile unsigned int*)(0x42C00680UL))
\r
8433 #define bFM3_DMAC_DMACB2_SS0 *((volatile unsigned int*)(0x42C006C0UL))
\r
8434 #define bFM3_DMAC_DMACB2_SS1 *((volatile unsigned int*)(0x42C006C4UL))
\r
8435 #define bFM3_DMAC_DMACB2_SS2 *((volatile unsigned int*)(0x42C006C8UL))
\r
8436 #define bFM3_DMAC_DMACB2_CI *((volatile unsigned int*)(0x42C006CCUL))
\r
8437 #define bFM3_DMAC_DMACB2_EI *((volatile unsigned int*)(0x42C006D0UL))
\r
8438 #define bFM3_DMAC_DMACB2_RD *((volatile unsigned int*)(0x42C006D4UL))
\r
8439 #define bFM3_DMAC_DMACB2_RS *((volatile unsigned int*)(0x42C006D8UL))
\r
8440 #define bFM3_DMAC_DMACB2_RC *((volatile unsigned int*)(0x42C006DCUL))
\r
8441 #define bFM3_DMAC_DMACB2_FD *((volatile unsigned int*)(0x42C006E0UL))
\r
8442 #define bFM3_DMAC_DMACB2_FS *((volatile unsigned int*)(0x42C006E4UL))
\r
8443 #define bFM3_DMAC_DMACB2_TW0 *((volatile unsigned int*)(0x42C006E8UL))
\r
8444 #define bFM3_DMAC_DMACB2_TW1 *((volatile unsigned int*)(0x42C006ECUL))
\r
8445 #define bFM3_DMAC_DMACB2_MS0 *((volatile unsigned int*)(0x42C006F0UL))
\r
8446 #define bFM3_DMAC_DMACB2_MS1 *((volatile unsigned int*)(0x42C006F4UL))
\r
8447 #define bFM3_DMAC_DMACA3_TC0 *((volatile unsigned int*)(0x42C00800UL))
\r
8448 #define bFM3_DMAC_DMACA3_TC1 *((volatile unsigned int*)(0x42C00804UL))
\r
8449 #define bFM3_DMAC_DMACA3_TC2 *((volatile unsigned int*)(0x42C00808UL))
\r
8450 #define bFM3_DMAC_DMACA3_TC3 *((volatile unsigned int*)(0x42C0080CUL))
\r
8451 #define bFM3_DMAC_DMACA3_TC4 *((volatile unsigned int*)(0x42C00810UL))
\r
8452 #define bFM3_DMAC_DMACA3_TC5 *((volatile unsigned int*)(0x42C00814UL))
\r
8453 #define bFM3_DMAC_DMACA3_TC6 *((volatile unsigned int*)(0x42C00818UL))
\r
8454 #define bFM3_DMAC_DMACA3_TC7 *((volatile unsigned int*)(0x42C0081CUL))
\r
8455 #define bFM3_DMAC_DMACA3_TC8 *((volatile unsigned int*)(0x42C00820UL))
\r
8456 #define bFM3_DMAC_DMACA3_TC9 *((volatile unsigned int*)(0x42C00824UL))
\r
8457 #define bFM3_DMAC_DMACA3_TC10 *((volatile unsigned int*)(0x42C00828UL))
\r
8458 #define bFM3_DMAC_DMACA3_TC11 *((volatile unsigned int*)(0x42C0082CUL))
\r
8459 #define bFM3_DMAC_DMACA3_TC12 *((volatile unsigned int*)(0x42C00830UL))
\r
8460 #define bFM3_DMAC_DMACA3_TC13 *((volatile unsigned int*)(0x42C00834UL))
\r
8461 #define bFM3_DMAC_DMACA3_TC14 *((volatile unsigned int*)(0x42C00838UL))
\r
8462 #define bFM3_DMAC_DMACA3_TC15 *((volatile unsigned int*)(0x42C0083CUL))
\r
8463 #define bFM3_DMAC_DMACA3_BC0 *((volatile unsigned int*)(0x42C00840UL))
\r
8464 #define bFM3_DMAC_DMACA3_BC1 *((volatile unsigned int*)(0x42C00844UL))
\r
8465 #define bFM3_DMAC_DMACA3_BC2 *((volatile unsigned int*)(0x42C00848UL))
\r
8466 #define bFM3_DMAC_DMACA3_BC3 *((volatile unsigned int*)(0x42C0084CUL))
\r
8467 #define bFM3_DMAC_DMACA3_IS0 *((volatile unsigned int*)(0x42C0085CUL))
\r
8468 #define bFM3_DMAC_DMACA3_IS1 *((volatile unsigned int*)(0x42C00860UL))
\r
8469 #define bFM3_DMAC_DMACA3_IS2 *((volatile unsigned int*)(0x42C00864UL))
\r
8470 #define bFM3_DMAC_DMACA3_IS3 *((volatile unsigned int*)(0x42C00868UL))
\r
8471 #define bFM3_DMAC_DMACA3_IS4 *((volatile unsigned int*)(0x42C0086CUL))
\r
8472 #define bFM3_DMAC_DMACA3_IS5 *((volatile unsigned int*)(0x42C00870UL))
\r
8473 #define bFM3_DMAC_DMACA3_ST *((volatile unsigned int*)(0x42C00874UL))
\r
8474 #define bFM3_DMAC_DMACA3_PB *((volatile unsigned int*)(0x42C00878UL))
\r
8475 #define bFM3_DMAC_DMACA3_EB *((volatile unsigned int*)(0x42C0087CUL))
\r
8476 #define bFM3_DMAC_DMACB3_EM *((volatile unsigned int*)(0x42C00880UL))
\r
8477 #define bFM3_DMAC_DMACB3_SS0 *((volatile unsigned int*)(0x42C008C0UL))
\r
8478 #define bFM3_DMAC_DMACB3_SS1 *((volatile unsigned int*)(0x42C008C4UL))
\r
8479 #define bFM3_DMAC_DMACB3_SS2 *((volatile unsigned int*)(0x42C008C8UL))
\r
8480 #define bFM3_DMAC_DMACB3_CI *((volatile unsigned int*)(0x42C008CCUL))
\r
8481 #define bFM3_DMAC_DMACB3_EI *((volatile unsigned int*)(0x42C008D0UL))
\r
8482 #define bFM3_DMAC_DMACB3_RD *((volatile unsigned int*)(0x42C008D4UL))
\r
8483 #define bFM3_DMAC_DMACB3_RS *((volatile unsigned int*)(0x42C008D8UL))
\r
8484 #define bFM3_DMAC_DMACB3_RC *((volatile unsigned int*)(0x42C008DCUL))
\r
8485 #define bFM3_DMAC_DMACB3_FD *((volatile unsigned int*)(0x42C008E0UL))
\r
8486 #define bFM3_DMAC_DMACB3_FS *((volatile unsigned int*)(0x42C008E4UL))
\r
8487 #define bFM3_DMAC_DMACB3_TW0 *((volatile unsigned int*)(0x42C008E8UL))
\r
8488 #define bFM3_DMAC_DMACB3_TW1 *((volatile unsigned int*)(0x42C008ECUL))
\r
8489 #define bFM3_DMAC_DMACB3_MS0 *((volatile unsigned int*)(0x42C008F0UL))
\r
8490 #define bFM3_DMAC_DMACB3_MS1 *((volatile unsigned int*)(0x42C008F4UL))
\r
8491 #define bFM3_DMAC_DMACA4_TC0 *((volatile unsigned int*)(0x42C00A00UL))
\r
8492 #define bFM3_DMAC_DMACA4_TC1 *((volatile unsigned int*)(0x42C00A04UL))
\r
8493 #define bFM3_DMAC_DMACA4_TC2 *((volatile unsigned int*)(0x42C00A08UL))
\r
8494 #define bFM3_DMAC_DMACA4_TC3 *((volatile unsigned int*)(0x42C00A0CUL))
\r
8495 #define bFM3_DMAC_DMACA4_TC4 *((volatile unsigned int*)(0x42C00A10UL))
\r
8496 #define bFM3_DMAC_DMACA4_TC5 *((volatile unsigned int*)(0x42C00A14UL))
\r
8497 #define bFM3_DMAC_DMACA4_TC6 *((volatile unsigned int*)(0x42C00A18UL))
\r
8498 #define bFM3_DMAC_DMACA4_TC7 *((volatile unsigned int*)(0x42C00A1CUL))
\r
8499 #define bFM3_DMAC_DMACA4_TC8 *((volatile unsigned int*)(0x42C00A20UL))
\r
8500 #define bFM3_DMAC_DMACA4_TC9 *((volatile unsigned int*)(0x42C00A24UL))
\r
8501 #define bFM3_DMAC_DMACA4_TC10 *((volatile unsigned int*)(0x42C00A28UL))
\r
8502 #define bFM3_DMAC_DMACA4_TC11 *((volatile unsigned int*)(0x42C00A2CUL))
\r
8503 #define bFM3_DMAC_DMACA4_TC12 *((volatile unsigned int*)(0x42C00A30UL))
\r
8504 #define bFM3_DMAC_DMACA4_TC13 *((volatile unsigned int*)(0x42C00A34UL))
\r
8505 #define bFM3_DMAC_DMACA4_TC14 *((volatile unsigned int*)(0x42C00A38UL))
\r
8506 #define bFM3_DMAC_DMACA4_TC15 *((volatile unsigned int*)(0x42C00A3CUL))
\r
8507 #define bFM3_DMAC_DMACA4_BC0 *((volatile unsigned int*)(0x42C00A40UL))
\r
8508 #define bFM3_DMAC_DMACA4_BC1 *((volatile unsigned int*)(0x42C00A44UL))
\r
8509 #define bFM3_DMAC_DMACA4_BC2 *((volatile unsigned int*)(0x42C00A48UL))
\r
8510 #define bFM3_DMAC_DMACA4_BC3 *((volatile unsigned int*)(0x42C00A4CUL))
\r
8511 #define bFM3_DMAC_DMACA4_IS0 *((volatile unsigned int*)(0x42C00A5CUL))
\r
8512 #define bFM3_DMAC_DMACA4_IS1 *((volatile unsigned int*)(0x42C00A60UL))
\r
8513 #define bFM3_DMAC_DMACA4_IS2 *((volatile unsigned int*)(0x42C00A64UL))
\r
8514 #define bFM3_DMAC_DMACA4_IS3 *((volatile unsigned int*)(0x42C00A68UL))
\r
8515 #define bFM3_DMAC_DMACA4_IS4 *((volatile unsigned int*)(0x42C00A6CUL))
\r
8516 #define bFM3_DMAC_DMACA4_IS5 *((volatile unsigned int*)(0x42C00A70UL))
\r
8517 #define bFM3_DMAC_DMACA4_ST *((volatile unsigned int*)(0x42C00A74UL))
\r
8518 #define bFM3_DMAC_DMACA4_PB *((volatile unsigned int*)(0x42C00A78UL))
\r
8519 #define bFM3_DMAC_DMACA4_EB *((volatile unsigned int*)(0x42C00A7CUL))
\r
8520 #define bFM3_DMAC_DMACB4_EM *((volatile unsigned int*)(0x42C00A80UL))
\r
8521 #define bFM3_DMAC_DMACB4_SS0 *((volatile unsigned int*)(0x42C00AC0UL))
\r
8522 #define bFM3_DMAC_DMACB4_SS1 *((volatile unsigned int*)(0x42C00AC4UL))
\r
8523 #define bFM3_DMAC_DMACB4_SS2 *((volatile unsigned int*)(0x42C00AC8UL))
\r
8524 #define bFM3_DMAC_DMACB4_CI *((volatile unsigned int*)(0x42C00ACCUL))
\r
8525 #define bFM3_DMAC_DMACB4_EI *((volatile unsigned int*)(0x42C00AD0UL))
\r
8526 #define bFM3_DMAC_DMACB4_RD *((volatile unsigned int*)(0x42C00AD4UL))
\r
8527 #define bFM3_DMAC_DMACB4_RS *((volatile unsigned int*)(0x42C00AD8UL))
\r
8528 #define bFM3_DMAC_DMACB4_RC *((volatile unsigned int*)(0x42C00ADCUL))
\r
8529 #define bFM3_DMAC_DMACB4_FD *((volatile unsigned int*)(0x42C00AE0UL))
\r
8530 #define bFM3_DMAC_DMACB4_FS *((volatile unsigned int*)(0x42C00AE4UL))
\r
8531 #define bFM3_DMAC_DMACB4_TW0 *((volatile unsigned int*)(0x42C00AE8UL))
\r
8532 #define bFM3_DMAC_DMACB4_TW1 *((volatile unsigned int*)(0x42C00AECUL))
\r
8533 #define bFM3_DMAC_DMACB4_MS0 *((volatile unsigned int*)(0x42C00AF0UL))
\r
8534 #define bFM3_DMAC_DMACB4_MS1 *((volatile unsigned int*)(0x42C00AF4UL))
\r
8535 #define bFM3_DMAC_DMACA5_TC0 *((volatile unsigned int*)(0x42C00C00UL))
\r
8536 #define bFM3_DMAC_DMACA5_TC1 *((volatile unsigned int*)(0x42C00C04UL))
\r
8537 #define bFM3_DMAC_DMACA5_TC2 *((volatile unsigned int*)(0x42C00C08UL))
\r
8538 #define bFM3_DMAC_DMACA5_TC3 *((volatile unsigned int*)(0x42C00C0CUL))
\r
8539 #define bFM3_DMAC_DMACA5_TC4 *((volatile unsigned int*)(0x42C00C10UL))
\r
8540 #define bFM3_DMAC_DMACA5_TC5 *((volatile unsigned int*)(0x42C00C14UL))
\r
8541 #define bFM3_DMAC_DMACA5_TC6 *((volatile unsigned int*)(0x42C00C18UL))
\r
8542 #define bFM3_DMAC_DMACA5_TC7 *((volatile unsigned int*)(0x42C00C1CUL))
\r
8543 #define bFM3_DMAC_DMACA5_TC8 *((volatile unsigned int*)(0x42C00C20UL))
\r
8544 #define bFM3_DMAC_DMACA5_TC9 *((volatile unsigned int*)(0x42C00C24UL))
\r
8545 #define bFM3_DMAC_DMACA5_TC10 *((volatile unsigned int*)(0x42C00C28UL))
\r
8546 #define bFM3_DMAC_DMACA5_TC11 *((volatile unsigned int*)(0x42C00C2CUL))
\r
8547 #define bFM3_DMAC_DMACA5_TC12 *((volatile unsigned int*)(0x42C00C30UL))
\r
8548 #define bFM3_DMAC_DMACA5_TC13 *((volatile unsigned int*)(0x42C00C34UL))
\r
8549 #define bFM3_DMAC_DMACA5_TC14 *((volatile unsigned int*)(0x42C00C38UL))
\r
8550 #define bFM3_DMAC_DMACA5_TC15 *((volatile unsigned int*)(0x42C00C3CUL))
\r
8551 #define bFM3_DMAC_DMACA5_BC0 *((volatile unsigned int*)(0x42C00C40UL))
\r
8552 #define bFM3_DMAC_DMACA5_BC1 *((volatile unsigned int*)(0x42C00C44UL))
\r
8553 #define bFM3_DMAC_DMACA5_BC2 *((volatile unsigned int*)(0x42C00C48UL))
\r
8554 #define bFM3_DMAC_DMACA5_BC3 *((volatile unsigned int*)(0x42C00C4CUL))
\r
8555 #define bFM3_DMAC_DMACA5_IS0 *((volatile unsigned int*)(0x42C00C5CUL))
\r
8556 #define bFM3_DMAC_DMACA5_IS1 *((volatile unsigned int*)(0x42C00C60UL))
\r
8557 #define bFM3_DMAC_DMACA5_IS2 *((volatile unsigned int*)(0x42C00C64UL))
\r
8558 #define bFM3_DMAC_DMACA5_IS3 *((volatile unsigned int*)(0x42C00C68UL))
\r
8559 #define bFM3_DMAC_DMACA5_IS4 *((volatile unsigned int*)(0x42C00C6CUL))
\r
8560 #define bFM3_DMAC_DMACA5_IS5 *((volatile unsigned int*)(0x42C00C70UL))
\r
8561 #define bFM3_DMAC_DMACA5_ST *((volatile unsigned int*)(0x42C00C74UL))
\r
8562 #define bFM3_DMAC_DMACA5_PB *((volatile unsigned int*)(0x42C00C78UL))
\r
8563 #define bFM3_DMAC_DMACA5_EB *((volatile unsigned int*)(0x42C00C7CUL))
\r
8564 #define bFM3_DMAC_DMACB5_EM *((volatile unsigned int*)(0x42C00C80UL))
\r
8565 #define bFM3_DMAC_DMACB5_SS0 *((volatile unsigned int*)(0x42C00CC0UL))
\r
8566 #define bFM3_DMAC_DMACB5_SS1 *((volatile unsigned int*)(0x42C00CC4UL))
\r
8567 #define bFM3_DMAC_DMACB5_SS2 *((volatile unsigned int*)(0x42C00CC8UL))
\r
8568 #define bFM3_DMAC_DMACB5_CI *((volatile unsigned int*)(0x42C00CCCUL))
\r
8569 #define bFM3_DMAC_DMACB5_EI *((volatile unsigned int*)(0x42C00CD0UL))
\r
8570 #define bFM3_DMAC_DMACB5_RD *((volatile unsigned int*)(0x42C00CD4UL))
\r
8571 #define bFM3_DMAC_DMACB5_RS *((volatile unsigned int*)(0x42C00CD8UL))
\r
8572 #define bFM3_DMAC_DMACB5_RC *((volatile unsigned int*)(0x42C00CDCUL))
\r
8573 #define bFM3_DMAC_DMACB5_FD *((volatile unsigned int*)(0x42C00CE0UL))
\r
8574 #define bFM3_DMAC_DMACB5_FS *((volatile unsigned int*)(0x42C00CE4UL))
\r
8575 #define bFM3_DMAC_DMACB5_TW0 *((volatile unsigned int*)(0x42C00CE8UL))
\r
8576 #define bFM3_DMAC_DMACB5_TW1 *((volatile unsigned int*)(0x42C00CECUL))
\r
8577 #define bFM3_DMAC_DMACB5_MS0 *((volatile unsigned int*)(0x42C00CF0UL))
\r
8578 #define bFM3_DMAC_DMACB5_MS1 *((volatile unsigned int*)(0x42C00CF4UL))
\r
8579 #define bFM3_DMAC_DMACA6_TC0 *((volatile unsigned int*)(0x42C00E00UL))
\r
8580 #define bFM3_DMAC_DMACA6_TC1 *((volatile unsigned int*)(0x42C00E04UL))
\r
8581 #define bFM3_DMAC_DMACA6_TC2 *((volatile unsigned int*)(0x42C00E08UL))
\r
8582 #define bFM3_DMAC_DMACA6_TC3 *((volatile unsigned int*)(0x42C00E0CUL))
\r
8583 #define bFM3_DMAC_DMACA6_TC4 *((volatile unsigned int*)(0x42C00E10UL))
\r
8584 #define bFM3_DMAC_DMACA6_TC5 *((volatile unsigned int*)(0x42C00E14UL))
\r
8585 #define bFM3_DMAC_DMACA6_TC6 *((volatile unsigned int*)(0x42C00E18UL))
\r
8586 #define bFM3_DMAC_DMACA6_TC7 *((volatile unsigned int*)(0x42C00E1CUL))
\r
8587 #define bFM3_DMAC_DMACA6_TC8 *((volatile unsigned int*)(0x42C00E20UL))
\r
8588 #define bFM3_DMAC_DMACA6_TC9 *((volatile unsigned int*)(0x42C00E24UL))
\r
8589 #define bFM3_DMAC_DMACA6_TC10 *((volatile unsigned int*)(0x42C00E28UL))
\r
8590 #define bFM3_DMAC_DMACA6_TC11 *((volatile unsigned int*)(0x42C00E2CUL))
\r
8591 #define bFM3_DMAC_DMACA6_TC12 *((volatile unsigned int*)(0x42C00E30UL))
\r
8592 #define bFM3_DMAC_DMACA6_TC13 *((volatile unsigned int*)(0x42C00E34UL))
\r
8593 #define bFM3_DMAC_DMACA6_TC14 *((volatile unsigned int*)(0x42C00E38UL))
\r
8594 #define bFM3_DMAC_DMACA6_TC15 *((volatile unsigned int*)(0x42C00E3CUL))
\r
8595 #define bFM3_DMAC_DMACA6_BC0 *((volatile unsigned int*)(0x42C00E40UL))
\r
8596 #define bFM3_DMAC_DMACA6_BC1 *((volatile unsigned int*)(0x42C00E44UL))
\r
8597 #define bFM3_DMAC_DMACA6_BC2 *((volatile unsigned int*)(0x42C00E48UL))
\r
8598 #define bFM3_DMAC_DMACA6_BC3 *((volatile unsigned int*)(0x42C00E4CUL))
\r
8599 #define bFM3_DMAC_DMACA6_IS0 *((volatile unsigned int*)(0x42C00E5CUL))
\r
8600 #define bFM3_DMAC_DMACA6_IS1 *((volatile unsigned int*)(0x42C00E60UL))
\r
8601 #define bFM3_DMAC_DMACA6_IS2 *((volatile unsigned int*)(0x42C00E64UL))
\r
8602 #define bFM3_DMAC_DMACA6_IS3 *((volatile unsigned int*)(0x42C00E68UL))
\r
8603 #define bFM3_DMAC_DMACA6_IS4 *((volatile unsigned int*)(0x42C00E6CUL))
\r
8604 #define bFM3_DMAC_DMACA6_IS5 *((volatile unsigned int*)(0x42C00E70UL))
\r
8605 #define bFM3_DMAC_DMACA6_ST *((volatile unsigned int*)(0x42C00E74UL))
\r
8606 #define bFM3_DMAC_DMACA6_PB *((volatile unsigned int*)(0x42C00E78UL))
\r
8607 #define bFM3_DMAC_DMACA6_EB *((volatile unsigned int*)(0x42C00E7CUL))
\r
8608 #define bFM3_DMAC_DMACB6_EM *((volatile unsigned int*)(0x42C00E80UL))
\r
8609 #define bFM3_DMAC_DMACB6_SS0 *((volatile unsigned int*)(0x42C00EC0UL))
\r
8610 #define bFM3_DMAC_DMACB6_SS1 *((volatile unsigned int*)(0x42C00EC4UL))
\r
8611 #define bFM3_DMAC_DMACB6_SS2 *((volatile unsigned int*)(0x42C00EC8UL))
\r
8612 #define bFM3_DMAC_DMACB6_CI *((volatile unsigned int*)(0x42C00ECCUL))
\r
8613 #define bFM3_DMAC_DMACB6_EI *((volatile unsigned int*)(0x42C00ED0UL))
\r
8614 #define bFM3_DMAC_DMACB6_RD *((volatile unsigned int*)(0x42C00ED4UL))
\r
8615 #define bFM3_DMAC_DMACB6_RS *((volatile unsigned int*)(0x42C00ED8UL))
\r
8616 #define bFM3_DMAC_DMACB6_RC *((volatile unsigned int*)(0x42C00EDCUL))
\r
8617 #define bFM3_DMAC_DMACB6_FD *((volatile unsigned int*)(0x42C00EE0UL))
\r
8618 #define bFM3_DMAC_DMACB6_FS *((volatile unsigned int*)(0x42C00EE4UL))
\r
8619 #define bFM3_DMAC_DMACB6_TW0 *((volatile unsigned int*)(0x42C00EE8UL))
\r
8620 #define bFM3_DMAC_DMACB6_TW1 *((volatile unsigned int*)(0x42C00EECUL))
\r
8621 #define bFM3_DMAC_DMACB6_MS0 *((volatile unsigned int*)(0x42C00EF0UL))
\r
8622 #define bFM3_DMAC_DMACB6_MS1 *((volatile unsigned int*)(0x42C00EF4UL))
\r
8623 #define bFM3_DMAC_DMACA7_TC0 *((volatile unsigned int*)(0x42C01000UL))
\r
8624 #define bFM3_DMAC_DMACA7_TC1 *((volatile unsigned int*)(0x42C01004UL))
\r
8625 #define bFM3_DMAC_DMACA7_TC2 *((volatile unsigned int*)(0x42C01008UL))
\r
8626 #define bFM3_DMAC_DMACA7_TC3 *((volatile unsigned int*)(0x42C0100CUL))
\r
8627 #define bFM3_DMAC_DMACA7_TC4 *((volatile unsigned int*)(0x42C01010UL))
\r
8628 #define bFM3_DMAC_DMACA7_TC5 *((volatile unsigned int*)(0x42C01014UL))
\r
8629 #define bFM3_DMAC_DMACA7_TC6 *((volatile unsigned int*)(0x42C01018UL))
\r
8630 #define bFM3_DMAC_DMACA7_TC7 *((volatile unsigned int*)(0x42C0101CUL))
\r
8631 #define bFM3_DMAC_DMACA7_TC8 *((volatile unsigned int*)(0x42C01020UL))
\r
8632 #define bFM3_DMAC_DMACA7_TC9 *((volatile unsigned int*)(0x42C01024UL))
\r
8633 #define bFM3_DMAC_DMACA7_TC10 *((volatile unsigned int*)(0x42C01028UL))
\r
8634 #define bFM3_DMAC_DMACA7_TC11 *((volatile unsigned int*)(0x42C0102CUL))
\r
8635 #define bFM3_DMAC_DMACA7_TC12 *((volatile unsigned int*)(0x42C01030UL))
\r
8636 #define bFM3_DMAC_DMACA7_TC13 *((volatile unsigned int*)(0x42C01034UL))
\r
8637 #define bFM3_DMAC_DMACA7_TC14 *((volatile unsigned int*)(0x42C01038UL))
\r
8638 #define bFM3_DMAC_DMACA7_TC15 *((volatile unsigned int*)(0x42C0103CUL))
\r
8639 #define bFM3_DMAC_DMACA7_BC0 *((volatile unsigned int*)(0x42C01040UL))
\r
8640 #define bFM3_DMAC_DMACA7_BC1 *((volatile unsigned int*)(0x42C01044UL))
\r
8641 #define bFM3_DMAC_DMACA7_BC2 *((volatile unsigned int*)(0x42C01048UL))
\r
8642 #define bFM3_DMAC_DMACA7_BC3 *((volatile unsigned int*)(0x42C0104CUL))
\r
8643 #define bFM3_DMAC_DMACA7_IS0 *((volatile unsigned int*)(0x42C0105CUL))
\r
8644 #define bFM3_DMAC_DMACA7_IS1 *((volatile unsigned int*)(0x42C01060UL))
\r
8645 #define bFM3_DMAC_DMACA7_IS2 *((volatile unsigned int*)(0x42C01064UL))
\r
8646 #define bFM3_DMAC_DMACA7_IS3 *((volatile unsigned int*)(0x42C01068UL))
\r
8647 #define bFM3_DMAC_DMACA7_IS4 *((volatile unsigned int*)(0x42C0106CUL))
\r
8648 #define bFM3_DMAC_DMACA7_IS5 *((volatile unsigned int*)(0x42C01070UL))
\r
8649 #define bFM3_DMAC_DMACA7_ST *((volatile unsigned int*)(0x42C01074UL))
\r
8650 #define bFM3_DMAC_DMACA7_PB *((volatile unsigned int*)(0x42C01078UL))
\r
8651 #define bFM3_DMAC_DMACA7_EB *((volatile unsigned int*)(0x42C0107CUL))
\r
8652 #define bFM3_DMAC_DMACB7_EM *((volatile unsigned int*)(0x42C01080UL))
\r
8653 #define bFM3_DMAC_DMACB7_SS0 *((volatile unsigned int*)(0x42C010C0UL))
\r
8654 #define bFM3_DMAC_DMACB7_SS1 *((volatile unsigned int*)(0x42C010C4UL))
\r
8655 #define bFM3_DMAC_DMACB7_SS2 *((volatile unsigned int*)(0x42C010C8UL))
\r
8656 #define bFM3_DMAC_DMACB7_CI *((volatile unsigned int*)(0x42C010CCUL))
\r
8657 #define bFM3_DMAC_DMACB7_EI *((volatile unsigned int*)(0x42C010D0UL))
\r
8658 #define bFM3_DMAC_DMACB7_RD *((volatile unsigned int*)(0x42C010D4UL))
\r
8659 #define bFM3_DMAC_DMACB7_RS *((volatile unsigned int*)(0x42C010D8UL))
\r
8660 #define bFM3_DMAC_DMACB7_RC *((volatile unsigned int*)(0x42C010DCUL))
\r
8661 #define bFM3_DMAC_DMACB7_FD *((volatile unsigned int*)(0x42C010E0UL))
\r
8662 #define bFM3_DMAC_DMACB7_FS *((volatile unsigned int*)(0x42C010E4UL))
\r
8663 #define bFM3_DMAC_DMACB7_TW0 *((volatile unsigned int*)(0x42C010E8UL))
\r
8664 #define bFM3_DMAC_DMACB7_TW1 *((volatile unsigned int*)(0x42C010ECUL))
\r
8665 #define bFM3_DMAC_DMACB7_MS0 *((volatile unsigned int*)(0x42C010F0UL))
\r
8666 #define bFM3_DMAC_DMACB7_MS1 *((volatile unsigned int*)(0x42C010F4UL))
\r
8668 /* CAN channel 0 registers */
\r
8669 #define bFM3_CAN0_CTRLR_INIT *((volatile unsigned int*)(0x42C40000UL))
\r
8670 #define bFM3_CAN0_CTRLR_IE *((volatile unsigned int*)(0x42C40004UL))
\r
8671 #define bFM3_CAN0_CTRLR_SIE *((volatile unsigned int*)(0x42C40008UL))
\r
8672 #define bFM3_CAN0_CTRLR_EIE *((volatile unsigned int*)(0x42C4000CUL))
\r
8673 #define bFM3_CAN0_CTRLR_DAR *((volatile unsigned int*)(0x42C40014UL))
\r
8674 #define bFM3_CAN0_CTRLR_CCE *((volatile unsigned int*)(0x42C40018UL))
\r
8675 #define bFM3_CAN0_CTRLR_TEST *((volatile unsigned int*)(0x42C4001CUL))
\r
8676 #define bFM3_CAN0_STATR_LEC0 *((volatile unsigned int*)(0x42C40040UL))
\r
8677 #define bFM3_CAN0_STATR_LEC1 *((volatile unsigned int*)(0x42C40044UL))
\r
8678 #define bFM3_CAN0_STATR_LEC2 *((volatile unsigned int*)(0x42C40048UL))
\r
8679 #define bFM3_CAN0_STATR_TXOK *((volatile unsigned int*)(0x42C4004CUL))
\r
8680 #define bFM3_CAN0_STATR_RXOK *((volatile unsigned int*)(0x42C40050UL))
\r
8681 #define bFM3_CAN0_STATR_EPASS *((volatile unsigned int*)(0x42C40054UL))
\r
8682 #define bFM3_CAN0_STATR_EWARM *((volatile unsigned int*)(0x42C40058UL))
\r
8683 #define bFM3_CAN0_STATR_BOFF *((volatile unsigned int*)(0x42C4005CUL))
\r
8684 #define bFM3_CAN0_ERRCNT_TEC0 *((volatile unsigned int*)(0x42C40080UL))
\r
8685 #define bFM3_CAN0_ERRCNT_TEC1 *((volatile unsigned int*)(0x42C40084UL))
\r
8686 #define bFM3_CAN0_ERRCNT_TEC2 *((volatile unsigned int*)(0x42C40088UL))
\r
8687 #define bFM3_CAN0_ERRCNT_TEC3 *((volatile unsigned int*)(0x42C4008CUL))
\r
8688 #define bFM3_CAN0_ERRCNT_TEC4 *((volatile unsigned int*)(0x42C40090UL))
\r
8689 #define bFM3_CAN0_ERRCNT_TEC5 *((volatile unsigned int*)(0x42C40094UL))
\r
8690 #define bFM3_CAN0_ERRCNT_TEC6 *((volatile unsigned int*)(0x42C40098UL))
\r
8691 #define bFM3_CAN0_ERRCNT_TEC7 *((volatile unsigned int*)(0x42C4009CUL))
\r
8692 #define bFM3_CAN0_ERRCNT_REC0 *((volatile unsigned int*)(0x42C400A0UL))
\r
8693 #define bFM3_CAN0_ERRCNT_REC1 *((volatile unsigned int*)(0x42C400A4UL))
\r
8694 #define bFM3_CAN0_ERRCNT_REC2 *((volatile unsigned int*)(0x42C400A8UL))
\r
8695 #define bFM3_CAN0_ERRCNT_REC3 *((volatile unsigned int*)(0x42C400ACUL))
\r
8696 #define bFM3_CAN0_ERRCNT_REC4 *((volatile unsigned int*)(0x42C400B0UL))
\r
8697 #define bFM3_CAN0_ERRCNT_REC5 *((volatile unsigned int*)(0x42C400B4UL))
\r
8698 #define bFM3_CAN0_ERRCNT_REC6 *((volatile unsigned int*)(0x42C400B8UL))
\r
8699 #define bFM3_CAN0_ERRCNT_RP *((volatile unsigned int*)(0x42C400BCUL))
\r
8700 #define bFM3_CAN0_BTR_BRP0 *((volatile unsigned int*)(0x42C400C0UL))
\r
8701 #define bFM3_CAN0_BTR_BRP1 *((volatile unsigned int*)(0x42C400C4UL))
\r
8702 #define bFM3_CAN0_BTR_BRP2 *((volatile unsigned int*)(0x42C400C8UL))
\r
8703 #define bFM3_CAN0_BTR_BRP3 *((volatile unsigned int*)(0x42C400CCUL))
\r
8704 #define bFM3_CAN0_BTR_BRP4 *((volatile unsigned int*)(0x42C400D0UL))
\r
8705 #define bFM3_CAN0_BTR_BRP5 *((volatile unsigned int*)(0x42C400D4UL))
\r
8706 #define bFM3_CAN0_BTR_SJW0 *((volatile unsigned int*)(0x42C400D8UL))
\r
8707 #define bFM3_CAN0_BTR_SJW1 *((volatile unsigned int*)(0x42C400DCUL))
\r
8708 #define bFM3_CAN0_BTR_TSEG10 *((volatile unsigned int*)(0x42C400E0UL))
\r
8709 #define bFM3_CAN0_BTR_TSEG11 *((volatile unsigned int*)(0x42C400E4UL))
\r
8710 #define bFM3_CAN0_BTR_TSEG12 *((volatile unsigned int*)(0x42C400E8UL))
\r
8711 #define bFM3_CAN0_BTR_TSEG13 *((volatile unsigned int*)(0x42C400ECUL))
\r
8712 #define bFM3_CAN0_BTR_TSEG20 *((volatile unsigned int*)(0x42C400F0UL))
\r
8713 #define bFM3_CAN0_BTR_TSEG21 *((volatile unsigned int*)(0x42C400F4UL))
\r
8714 #define bFM3_CAN0_BTR_TSEG22 *((volatile unsigned int*)(0x42C400F8UL))
\r
8715 #define bFM3_CAN0_INTR_INTID0 *((volatile unsigned int*)(0x42C40100UL))
\r
8716 #define bFM3_CAN0_INTR_INTID1 *((volatile unsigned int*)(0x42C40104UL))
\r
8717 #define bFM3_CAN0_INTR_INTID2 *((volatile unsigned int*)(0x42C40108UL))
\r
8718 #define bFM3_CAN0_INTR_INTID3 *((volatile unsigned int*)(0x42C4010CUL))
\r
8719 #define bFM3_CAN0_INTR_INTID4 *((volatile unsigned int*)(0x42C40110UL))
\r
8720 #define bFM3_CAN0_INTR_INTID5 *((volatile unsigned int*)(0x42C40114UL))
\r
8721 #define bFM3_CAN0_INTR_INTID6 *((volatile unsigned int*)(0x42C40118UL))
\r
8722 #define bFM3_CAN0_INTR_INTID7 *((volatile unsigned int*)(0x42C4011CUL))
\r
8723 #define bFM3_CAN0_INTR_INTID8 *((volatile unsigned int*)(0x42C40120UL))
\r
8724 #define bFM3_CAN0_INTR_INTID9 *((volatile unsigned int*)(0x42C40124UL))
\r
8725 #define bFM3_CAN0_INTR_INTID10 *((volatile unsigned int*)(0x42C40128UL))
\r
8726 #define bFM3_CAN0_INTR_INTID11 *((volatile unsigned int*)(0x42C4012CUL))
\r
8727 #define bFM3_CAN0_INTR_INTID12 *((volatile unsigned int*)(0x42C40130UL))
\r
8728 #define bFM3_CAN0_INTR_INTID13 *((volatile unsigned int*)(0x42C40134UL))
\r
8729 #define bFM3_CAN0_INTR_INTID14 *((volatile unsigned int*)(0x42C40138UL))
\r
8730 #define bFM3_CAN0_INTR_INTID15 *((volatile unsigned int*)(0x42C4013CUL))
\r
8731 #define bFM3_CAN0_TESTR_BASIC *((volatile unsigned int*)(0x42C40148UL))
\r
8732 #define bFM3_CAN0_TESTR_SILENT *((volatile unsigned int*)(0x42C4014CUL))
\r
8733 #define bFM3_CAN0_TESTR_LBACK *((volatile unsigned int*)(0x42C40150UL))
\r
8734 #define bFM3_CAN0_TESTR_TX0 *((volatile unsigned int*)(0x42C40154UL))
\r
8735 #define bFM3_CAN0_TESTR_TX1 *((volatile unsigned int*)(0x42C40158UL))
\r
8736 #define bFM3_CAN0_TESTR_RX *((volatile unsigned int*)(0x42C4015CUL))
\r
8737 #define bFM3_CAN0_BRPER_BRPE0 *((volatile unsigned int*)(0x42C40180UL))
\r
8738 #define bFM3_CAN0_BRPER_BRPE1 *((volatile unsigned int*)(0x42C40184UL))
\r
8739 #define bFM3_CAN0_BRPER_BRPE2 *((volatile unsigned int*)(0x42C40188UL))
\r
8740 #define bFM3_CAN0_BRPER_BRPE3 *((volatile unsigned int*)(0x42C4018CUL))
\r
8741 #define bFM3_CAN0_IF1CREQ_BUSY *((volatile unsigned int*)(0x42C4023CUL))
\r
8742 #define bFM3_CAN0_IF1CMSK_DATAB *((volatile unsigned int*)(0x42C40240UL))
\r
8743 #define bFM3_CAN0_IF1CMSK_DATAA *((volatile unsigned int*)(0x42C40244UL))
\r
8744 #define bFM3_CAN0_IF1CMSK_TXREST *((volatile unsigned int*)(0x42C40248UL))
\r
8745 #define bFM3_CAN0_IF1CMSK_NEWDAT *((volatile unsigned int*)(0x42C40248UL))
\r
8746 #define bFM3_CAN0_IF1CMSK_CIP *((volatile unsigned int*)(0x42C4024CUL))
\r
8747 #define bFM3_CAN0_IF1CMSK_CONTROL *((volatile unsigned int*)(0x42C40250UL))
\r
8748 #define bFM3_CAN0_IF1CMSK_ARB *((volatile unsigned int*)(0x42C40254UL))
\r
8749 #define bFM3_CAN0_IF1CMSK_MASK *((volatile unsigned int*)(0x42C40258UL))
\r
8750 #define bFM3_CAN0_IF1CMSK_WRRD *((volatile unsigned int*)(0x42C4025CUL))
\r
8751 #define bFM3_CAN0_IF1MSK_MDIR *((volatile unsigned int*)(0x42C402F8UL))
\r
8752 #define bFM3_CAN0_IF1MSK_MXTD *((volatile unsigned int*)(0x42C402FCUL))
\r
8753 #define bFM3_CAN0_IF1MSK2_MDIR *((volatile unsigned int*)(0x42C402F8UL))
\r
8754 #define bFM3_CAN0_IF1MSK2_MXTD *((volatile unsigned int*)(0x42C402FCUL))
\r
8755 #define bFM3_CAN0_IF1ARB_DIR *((volatile unsigned int*)(0x42C40374UL))
\r
8756 #define bFM3_CAN0_IF1ARB_XTD *((volatile unsigned int*)(0x42C40378UL))
\r
8757 #define bFM3_CAN0_IF1ARB_MSGVAL *((volatile unsigned int*)(0x42C4037CUL))
\r
8758 #define bFM3_CAN0_IF1ARB2_DIR *((volatile unsigned int*)(0x42C40374UL))
\r
8759 #define bFM3_CAN0_IF1ARB2_XTD *((volatile unsigned int*)(0x42C40378UL))
\r
8760 #define bFM3_CAN0_IF1ARB2_MSGVAL *((volatile unsigned int*)(0x42C4037CUL))
\r
8761 #define bFM3_CAN0_IF1MCTR_DLC0 *((volatile unsigned int*)(0x42C40380UL))
\r
8762 #define bFM3_CAN0_IF1MCTR_DLC1 *((volatile unsigned int*)(0x42C40384UL))
\r
8763 #define bFM3_CAN0_IF1MCTR_DLC2 *((volatile unsigned int*)(0x42C40388UL))
\r
8764 #define bFM3_CAN0_IF1MCTR_DLC3 *((volatile unsigned int*)(0x42C4038CUL))
\r
8765 #define bFM3_CAN0_IF1MCTR_EOB *((volatile unsigned int*)(0x42C4039CUL))
\r
8766 #define bFM3_CAN0_IF1MCTR_TXRQST *((volatile unsigned int*)(0x42C403A0UL))
\r
8767 #define bFM3_CAN0_IF1MCTR_RMTEN *((volatile unsigned int*)(0x42C403A4UL))
\r
8768 #define bFM3_CAN0_IF1MCTR_RXIE *((volatile unsigned int*)(0x42C403A8UL))
\r
8769 #define bFM3_CAN0_IF1MCTR_TXIE *((volatile unsigned int*)(0x42C403ACUL))
\r
8770 #define bFM3_CAN0_IF1MCTR_UMASK *((volatile unsigned int*)(0x42C403B0UL))
\r
8771 #define bFM3_CAN0_IF1MCTR_INTPND *((volatile unsigned int*)(0x42C403B4UL))
\r
8772 #define bFM3_CAN0_IF1MCTR_MSGLST *((volatile unsigned int*)(0x42C403B8UL))
\r
8773 #define bFM3_CAN0_IF1MCTR_NEWDAT *((volatile unsigned int*)(0x42C403BCUL))
\r
8774 #define bFM3_CAN0_IF2CREQ_BUSY *((volatile unsigned int*)(0x42C4083CUL))
\r
8775 #define bFM3_CAN0_IF2CMSK_DATAB *((volatile unsigned int*)(0x42C40840UL))
\r
8776 #define bFM3_CAN0_IF2CMSK_DATAA *((volatile unsigned int*)(0x42C40844UL))
\r
8777 #define bFM3_CAN0_IF2CMSK_TXREST *((volatile unsigned int*)(0x42C40848UL))
\r
8778 #define bFM3_CAN0_IF2CMSK_NEWDAT *((volatile unsigned int*)(0x42C40848UL))
\r
8779 #define bFM3_CAN0_IF2CMSK_CIP *((volatile unsigned int*)(0x42C4084CUL))
\r
8780 #define bFM3_CAN0_IF2CMSK_CONTROL *((volatile unsigned int*)(0x42C40850UL))
\r
8781 #define bFM3_CAN0_IF2CMSK_ARB *((volatile unsigned int*)(0x42C40854UL))
\r
8782 #define bFM3_CAN0_IF2CMSK_MASK *((volatile unsigned int*)(0x42C40858UL))
\r
8783 #define bFM3_CAN0_IF2CMSK_WRRD *((volatile unsigned int*)(0x42C4085CUL))
\r
8784 #define bFM3_CAN0_IF2MSK_MDIR *((volatile unsigned int*)(0x42C408F8UL))
\r
8785 #define bFM3_CAN0_IF2MSK_MXTD *((volatile unsigned int*)(0x42C408FCUL))
\r
8786 #define bFM3_CAN0_IF2MSK2_MDIR *((volatile unsigned int*)(0x42C408F8UL))
\r
8787 #define bFM3_CAN0_IF2MSK2_MXTD *((volatile unsigned int*)(0x42C408FCUL))
\r
8788 #define bFM3_CAN0_IF2ARB_DIR *((volatile unsigned int*)(0x42C40974UL))
\r
8789 #define bFM3_CAN0_IF2ARB_XTD *((volatile unsigned int*)(0x42C40978UL))
\r
8790 #define bFM3_CAN0_IF2ARB_MSGVAL *((volatile unsigned int*)(0x42C4097CUL))
\r
8791 #define bFM3_CAN0_IF2ARB2_DIR *((volatile unsigned int*)(0x42C40974UL))
\r
8792 #define bFM3_CAN0_IF2ARB2_XTD *((volatile unsigned int*)(0x42C40978UL))
\r
8793 #define bFM3_CAN0_IF2ARB2_MSGVAL *((volatile unsigned int*)(0x42C4097CUL))
\r
8794 #define bFM3_CAN0_IF2MCTR_DLC0 *((volatile unsigned int*)(0x42C40980UL))
\r
8795 #define bFM3_CAN0_IF2MCTR_DLC1 *((volatile unsigned int*)(0x42C40984UL))
\r
8796 #define bFM3_CAN0_IF2MCTR_DLC2 *((volatile unsigned int*)(0x42C40988UL))
\r
8797 #define bFM3_CAN0_IF2MCTR_DLC3 *((volatile unsigned int*)(0x42C4098CUL))
\r
8798 #define bFM3_CAN0_IF2MCTR_EOB *((volatile unsigned int*)(0x42C4099CUL))
\r
8799 #define bFM3_CAN0_IF2MCTR_TXRQST *((volatile unsigned int*)(0x42C409A0UL))
\r
8800 #define bFM3_CAN0_IF2MCTR_RMTEN *((volatile unsigned int*)(0x42C409A4UL))
\r
8801 #define bFM3_CAN0_IF2MCTR_RXIE *((volatile unsigned int*)(0x42C409A8UL))
\r
8802 #define bFM3_CAN0_IF2MCTR_TXIE *((volatile unsigned int*)(0x42C409ACUL))
\r
8803 #define bFM3_CAN0_IF2MCTR_UMASK *((volatile unsigned int*)(0x42C409B0UL))
\r
8804 #define bFM3_CAN0_IF2MCTR_INTPND *((volatile unsigned int*)(0x42C409B4UL))
\r
8805 #define bFM3_CAN0_IF2MCTR_MSGLST *((volatile unsigned int*)(0x42C409B8UL))
\r
8806 #define bFM3_CAN0_IF2MCTR_NEWDAT *((volatile unsigned int*)(0x42C409BCUL))
\r
8807 #define bFM3_CAN0_TREQR_TXRQST1 *((volatile unsigned int*)(0x42C41000UL))
\r
8808 #define bFM3_CAN0_TREQR_TXRQST2 *((volatile unsigned int*)(0x42C41004UL))
\r
8809 #define bFM3_CAN0_TREQR_TXRQST3 *((volatile unsigned int*)(0x42C41008UL))
\r
8810 #define bFM3_CAN0_TREQR_TXRQST4 *((volatile unsigned int*)(0x42C4100CUL))
\r
8811 #define bFM3_CAN0_TREQR_TXRQST5 *((volatile unsigned int*)(0x42C41010UL))
\r
8812 #define bFM3_CAN0_TREQR_TXRQST6 *((volatile unsigned int*)(0x42C41014UL))
\r
8813 #define bFM3_CAN0_TREQR_TXRQST7 *((volatile unsigned int*)(0x42C41018UL))
\r
8814 #define bFM3_CAN0_TREQR_TXRQST8 *((volatile unsigned int*)(0x42C4101CUL))
\r
8815 #define bFM3_CAN0_TREQR_TXRQST9 *((volatile unsigned int*)(0x42C41020UL))
\r
8816 #define bFM3_CAN0_TREQR_TXRQST10 *((volatile unsigned int*)(0x42C41024UL))
\r
8817 #define bFM3_CAN0_TREQR_TXRQST11 *((volatile unsigned int*)(0x42C41028UL))
\r
8818 #define bFM3_CAN0_TREQR_TXRQST12 *((volatile unsigned int*)(0x42C4102CUL))
\r
8819 #define bFM3_CAN0_TREQR_TXRQST13 *((volatile unsigned int*)(0x42C41030UL))
\r
8820 #define bFM3_CAN0_TREQR_TXRQST14 *((volatile unsigned int*)(0x42C41034UL))
\r
8821 #define bFM3_CAN0_TREQR_TXRQST15 *((volatile unsigned int*)(0x42C41038UL))
\r
8822 #define bFM3_CAN0_TREQR_TXRQST16 *((volatile unsigned int*)(0x42C4103CUL))
\r
8823 #define bFM3_CAN0_TREQR_TXRQST17 *((volatile unsigned int*)(0x42C41040UL))
\r
8824 #define bFM3_CAN0_TREQR_TXRQST18 *((volatile unsigned int*)(0x42C41044UL))
\r
8825 #define bFM3_CAN0_TREQR_TXRQST19 *((volatile unsigned int*)(0x42C41048UL))
\r
8826 #define bFM3_CAN0_TREQR_TXRQST20 *((volatile unsigned int*)(0x42C4104CUL))
\r
8827 #define bFM3_CAN0_TREQR_TXRQST21 *((volatile unsigned int*)(0x42C41050UL))
\r
8828 #define bFM3_CAN0_TREQR_TXRQST22 *((volatile unsigned int*)(0x42C41054UL))
\r
8829 #define bFM3_CAN0_TREQR_TXRQST23 *((volatile unsigned int*)(0x42C41058UL))
\r
8830 #define bFM3_CAN0_TREQR_TXRQST24 *((volatile unsigned int*)(0x42C4105CUL))
\r
8831 #define bFM3_CAN0_TREQR_TXRQST25 *((volatile unsigned int*)(0x42C41060UL))
\r
8832 #define bFM3_CAN0_TREQR_TXRQST26 *((volatile unsigned int*)(0x42C41064UL))
\r
8833 #define bFM3_CAN0_TREQR_TXRQST27 *((volatile unsigned int*)(0x42C41068UL))
\r
8834 #define bFM3_CAN0_TREQR_TXRQST28 *((volatile unsigned int*)(0x42C4106CUL))
\r
8835 #define bFM3_CAN0_TREQR_TXRQST29 *((volatile unsigned int*)(0x42C41070UL))
\r
8836 #define bFM3_CAN0_TREQR_TXRQST30 *((volatile unsigned int*)(0x42C41074UL))
\r
8837 #define bFM3_CAN0_TREQR_TXRQST31 *((volatile unsigned int*)(0x42C41078UL))
\r
8838 #define bFM3_CAN0_TREQR_TXRQST32 *((volatile unsigned int*)(0x42C4107CUL))
\r
8839 #define bFM3_CAN0_TREQR1_TXRQST1 *((volatile unsigned int*)(0x42C41000UL))
\r
8840 #define bFM3_CAN0_TREQR1_TXRQST2 *((volatile unsigned int*)(0x42C41004UL))
\r
8841 #define bFM3_CAN0_TREQR1_TXRQST3 *((volatile unsigned int*)(0x42C41008UL))
\r
8842 #define bFM3_CAN0_TREQR1_TXRQST4 *((volatile unsigned int*)(0x42C4100CUL))
\r
8843 #define bFM3_CAN0_TREQR1_TXRQST5 *((volatile unsigned int*)(0x42C41010UL))
\r
8844 #define bFM3_CAN0_TREQR1_TXRQST6 *((volatile unsigned int*)(0x42C41014UL))
\r
8845 #define bFM3_CAN0_TREQR1_TXRQST7 *((volatile unsigned int*)(0x42C41018UL))
\r
8846 #define bFM3_CAN0_TREQR1_TXRQST8 *((volatile unsigned int*)(0x42C4101CUL))
\r
8847 #define bFM3_CAN0_TREQR1_TXRQST9 *((volatile unsigned int*)(0x42C41020UL))
\r
8848 #define bFM3_CAN0_TREQR1_TXRQST10 *((volatile unsigned int*)(0x42C41024UL))
\r
8849 #define bFM3_CAN0_TREQR1_TXRQST11 *((volatile unsigned int*)(0x42C41028UL))
\r
8850 #define bFM3_CAN0_TREQR1_TXRQST12 *((volatile unsigned int*)(0x42C4102CUL))
\r
8851 #define bFM3_CAN0_TREQR1_TXRQST13 *((volatile unsigned int*)(0x42C41030UL))
\r
8852 #define bFM3_CAN0_TREQR1_TXRQST14 *((volatile unsigned int*)(0x42C41034UL))
\r
8853 #define bFM3_CAN0_TREQR1_TXRQST15 *((volatile unsigned int*)(0x42C41038UL))
\r
8854 #define bFM3_CAN0_TREQR1_TXRQST16 *((volatile unsigned int*)(0x42C4103CUL))
\r
8855 #define bFM3_CAN0_TREQR2_TXRQST17 *((volatile unsigned int*)(0x42C41040UL))
\r
8856 #define bFM3_CAN0_TREQR2_TXRQST18 *((volatile unsigned int*)(0x42C41044UL))
\r
8857 #define bFM3_CAN0_TREQR2_TXRQST19 *((volatile unsigned int*)(0x42C41048UL))
\r
8858 #define bFM3_CAN0_TREQR2_TXRQST20 *((volatile unsigned int*)(0x42C4104CUL))
\r
8859 #define bFM3_CAN0_TREQR2_TXRQST21 *((volatile unsigned int*)(0x42C41050UL))
\r
8860 #define bFM3_CAN0_TREQR2_TXRQST22 *((volatile unsigned int*)(0x42C41054UL))
\r
8861 #define bFM3_CAN0_TREQR2_TXRQST23 *((volatile unsigned int*)(0x42C41058UL))
\r
8862 #define bFM3_CAN0_TREQR2_TXRQST24 *((volatile unsigned int*)(0x42C4105CUL))
\r
8863 #define bFM3_CAN0_TREQR2_TXRQST25 *((volatile unsigned int*)(0x42C41060UL))
\r
8864 #define bFM3_CAN0_TREQR2_TXRQST26 *((volatile unsigned int*)(0x42C41064UL))
\r
8865 #define bFM3_CAN0_TREQR2_TXRQST27 *((volatile unsigned int*)(0x42C41068UL))
\r
8866 #define bFM3_CAN0_TREQR2_TXRQST28 *((volatile unsigned int*)(0x42C4106CUL))
\r
8867 #define bFM3_CAN0_TREQR2_TXRQST29 *((volatile unsigned int*)(0x42C41070UL))
\r
8868 #define bFM3_CAN0_TREQR2_TXRQST30 *((volatile unsigned int*)(0x42C41074UL))
\r
8869 #define bFM3_CAN0_TREQR2_TXRQST31 *((volatile unsigned int*)(0x42C41078UL))
\r
8870 #define bFM3_CAN0_TREQR2_TXRQST32 *((volatile unsigned int*)(0x42C4107CUL))
\r
8871 #define bFM3_CAN0_NEWDT_NEWDAT1 *((volatile unsigned int*)(0x42C41200UL))
\r
8872 #define bFM3_CAN0_NEWDT_NEWDAT2 *((volatile unsigned int*)(0x42C41204UL))
\r
8873 #define bFM3_CAN0_NEWDT_NEWDAT3 *((volatile unsigned int*)(0x42C41208UL))
\r
8874 #define bFM3_CAN0_NEWDT_NEWDAT4 *((volatile unsigned int*)(0x42C4120CUL))
\r
8875 #define bFM3_CAN0_NEWDT_NEWDAT5 *((volatile unsigned int*)(0x42C41210UL))
\r
8876 #define bFM3_CAN0_NEWDT_NEWDAT6 *((volatile unsigned int*)(0x42C41214UL))
\r
8877 #define bFM3_CAN0_NEWDT_NEWDAT7 *((volatile unsigned int*)(0x42C41218UL))
\r
8878 #define bFM3_CAN0_NEWDT_NEWDAT8 *((volatile unsigned int*)(0x42C4121CUL))
\r
8879 #define bFM3_CAN0_NEWDT_NEWDAT9 *((volatile unsigned int*)(0x42C41220UL))
\r
8880 #define bFM3_CAN0_NEWDT_NEWDAT10 *((volatile unsigned int*)(0x42C41224UL))
\r
8881 #define bFM3_CAN0_NEWDT_NEWDAT11 *((volatile unsigned int*)(0x42C41228UL))
\r
8882 #define bFM3_CAN0_NEWDT_NEWDAT12 *((volatile unsigned int*)(0x42C4122CUL))
\r
8883 #define bFM3_CAN0_NEWDT_NEWDAT13 *((volatile unsigned int*)(0x42C41230UL))
\r
8884 #define bFM3_CAN0_NEWDT_NEWDAT14 *((volatile unsigned int*)(0x42C41234UL))
\r
8885 #define bFM3_CAN0_NEWDT_NEWDAT15 *((volatile unsigned int*)(0x42C41238UL))
\r
8886 #define bFM3_CAN0_NEWDT_NEWDAT16 *((volatile unsigned int*)(0x42C4123CUL))
\r
8887 #define bFM3_CAN0_NEWDT_NEWDAT17 *((volatile unsigned int*)(0x42C41240UL))
\r
8888 #define bFM3_CAN0_NEWDT_NEWDAT18 *((volatile unsigned int*)(0x42C41244UL))
\r
8889 #define bFM3_CAN0_NEWDT_NEWDAT19 *((volatile unsigned int*)(0x42C41248UL))
\r
8890 #define bFM3_CAN0_NEWDT_NEWDAT20 *((volatile unsigned int*)(0x42C4124CUL))
\r
8891 #define bFM3_CAN0_NEWDT_NEWDAT21 *((volatile unsigned int*)(0x42C41250UL))
\r
8892 #define bFM3_CAN0_NEWDT_NEWDAT22 *((volatile unsigned int*)(0x42C41254UL))
\r
8893 #define bFM3_CAN0_NEWDT_NEWDAT23 *((volatile unsigned int*)(0x42C41258UL))
\r
8894 #define bFM3_CAN0_NEWDT_NEWDAT24 *((volatile unsigned int*)(0x42C4125CUL))
\r
8895 #define bFM3_CAN0_NEWDT_NEWDAT25 *((volatile unsigned int*)(0x42C41260UL))
\r
8896 #define bFM3_CAN0_NEWDT_NEWDAT26 *((volatile unsigned int*)(0x42C41264UL))
\r
8897 #define bFM3_CAN0_NEWDT_NEWDAT27 *((volatile unsigned int*)(0x42C41268UL))
\r
8898 #define bFM3_CAN0_NEWDT_NEWDAT28 *((volatile unsigned int*)(0x42C4126CUL))
\r
8899 #define bFM3_CAN0_NEWDT_NEWDAT29 *((volatile unsigned int*)(0x42C41270UL))
\r
8900 #define bFM3_CAN0_NEWDT_NEWDAT30 *((volatile unsigned int*)(0x42C41274UL))
\r
8901 #define bFM3_CAN0_NEWDT_NEWDAT31 *((volatile unsigned int*)(0x42C41278UL))
\r
8902 #define bFM3_CAN0_NEWDT_NEWDAT32 *((volatile unsigned int*)(0x42C4127CUL))
\r
8903 #define bFM3_CAN0_NEWDT1_NEWDAT1 *((volatile unsigned int*)(0x42C41200UL))
\r
8904 #define bFM3_CAN0_NEWDT1_NEWDAT2 *((volatile unsigned int*)(0x42C41204UL))
\r
8905 #define bFM3_CAN0_NEWDT1_NEWDAT3 *((volatile unsigned int*)(0x42C41208UL))
\r
8906 #define bFM3_CAN0_NEWDT1_NEWDAT4 *((volatile unsigned int*)(0x42C4120CUL))
\r
8907 #define bFM3_CAN0_NEWDT1_NEWDAT5 *((volatile unsigned int*)(0x42C41210UL))
\r
8908 #define bFM3_CAN0_NEWDT1_NEWDAT6 *((volatile unsigned int*)(0x42C41214UL))
\r
8909 #define bFM3_CAN0_NEWDT1_NEWDAT7 *((volatile unsigned int*)(0x42C41218UL))
\r
8910 #define bFM3_CAN0_NEWDT1_NEWDAT8 *((volatile unsigned int*)(0x42C4121CUL))
\r
8911 #define bFM3_CAN0_NEWDT1_NEWDAT9 *((volatile unsigned int*)(0x42C41220UL))
\r
8912 #define bFM3_CAN0_NEWDT1_NEWDAT10 *((volatile unsigned int*)(0x42C41224UL))
\r
8913 #define bFM3_CAN0_NEWDT1_NEWDAT11 *((volatile unsigned int*)(0x42C41228UL))
\r
8914 #define bFM3_CAN0_NEWDT1_NEWDAT12 *((volatile unsigned int*)(0x42C4122CUL))
\r
8915 #define bFM3_CAN0_NEWDT1_NEWDAT13 *((volatile unsigned int*)(0x42C41230UL))
\r
8916 #define bFM3_CAN0_NEWDT1_NEWDAT14 *((volatile unsigned int*)(0x42C41234UL))
\r
8917 #define bFM3_CAN0_NEWDT1_NEWDAT15 *((volatile unsigned int*)(0x42C41238UL))
\r
8918 #define bFM3_CAN0_NEWDT1_NEWDAT16 *((volatile unsigned int*)(0x42C4123CUL))
\r
8919 #define bFM3_CAN0_NEWDT2_NEWDAT17 *((volatile unsigned int*)(0x42C41240UL))
\r
8920 #define bFM3_CAN0_NEWDT2_NEWDAT18 *((volatile unsigned int*)(0x42C41244UL))
\r
8921 #define bFM3_CAN0_NEWDT2_NEWDAT19 *((volatile unsigned int*)(0x42C41248UL))
\r
8922 #define bFM3_CAN0_NEWDT2_NEWDAT20 *((volatile unsigned int*)(0x42C4124CUL))
\r
8923 #define bFM3_CAN0_NEWDT2_NEWDAT21 *((volatile unsigned int*)(0x42C41250UL))
\r
8924 #define bFM3_CAN0_NEWDT2_NEWDAT22 *((volatile unsigned int*)(0x42C41254UL))
\r
8925 #define bFM3_CAN0_NEWDT2_NEWDAT23 *((volatile unsigned int*)(0x42C41258UL))
\r
8926 #define bFM3_CAN0_NEWDT2_NEWDAT24 *((volatile unsigned int*)(0x42C4125CUL))
\r
8927 #define bFM3_CAN0_NEWDT2_NEWDAT25 *((volatile unsigned int*)(0x42C41260UL))
\r
8928 #define bFM3_CAN0_NEWDT2_NEWDAT26 *((volatile unsigned int*)(0x42C41264UL))
\r
8929 #define bFM3_CAN0_NEWDT2_NEWDAT27 *((volatile unsigned int*)(0x42C41268UL))
\r
8930 #define bFM3_CAN0_NEWDT2_NEWDAT28 *((volatile unsigned int*)(0x42C4126CUL))
\r
8931 #define bFM3_CAN0_NEWDT2_NEWDAT29 *((volatile unsigned int*)(0x42C41270UL))
\r
8932 #define bFM3_CAN0_NEWDT2_NEWDAT30 *((volatile unsigned int*)(0x42C41274UL))
\r
8933 #define bFM3_CAN0_NEWDT2_NEWDAT31 *((volatile unsigned int*)(0x42C41278UL))
\r
8934 #define bFM3_CAN0_NEWDT2_NEWDAT32 *((volatile unsigned int*)(0x42C4127CUL))
\r
8935 #define bFM3_CAN0_INTPND_INTPND1 *((volatile unsigned int*)(0x42C41400UL))
\r
8936 #define bFM3_CAN0_INTPND_INTPND2 *((volatile unsigned int*)(0x42C41404UL))
\r
8937 #define bFM3_CAN0_INTPND_INTPND3 *((volatile unsigned int*)(0x42C41408UL))
\r
8938 #define bFM3_CAN0_INTPND_INTPND4 *((volatile unsigned int*)(0x42C4140CUL))
\r
8939 #define bFM3_CAN0_INTPND_INTPND5 *((volatile unsigned int*)(0x42C41410UL))
\r
8940 #define bFM3_CAN0_INTPND_INTPND6 *((volatile unsigned int*)(0x42C41414UL))
\r
8941 #define bFM3_CAN0_INTPND_INTPND7 *((volatile unsigned int*)(0x42C41418UL))
\r
8942 #define bFM3_CAN0_INTPND_INTPND8 *((volatile unsigned int*)(0x42C4141CUL))
\r
8943 #define bFM3_CAN0_INTPND_INTPND9 *((volatile unsigned int*)(0x42C41420UL))
\r
8944 #define bFM3_CAN0_INTPND_INTPND10 *((volatile unsigned int*)(0x42C41424UL))
\r
8945 #define bFM3_CAN0_INTPND_INTPND11 *((volatile unsigned int*)(0x42C41428UL))
\r
8946 #define bFM3_CAN0_INTPND_INTPND12 *((volatile unsigned int*)(0x42C4142CUL))
\r
8947 #define bFM3_CAN0_INTPND_INTPND13 *((volatile unsigned int*)(0x42C41430UL))
\r
8948 #define bFM3_CAN0_INTPND_INTPND14 *((volatile unsigned int*)(0x42C41434UL))
\r
8949 #define bFM3_CAN0_INTPND_INTPND15 *((volatile unsigned int*)(0x42C41438UL))
\r
8950 #define bFM3_CAN0_INTPND_INTPND16 *((volatile unsigned int*)(0x42C4143CUL))
\r
8951 #define bFM3_CAN0_INTPND_INTPND17 *((volatile unsigned int*)(0x42C41440UL))
\r
8952 #define bFM3_CAN0_INTPND_INTPND18 *((volatile unsigned int*)(0x42C41444UL))
\r
8953 #define bFM3_CAN0_INTPND_INTPND19 *((volatile unsigned int*)(0x42C41448UL))
\r
8954 #define bFM3_CAN0_INTPND_INTPND20 *((volatile unsigned int*)(0x42C4144CUL))
\r
8955 #define bFM3_CAN0_INTPND_INTPND21 *((volatile unsigned int*)(0x42C41450UL))
\r
8956 #define bFM3_CAN0_INTPND_INTPND22 *((volatile unsigned int*)(0x42C41454UL))
\r
8957 #define bFM3_CAN0_INTPND_INTPND23 *((volatile unsigned int*)(0x42C41458UL))
\r
8958 #define bFM3_CAN0_INTPND_INTPND24 *((volatile unsigned int*)(0x42C4145CUL))
\r
8959 #define bFM3_CAN0_INTPND_INTPND25 *((volatile unsigned int*)(0x42C41460UL))
\r
8960 #define bFM3_CAN0_INTPND_INTPND26 *((volatile unsigned int*)(0x42C41464UL))
\r
8961 #define bFM3_CAN0_INTPND_INTPND27 *((volatile unsigned int*)(0x42C41468UL))
\r
8962 #define bFM3_CAN0_INTPND_INTPND28 *((volatile unsigned int*)(0x42C4146CUL))
\r
8963 #define bFM3_CAN0_INTPND_INTPND29 *((volatile unsigned int*)(0x42C41470UL))
\r
8964 #define bFM3_CAN0_INTPND_INTPND30 *((volatile unsigned int*)(0x42C41474UL))
\r
8965 #define bFM3_CAN0_INTPND_INTPND31 *((volatile unsigned int*)(0x42C41478UL))
\r
8966 #define bFM3_CAN0_INTPND_INTPND32 *((volatile unsigned int*)(0x42C4147CUL))
\r
8967 #define bFM3_CAN0_INTPND1_INTPND1 *((volatile unsigned int*)(0x42C41400UL))
\r
8968 #define bFM3_CAN0_INTPND1_INTPND2 *((volatile unsigned int*)(0x42C41404UL))
\r
8969 #define bFM3_CAN0_INTPND1_INTPND3 *((volatile unsigned int*)(0x42C41408UL))
\r
8970 #define bFM3_CAN0_INTPND1_INTPND4 *((volatile unsigned int*)(0x42C4140CUL))
\r
8971 #define bFM3_CAN0_INTPND1_INTPND5 *((volatile unsigned int*)(0x42C41410UL))
\r
8972 #define bFM3_CAN0_INTPND1_INTPND6 *((volatile unsigned int*)(0x42C41414UL))
\r
8973 #define bFM3_CAN0_INTPND1_INTPND7 *((volatile unsigned int*)(0x42C41418UL))
\r
8974 #define bFM3_CAN0_INTPND1_INTPND8 *((volatile unsigned int*)(0x42C4141CUL))
\r
8975 #define bFM3_CAN0_INTPND1_INTPND9 *((volatile unsigned int*)(0x42C41420UL))
\r
8976 #define bFM3_CAN0_INTPND1_INTPND10 *((volatile unsigned int*)(0x42C41424UL))
\r
8977 #define bFM3_CAN0_INTPND1_INTPND11 *((volatile unsigned int*)(0x42C41428UL))
\r
8978 #define bFM3_CAN0_INTPND1_INTPND12 *((volatile unsigned int*)(0x42C4142CUL))
\r
8979 #define bFM3_CAN0_INTPND1_INTPND13 *((volatile unsigned int*)(0x42C41430UL))
\r
8980 #define bFM3_CAN0_INTPND1_INTPND14 *((volatile unsigned int*)(0x42C41434UL))
\r
8981 #define bFM3_CAN0_INTPND1_INTPND15 *((volatile unsigned int*)(0x42C41438UL))
\r
8982 #define bFM3_CAN0_INTPND1_INTPND16 *((volatile unsigned int*)(0x42C4143CUL))
\r
8983 #define bFM3_CAN0_INTPND2_INTPND17 *((volatile unsigned int*)(0x42C41440UL))
\r
8984 #define bFM3_CAN0_INTPND2_INTPND18 *((volatile unsigned int*)(0x42C41444UL))
\r
8985 #define bFM3_CAN0_INTPND2_INTPND19 *((volatile unsigned int*)(0x42C41448UL))
\r
8986 #define bFM3_CAN0_INTPND2_INTPND20 *((volatile unsigned int*)(0x42C4144CUL))
\r
8987 #define bFM3_CAN0_INTPND2_INTPND21 *((volatile unsigned int*)(0x42C41450UL))
\r
8988 #define bFM3_CAN0_INTPND2_INTPND22 *((volatile unsigned int*)(0x42C41454UL))
\r
8989 #define bFM3_CAN0_INTPND2_INTPND23 *((volatile unsigned int*)(0x42C41458UL))
\r
8990 #define bFM3_CAN0_INTPND2_INTPND24 *((volatile unsigned int*)(0x42C4145CUL))
\r
8991 #define bFM3_CAN0_INTPND2_INTPND25 *((volatile unsigned int*)(0x42C41460UL))
\r
8992 #define bFM3_CAN0_INTPND2_INTPND26 *((volatile unsigned int*)(0x42C41464UL))
\r
8993 #define bFM3_CAN0_INTPND2_INTPND27 *((volatile unsigned int*)(0x42C41468UL))
\r
8994 #define bFM3_CAN0_INTPND2_INTPND28 *((volatile unsigned int*)(0x42C4146CUL))
\r
8995 #define bFM3_CAN0_INTPND2_INTPND29 *((volatile unsigned int*)(0x42C41470UL))
\r
8996 #define bFM3_CAN0_INTPND2_INTPND30 *((volatile unsigned int*)(0x42C41474UL))
\r
8997 #define bFM3_CAN0_INTPND2_INTPND31 *((volatile unsigned int*)(0x42C41478UL))
\r
8998 #define bFM3_CAN0_INTPND2_INTPND32 *((volatile unsigned int*)(0x42C4147CUL))
\r
8999 #define bFM3_CAN0_MSGVAL_MSGVAL1 *((volatile unsigned int*)(0x42C41600UL))
\r
9000 #define bFM3_CAN0_MSGVAL_MSGVAL2 *((volatile unsigned int*)(0x42C41604UL))
\r
9001 #define bFM3_CAN0_MSGVAL_MSGVAL3 *((volatile unsigned int*)(0x42C41608UL))
\r
9002 #define bFM3_CAN0_MSGVAL_MSGVAL4 *((volatile unsigned int*)(0x42C4160CUL))
\r
9003 #define bFM3_CAN0_MSGVAL_MSGVAL5 *((volatile unsigned int*)(0x42C41610UL))
\r
9004 #define bFM3_CAN0_MSGVAL_MSGVAL6 *((volatile unsigned int*)(0x42C41614UL))
\r
9005 #define bFM3_CAN0_MSGVAL_MSGVAL7 *((volatile unsigned int*)(0x42C41618UL))
\r
9006 #define bFM3_CAN0_MSGVAL_MSGVAL8 *((volatile unsigned int*)(0x42C4161CUL))
\r
9007 #define bFM3_CAN0_MSGVAL_MSGVAL9 *((volatile unsigned int*)(0x42C41620UL))
\r
9008 #define bFM3_CAN0_MSGVAL_MSGVAL10 *((volatile unsigned int*)(0x42C41624UL))
\r
9009 #define bFM3_CAN0_MSGVAL_MSGVAL11 *((volatile unsigned int*)(0x42C41628UL))
\r
9010 #define bFM3_CAN0_MSGVAL_MSGVAL12 *((volatile unsigned int*)(0x42C4162CUL))
\r
9011 #define bFM3_CAN0_MSGVAL_MSGVAL13 *((volatile unsigned int*)(0x42C41630UL))
\r
9012 #define bFM3_CAN0_MSGVAL_MSGVAL14 *((volatile unsigned int*)(0x42C41634UL))
\r
9013 #define bFM3_CAN0_MSGVAL_MSGVAL15 *((volatile unsigned int*)(0x42C41638UL))
\r
9014 #define bFM3_CAN0_MSGVAL_MSGVAL16 *((volatile unsigned int*)(0x42C4163CUL))
\r
9015 #define bFM3_CAN0_MSGVAL_MSGVAL17 *((volatile unsigned int*)(0x42C41640UL))
\r
9016 #define bFM3_CAN0_MSGVAL_MSGVAL18 *((volatile unsigned int*)(0x42C41644UL))
\r
9017 #define bFM3_CAN0_MSGVAL_MSGVAL19 *((volatile unsigned int*)(0x42C41648UL))
\r
9018 #define bFM3_CAN0_MSGVAL_MSGVAL20 *((volatile unsigned int*)(0x42C4164CUL))
\r
9019 #define bFM3_CAN0_MSGVAL_MSGVAL21 *((volatile unsigned int*)(0x42C41650UL))
\r
9020 #define bFM3_CAN0_MSGVAL_MSGVAL22 *((volatile unsigned int*)(0x42C41654UL))
\r
9021 #define bFM3_CAN0_MSGVAL_MSGVAL23 *((volatile unsigned int*)(0x42C41658UL))
\r
9022 #define bFM3_CAN0_MSGVAL_MSGVAL24 *((volatile unsigned int*)(0x42C4165CUL))
\r
9023 #define bFM3_CAN0_MSGVAL_MSGVAL25 *((volatile unsigned int*)(0x42C41660UL))
\r
9024 #define bFM3_CAN0_MSGVAL_MSGVAL26 *((volatile unsigned int*)(0x42C41664UL))
\r
9025 #define bFM3_CAN0_MSGVAL_MSGVAL27 *((volatile unsigned int*)(0x42C41668UL))
\r
9026 #define bFM3_CAN0_MSGVAL_MSGVAL28 *((volatile unsigned int*)(0x42C4166CUL))
\r
9027 #define bFM3_CAN0_MSGVAL_MSGVAL29 *((volatile unsigned int*)(0x42C41670UL))
\r
9028 #define bFM3_CAN0_MSGVAL_MSGVAL30 *((volatile unsigned int*)(0x42C41674UL))
\r
9029 #define bFM3_CAN0_MSGVAL_MSGVAL31 *((volatile unsigned int*)(0x42C41678UL))
\r
9030 #define bFM3_CAN0_MSGVAL_MSGVAL32 *((volatile unsigned int*)(0x42C4167CUL))
\r
9031 #define bFM3_CAN0_MSGVAL1_MSGVAL1 *((volatile unsigned int*)(0x42C41600UL))
\r
9032 #define bFM3_CAN0_MSGVAL1_MSGVAL2 *((volatile unsigned int*)(0x42C41604UL))
\r
9033 #define bFM3_CAN0_MSGVAL1_MSGVAL3 *((volatile unsigned int*)(0x42C41608UL))
\r
9034 #define bFM3_CAN0_MSGVAL1_MSGVAL4 *((volatile unsigned int*)(0x42C4160CUL))
\r
9035 #define bFM3_CAN0_MSGVAL1_MSGVAL5 *((volatile unsigned int*)(0x42C41610UL))
\r
9036 #define bFM3_CAN0_MSGVAL1_MSGVAL6 *((volatile unsigned int*)(0x42C41614UL))
\r
9037 #define bFM3_CAN0_MSGVAL1_MSGVAL7 *((volatile unsigned int*)(0x42C41618UL))
\r
9038 #define bFM3_CAN0_MSGVAL1_MSGVAL8 *((volatile unsigned int*)(0x42C4161CUL))
\r
9039 #define bFM3_CAN0_MSGVAL1_MSGVAL9 *((volatile unsigned int*)(0x42C41620UL))
\r
9040 #define bFM3_CAN0_MSGVAL1_MSGVAL10 *((volatile unsigned int*)(0x42C41624UL))
\r
9041 #define bFM3_CAN0_MSGVAL1_MSGVAL11 *((volatile unsigned int*)(0x42C41628UL))
\r
9042 #define bFM3_CAN0_MSGVAL1_MSGVAL12 *((volatile unsigned int*)(0x42C4162CUL))
\r
9043 #define bFM3_CAN0_MSGVAL1_MSGVAL13 *((volatile unsigned int*)(0x42C41630UL))
\r
9044 #define bFM3_CAN0_MSGVAL1_MSGVAL14 *((volatile unsigned int*)(0x42C41634UL))
\r
9045 #define bFM3_CAN0_MSGVAL1_MSGVAL15 *((volatile unsigned int*)(0x42C41638UL))
\r
9046 #define bFM3_CAN0_MSGVAL1_MSGVAL16 *((volatile unsigned int*)(0x42C4163CUL))
\r
9047 #define bFM3_CAN0_MSGVAL2_MSGVAL17 *((volatile unsigned int*)(0x42C41640UL))
\r
9048 #define bFM3_CAN0_MSGVAL2_MSGVAL18 *((volatile unsigned int*)(0x42C41644UL))
\r
9049 #define bFM3_CAN0_MSGVAL2_MSGVAL19 *((volatile unsigned int*)(0x42C41648UL))
\r
9050 #define bFM3_CAN0_MSGVAL2_MSGVAL20 *((volatile unsigned int*)(0x42C4164CUL))
\r
9051 #define bFM3_CAN0_MSGVAL2_MSGVAL21 *((volatile unsigned int*)(0x42C41650UL))
\r
9052 #define bFM3_CAN0_MSGVAL2_MSGVAL22 *((volatile unsigned int*)(0x42C41654UL))
\r
9053 #define bFM3_CAN0_MSGVAL2_MSGVAL23 *((volatile unsigned int*)(0x42C41658UL))
\r
9054 #define bFM3_CAN0_MSGVAL2_MSGVAL24 *((volatile unsigned int*)(0x42C4165CUL))
\r
9055 #define bFM3_CAN0_MSGVAL2_MSGVAL25 *((volatile unsigned int*)(0x42C41660UL))
\r
9056 #define bFM3_CAN0_MSGVAL2_MSGVAL26 *((volatile unsigned int*)(0x42C41664UL))
\r
9057 #define bFM3_CAN0_MSGVAL2_MSGVAL27 *((volatile unsigned int*)(0x42C41668UL))
\r
9058 #define bFM3_CAN0_MSGVAL2_MSGVAL28 *((volatile unsigned int*)(0x42C4166CUL))
\r
9059 #define bFM3_CAN0_MSGVAL2_MSGVAL29 *((volatile unsigned int*)(0x42C41670UL))
\r
9060 #define bFM3_CAN0_MSGVAL2_MSGVAL30 *((volatile unsigned int*)(0x42C41674UL))
\r
9061 #define bFM3_CAN0_MSGVAL2_MSGVAL31 *((volatile unsigned int*)(0x42C41678UL))
\r
9062 #define bFM3_CAN0_MSGVAL2_MSGVAL32 *((volatile unsigned int*)(0x42C4167CUL))
\r
9064 /* CAN channel 1 registers */
\r
9065 #define bFM3_CAN1_CTRLR_INIT *((volatile unsigned int*)(0x42C60000UL))
\r
9066 #define bFM3_CAN1_CTRLR_IE *((volatile unsigned int*)(0x42C60004UL))
\r
9067 #define bFM3_CAN1_CTRLR_SIE *((volatile unsigned int*)(0x42C60008UL))
\r
9068 #define bFM3_CAN1_CTRLR_EIE *((volatile unsigned int*)(0x42C6000CUL))
\r
9069 #define bFM3_CAN1_CTRLR_DAR *((volatile unsigned int*)(0x42C60014UL))
\r
9070 #define bFM3_CAN1_CTRLR_CCE *((volatile unsigned int*)(0x42C60018UL))
\r
9071 #define bFM3_CAN1_CTRLR_TEST *((volatile unsigned int*)(0x42C6001CUL))
\r
9072 #define bFM3_CAN1_STATR_LEC0 *((volatile unsigned int*)(0x42C60040UL))
\r
9073 #define bFM3_CAN1_STATR_LEC1 *((volatile unsigned int*)(0x42C60044UL))
\r
9074 #define bFM3_CAN1_STATR_LEC2 *((volatile unsigned int*)(0x42C60048UL))
\r
9075 #define bFM3_CAN1_STATR_TXOK *((volatile unsigned int*)(0x42C6004CUL))
\r
9076 #define bFM3_CAN1_STATR_RXOK *((volatile unsigned int*)(0x42C60050UL))
\r
9077 #define bFM3_CAN1_STATR_EPASS *((volatile unsigned int*)(0x42C60054UL))
\r
9078 #define bFM3_CAN1_STATR_EWARM *((volatile unsigned int*)(0x42C60058UL))
\r
9079 #define bFM3_CAN1_STATR_BOFF *((volatile unsigned int*)(0x42C6005CUL))
\r
9080 #define bFM3_CAN1_ERRCNT_TEC0 *((volatile unsigned int*)(0x42C60080UL))
\r
9081 #define bFM3_CAN1_ERRCNT_TEC1 *((volatile unsigned int*)(0x42C60084UL))
\r
9082 #define bFM3_CAN1_ERRCNT_TEC2 *((volatile unsigned int*)(0x42C60088UL))
\r
9083 #define bFM3_CAN1_ERRCNT_TEC3 *((volatile unsigned int*)(0x42C6008CUL))
\r
9084 #define bFM3_CAN1_ERRCNT_TEC4 *((volatile unsigned int*)(0x42C60090UL))
\r
9085 #define bFM3_CAN1_ERRCNT_TEC5 *((volatile unsigned int*)(0x42C60094UL))
\r
9086 #define bFM3_CAN1_ERRCNT_TEC6 *((volatile unsigned int*)(0x42C60098UL))
\r
9087 #define bFM3_CAN1_ERRCNT_TEC7 *((volatile unsigned int*)(0x42C6009CUL))
\r
9088 #define bFM3_CAN1_ERRCNT_REC0 *((volatile unsigned int*)(0x42C600A0UL))
\r
9089 #define bFM3_CAN1_ERRCNT_REC1 *((volatile unsigned int*)(0x42C600A4UL))
\r
9090 #define bFM3_CAN1_ERRCNT_REC2 *((volatile unsigned int*)(0x42C600A8UL))
\r
9091 #define bFM3_CAN1_ERRCNT_REC3 *((volatile unsigned int*)(0x42C600ACUL))
\r
9092 #define bFM3_CAN1_ERRCNT_REC4 *((volatile unsigned int*)(0x42C600B0UL))
\r
9093 #define bFM3_CAN1_ERRCNT_REC5 *((volatile unsigned int*)(0x42C600B4UL))
\r
9094 #define bFM3_CAN1_ERRCNT_REC6 *((volatile unsigned int*)(0x42C600B8UL))
\r
9095 #define bFM3_CAN1_ERRCNT_RP *((volatile unsigned int*)(0x42C600BCUL))
\r
9096 #define bFM3_CAN1_BTR_BRP0 *((volatile unsigned int*)(0x42C600C0UL))
\r
9097 #define bFM3_CAN1_BTR_BRP1 *((volatile unsigned int*)(0x42C600C4UL))
\r
9098 #define bFM3_CAN1_BTR_BRP2 *((volatile unsigned int*)(0x42C600C8UL))
\r
9099 #define bFM3_CAN1_BTR_BRP3 *((volatile unsigned int*)(0x42C600CCUL))
\r
9100 #define bFM3_CAN1_BTR_BRP4 *((volatile unsigned int*)(0x42C600D0UL))
\r
9101 #define bFM3_CAN1_BTR_BRP5 *((volatile unsigned int*)(0x42C600D4UL))
\r
9102 #define bFM3_CAN1_BTR_SJW0 *((volatile unsigned int*)(0x42C600D8UL))
\r
9103 #define bFM3_CAN1_BTR_SJW1 *((volatile unsigned int*)(0x42C600DCUL))
\r
9104 #define bFM3_CAN1_BTR_TSEG10 *((volatile unsigned int*)(0x42C600E0UL))
\r
9105 #define bFM3_CAN1_BTR_TSEG11 *((volatile unsigned int*)(0x42C600E4UL))
\r
9106 #define bFM3_CAN1_BTR_TSEG12 *((volatile unsigned int*)(0x42C600E8UL))
\r
9107 #define bFM3_CAN1_BTR_TSEG13 *((volatile unsigned int*)(0x42C600ECUL))
\r
9108 #define bFM3_CAN1_BTR_TSEG20 *((volatile unsigned int*)(0x42C600F0UL))
\r
9109 #define bFM3_CAN1_BTR_TSEG21 *((volatile unsigned int*)(0x42C600F4UL))
\r
9110 #define bFM3_CAN1_BTR_TSEG22 *((volatile unsigned int*)(0x42C600F8UL))
\r
9111 #define bFM3_CAN1_INTR_INTID0 *((volatile unsigned int*)(0x42C60100UL))
\r
9112 #define bFM3_CAN1_INTR_INTID1 *((volatile unsigned int*)(0x42C60104UL))
\r
9113 #define bFM3_CAN1_INTR_INTID2 *((volatile unsigned int*)(0x42C60108UL))
\r
9114 #define bFM3_CAN1_INTR_INTID3 *((volatile unsigned int*)(0x42C6010CUL))
\r
9115 #define bFM3_CAN1_INTR_INTID4 *((volatile unsigned int*)(0x42C60110UL))
\r
9116 #define bFM3_CAN1_INTR_INTID5 *((volatile unsigned int*)(0x42C60114UL))
\r
9117 #define bFM3_CAN1_INTR_INTID6 *((volatile unsigned int*)(0x42C60118UL))
\r
9118 #define bFM3_CAN1_INTR_INTID7 *((volatile unsigned int*)(0x42C6011CUL))
\r
9119 #define bFM3_CAN1_INTR_INTID8 *((volatile unsigned int*)(0x42C60120UL))
\r
9120 #define bFM3_CAN1_INTR_INTID9 *((volatile unsigned int*)(0x42C60124UL))
\r
9121 #define bFM3_CAN1_INTR_INTID10 *((volatile unsigned int*)(0x42C60128UL))
\r
9122 #define bFM3_CAN1_INTR_INTID11 *((volatile unsigned int*)(0x42C6012CUL))
\r
9123 #define bFM3_CAN1_INTR_INTID12 *((volatile unsigned int*)(0x42C60130UL))
\r
9124 #define bFM3_CAN1_INTR_INTID13 *((volatile unsigned int*)(0x42C60134UL))
\r
9125 #define bFM3_CAN1_INTR_INTID14 *((volatile unsigned int*)(0x42C60138UL))
\r
9126 #define bFM3_CAN1_INTR_INTID15 *((volatile unsigned int*)(0x42C6013CUL))
\r
9127 #define bFM3_CAN1_TESTR_BASIC *((volatile unsigned int*)(0x42C60148UL))
\r
9128 #define bFM3_CAN1_TESTR_SILENT *((volatile unsigned int*)(0x42C6014CUL))
\r
9129 #define bFM3_CAN1_TESTR_LBACK *((volatile unsigned int*)(0x42C60150UL))
\r
9130 #define bFM3_CAN1_TESTR_TX0 *((volatile unsigned int*)(0x42C60154UL))
\r
9131 #define bFM3_CAN1_TESTR_TX1 *((volatile unsigned int*)(0x42C60158UL))
\r
9132 #define bFM3_CAN1_TESTR_RX *((volatile unsigned int*)(0x42C6015CUL))
\r
9133 #define bFM3_CAN1_BRPER_BRPE0 *((volatile unsigned int*)(0x42C60180UL))
\r
9134 #define bFM3_CAN1_BRPER_BRPE1 *((volatile unsigned int*)(0x42C60184UL))
\r
9135 #define bFM3_CAN1_BRPER_BRPE2 *((volatile unsigned int*)(0x42C60188UL))
\r
9136 #define bFM3_CAN1_BRPER_BRPE3 *((volatile unsigned int*)(0x42C6018CUL))
\r
9137 #define bFM3_CAN1_IF1CREQ_BUSY *((volatile unsigned int*)(0x42C6023CUL))
\r
9138 #define bFM3_CAN1_IF1CMSK_DATAB *((volatile unsigned int*)(0x42C60240UL))
\r
9139 #define bFM3_CAN1_IF1CMSK_DATAA *((volatile unsigned int*)(0x42C60244UL))
\r
9140 #define bFM3_CAN1_IF1CMSK_TXREST *((volatile unsigned int*)(0x42C60248UL))
\r
9141 #define bFM3_CAN1_IF1CMSK_NEWDAT *((volatile unsigned int*)(0x42C60248UL))
\r
9142 #define bFM3_CAN1_IF1CMSK_CIP *((volatile unsigned int*)(0x42C6024CUL))
\r
9143 #define bFM3_CAN1_IF1CMSK_CONTROL *((volatile unsigned int*)(0x42C60250UL))
\r
9144 #define bFM3_CAN1_IF1CMSK_ARB *((volatile unsigned int*)(0x42C60254UL))
\r
9145 #define bFM3_CAN1_IF1CMSK_MASK *((volatile unsigned int*)(0x42C60258UL))
\r
9146 #define bFM3_CAN1_IF1CMSK_WRRD *((volatile unsigned int*)(0x42C6025CUL))
\r
9147 #define bFM3_CAN1_IF1MSK_MDIR *((volatile unsigned int*)(0x42C602F8UL))
\r
9148 #define bFM3_CAN1_IF1MSK_MXTD *((volatile unsigned int*)(0x42C602FCUL))
\r
9149 #define bFM3_CAN1_IF1MSK2_MDIR *((volatile unsigned int*)(0x42C602F8UL))
\r
9150 #define bFM3_CAN1_IF1MSK2_MXTD *((volatile unsigned int*)(0x42C602FCUL))
\r
9151 #define bFM3_CAN1_IF1ARB_DIR *((volatile unsigned int*)(0x42C60374UL))
\r
9152 #define bFM3_CAN1_IF1ARB_XTD *((volatile unsigned int*)(0x42C60378UL))
\r
9153 #define bFM3_CAN1_IF1ARB_MSGVAL *((volatile unsigned int*)(0x42C6037CUL))
\r
9154 #define bFM3_CAN1_IF1ARB2_DIR *((volatile unsigned int*)(0x42C60374UL))
\r
9155 #define bFM3_CAN1_IF1ARB2_XTD *((volatile unsigned int*)(0x42C60378UL))
\r
9156 #define bFM3_CAN1_IF1ARB2_MSGVAL *((volatile unsigned int*)(0x42C6037CUL))
\r
9157 #define bFM3_CAN1_IF1MCTR_DLC0 *((volatile unsigned int*)(0x42C60380UL))
\r
9158 #define bFM3_CAN1_IF1MCTR_DLC1 *((volatile unsigned int*)(0x42C60384UL))
\r
9159 #define bFM3_CAN1_IF1MCTR_DLC2 *((volatile unsigned int*)(0x42C60388UL))
\r
9160 #define bFM3_CAN1_IF1MCTR_DLC3 *((volatile unsigned int*)(0x42C6038CUL))
\r
9161 #define bFM3_CAN1_IF1MCTR_EOB *((volatile unsigned int*)(0x42C6039CUL))
\r
9162 #define bFM3_CAN1_IF1MCTR_TXRQST *((volatile unsigned int*)(0x42C603A0UL))
\r
9163 #define bFM3_CAN1_IF1MCTR_RMTEN *((volatile unsigned int*)(0x42C603A4UL))
\r
9164 #define bFM3_CAN1_IF1MCTR_RXIE *((volatile unsigned int*)(0x42C603A8UL))
\r
9165 #define bFM3_CAN1_IF1MCTR_TXIE *((volatile unsigned int*)(0x42C603ACUL))
\r
9166 #define bFM3_CAN1_IF1MCTR_UMASK *((volatile unsigned int*)(0x42C603B0UL))
\r
9167 #define bFM3_CAN1_IF1MCTR_INTPND *((volatile unsigned int*)(0x42C603B4UL))
\r
9168 #define bFM3_CAN1_IF1MCTR_MSGLST *((volatile unsigned int*)(0x42C603B8UL))
\r
9169 #define bFM3_CAN1_IF1MCTR_NEWDAT *((volatile unsigned int*)(0x42C603BCUL))
\r
9170 #define bFM3_CAN1_IF2CREQ_BUSY *((volatile unsigned int*)(0x42C6083CUL))
\r
9171 #define bFM3_CAN1_IF2CMSK_DATAB *((volatile unsigned int*)(0x42C60840UL))
\r
9172 #define bFM3_CAN1_IF2CMSK_DATAA *((volatile unsigned int*)(0x42C60844UL))
\r
9173 #define bFM3_CAN1_IF2CMSK_TXREST *((volatile unsigned int*)(0x42C60848UL))
\r
9174 #define bFM3_CAN1_IF2CMSK_NEWDAT *((volatile unsigned int*)(0x42C60848UL))
\r
9175 #define bFM3_CAN1_IF2CMSK_CIP *((volatile unsigned int*)(0x42C6084CUL))
\r
9176 #define bFM3_CAN1_IF2CMSK_CONTROL *((volatile unsigned int*)(0x42C60850UL))
\r
9177 #define bFM3_CAN1_IF2CMSK_ARB *((volatile unsigned int*)(0x42C60854UL))
\r
9178 #define bFM3_CAN1_IF2CMSK_MASK *((volatile unsigned int*)(0x42C60858UL))
\r
9179 #define bFM3_CAN1_IF2CMSK_WRRD *((volatile unsigned int*)(0x42C6085CUL))
\r
9180 #define bFM3_CAN1_IF2MSK_MDIR *((volatile unsigned int*)(0x42C608F8UL))
\r
9181 #define bFM3_CAN1_IF2MSK_MXTD *((volatile unsigned int*)(0x42C608FCUL))
\r
9182 #define bFM3_CAN1_IF2MSK2_MDIR *((volatile unsigned int*)(0x42C608F8UL))
\r
9183 #define bFM3_CAN1_IF2MSK2_MXTD *((volatile unsigned int*)(0x42C608FCUL))
\r
9184 #define bFM3_CAN1_IF2ARB_DIR *((volatile unsigned int*)(0x42C60974UL))
\r
9185 #define bFM3_CAN1_IF2ARB_XTD *((volatile unsigned int*)(0x42C60978UL))
\r
9186 #define bFM3_CAN1_IF2ARB_MSGVAL *((volatile unsigned int*)(0x42C6097CUL))
\r
9187 #define bFM3_CAN1_IF2ARB2_DIR *((volatile unsigned int*)(0x42C60974UL))
\r
9188 #define bFM3_CAN1_IF2ARB2_XTD *((volatile unsigned int*)(0x42C60978UL))
\r
9189 #define bFM3_CAN1_IF2ARB2_MSGVAL *((volatile unsigned int*)(0x42C6097CUL))
\r
9190 #define bFM3_CAN1_IF2MCTR_DLC0 *((volatile unsigned int*)(0x42C60980UL))
\r
9191 #define bFM3_CAN1_IF2MCTR_DLC1 *((volatile unsigned int*)(0x42C60984UL))
\r
9192 #define bFM3_CAN1_IF2MCTR_DLC2 *((volatile unsigned int*)(0x42C60988UL))
\r
9193 #define bFM3_CAN1_IF2MCTR_DLC3 *((volatile unsigned int*)(0x42C6098CUL))
\r
9194 #define bFM3_CAN1_IF2MCTR_EOB *((volatile unsigned int*)(0x42C6099CUL))
\r
9195 #define bFM3_CAN1_IF2MCTR_TXRQST *((volatile unsigned int*)(0x42C609A0UL))
\r
9196 #define bFM3_CAN1_IF2MCTR_RMTEN *((volatile unsigned int*)(0x42C609A4UL))
\r
9197 #define bFM3_CAN1_IF2MCTR_RXIE *((volatile unsigned int*)(0x42C609A8UL))
\r
9198 #define bFM3_CAN1_IF2MCTR_TXIE *((volatile unsigned int*)(0x42C609ACUL))
\r
9199 #define bFM3_CAN1_IF2MCTR_UMASK *((volatile unsigned int*)(0x42C609B0UL))
\r
9200 #define bFM3_CAN1_IF2MCTR_INTPND *((volatile unsigned int*)(0x42C609B4UL))
\r
9201 #define bFM3_CAN1_IF2MCTR_MSGLST *((volatile unsigned int*)(0x42C609B8UL))
\r
9202 #define bFM3_CAN1_IF2MCTR_NEWDAT *((volatile unsigned int*)(0x42C609BCUL))
\r
9203 #define bFM3_CAN1_TREQR_TXRQST1 *((volatile unsigned int*)(0x42C61000UL))
\r
9204 #define bFM3_CAN1_TREQR_TXRQST2 *((volatile unsigned int*)(0x42C61004UL))
\r
9205 #define bFM3_CAN1_TREQR_TXRQST3 *((volatile unsigned int*)(0x42C61008UL))
\r
9206 #define bFM3_CAN1_TREQR_TXRQST4 *((volatile unsigned int*)(0x42C6100CUL))
\r
9207 #define bFM3_CAN1_TREQR_TXRQST5 *((volatile unsigned int*)(0x42C61010UL))
\r
9208 #define bFM3_CAN1_TREQR_TXRQST6 *((volatile unsigned int*)(0x42C61014UL))
\r
9209 #define bFM3_CAN1_TREQR_TXRQST7 *((volatile unsigned int*)(0x42C61018UL))
\r
9210 #define bFM3_CAN1_TREQR_TXRQST8 *((volatile unsigned int*)(0x42C6101CUL))
\r
9211 #define bFM3_CAN1_TREQR_TXRQST9 *((volatile unsigned int*)(0x42C61020UL))
\r
9212 #define bFM3_CAN1_TREQR_TXRQST10 *((volatile unsigned int*)(0x42C61024UL))
\r
9213 #define bFM3_CAN1_TREQR_TXRQST11 *((volatile unsigned int*)(0x42C61028UL))
\r
9214 #define bFM3_CAN1_TREQR_TXRQST12 *((volatile unsigned int*)(0x42C6102CUL))
\r
9215 #define bFM3_CAN1_TREQR_TXRQST13 *((volatile unsigned int*)(0x42C61030UL))
\r
9216 #define bFM3_CAN1_TREQR_TXRQST14 *((volatile unsigned int*)(0x42C61034UL))
\r
9217 #define bFM3_CAN1_TREQR_TXRQST15 *((volatile unsigned int*)(0x42C61038UL))
\r
9218 #define bFM3_CAN1_TREQR_TXRQST16 *((volatile unsigned int*)(0x42C6103CUL))
\r
9219 #define bFM3_CAN1_TREQR_TXRQST17 *((volatile unsigned int*)(0x42C61040UL))
\r
9220 #define bFM3_CAN1_TREQR_TXRQST18 *((volatile unsigned int*)(0x42C61044UL))
\r
9221 #define bFM3_CAN1_TREQR_TXRQST19 *((volatile unsigned int*)(0x42C61048UL))
\r
9222 #define bFM3_CAN1_TREQR_TXRQST20 *((volatile unsigned int*)(0x42C6104CUL))
\r
9223 #define bFM3_CAN1_TREQR_TXRQST21 *((volatile unsigned int*)(0x42C61050UL))
\r
9224 #define bFM3_CAN1_TREQR_TXRQST22 *((volatile unsigned int*)(0x42C61054UL))
\r
9225 #define bFM3_CAN1_TREQR_TXRQST23 *((volatile unsigned int*)(0x42C61058UL))
\r
9226 #define bFM3_CAN1_TREQR_TXRQST24 *((volatile unsigned int*)(0x42C6105CUL))
\r
9227 #define bFM3_CAN1_TREQR_TXRQST25 *((volatile unsigned int*)(0x42C61060UL))
\r
9228 #define bFM3_CAN1_TREQR_TXRQST26 *((volatile unsigned int*)(0x42C61064UL))
\r
9229 #define bFM3_CAN1_TREQR_TXRQST27 *((volatile unsigned int*)(0x42C61068UL))
\r
9230 #define bFM3_CAN1_TREQR_TXRQST28 *((volatile unsigned int*)(0x42C6106CUL))
\r
9231 #define bFM3_CAN1_TREQR_TXRQST29 *((volatile unsigned int*)(0x42C61070UL))
\r
9232 #define bFM3_CAN1_TREQR_TXRQST30 *((volatile unsigned int*)(0x42C61074UL))
\r
9233 #define bFM3_CAN1_TREQR_TXRQST31 *((volatile unsigned int*)(0x42C61078UL))
\r
9234 #define bFM3_CAN1_TREQR_TXRQST32 *((volatile unsigned int*)(0x42C6107CUL))
\r
9235 #define bFM3_CAN1_TREQR1_TXRQST1 *((volatile unsigned int*)(0x42C61000UL))
\r
9236 #define bFM3_CAN1_TREQR1_TXRQST2 *((volatile unsigned int*)(0x42C61004UL))
\r
9237 #define bFM3_CAN1_TREQR1_TXRQST3 *((volatile unsigned int*)(0x42C61008UL))
\r
9238 #define bFM3_CAN1_TREQR1_TXRQST4 *((volatile unsigned int*)(0x42C6100CUL))
\r
9239 #define bFM3_CAN1_TREQR1_TXRQST5 *((volatile unsigned int*)(0x42C61010UL))
\r
9240 #define bFM3_CAN1_TREQR1_TXRQST6 *((volatile unsigned int*)(0x42C61014UL))
\r
9241 #define bFM3_CAN1_TREQR1_TXRQST7 *((volatile unsigned int*)(0x42C61018UL))
\r
9242 #define bFM3_CAN1_TREQR1_TXRQST8 *((volatile unsigned int*)(0x42C6101CUL))
\r
9243 #define bFM3_CAN1_TREQR1_TXRQST9 *((volatile unsigned int*)(0x42C61020UL))
\r
9244 #define bFM3_CAN1_TREQR1_TXRQST10 *((volatile unsigned int*)(0x42C61024UL))
\r
9245 #define bFM3_CAN1_TREQR1_TXRQST11 *((volatile unsigned int*)(0x42C61028UL))
\r
9246 #define bFM3_CAN1_TREQR1_TXRQST12 *((volatile unsigned int*)(0x42C6102CUL))
\r
9247 #define bFM3_CAN1_TREQR1_TXRQST13 *((volatile unsigned int*)(0x42C61030UL))
\r
9248 #define bFM3_CAN1_TREQR1_TXRQST14 *((volatile unsigned int*)(0x42C61034UL))
\r
9249 #define bFM3_CAN1_TREQR1_TXRQST15 *((volatile unsigned int*)(0x42C61038UL))
\r
9250 #define bFM3_CAN1_TREQR1_TXRQST16 *((volatile unsigned int*)(0x42C6103CUL))
\r
9251 #define bFM3_CAN1_TREQR2_TXRQST17 *((volatile unsigned int*)(0x42C61040UL))
\r
9252 #define bFM3_CAN1_TREQR2_TXRQST18 *((volatile unsigned int*)(0x42C61044UL))
\r
9253 #define bFM3_CAN1_TREQR2_TXRQST19 *((volatile unsigned int*)(0x42C61048UL))
\r
9254 #define bFM3_CAN1_TREQR2_TXRQST20 *((volatile unsigned int*)(0x42C6104CUL))
\r
9255 #define bFM3_CAN1_TREQR2_TXRQST21 *((volatile unsigned int*)(0x42C61050UL))
\r
9256 #define bFM3_CAN1_TREQR2_TXRQST22 *((volatile unsigned int*)(0x42C61054UL))
\r
9257 #define bFM3_CAN1_TREQR2_TXRQST23 *((volatile unsigned int*)(0x42C61058UL))
\r
9258 #define bFM3_CAN1_TREQR2_TXRQST24 *((volatile unsigned int*)(0x42C6105CUL))
\r
9259 #define bFM3_CAN1_TREQR2_TXRQST25 *((volatile unsigned int*)(0x42C61060UL))
\r
9260 #define bFM3_CAN1_TREQR2_TXRQST26 *((volatile unsigned int*)(0x42C61064UL))
\r
9261 #define bFM3_CAN1_TREQR2_TXRQST27 *((volatile unsigned int*)(0x42C61068UL))
\r
9262 #define bFM3_CAN1_TREQR2_TXRQST28 *((volatile unsigned int*)(0x42C6106CUL))
\r
9263 #define bFM3_CAN1_TREQR2_TXRQST29 *((volatile unsigned int*)(0x42C61070UL))
\r
9264 #define bFM3_CAN1_TREQR2_TXRQST30 *((volatile unsigned int*)(0x42C61074UL))
\r
9265 #define bFM3_CAN1_TREQR2_TXRQST31 *((volatile unsigned int*)(0x42C61078UL))
\r
9266 #define bFM3_CAN1_TREQR2_TXRQST32 *((volatile unsigned int*)(0x42C6107CUL))
\r
9267 #define bFM3_CAN1_NEWDT_NEWDAT1 *((volatile unsigned int*)(0x42C61200UL))
\r
9268 #define bFM3_CAN1_NEWDT_NEWDAT2 *((volatile unsigned int*)(0x42C61204UL))
\r
9269 #define bFM3_CAN1_NEWDT_NEWDAT3 *((volatile unsigned int*)(0x42C61208UL))
\r
9270 #define bFM3_CAN1_NEWDT_NEWDAT4 *((volatile unsigned int*)(0x42C6120CUL))
\r
9271 #define bFM3_CAN1_NEWDT_NEWDAT5 *((volatile unsigned int*)(0x42C61210UL))
\r
9272 #define bFM3_CAN1_NEWDT_NEWDAT6 *((volatile unsigned int*)(0x42C61214UL))
\r
9273 #define bFM3_CAN1_NEWDT_NEWDAT7 *((volatile unsigned int*)(0x42C61218UL))
\r
9274 #define bFM3_CAN1_NEWDT_NEWDAT8 *((volatile unsigned int*)(0x42C6121CUL))
\r
9275 #define bFM3_CAN1_NEWDT_NEWDAT9 *((volatile unsigned int*)(0x42C61220UL))
\r
9276 #define bFM3_CAN1_NEWDT_NEWDAT10 *((volatile unsigned int*)(0x42C61224UL))
\r
9277 #define bFM3_CAN1_NEWDT_NEWDAT11 *((volatile unsigned int*)(0x42C61228UL))
\r
9278 #define bFM3_CAN1_NEWDT_NEWDAT12 *((volatile unsigned int*)(0x42C6122CUL))
\r
9279 #define bFM3_CAN1_NEWDT_NEWDAT13 *((volatile unsigned int*)(0x42C61230UL))
\r
9280 #define bFM3_CAN1_NEWDT_NEWDAT14 *((volatile unsigned int*)(0x42C61234UL))
\r
9281 #define bFM3_CAN1_NEWDT_NEWDAT15 *((volatile unsigned int*)(0x42C61238UL))
\r
9282 #define bFM3_CAN1_NEWDT_NEWDAT16 *((volatile unsigned int*)(0x42C6123CUL))
\r
9283 #define bFM3_CAN1_NEWDT_NEWDAT17 *((volatile unsigned int*)(0x42C61240UL))
\r
9284 #define bFM3_CAN1_NEWDT_NEWDAT18 *((volatile unsigned int*)(0x42C61244UL))
\r
9285 #define bFM3_CAN1_NEWDT_NEWDAT19 *((volatile unsigned int*)(0x42C61248UL))
\r
9286 #define bFM3_CAN1_NEWDT_NEWDAT20 *((volatile unsigned int*)(0x42C6124CUL))
\r
9287 #define bFM3_CAN1_NEWDT_NEWDAT21 *((volatile unsigned int*)(0x42C61250UL))
\r
9288 #define bFM3_CAN1_NEWDT_NEWDAT22 *((volatile unsigned int*)(0x42C61254UL))
\r
9289 #define bFM3_CAN1_NEWDT_NEWDAT23 *((volatile unsigned int*)(0x42C61258UL))
\r
9290 #define bFM3_CAN1_NEWDT_NEWDAT24 *((volatile unsigned int*)(0x42C6125CUL))
\r
9291 #define bFM3_CAN1_NEWDT_NEWDAT25 *((volatile unsigned int*)(0x42C61260UL))
\r
9292 #define bFM3_CAN1_NEWDT_NEWDAT26 *((volatile unsigned int*)(0x42C61264UL))
\r
9293 #define bFM3_CAN1_NEWDT_NEWDAT27 *((volatile unsigned int*)(0x42C61268UL))
\r
9294 #define bFM3_CAN1_NEWDT_NEWDAT28 *((volatile unsigned int*)(0x42C6126CUL))
\r
9295 #define bFM3_CAN1_NEWDT_NEWDAT29 *((volatile unsigned int*)(0x42C61270UL))
\r
9296 #define bFM3_CAN1_NEWDT_NEWDAT30 *((volatile unsigned int*)(0x42C61274UL))
\r
9297 #define bFM3_CAN1_NEWDT_NEWDAT31 *((volatile unsigned int*)(0x42C61278UL))
\r
9298 #define bFM3_CAN1_NEWDT_NEWDAT32 *((volatile unsigned int*)(0x42C6127CUL))
\r
9299 #define bFM3_CAN1_NEWDT1_NEWDAT1 *((volatile unsigned int*)(0x42C61200UL))
\r
9300 #define bFM3_CAN1_NEWDT1_NEWDAT2 *((volatile unsigned int*)(0x42C61204UL))
\r
9301 #define bFM3_CAN1_NEWDT1_NEWDAT3 *((volatile unsigned int*)(0x42C61208UL))
\r
9302 #define bFM3_CAN1_NEWDT1_NEWDAT4 *((volatile unsigned int*)(0x42C6120CUL))
\r
9303 #define bFM3_CAN1_NEWDT1_NEWDAT5 *((volatile unsigned int*)(0x42C61210UL))
\r
9304 #define bFM3_CAN1_NEWDT1_NEWDAT6 *((volatile unsigned int*)(0x42C61214UL))
\r
9305 #define bFM3_CAN1_NEWDT1_NEWDAT7 *((volatile unsigned int*)(0x42C61218UL))
\r
9306 #define bFM3_CAN1_NEWDT1_NEWDAT8 *((volatile unsigned int*)(0x42C6121CUL))
\r
9307 #define bFM3_CAN1_NEWDT1_NEWDAT9 *((volatile unsigned int*)(0x42C61220UL))
\r
9308 #define bFM3_CAN1_NEWDT1_NEWDAT10 *((volatile unsigned int*)(0x42C61224UL))
\r
9309 #define bFM3_CAN1_NEWDT1_NEWDAT11 *((volatile unsigned int*)(0x42C61228UL))
\r
9310 #define bFM3_CAN1_NEWDT1_NEWDAT12 *((volatile unsigned int*)(0x42C6122CUL))
\r
9311 #define bFM3_CAN1_NEWDT1_NEWDAT13 *((volatile unsigned int*)(0x42C61230UL))
\r
9312 #define bFM3_CAN1_NEWDT1_NEWDAT14 *((volatile unsigned int*)(0x42C61234UL))
\r
9313 #define bFM3_CAN1_NEWDT1_NEWDAT15 *((volatile unsigned int*)(0x42C61238UL))
\r
9314 #define bFM3_CAN1_NEWDT1_NEWDAT16 *((volatile unsigned int*)(0x42C6123CUL))
\r
9315 #define bFM3_CAN1_NEWDT2_NEWDAT17 *((volatile unsigned int*)(0x42C61240UL))
\r
9316 #define bFM3_CAN1_NEWDT2_NEWDAT18 *((volatile unsigned int*)(0x42C61244UL))
\r
9317 #define bFM3_CAN1_NEWDT2_NEWDAT19 *((volatile unsigned int*)(0x42C61248UL))
\r
9318 #define bFM3_CAN1_NEWDT2_NEWDAT20 *((volatile unsigned int*)(0x42C6124CUL))
\r
9319 #define bFM3_CAN1_NEWDT2_NEWDAT21 *((volatile unsigned int*)(0x42C61250UL))
\r
9320 #define bFM3_CAN1_NEWDT2_NEWDAT22 *((volatile unsigned int*)(0x42C61254UL))
\r
9321 #define bFM3_CAN1_NEWDT2_NEWDAT23 *((volatile unsigned int*)(0x42C61258UL))
\r
9322 #define bFM3_CAN1_NEWDT2_NEWDAT24 *((volatile unsigned int*)(0x42C6125CUL))
\r
9323 #define bFM3_CAN1_NEWDT2_NEWDAT25 *((volatile unsigned int*)(0x42C61260UL))
\r
9324 #define bFM3_CAN1_NEWDT2_NEWDAT26 *((volatile unsigned int*)(0x42C61264UL))
\r
9325 #define bFM3_CAN1_NEWDT2_NEWDAT27 *((volatile unsigned int*)(0x42C61268UL))
\r
9326 #define bFM3_CAN1_NEWDT2_NEWDAT28 *((volatile unsigned int*)(0x42C6126CUL))
\r
9327 #define bFM3_CAN1_NEWDT2_NEWDAT29 *((volatile unsigned int*)(0x42C61270UL))
\r
9328 #define bFM3_CAN1_NEWDT2_NEWDAT30 *((volatile unsigned int*)(0x42C61274UL))
\r
9329 #define bFM3_CAN1_NEWDT2_NEWDAT31 *((volatile unsigned int*)(0x42C61278UL))
\r
9330 #define bFM3_CAN1_NEWDT2_NEWDAT32 *((volatile unsigned int*)(0x42C6127CUL))
\r
9331 #define bFM3_CAN1_INTPND_INTPND1 *((volatile unsigned int*)(0x42C61400UL))
\r
9332 #define bFM3_CAN1_INTPND_INTPND2 *((volatile unsigned int*)(0x42C61404UL))
\r
9333 #define bFM3_CAN1_INTPND_INTPND3 *((volatile unsigned int*)(0x42C61408UL))
\r
9334 #define bFM3_CAN1_INTPND_INTPND4 *((volatile unsigned int*)(0x42C6140CUL))
\r
9335 #define bFM3_CAN1_INTPND_INTPND5 *((volatile unsigned int*)(0x42C61410UL))
\r
9336 #define bFM3_CAN1_INTPND_INTPND6 *((volatile unsigned int*)(0x42C61414UL))
\r
9337 #define bFM3_CAN1_INTPND_INTPND7 *((volatile unsigned int*)(0x42C61418UL))
\r
9338 #define bFM3_CAN1_INTPND_INTPND8 *((volatile unsigned int*)(0x42C6141CUL))
\r
9339 #define bFM3_CAN1_INTPND_INTPND9 *((volatile unsigned int*)(0x42C61420UL))
\r
9340 #define bFM3_CAN1_INTPND_INTPND10 *((volatile unsigned int*)(0x42C61424UL))
\r
9341 #define bFM3_CAN1_INTPND_INTPND11 *((volatile unsigned int*)(0x42C61428UL))
\r
9342 #define bFM3_CAN1_INTPND_INTPND12 *((volatile unsigned int*)(0x42C6142CUL))
\r
9343 #define bFM3_CAN1_INTPND_INTPND13 *((volatile unsigned int*)(0x42C61430UL))
\r
9344 #define bFM3_CAN1_INTPND_INTPND14 *((volatile unsigned int*)(0x42C61434UL))
\r
9345 #define bFM3_CAN1_INTPND_INTPND15 *((volatile unsigned int*)(0x42C61438UL))
\r
9346 #define bFM3_CAN1_INTPND_INTPND16 *((volatile unsigned int*)(0x42C6143CUL))
\r
9347 #define bFM3_CAN1_INTPND_INTPND17 *((volatile unsigned int*)(0x42C61440UL))
\r
9348 #define bFM3_CAN1_INTPND_INTPND18 *((volatile unsigned int*)(0x42C61444UL))
\r
9349 #define bFM3_CAN1_INTPND_INTPND19 *((volatile unsigned int*)(0x42C61448UL))
\r
9350 #define bFM3_CAN1_INTPND_INTPND20 *((volatile unsigned int*)(0x42C6144CUL))
\r
9351 #define bFM3_CAN1_INTPND_INTPND21 *((volatile unsigned int*)(0x42C61450UL))
\r
9352 #define bFM3_CAN1_INTPND_INTPND22 *((volatile unsigned int*)(0x42C61454UL))
\r
9353 #define bFM3_CAN1_INTPND_INTPND23 *((volatile unsigned int*)(0x42C61458UL))
\r
9354 #define bFM3_CAN1_INTPND_INTPND24 *((volatile unsigned int*)(0x42C6145CUL))
\r
9355 #define bFM3_CAN1_INTPND_INTPND25 *((volatile unsigned int*)(0x42C61460UL))
\r
9356 #define bFM3_CAN1_INTPND_INTPND26 *((volatile unsigned int*)(0x42C61464UL))
\r
9357 #define bFM3_CAN1_INTPND_INTPND27 *((volatile unsigned int*)(0x42C61468UL))
\r
9358 #define bFM3_CAN1_INTPND_INTPND28 *((volatile unsigned int*)(0x42C6146CUL))
\r
9359 #define bFM3_CAN1_INTPND_INTPND29 *((volatile unsigned int*)(0x42C61470UL))
\r
9360 #define bFM3_CAN1_INTPND_INTPND30 *((volatile unsigned int*)(0x42C61474UL))
\r
9361 #define bFM3_CAN1_INTPND_INTPND31 *((volatile unsigned int*)(0x42C61478UL))
\r
9362 #define bFM3_CAN1_INTPND_INTPND32 *((volatile unsigned int*)(0x42C6147CUL))
\r
9363 #define bFM3_CAN1_INTPND1_INTPND1 *((volatile unsigned int*)(0x42C61400UL))
\r
9364 #define bFM3_CAN1_INTPND1_INTPND2 *((volatile unsigned int*)(0x42C61404UL))
\r
9365 #define bFM3_CAN1_INTPND1_INTPND3 *((volatile unsigned int*)(0x42C61408UL))
\r
9366 #define bFM3_CAN1_INTPND1_INTPND4 *((volatile unsigned int*)(0x42C6140CUL))
\r
9367 #define bFM3_CAN1_INTPND1_INTPND5 *((volatile unsigned int*)(0x42C61410UL))
\r
9368 #define bFM3_CAN1_INTPND1_INTPND6 *((volatile unsigned int*)(0x42C61414UL))
\r
9369 #define bFM3_CAN1_INTPND1_INTPND7 *((volatile unsigned int*)(0x42C61418UL))
\r
9370 #define bFM3_CAN1_INTPND1_INTPND8 *((volatile unsigned int*)(0x42C6141CUL))
\r
9371 #define bFM3_CAN1_INTPND1_INTPND9 *((volatile unsigned int*)(0x42C61420UL))
\r
9372 #define bFM3_CAN1_INTPND1_INTPND10 *((volatile unsigned int*)(0x42C61424UL))
\r
9373 #define bFM3_CAN1_INTPND1_INTPND11 *((volatile unsigned int*)(0x42C61428UL))
\r
9374 #define bFM3_CAN1_INTPND1_INTPND12 *((volatile unsigned int*)(0x42C6142CUL))
\r
9375 #define bFM3_CAN1_INTPND1_INTPND13 *((volatile unsigned int*)(0x42C61430UL))
\r
9376 #define bFM3_CAN1_INTPND1_INTPND14 *((volatile unsigned int*)(0x42C61434UL))
\r
9377 #define bFM3_CAN1_INTPND1_INTPND15 *((volatile unsigned int*)(0x42C61438UL))
\r
9378 #define bFM3_CAN1_INTPND1_INTPND16 *((volatile unsigned int*)(0x42C6143CUL))
\r
9379 #define bFM3_CAN1_INTPND2_INTPND17 *((volatile unsigned int*)(0x42C61440UL))
\r
9380 #define bFM3_CAN1_INTPND2_INTPND18 *((volatile unsigned int*)(0x42C61444UL))
\r
9381 #define bFM3_CAN1_INTPND2_INTPND19 *((volatile unsigned int*)(0x42C61448UL))
\r
9382 #define bFM3_CAN1_INTPND2_INTPND20 *((volatile unsigned int*)(0x42C6144CUL))
\r
9383 #define bFM3_CAN1_INTPND2_INTPND21 *((volatile unsigned int*)(0x42C61450UL))
\r
9384 #define bFM3_CAN1_INTPND2_INTPND22 *((volatile unsigned int*)(0x42C61454UL))
\r
9385 #define bFM3_CAN1_INTPND2_INTPND23 *((volatile unsigned int*)(0x42C61458UL))
\r
9386 #define bFM3_CAN1_INTPND2_INTPND24 *((volatile unsigned int*)(0x42C6145CUL))
\r
9387 #define bFM3_CAN1_INTPND2_INTPND25 *((volatile unsigned int*)(0x42C61460UL))
\r
9388 #define bFM3_CAN1_INTPND2_INTPND26 *((volatile unsigned int*)(0x42C61464UL))
\r
9389 #define bFM3_CAN1_INTPND2_INTPND27 *((volatile unsigned int*)(0x42C61468UL))
\r
9390 #define bFM3_CAN1_INTPND2_INTPND28 *((volatile unsigned int*)(0x42C6146CUL))
\r
9391 #define bFM3_CAN1_INTPND2_INTPND29 *((volatile unsigned int*)(0x42C61470UL))
\r
9392 #define bFM3_CAN1_INTPND2_INTPND30 *((volatile unsigned int*)(0x42C61474UL))
\r
9393 #define bFM3_CAN1_INTPND2_INTPND31 *((volatile unsigned int*)(0x42C61478UL))
\r
9394 #define bFM3_CAN1_INTPND2_INTPND32 *((volatile unsigned int*)(0x42C6147CUL))
\r
9395 #define bFM3_CAN1_MSGVAL_MSGVAL1 *((volatile unsigned int*)(0x42C61600UL))
\r
9396 #define bFM3_CAN1_MSGVAL_MSGVAL2 *((volatile unsigned int*)(0x42C61604UL))
\r
9397 #define bFM3_CAN1_MSGVAL_MSGVAL3 *((volatile unsigned int*)(0x42C61608UL))
\r
9398 #define bFM3_CAN1_MSGVAL_MSGVAL4 *((volatile unsigned int*)(0x42C6160CUL))
\r
9399 #define bFM3_CAN1_MSGVAL_MSGVAL5 *((volatile unsigned int*)(0x42C61610UL))
\r
9400 #define bFM3_CAN1_MSGVAL_MSGVAL6 *((volatile unsigned int*)(0x42C61614UL))
\r
9401 #define bFM3_CAN1_MSGVAL_MSGVAL7 *((volatile unsigned int*)(0x42C61618UL))
\r
9402 #define bFM3_CAN1_MSGVAL_MSGVAL8 *((volatile unsigned int*)(0x42C6161CUL))
\r
9403 #define bFM3_CAN1_MSGVAL_MSGVAL9 *((volatile unsigned int*)(0x42C61620UL))
\r
9404 #define bFM3_CAN1_MSGVAL_MSGVAL10 *((volatile unsigned int*)(0x42C61624UL))
\r
9405 #define bFM3_CAN1_MSGVAL_MSGVAL11 *((volatile unsigned int*)(0x42C61628UL))
\r
9406 #define bFM3_CAN1_MSGVAL_MSGVAL12 *((volatile unsigned int*)(0x42C6162CUL))
\r
9407 #define bFM3_CAN1_MSGVAL_MSGVAL13 *((volatile unsigned int*)(0x42C61630UL))
\r
9408 #define bFM3_CAN1_MSGVAL_MSGVAL14 *((volatile unsigned int*)(0x42C61634UL))
\r
9409 #define bFM3_CAN1_MSGVAL_MSGVAL15 *((volatile unsigned int*)(0x42C61638UL))
\r
9410 #define bFM3_CAN1_MSGVAL_MSGVAL16 *((volatile unsigned int*)(0x42C6163CUL))
\r
9411 #define bFM3_CAN1_MSGVAL_MSGVAL17 *((volatile unsigned int*)(0x42C61640UL))
\r
9412 #define bFM3_CAN1_MSGVAL_MSGVAL18 *((volatile unsigned int*)(0x42C61644UL))
\r
9413 #define bFM3_CAN1_MSGVAL_MSGVAL19 *((volatile unsigned int*)(0x42C61648UL))
\r
9414 #define bFM3_CAN1_MSGVAL_MSGVAL20 *((volatile unsigned int*)(0x42C6164CUL))
\r
9415 #define bFM3_CAN1_MSGVAL_MSGVAL21 *((volatile unsigned int*)(0x42C61650UL))
\r
9416 #define bFM3_CAN1_MSGVAL_MSGVAL22 *((volatile unsigned int*)(0x42C61654UL))
\r
9417 #define bFM3_CAN1_MSGVAL_MSGVAL23 *((volatile unsigned int*)(0x42C61658UL))
\r
9418 #define bFM3_CAN1_MSGVAL_MSGVAL24 *((volatile unsigned int*)(0x42C6165CUL))
\r
9419 #define bFM3_CAN1_MSGVAL_MSGVAL25 *((volatile unsigned int*)(0x42C61660UL))
\r
9420 #define bFM3_CAN1_MSGVAL_MSGVAL26 *((volatile unsigned int*)(0x42C61664UL))
\r
9421 #define bFM3_CAN1_MSGVAL_MSGVAL27 *((volatile unsigned int*)(0x42C61668UL))
\r
9422 #define bFM3_CAN1_MSGVAL_MSGVAL28 *((volatile unsigned int*)(0x42C6166CUL))
\r
9423 #define bFM3_CAN1_MSGVAL_MSGVAL29 *((volatile unsigned int*)(0x42C61670UL))
\r
9424 #define bFM3_CAN1_MSGVAL_MSGVAL30 *((volatile unsigned int*)(0x42C61674UL))
\r
9425 #define bFM3_CAN1_MSGVAL_MSGVAL31 *((volatile unsigned int*)(0x42C61678UL))
\r
9426 #define bFM3_CAN1_MSGVAL_MSGVAL32 *((volatile unsigned int*)(0x42C6167CUL))
\r
9427 #define bFM3_CAN1_MSGVAL1_MSGVAL1 *((volatile unsigned int*)(0x42C61600UL))
\r
9428 #define bFM3_CAN1_MSGVAL1_MSGVAL2 *((volatile unsigned int*)(0x42C61604UL))
\r
9429 #define bFM3_CAN1_MSGVAL1_MSGVAL3 *((volatile unsigned int*)(0x42C61608UL))
\r
9430 #define bFM3_CAN1_MSGVAL1_MSGVAL4 *((volatile unsigned int*)(0x42C6160CUL))
\r
9431 #define bFM3_CAN1_MSGVAL1_MSGVAL5 *((volatile unsigned int*)(0x42C61610UL))
\r
9432 #define bFM3_CAN1_MSGVAL1_MSGVAL6 *((volatile unsigned int*)(0x42C61614UL))
\r
9433 #define bFM3_CAN1_MSGVAL1_MSGVAL7 *((volatile unsigned int*)(0x42C61618UL))
\r
9434 #define bFM3_CAN1_MSGVAL1_MSGVAL8 *((volatile unsigned int*)(0x42C6161CUL))
\r
9435 #define bFM3_CAN1_MSGVAL1_MSGVAL9 *((volatile unsigned int*)(0x42C61620UL))
\r
9436 #define bFM3_CAN1_MSGVAL1_MSGVAL10 *((volatile unsigned int*)(0x42C61624UL))
\r
9437 #define bFM3_CAN1_MSGVAL1_MSGVAL11 *((volatile unsigned int*)(0x42C61628UL))
\r
9438 #define bFM3_CAN1_MSGVAL1_MSGVAL12 *((volatile unsigned int*)(0x42C6162CUL))
\r
9439 #define bFM3_CAN1_MSGVAL1_MSGVAL13 *((volatile unsigned int*)(0x42C61630UL))
\r
9440 #define bFM3_CAN1_MSGVAL1_MSGVAL14 *((volatile unsigned int*)(0x42C61634UL))
\r
9441 #define bFM3_CAN1_MSGVAL1_MSGVAL15 *((volatile unsigned int*)(0x42C61638UL))
\r
9442 #define bFM3_CAN1_MSGVAL1_MSGVAL16 *((volatile unsigned int*)(0x42C6163CUL))
\r
9443 #define bFM3_CAN1_MSGVAL2_MSGVAL17 *((volatile unsigned int*)(0x42C61640UL))
\r
9444 #define bFM3_CAN1_MSGVAL2_MSGVAL18 *((volatile unsigned int*)(0x42C61644UL))
\r
9445 #define bFM3_CAN1_MSGVAL2_MSGVAL19 *((volatile unsigned int*)(0x42C61648UL))
\r
9446 #define bFM3_CAN1_MSGVAL2_MSGVAL20 *((volatile unsigned int*)(0x42C6164CUL))
\r
9447 #define bFM3_CAN1_MSGVAL2_MSGVAL21 *((volatile unsigned int*)(0x42C61650UL))
\r
9448 #define bFM3_CAN1_MSGVAL2_MSGVAL22 *((volatile unsigned int*)(0x42C61654UL))
\r
9449 #define bFM3_CAN1_MSGVAL2_MSGVAL23 *((volatile unsigned int*)(0x42C61658UL))
\r
9450 #define bFM3_CAN1_MSGVAL2_MSGVAL24 *((volatile unsigned int*)(0x42C6165CUL))
\r
9451 #define bFM3_CAN1_MSGVAL2_MSGVAL25 *((volatile unsigned int*)(0x42C61660UL))
\r
9452 #define bFM3_CAN1_MSGVAL2_MSGVAL26 *((volatile unsigned int*)(0x42C61664UL))
\r
9453 #define bFM3_CAN1_MSGVAL2_MSGVAL27 *((volatile unsigned int*)(0x42C61668UL))
\r
9454 #define bFM3_CAN1_MSGVAL2_MSGVAL28 *((volatile unsigned int*)(0x42C6166CUL))
\r
9455 #define bFM3_CAN1_MSGVAL2_MSGVAL29 *((volatile unsigned int*)(0x42C61670UL))
\r
9456 #define bFM3_CAN1_MSGVAL2_MSGVAL30 *((volatile unsigned int*)(0x42C61674UL))
\r
9457 #define bFM3_CAN1_MSGVAL2_MSGVAL31 *((volatile unsigned int*)(0x42C61678UL))
\r
9458 #define bFM3_CAN1_MSGVAL2_MSGVAL32 *((volatile unsigned int*)(0x42C6167CUL))
\r
9460 #ifdef __cplusplus
\r
9464 #endif /* _MB9BF506N_H_ */
\r