1 //*****************************************************************************
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8 // +----+ Copyright (c) 2009 Code Red Technologies Ltd.
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10 // Microcontroller Startup code for use with Red Suite
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12 // Software License Agreement
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14 // The software is owned by Code Red Technologies and/or its suppliers, and is
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15 // protected under applicable copyright laws. All rights are reserved. Any
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16 // use in violation of the foregoing restrictions may subject the user to criminal
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17 // sanctions under applicable laws, as well as to civil liability for the breach
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18 // of the terms and conditions of this license.
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20 // THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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21 // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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22 // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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23 // USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
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24 // TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
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25 // CODE RED TECHNOLOGIES LTD.
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27 //*****************************************************************************
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28 #define WEAK __attribute__ ((weak))
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29 #define ALIAS(f) __attribute__ ((weak, alias (#f)))
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31 //*****************************************************************************
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33 // Forward declaration of the default handlers.
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35 //*****************************************************************************
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36 void Reset_Handler(void);
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37 void ResetISR(void) ALIAS(Reset_Handler);
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38 static void NMI_Handler(void);
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39 static void HardFault_Handler(void);
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40 static void MemManage_Handler(void) __attribute__((naked));
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41 static void BusFault_Handler(void) __attribute__((naked));
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42 static void UsageFault_Handler(void) __attribute__((naked));
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43 static void DebugMon_Handler(void);
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45 //*****************************************************************************
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47 // Forward declaration of the specific IRQ handlers. These are aliased
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48 // to the IntDefaultHandler, which is a 'forever' loop. When the application
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49 // defines a handler (with the same name), this will automatically take
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50 // precedence over these weak definitions
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52 //*****************************************************************************
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53 void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
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54 void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
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55 void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
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56 void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
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57 void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
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58 void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
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59 void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
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60 void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
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61 void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
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62 void PWM1_IRQHandler(void) ALIAS(IntDefaultHandler);
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63 void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
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64 void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
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65 void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler);
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66 void SPI_IRQHandler(void) ALIAS(IntDefaultHandler);
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67 void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
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68 void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
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69 void PLL0_IRQHandler(void) ALIAS(IntDefaultHandler);
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70 void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
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71 void EINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
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72 void EINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
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73 void EINT2_IRQHandler(void) ALIAS(IntDefaultHandler);
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74 void EINT3_IRQHandler(void) ALIAS(IntDefaultHandler);
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75 void ADC_IRQHandler(void) ALIAS(IntDefaultHandler);
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76 void BOD_IRQHandler(void) ALIAS(IntDefaultHandler);
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77 void USB_IRQHandler(void) ALIAS(IntDefaultHandler);
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78 void CAN_IRQHandler(void) ALIAS(IntDefaultHandler);
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79 void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
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80 void I2S_IRQHandler(void) ALIAS(IntDefaultHandler);
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81 void ENET_IRQHandler(void) ALIAS(IntDefaultHandler);
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82 void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
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83 void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
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84 void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
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85 void PLL1_IRQHandler(void) ALIAS(IntDefaultHandler);
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87 extern void xPortSysTickHandler(void);
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88 extern void xPortPendSVHandler(void);
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89 extern void vPortSVCHandler( void );
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92 //*****************************************************************************
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94 // The entry point for the C++ library startup
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96 //*****************************************************************************
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97 extern WEAK void __libc_init_array(void);
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99 //*****************************************************************************
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101 // The entry point for the application.
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102 // __main() is the entry point for redlib based applications
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103 // main() is the entry point for newlib based applications
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105 //*****************************************************************************
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106 extern WEAK void __main(void);
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107 extern WEAK void main(void);
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108 //*****************************************************************************
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110 // External declaration for the pointer to the stack top from the Linker Script
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112 //*****************************************************************************
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113 extern void _vStackTop;
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115 //*****************************************************************************
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117 // The vector table.
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118 // This relies on the linker script to place at correct location in memory.
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120 //*****************************************************************************
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121 __attribute__ ((section(".isr_vector")))
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122 void (* const g_pfnVectors[])(void) =
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124 // Core Level - CM3
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125 (void *)&_vStackTop, // The initial stack pointer
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126 Reset_Handler, // The reset handler
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127 NMI_Handler, // The NMI handler
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128 HardFault_Handler, // The hard fault handler
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129 MemManage_Handler, // The MPU fault handler
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130 BusFault_Handler, // The bus fault handler
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131 UsageFault_Handler, // The usage fault handler
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136 vPortSVCHandler, // SVCall handler
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137 DebugMon_Handler, // Debug monitor handler
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139 xPortPendSVHandler, // The PendSV handler
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140 xPortSysTickHandler, // The SysTick handler
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142 // Chip Level - LPC17
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143 WDT_IRQHandler, // 16, 0x40 - WDT
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144 TIMER0_IRQHandler, // 17, 0x44 - TIMER0
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145 TIMER1_IRQHandler, // 18, 0x48 - TIMER1
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146 TIMER2_IRQHandler, // 19, 0x4c - TIMER2
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147 TIMER3_IRQHandler, // 20, 0x50 - TIMER3
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148 UART0_IRQHandler, // 21, 0x54 - UART0
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149 UART1_IRQHandler, // 22, 0x58 - UART1
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150 UART2_IRQHandler, // 23, 0x5c - UART2
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151 UART3_IRQHandler, // 24, 0x60 - UART3
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152 PWM1_IRQHandler, // 25, 0x64 - PWM1
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153 I2C0_IRQHandler, // 26, 0x68 - I2C0
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154 I2C1_IRQHandler, // 27, 0x6c - I2C1
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155 I2C2_IRQHandler, // 28, 0x70 - I2C2
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156 SPI_IRQHandler, // 29, 0x74 - SPI
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157 SSP0_IRQHandler, // 30, 0x78 - SSP0
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158 SSP1_IRQHandler, // 31, 0x7c - SSP1
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159 PLL0_IRQHandler, // 32, 0x80 - PLL0 (Main PLL)
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160 RTC_IRQHandler, // 33, 0x84 - RTC
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161 EINT0_IRQHandler, // 34, 0x88 - EINT0
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162 EINT1_IRQHandler, // 35, 0x8c - EINT1
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163 EINT2_IRQHandler, // 36, 0x90 - EINT2
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164 EINT3_IRQHandler, // 37, 0x94 - EINT3
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165 ADC_IRQHandler, // 38, 0x98 - ADC
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166 BOD_IRQHandler, // 39, 0x9c - BOD
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167 USB_IRQHandler, // 40, 0xA0 - USB
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168 CAN_IRQHandler, // 41, 0xa4 - CAN
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169 DMA_IRQHandler, // 42, 0xa8 - GP DMA
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170 I2S_IRQHandler, // 43, 0xac - I2S
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171 ENET_IRQHandler, // Ethernet.
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172 RIT_IRQHandler, // 45, 0xb4 - RITINT
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173 MCPWM_IRQHandler, // 46, 0xb8 - Motor Control PWM
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174 QEI_IRQHandler, // 47, 0xbc - Quadrature Encoder
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175 PLL1_IRQHandler, // 48, 0xc0 - PLL1 (USB PLL)
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178 //*****************************************************************************
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180 // The following are constructs created by the linker, indicating where the
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181 // the "data" and "bss" segments reside in memory. The initializers for the
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182 // for the "data" segment resides immediately following the "text" segment.
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184 //*****************************************************************************
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185 extern unsigned long _etext;
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186 extern unsigned long _data;
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187 extern unsigned long _edata;
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188 extern unsigned long _bss;
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189 extern unsigned long _ebss;
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190 extern unsigned long __privileged_data_start__;
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191 extern unsigned long __privileged_data_end__;
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193 //*****************************************************************************
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194 // Reset entry point for your code.
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195 // Sets up a simple runtime environment and initializes the C/C++
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198 //*****************************************************************************
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199 void Reset_Handler(void)
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201 unsigned long *pulSrc, *pulDest;
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204 // Copy the data segment initializers from flash to SRAM.
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207 for(pulDest = &_data; pulDest < &_edata; )
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209 *pulDest++ = *pulSrc++;
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213 // Zero fill the bss segment. This is done with inline assembly since this
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214 // will clear the value of pulDest if it is not kept in a register.
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216 __asm(" ldr r0, =_bss\n"
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217 " ldr r1, =_ebss\n"
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223 " strlt r2, [r0], #4\n"
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224 " blt zero_loop_bss");
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228 // Call C++ library initilisation, if present
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230 if (__libc_init_array)
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231 __libc_init_array() ;
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234 // Call the application's entry point.
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235 // __main() is the entry point for redlib based applications (which calls main())
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236 // main() is the entry point for newlib based applications
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244 // main() shouldn't return, but if it does, we'll just enter an infinite loop
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251 //*****************************************************************************
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253 // This is the code that gets called when the processor receives a NMI. This
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254 // simply enters an infinite loop, preserving the system state for examination
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257 //*****************************************************************************
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258 static void NMI_Handler(void)
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265 static void HardFault_Handler(void)
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270 void pop_registers_from_fault_stack(unsigned int * hardfault_args)
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272 unsigned int stacked_r0;
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273 unsigned int stacked_r1;
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274 unsigned int stacked_r2;
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275 unsigned int stacked_r3;
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276 unsigned int stacked_r12;
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277 unsigned int stacked_lr;
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278 unsigned int stacked_pc;
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279 unsigned int stacked_psr;
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281 stacked_r0 = ((unsigned long) hardfault_args[0]);
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282 stacked_r1 = ((unsigned long) hardfault_args[1]);
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283 stacked_r2 = ((unsigned long) hardfault_args[2]);
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284 stacked_r3 = ((unsigned long) hardfault_args[3]);
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286 stacked_r12 = ((unsigned long) hardfault_args[4]);
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287 stacked_lr = ((unsigned long) hardfault_args[5]);
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288 stacked_pc = ((unsigned long) hardfault_args[6]);
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289 stacked_psr = ((unsigned long) hardfault_args[7]);
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291 /* Inspect stacked_pc to locate the offending instruction. */
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295 static void MemManage_Handler(void)
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301 " mrseq r0, msp \n"
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302 " mrsne r0, psp \n"
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303 " ldr r1, [r0, #24] \n"
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304 " ldr r2, handler2_address_const \n"
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306 " handler2_address_const: .word pop_registers_from_fault_stack \n"
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310 static void BusFault_Handler(void)
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316 " mrseq r0, msp \n"
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317 " mrsne r0, psp \n"
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318 " ldr r1, [r0, #24] \n"
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319 " ldr r2, handler3_address_const \n"
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321 " handler3_address_const: .word pop_registers_from_fault_stack \n"
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325 static void UsageFault_Handler(void)
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331 " mrseq r0, msp \n"
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332 " mrsne r0, psp \n"
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333 " ldr r1, [r0, #24] \n"
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334 " ldr r2, handler4_address_const \n"
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336 " handler4_address_const: .word pop_registers_from_fault_stack \n"
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340 static void DebugMon_Handler(void)
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347 //*****************************************************************************
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349 // Processor ends up here if an unexpected interrupt occurs or a handler
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350 // is not present in the application code.
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352 //*****************************************************************************
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353 static void IntDefaultHandler(void)
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356 // Go into an infinite loop.
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