1 /******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
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2 * File Name : stm32f10x_tim1.c
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3 * Author : MCD Application Team
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4 * Date First Issued : 09/29/2006
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5 * Description : This file provides all the TIM1 software functions.
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6 ********************************************************************************
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11 ********************************************************************************
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12 * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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14 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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15 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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16 * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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17 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 *******************************************************************************/
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20 /* Includes ------------------------------------------------------------------*/
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21 #include "stm32f10x_tim1.h"
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22 #include "stm32f10x_rcc.h"
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24 /* Private typedef -----------------------------------------------------------*/
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25 /* Private define ------------------------------------------------------------*/
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27 /* ------------ TIM1 registers bit address in the alias region ----------- */
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28 #define TIM1_OFFSET (TIM1_BASE - PERIPH_BASE)
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30 /* --- TIM1 CR1 Register ---*/
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31 /* Alias word address of CEN bit */
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32 #define CR1_OFFSET (TIM1_OFFSET + 0x00)
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33 #define CEN_BitNumber 0x00
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34 #define CR1_CEN_BB (PERIPH_BB_BASE + (CR1_OFFSET * 32) + (CEN_BitNumber * 4))
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36 /* Alias word address of UDIS bit */
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37 #define UDIS_BitNumber 0x01
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38 #define CR1_UDIS_BB (PERIPH_BB_BASE + (CR1_OFFSET * 32) + (UDIS_BitNumber * 4))
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40 /* Alias word address of URS bit */
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41 #define URS_BitNumber 0x02
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42 #define CR1_URS_BB (PERIPH_BB_BASE + (CR1_OFFSET * 32) + (URS_BitNumber * 4))
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44 /* Alias word address of OPM bit */
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45 #define OPM_BitNumber 0x03
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46 #define CR1_OPM_BB (PERIPH_BB_BASE + (CR1_OFFSET * 32) + (OPM_BitNumber * 4))
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48 /* Alias word address of ARPE bit */
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49 #define ARPE_BitNumber 0x07
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50 #define CR1_ARPE_BB (PERIPH_BB_BASE + (CR1_OFFSET * 32) + (ARPE_BitNumber * 4))
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52 /* --- TIM1 CR2 Register --- */
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53 /* Alias word address of CCPC bit */
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54 #define CR2_OFFSET (TIM1_OFFSET + 0x04)
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55 #define CCPC_BitNumber 0x00
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56 #define CR2_CCPC_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (CCPC_BitNumber * 4))
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58 /* Alias word address of CCUS bit */
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59 #define CCUS_BitNumber 0x02
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60 #define CR2_CCUS_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (CCUS_BitNumber * 4))
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62 /* Alias word address of CCDS bit */
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63 #define CCDS_BitNumber 0x03
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64 #define CR2_CCDS_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (CCDS_BitNumber * 4))
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66 /* Alias word address of TI1S bit */
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67 #define TI1S_BitNumber 0x07
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68 #define CR2_TI1S_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (TI1S_BitNumber * 4))
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70 /* Alias word address of OIS1 bit */
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71 #define OIS1_BitNumber 0x08
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72 #define CR2_OIS1_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS1_BitNumber * 4))
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74 /* Alias word address of OIS1N bit */
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75 #define OIS1N_BitNumber 0x09
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76 #define CR2_OIS1N_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS1N_BitNumber * 4))
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78 /* Alias word address of OIS2 bit */
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79 #define OIS2_BitNumber 0x0A
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80 #define CR2_OIS2_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS2_BitNumber * 4))
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82 /* Alias word address of OIS2N bit */
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83 #define OIS2N_BitNumber 0x0B
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84 #define CR2_OIS2N_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS2N_BitNumber * 4))
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86 /* Alias word address of OIS3 bit */
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87 #define OIS3_BitNumber 0x0C
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88 #define CR2_OIS3_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS3_BitNumber * 4))
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90 /* Alias word address of OIS3N bit */
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91 #define OIS3N_BitNumber 0x0D
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92 #define CR2_OIS3N_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS3N_BitNumber * 4))
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94 /* Alias word address of OIS4 bit */
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95 #define OIS4_BitNumber 0x0E
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96 #define CR2_OIS4_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS4_BitNumber * 4))
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98 /* --- TIM1 SMCR Register --- */
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99 /* Alias word address of MSM bit */
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100 #define SMCR_OFFSET (TIM1_OFFSET + 0x08)
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101 #define MSM_BitNumber 0x07
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102 #define SMCR_MSM_BB (PERIPH_BB_BASE + (SMCR_OFFSET * 32) + (MSM_BitNumber * 4))
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104 /* Alias word address of ECE bit */
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105 #define ECE_BitNumber 0x0E
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106 #define SMCR_ECE_BB (PERIPH_BB_BASE + (SMCR_OFFSET * 32) + (ECE_BitNumber * 4))
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108 /* --- TIM1 EGR Register --- */
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109 /* Alias word address of UG bit */
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110 #define EGR_OFFSET (TIM1_OFFSET + 0x14)
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111 #define UG_BitNumber 0x00
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112 #define EGR_UG_BB (PERIPH_BB_BASE + (EGR_OFFSET * 32) + (UG_BitNumber * 4))
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114 /* --- TIM1 CCER Register --- */
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115 /* Alias word address of CC1E bit */
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116 #define CCER_OFFSET (TIM1_OFFSET + 0x20)
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117 #define CC1E_BitNumber 0x00
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118 #define CCER_CC1E_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC1E_BitNumber * 4))
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120 /* Alias word address of CC1P bit */
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121 #define CC1P_BitNumber 0x01
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122 #define CCER_CC1P_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC1P_BitNumber * 4))
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124 /* Alias word address of CC1NE bit */
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125 #define CC1NE_BitNumber 0x02
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126 #define CCER_CC1NE_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC1NE_BitNumber * 4))
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128 /* Alias word address of CC1NP bit */
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129 #define CC1NP_BitNumber 0x03
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130 #define CCER_CC1NP_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC1NP_BitNumber * 4))
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132 /* Alias word address of CC2E bit */
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133 #define CC2E_BitNumber 0x04
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134 #define CCER_CC2E_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC2E_BitNumber * 4))
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136 /* Alias word address of CC2P bit */
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137 #define CC2P_BitNumber 0x05
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138 #define CCER_CC2P_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC2P_BitNumber * 4))
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140 /* Alias word address of CC2NE bit */
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141 #define CC2NE_BitNumber 0x06
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142 #define CCER_CC2NE_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC2NE_BitNumber * 4))
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144 /* Alias word address of CC2NP bit */
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145 #define CC2NP_BitNumber 0x07
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146 #define CCER_CC2NP_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC2NP_BitNumber * 4))
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148 /* Alias word address of CC3E bit */
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149 #define CC3E_BitNumber 0x08
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150 #define CCER_CC3E_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC3E_BitNumber * 4))
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152 /* Alias word address of CC3P bit */
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153 #define CC3P_BitNumber 0x09
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154 #define CCER_CC3P_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC3P_BitNumber * 4))
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156 /* Alias word address of CC3NE bit */
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157 #define CC3NE_BitNumber 0x0A
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158 #define CCER_CC3NE_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC3NE_BitNumber * 4))
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160 /* Alias word address of CC3NP bit */
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161 #define CC3NP_BitNumber 0x0B
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162 #define CCER_CC3NP_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC3NP_BitNumber * 4))
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164 /* Alias word address of CC4E bit */
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165 #define CC4E_BitNumber 0x0C
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166 #define CCER_CC4E_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC4E_BitNumber * 4))
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168 /* Alias word address of CC4P bit */
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169 #define CC4P_BitNumber 0x0D
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170 #define CCER_CC4P_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC4P_BitNumber * 4))
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172 /* --- TIM1 BDTR Register --- */
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173 /* Alias word address of MOE bit */
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174 #define BDTR_OFFSET (TIM1_OFFSET + 0x44)
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175 #define MOE_BitNumber 0x0F
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176 #define BDTR_MOE_BB (PERIPH_BB_BASE + (BDTR_OFFSET * 32) + (MOE_BitNumber * 4))
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178 /* --- TIM1 CCMR1 Register --- */
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179 /* Alias word address of OC1FE bit */
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180 #define CCMR1_OFFSET (TIM1_OFFSET + 0x18)
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181 #define OC1FE_BitNumber 0x02
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182 #define CCMR1_OC1FE_BB (PERIPH_BB_BASE + (CCMR1_OFFSET * 32) + (OC1FE_BitNumber * 4))
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184 /* Alias word address of OC1PE bit */
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185 #define OC1PE_BitNumber 0x03
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186 #define CCMR1_OC1PE_BB (PERIPH_BB_BASE + (CCMR1_OFFSET * 32) + (OC1PE_BitNumber * 4))
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188 /* Alias word address of OC2FE bit */
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189 #define OC2FE_BitNumber 0x0A
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190 #define CCMR1_OC2FE_BB (PERIPH_BB_BASE + (CCMR1_OFFSET * 32) + (OC2FE_BitNumber * 4))
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192 /* Alias word address of OC2PE bit */
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193 #define OC2PE_BitNumber 0x0B
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194 #define CCMR1_OC2PE_BB (PERIPH_BB_BASE + (CCMR1_OFFSET * 32) + (OC2PE_BitNumber * 4))
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196 /* --- TIM1 CCMR2 Register ---- */
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197 /* Alias word address of OC3FE bit */
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198 #define CCMR2_OFFSET (TIM1_OFFSET + 0x1C)
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199 #define OC3FE_BitNumber 0x02
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200 #define CCMR2_OC3FE_BB (PERIPH_BB_BASE + (CCMR2_OFFSET * 32) + (OC3FE_BitNumber * 4))
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202 /* Alias word address of OC3PE bit */
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203 #define OC3PE_BitNumber 0x03
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204 #define CCMR2_OC3PE_BB (PERIPH_BB_BASE + (CCMR2_OFFSET * 32) + (OC3PE_BitNumber * 4))
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206 /* Alias word address of OC4FE bit */
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207 #define OC4FE_BitNumber 0x0A
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208 #define CCMR2_OC4FE_BB (PERIPH_BB_BASE + (CCMR2_OFFSET * 32) + (OC4FE_BitNumber * 4))
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210 /* Alias word address of OC4PE bit */
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211 #define OC4PE_BitNumber 0x0B
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212 #define CCMR2_OC4PE_BB (PERIPH_BB_BASE + (CCMR2_OFFSET * 32) + (OC4PE_BitNumber * 4))
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214 /* --------------------- TIM1 registers bit mask ------------------------- */
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215 /* TIM1 CR1 Mask */
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216 #define CR1_CounterMode_Mask ((u16)0x039F)
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217 #define CR1_CKD_Mask ((u16)0x00FF)
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219 /* TIM1 CR2 Mask */
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220 #define CR2_MMS_Mask ((u16)0x0080)
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222 /* TIM1 SMCR Mask */
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223 #define SMCR_SMS_Mask ((u16)0xFFF0)
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224 #define SMCR_ETR_Mask ((u16)0x40F7)
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225 #define SMCR_TS_Mask ((u16)0xFF87)
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226 #define SMCR_ECE_Set ((u16)0x0001)
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228 /* TIM1 CCMRx Mask */
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229 #define CCMR_CC13S_Mask ((u16)0xFFFC)
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230 #define CCMR_CC24S_Mask ((u16)0xFCFF)
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231 #define CCMR_TI13Direct_Set ((u16)0x0001)
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232 #define CCMR_TI24Direct_Set ((u16)0x0100)
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233 #define CCMR_OCM13_Mask ((u16)0x7F0F)
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234 #define CCMR_OCM24_Mask ((u16)0x0F7F)
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235 #define CCMR_IC13PSC_Mask ((u16)0xFFF3)
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236 #define CCMR_IC24PSC_Mask ((u16)0xF3FF)
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237 #define CCMR_IC13F_Mask ((u16)0xFF0F)
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238 #define CCMR_IC24F_Mask ((u16)0x0FFF)
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239 #define OC13Mode_Mask ((u16)0xFF00)
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240 #define OC24Mode_Mask ((u16)0x00FF)
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242 /* TIM1 CCER Set/Reset Bit */
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243 #define CCER_CCE_Set ((u16)0x0001)
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244 #define CCER_CCE_Reset ((u16)0x0000)
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246 /* TIM1 DMA Mask */
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247 #define DCR_DMA_Mask ((u16)0x0000)
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249 /* TIM1 private Masks */
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250 #define TIM1_Period_Reset_Mask ((u16)0xFFFF)
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251 #define TIM1_Prescaler_Reset_Mask ((u16)0x0000)
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252 #define TIM1_RepetitionCounter_Reset_Mask ((u16)0x0000)
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253 #define TIM1_Pulse_Reset_Mask ((u16)0x0000)
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254 #define TIM1_ICFilter_Mask ((u8)0x00)
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255 #define TIM1_DeadTime_Reset_Mask ((u16)0x0000)
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257 /* Private macro -------------------------------------------------------------*/
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258 /* Private variables ---------------------------------------------------------*/
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259 /* Private function prototypes -----------------------------------------------*/
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260 static void ETR_Config(u16 TIM1_ExtTRGPrescaler, u16 TIM1_ExtTRGPolarity,
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262 static void TI1_Config(u16 TIM1_ICPolarity, u16 TIM1_ICSelection,
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264 static void TI2_Config(u16 TIM1_ICPolarity, u16 TIM1_ICSelection,
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266 static void TI3_Config(u16 TIM1_ICPolarity, u16 TIM1_ICSelection,
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268 static void TI4_Config(u16 TIM1_ICPolarity, u16 TIM1_ICSelection,
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271 /*******************************************************************************
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272 * Function Name : TIM1_DeInit
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273 * Description : Deinitializes the TIM1 peripheral registers to their default
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278 *******************************************************************************/
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279 void TIM1_DeInit(void)
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281 RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, ENABLE);
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282 RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, DISABLE);
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285 /*******************************************************************************
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286 * Function Name : TIM1_TimeBaseInit
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287 * Description : Initializes the TIM1 Time Base Unit according to the specified
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288 * parameters in the TIM1_TimeBaseInitStruct.
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289 * Input : - TIM1_TimeBaseInitStruct: pointer to a TIM1_TimeBaseInitTypeDef
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290 * structure that contains the configuration information for
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291 * the specified TIM1 peripheral.
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294 *******************************************************************************/
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295 void TIM1_TimeBaseInit(TIM1_TimeBaseInitTypeDef* TIM1_TimeBaseInitStruct)
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297 /* Check the parameters */
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298 assert(IS_TIM1_COUNTER_MODE(TIM1_TimeBaseInitStruct->TIM1_CounterMode));
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299 assert(IS_TIM1_CKD_DIV(TIM1_TimeBaseInitStruct->TIM1_ClockDivision));
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301 /* Set the Autoreload value */
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302 TIM1->ARR = TIM1_TimeBaseInitStruct->TIM1_Period ;
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304 /* Set the Prescaler value */
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305 TIM1->PSC = TIM1_TimeBaseInitStruct->TIM1_Prescaler;
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307 /* Select the Counter Mode and set the clock division */
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308 TIM1->CR1 &= CR1_CKD_Mask & CR1_CounterMode_Mask;
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309 TIM1->CR1 |= (u32)TIM1_TimeBaseInitStruct->TIM1_ClockDivision |
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310 TIM1_TimeBaseInitStruct->TIM1_CounterMode;
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312 /* Set the Repetition Counter value */
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313 TIM1->RCR = TIM1_TimeBaseInitStruct->TIM1_RepetitionCounter;
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316 /*******************************************************************************
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317 * Function Name : TIM1_OC1Init
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318 * Description : Initializes the TIM1 Channel1 according to the specified
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319 * parameters in the TIM1_OCInitStruct.
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320 * Input : - TIM1_OCInitStruct: pointer to a TIM1_OCInitTypeDef structure that
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321 * contains the configuration information for the TIM1 peripheral.
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324 *******************************************************************************/
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325 void TIM1_OC1Init(TIM1_OCInitTypeDef* TIM1_OCInitStruct)
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329 /* Check the parameters */
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330 assert(IS_TIM1_OC_MODE(TIM1_OCInitStruct->TIM1_OCMode));
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331 assert(IS_TIM1_OUTPUT_STATE(TIM1_OCInitStruct->TIM1_OutputState));
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332 assert(IS_TIM1_OUTPUTN_STATE(TIM1_OCInitStruct->TIM1_OutputNState));
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333 assert(IS_TIM1_OC_POLARITY(TIM1_OCInitStruct->TIM1_OCPolarity));
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334 assert(IS_TIM1_OCN_POLARITY(TIM1_OCInitStruct->TIM1_OCNPolarity));
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335 assert(IS_TIM1_OCIDLE_STATE(TIM1_OCInitStruct->TIM1_OCIdleState));
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336 assert(IS_TIM1_OCNIDLE_STATE(TIM1_OCInitStruct->TIM1_OCNIdleState));
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338 tmpccmr = TIM1->CCMR1;
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340 /* Disable the Channel 1: Reset the CCE Bit */
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341 *(vu32 *) CCER_CC1E_BB = CCER_CCE_Reset;
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343 /* Reset the Output Compare Bits */
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344 tmpccmr &= OC13Mode_Mask;
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346 /* Set the Ouput Compare Mode */
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347 tmpccmr |= TIM1_OCInitStruct->TIM1_OCMode;
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349 TIM1->CCMR1 = tmpccmr;
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351 /* Set the Output State */
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352 *(vu32 *) CCER_CC1E_BB = TIM1_OCInitStruct->TIM1_OutputState;
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354 /* Set the Output N State */
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355 *(vu32 *) CCER_CC1NE_BB = TIM1_OCInitStruct->TIM1_OutputNState;
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357 /* Set the Output Polarity */
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358 *(vu32 *) CCER_CC1P_BB = TIM1_OCInitStruct->TIM1_OCPolarity;
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360 /* Set the Output N Polarity */
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361 *(vu32 *) CCER_CC1NP_BB = TIM1_OCInitStruct->TIM1_OCNPolarity;
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363 /* Set the Output Idle state */
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364 *(vu32 *) CR2_OIS1_BB = TIM1_OCInitStruct->TIM1_OCIdleState;
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366 /* Set the Output N Idle state */
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367 *(vu32 *) CR2_OIS1N_BB = TIM1_OCInitStruct->TIM1_OCNIdleState;
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369 /* Set the Pulse value */
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370 TIM1->CCR1 = TIM1_OCInitStruct->TIM1_Pulse;
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373 /*******************************************************************************
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374 * Function Name : TIM1_OC2Init
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375 * Description : Initializes the TIM1 Channel2 according to the specified
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376 * parameters in the TIM1_OCInitStruct.
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377 * Input : - TIM1_OCInitStruct: pointer to a TIM1_OCInitTypeDef structure that
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378 * contains the configuration information for the TIM1 peripheral.
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381 *******************************************************************************/
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382 void TIM1_OC2Init(TIM1_OCInitTypeDef* TIM1_OCInitStruct)
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386 /* Check the parameters */
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387 assert(IS_TIM1_OC_MODE(TIM1_OCInitStruct->TIM1_OCMode));
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388 assert(IS_TIM1_OUTPUT_STATE(TIM1_OCInitStruct->TIM1_OutputState));
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389 assert(IS_TIM1_OUTPUTN_STATE(TIM1_OCInitStruct->TIM1_OutputNState));
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390 assert(IS_TIM1_OC_POLARITY(TIM1_OCInitStruct->TIM1_OCPolarity));
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391 assert(IS_TIM1_OCN_POLARITY(TIM1_OCInitStruct->TIM1_OCNPolarity));
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392 assert(IS_TIM1_OCIDLE_STATE(TIM1_OCInitStruct->TIM1_OCIdleState));
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393 assert(IS_TIM1_OCNIDLE_STATE(TIM1_OCInitStruct->TIM1_OCNIdleState));
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395 tmpccmr = TIM1->CCMR1;
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397 /* Disable the Channel 2: Reset the CCE Bit */
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398 *(vu32 *) CCER_CC2E_BB = CCER_CCE_Reset;
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400 /* Reset the Output Compare Bits */
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401 tmpccmr &= OC24Mode_Mask;
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403 /* Set the Ouput Compare Mode */
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404 tmpccmr |= (u32)TIM1_OCInitStruct->TIM1_OCMode << 8;
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406 TIM1->CCMR1 = (u16)tmpccmr;
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408 /* Set the Output State */
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409 *(vu32 *) CCER_CC2E_BB = TIM1_OCInitStruct->TIM1_OutputState;
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411 /* Set the Output N State */
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412 *(vu32 *) CCER_CC2NE_BB = TIM1_OCInitStruct->TIM1_OutputNState;
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414 /* Set the Output Polarity */
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415 *(vu32 *) CCER_CC2P_BB = TIM1_OCInitStruct->TIM1_OCPolarity;
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417 /* Set the Output N Polarity */
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418 *(vu32 *) CCER_CC2NP_BB = TIM1_OCInitStruct->TIM1_OCNPolarity;
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420 /* Set the Output Idle state */
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421 *(vu32 *) CR2_OIS2_BB = TIM1_OCInitStruct->TIM1_OCIdleState;
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423 /* Set the Output N Idle state */
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424 *(vu32 *) CR2_OIS2N_BB = TIM1_OCInitStruct->TIM1_OCNIdleState;
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426 /* Set the Pulse value */
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427 TIM1->CCR2 = TIM1_OCInitStruct->TIM1_Pulse;
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430 /*******************************************************************************
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431 * Function Name : TIM1_OC3Init
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432 * Description : Initializes the TIM1 Channel3 according to the specified
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433 * parameters in the TIM1_OCInitStruct.
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434 * Input : - TIM1_OCInitStruct: pointer to a TIM1_OCInitTypeDef structure that
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435 * contains the configuration information for the TIM1 peripheral.
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438 *******************************************************************************/
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439 void TIM1_OC3Init(TIM1_OCInitTypeDef* TIM1_OCInitStruct)
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443 /* Check the parameters */
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444 assert(IS_TIM1_OC_MODE(TIM1_OCInitStruct->TIM1_OCMode));
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445 assert(IS_TIM1_OUTPUT_STATE(TIM1_OCInitStruct->TIM1_OutputState));
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446 assert(IS_TIM1_OUTPUTN_STATE(TIM1_OCInitStruct->TIM1_OutputNState));
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447 assert(IS_TIM1_OC_POLARITY(TIM1_OCInitStruct->TIM1_OCPolarity));
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448 assert(IS_TIM1_OCN_POLARITY(TIM1_OCInitStruct->TIM1_OCNPolarity));
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449 assert(IS_TIM1_OCIDLE_STATE(TIM1_OCInitStruct->TIM1_OCIdleState));
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450 assert(IS_TIM1_OCNIDLE_STATE(TIM1_OCInitStruct->TIM1_OCNIdleState));
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452 tmpccmr = TIM1->CCMR2;
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454 /* Disable the Channel 3: Reset the CCE Bit */
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455 *(vu32 *) CCER_CC3E_BB = CCER_CCE_Reset;
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457 /* Reset the Output Compare Bits */
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458 tmpccmr &= OC13Mode_Mask;
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460 /* Set the Ouput Compare Mode */
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461 tmpccmr |= TIM1_OCInitStruct->TIM1_OCMode;
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463 TIM1->CCMR2 = tmpccmr;
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465 /* Set the Output State */
\r
466 *(vu32 *) CCER_CC3E_BB = TIM1_OCInitStruct->TIM1_OutputState;
\r
468 /* Set the Output N State */
\r
469 *(vu32 *) CCER_CC3NE_BB = TIM1_OCInitStruct->TIM1_OutputNState;
\r
471 /* Set the Output Polarity */
\r
472 *(vu32 *) CCER_CC3P_BB = TIM1_OCInitStruct->TIM1_OCPolarity;
\r
474 /* Set the Output N Polarity */
\r
475 *(vu32 *) CCER_CC3NP_BB = TIM1_OCInitStruct->TIM1_OCNPolarity;
\r
477 /* Set the Output Idle state */
\r
478 *(vu32 *) CR2_OIS3_BB = TIM1_OCInitStruct->TIM1_OCIdleState;
\r
480 /* Set the Output N Idle state */
\r
481 *(vu32 *) CR2_OIS3N_BB = TIM1_OCInitStruct->TIM1_OCNIdleState;
\r
483 /* Set the Pulse value */
\r
484 TIM1->CCR3 = TIM1_OCInitStruct->TIM1_Pulse;
\r
487 /*******************************************************************************
\r
488 * Function Name : TIM1_OC4Init
\r
489 * Description : Initializes the TIM1 Channel4 according to the specified
\r
490 * parameters in the TIM1_OCInitStruct.
\r
491 * Input : - TIM1_OCInitStruct: pointer to a TIM1_OCInitTypeDef structure that
\r
492 * contains the configuration information for the TIM1 peripheral.
\r
495 *******************************************************************************/
\r
496 void TIM1_OC4Init(TIM1_OCInitTypeDef* TIM1_OCInitStruct)
\r
500 /* Check the parameters */
\r
501 assert(IS_TIM1_OC_MODE(TIM1_OCInitStruct->TIM1_OCMode));
\r
502 assert(IS_TIM1_OUTPUT_STATE(TIM1_OCInitStruct->TIM1_OutputState));
\r
503 assert(IS_TIM1_OC_POLARITY(TIM1_OCInitStruct->TIM1_OCPolarity));
\r
504 assert(IS_TIM1_OCIDLE_STATE(TIM1_OCInitStruct->TIM1_OCIdleState));
\r
506 tmpccmr = TIM1->CCMR2;
\r
508 /* Disable the Channel 4: Reset the CCE Bit */
\r
509 *(vu32 *) CCER_CC4E_BB = CCER_CCE_Reset;
\r
511 /* Reset the Output Compare Bits */
\r
512 tmpccmr &= OC24Mode_Mask;
\r
514 /* Set the Ouput Compare Mode */
\r
515 tmpccmr |= (u32)TIM1_OCInitStruct->TIM1_OCMode << 8;
\r
517 TIM1->CCMR2 = (u16)tmpccmr;
\r
519 /* Set the Output State */
\r
520 *(vu32 *) CCER_CC4E_BB = TIM1_OCInitStruct->TIM1_OutputState;
\r
522 /* Set the Output Polarity */
\r
523 *(vu32 *) CCER_CC4P_BB = TIM1_OCInitStruct->TIM1_OCPolarity;
\r
525 /* Set the Output Idle state */
\r
526 *(vu32 *) CR2_OIS4_BB = TIM1_OCInitStruct->TIM1_OCIdleState;
\r
528 /* Set the Pulse value */
\r
529 TIM1->CCR4 = TIM1_OCInitStruct->TIM1_Pulse;
\r
532 /*******************************************************************************
\r
533 * Function Name : TIM1_BDTRConfig
\r
534 * Description : Configures the: Break feature, dead time, Lock level, the OSSI,
\r
535 * the OSSR State and the AOE(automatic output enable).
\r
536 * Input : - TIM1_BDTRInitStruct: pointer to a TIM1_BDTRInitTypeDef
\r
537 * structure that contains the BDTR Register configuration
\r
538 * information for the TIM1 peripheral.
\r
541 *******************************************************************************/
\r
542 void TIM1_BDTRConfig(TIM1_BDTRInitTypeDef *TIM1_BDTRInitStruct)
\r
546 /* Check the parameters */
\r
547 assert(IS_TIM1_OSSR_STATE(TIM1_BDTRInitStruct->TIM1_OSSRState));
\r
548 assert(IS_TIM1_OSSI_STATE(TIM1_BDTRInitStruct->TIM1_OSSIState));
\r
549 assert(IS_TIM1_LOCK_LEVEL(TIM1_BDTRInitStruct->TIM1_LOCKLevel));
\r
550 assert(IS_TIM1_BREAK_STATE(TIM1_BDTRInitStruct->TIM1_Break));
\r
551 assert(IS_TIM1_BREAK_POLARITY(TIM1_BDTRInitStruct->TIM1_BreakPolarity));
\r
552 assert(IS_TIM1_AUTOMATIC_OUTPUT_STATE(TIM1_BDTRInitStruct->TIM1_AutomaticOutput));
\r
554 tmpbdtr = TIM1->BDTR;
\r
556 /* Set the Lock level, the Break enable Bit and the Ploarity, the OSSR State,
\r
557 the OSSI State, the dead time value and the Automatic Output Enable Bit */
\r
559 tmpbdtr = (u32)TIM1_BDTRInitStruct->TIM1_OSSRState | TIM1_BDTRInitStruct->TIM1_OSSIState |
\r
560 TIM1_BDTRInitStruct->TIM1_LOCKLevel | TIM1_BDTRInitStruct->TIM1_DeadTime |
\r
561 TIM1_BDTRInitStruct->TIM1_Break | TIM1_BDTRInitStruct->TIM1_BreakPolarity |
\r
562 TIM1_BDTRInitStruct->TIM1_AutomaticOutput;
\r
564 TIM1->BDTR = tmpbdtr;
\r
567 /*******************************************************************************
\r
568 * Function Name : TIM1_ICInit
\r
569 * Description : Initializes the TIM1 peripheral according to the specified
\r
570 * parameters in the TIM1_ICInitStruct.
\r
571 * Input : - TIM1_ICInitStruct: pointer to a TIM1_ICInitTypeDef structure
\r
572 * that contains the configuration information for the specified
\r
576 *******************************************************************************/
\r
577 void TIM1_ICInit(TIM1_ICInitTypeDef* TIM1_ICInitStruct)
\r
579 /* Check the parameters */
\r
580 assert(IS_TIM1_CHANNEL(TIM1_ICInitStruct->TIM1_Channel));
\r
581 assert(IS_TIM1_IC_POLARITY(TIM1_ICInitStruct->TIM1_ICPolarity));
\r
582 assert(IS_TIM1_IC_SELECTION(TIM1_ICInitStruct->TIM1_ICSelection));
\r
583 assert(IS_TIM1_IC_PRESCALER(TIM1_ICInitStruct->TIM1_ICPrescaler));
\r
584 assert(IS_TIM1_IC_FILTER(TIM1_ICInitStruct->TIM1_ICFilter));
\r
586 if (TIM1_ICInitStruct->TIM1_Channel == TIM1_Channel_1)
\r
588 /* TI1 Configuration */
\r
589 TI1_Config(TIM1_ICInitStruct->TIM1_ICPolarity,
\r
590 TIM1_ICInitStruct->TIM1_ICSelection,
\r
591 TIM1_ICInitStruct->TIM1_ICFilter);
\r
593 /* Set the Input Capture Prescaler value */
\r
594 TIM1_SetIC1Prescaler(TIM1_ICInitStruct->TIM1_ICPrescaler);
\r
596 else if (TIM1_ICInitStruct->TIM1_Channel == TIM1_Channel_2)
\r
598 /* TI2 Configuration */
\r
599 TI2_Config(TIM1_ICInitStruct->TIM1_ICPolarity,
\r
600 TIM1_ICInitStruct->TIM1_ICSelection,
\r
601 TIM1_ICInitStruct->TIM1_ICFilter);
\r
603 /* Set the Input Capture Prescaler value */
\r
604 TIM1_SetIC2Prescaler(TIM1_ICInitStruct->TIM1_ICPrescaler);
\r
606 else if (TIM1_ICInitStruct->TIM1_Channel == TIM1_Channel_3)
\r
608 /* TI3 Configuration */
\r
609 TI3_Config(TIM1_ICInitStruct->TIM1_ICPolarity,
\r
610 TIM1_ICInitStruct->TIM1_ICSelection,
\r
611 TIM1_ICInitStruct->TIM1_ICFilter);
\r
613 /* Set the Input Capture Prescaler value */
\r
614 TIM1_SetIC3Prescaler(TIM1_ICInitStruct->TIM1_ICPrescaler);
\r
618 /* TI4 Configuration */
\r
619 TI4_Config(TIM1_ICInitStruct->TIM1_ICPolarity,
\r
620 TIM1_ICInitStruct->TIM1_ICSelection,
\r
621 TIM1_ICInitStruct->TIM1_ICFilter);
\r
623 /* Set the Input Capture Prescaler value */
\r
624 TIM1_SetIC4Prescaler(TIM1_ICInitStruct->TIM1_ICPrescaler);
\r
628 /*******************************************************************************
\r
629 * Function Name : TIM1_PWMIConfig
\r
630 * Description : Configures the TIM1 peripheral in PWM Input Mode according
\r
631 * to the specified parameters in the TIM1_ICInitStruct.
\r
632 * Input : - TIM1_ICInitStruct: pointer to a TIM1_ICInitTypeDef structure
\r
633 * that contains the configuration information for the specified
\r
637 *******************************************************************************/
\r
638 void TIM1_PWMIConfig(TIM1_ICInitTypeDef* TIM1_ICInitStruct)
\r
640 u8 ICPolarity = TIM1_ICPolarity_Rising;
\r
641 u8 ICSelection = TIM1_ICSelection_DirectTI;
\r
643 /* Check the parameters */
\r
644 assert(IS_TIM1_PWMI_CHANNEL(TIM1_ICInitStruct->TIM1_Channel));
\r
645 assert(IS_TIM1_IC_POLARITY(TIM1_ICInitStruct->TIM1_ICPolarity));
\r
646 assert(IS_TIM1_IC_SELECTION(TIM1_ICInitStruct->TIM1_ICSelection));
\r
647 assert(IS_TIM1_IC_PRESCALER(TIM1_ICInitStruct->TIM1_ICPrescaler));
\r
649 /* Select the Opposite Input Polarity */
\r
650 if (TIM1_ICInitStruct->TIM1_ICPolarity == TIM1_ICPolarity_Rising)
\r
652 ICPolarity = TIM1_ICPolarity_Falling;
\r
656 ICPolarity = TIM1_ICPolarity_Rising;
\r
659 /* Select the Opposite Input */
\r
660 if (TIM1_ICInitStruct->TIM1_ICSelection == TIM1_ICSelection_DirectTI)
\r
662 ICSelection = TIM1_ICSelection_IndirectTI;
\r
666 ICSelection = TIM1_ICSelection_DirectTI;
\r
669 if (TIM1_ICInitStruct->TIM1_Channel == TIM1_Channel_1)
\r
671 /* TI1 Configuration */
\r
672 TI1_Config(TIM1_ICInitStruct->TIM1_ICPolarity, TIM1_ICInitStruct->TIM1_ICSelection,
\r
673 TIM1_ICInitStruct->TIM1_ICFilter);
\r
675 /* Set the Input Capture Prescaler value */
\r
676 TIM1_SetIC1Prescaler(TIM1_ICInitStruct->TIM1_ICPrescaler);
\r
678 /* TI2 Configuration */
\r
679 TI2_Config(ICPolarity, ICSelection, TIM1_ICInitStruct->TIM1_ICFilter);
\r
681 /* Set the Input Capture Prescaler value */
\r
682 TIM1_SetIC2Prescaler(TIM1_ICInitStruct->TIM1_ICPrescaler);
\r
686 /* TI2 Configuration */
\r
687 TI2_Config(TIM1_ICInitStruct->TIM1_ICPolarity, TIM1_ICInitStruct->TIM1_ICSelection,
\r
688 TIM1_ICInitStruct->TIM1_ICFilter);
\r
690 /* Set the Input Capture Prescaler value */
\r
691 TIM1_SetIC2Prescaler(TIM1_ICInitStruct->TIM1_ICPrescaler);
\r
693 /* TI1 Configuration */
\r
694 TI1_Config(ICPolarity, ICSelection, TIM1_ICInitStruct->TIM1_ICFilter);
\r
696 /* Set the Input Capture Prescaler value */
\r
697 TIM1_SetIC1Prescaler(TIM1_ICInitStruct->TIM1_ICPrescaler);
\r
700 /*******************************************************************************
\r
701 * Function Name : TIM1_OCStructInit
\r
702 * Description : Fills each TIM1_OCInitStruct member with its default value.
\r
703 * Input : - TIM1_OCInitStruct : pointer to a TIM1_OCInitTypeDef structure
\r
704 * which will be initialized.
\r
707 *******************************************************************************/
\r
708 void TIM1_OCStructInit(TIM1_OCInitTypeDef* TIM1_OCInitStruct)
\r
710 /* Set the default configuration */
\r
711 TIM1_OCInitStruct->TIM1_OCMode = TIM1_OCMode_Timing;
\r
712 TIM1_OCInitStruct->TIM1_OutputState = TIM1_OutputState_Disable;
\r
713 TIM1_OCInitStruct->TIM1_OutputNState = TIM1_OutputNState_Disable;
\r
714 TIM1_OCInitStruct->TIM1_Pulse = TIM1_Pulse_Reset_Mask;
\r
715 TIM1_OCInitStruct->TIM1_OCPolarity = TIM1_OCPolarity_High;
\r
716 TIM1_OCInitStruct->TIM1_OCNPolarity = TIM1_OCPolarity_High;
\r
717 TIM1_OCInitStruct->TIM1_OCIdleState = TIM1_OCIdleState_Reset;
\r
718 TIM1_OCInitStruct->TIM1_OCNIdleState = TIM1_OCNIdleState_Reset;
\r
721 /*******************************************************************************
\r
722 * Function Name : TIM1_ICStructInit
\r
723 * Description : Fills each TIM1_ICInitStruct member with its default value.
\r
724 * Input : - TIM1_ICInitStruct : pointer to a TIM1_ICInitTypeDef structure
\r
725 * which will be initialized.
\r
728 *******************************************************************************/
\r
729 void TIM1_ICStructInit(TIM1_ICInitTypeDef* TIM1_ICInitStruct)
\r
731 /* Set the default configuration */
\r
732 TIM1_ICInitStruct->TIM1_Channel = TIM1_Channel_1;
\r
733 TIM1_ICInitStruct->TIM1_ICSelection = TIM1_ICSelection_DirectTI;
\r
734 TIM1_ICInitStruct->TIM1_ICPolarity = TIM1_ICPolarity_Rising;
\r
735 TIM1_ICInitStruct->TIM1_ICPrescaler = TIM1_ICPSC_DIV1;
\r
736 TIM1_ICInitStruct->TIM1_ICFilter = TIM1_ICFilter_Mask;
\r
739 /*******************************************************************************
\r
740 * Function Name : TIM1_TimeBaseStructInit
\r
741 * Description : Fills each TIM1_TimeBaseInitStruct member with its default value.
\r
742 * Input : - TIM1_TimeBaseInitStruct : pointer to a TIM1_TimeBaseInitTypeDef
\r
743 * structure which will be initialized.
\r
746 *******************************************************************************/
\r
747 void TIM1_TimeBaseStructInit(TIM1_TimeBaseInitTypeDef* TIM1_TimeBaseInitStruct)
\r
749 /* Set the default configuration */
\r
750 TIM1_TimeBaseInitStruct->TIM1_Period = TIM1_Period_Reset_Mask;
\r
751 TIM1_TimeBaseInitStruct->TIM1_Prescaler = TIM1_Prescaler_Reset_Mask;
\r
752 TIM1_TimeBaseInitStruct->TIM1_ClockDivision = TIM1_CKD_DIV1;
\r
753 TIM1_TimeBaseInitStruct->TIM1_CounterMode = TIM1_CounterMode_Up;
\r
754 TIM1_TimeBaseInitStruct->TIM1_RepetitionCounter = TIM1_RepetitionCounter_Reset_Mask;
\r
757 /*******************************************************************************
\r
758 * Function Name : TIM1_BDTRStructInit
\r
759 * Description : Fills each TIM1_BDTRInitStruct member with its default value.
\r
760 * Input : - TIM1_BDTRInitStruct : pointer to a TIM1_BDTRInitTypeDef
\r
761 * structure which will be initialized.
\r
764 *******************************************************************************/
\r
765 void TIM1_BDTRStructInit(TIM1_BDTRInitTypeDef* TIM1_BDTRInitStruct)
\r
767 /* Set the default configuration */
\r
768 TIM1_BDTRInitStruct->TIM1_OSSRState = TIM1_OSSRState_Disable;
\r
769 TIM1_BDTRInitStruct->TIM1_OSSIState = TIM1_OSSIState_Disable;
\r
770 TIM1_BDTRInitStruct->TIM1_LOCKLevel = TIM1_LOCKLevel_OFF;
\r
771 TIM1_BDTRInitStruct->TIM1_DeadTime = TIM1_DeadTime_Reset_Mask;
\r
772 TIM1_BDTRInitStruct->TIM1_Break = TIM1_Break_Disable;
\r
773 TIM1_BDTRInitStruct->TIM1_BreakPolarity = TIM1_BreakPolarity_Low;
\r
774 TIM1_BDTRInitStruct->TIM1_AutomaticOutput = TIM1_AutomaticOutput_Disable;
\r
777 /*******************************************************************************
\r
778 * Function Name : TIM1_Cmd
\r
779 * Description : Enables or disables the TIM1 peripheral.
\r
780 * Input : - Newstate: new state of the TIM1 peripheral.
\r
781 * This parameter can be: ENABLE or DISABLE.
\r
784 *******************************************************************************/
\r
785 void TIM1_Cmd(FunctionalState NewState)
\r
787 /* Check the parameters */
\r
788 assert(IS_FUNCTIONAL_STATE(NewState));
\r
790 /* set or Reset the CEN Bit */
\r
791 *(vu32 *) CR1_CEN_BB = (u16)NewState;
\r
794 /*******************************************************************************
\r
795 * Function Name : TIM1_CtrlPWMOutputs
\r
796 * Description : Enables or disables the TIM1 peripheral Main Outputs.
\r
797 * Input : - Newstate: new state of the TIM1 peripheral Main Outputs.
\r
798 * This parameter can be: ENABLE or DISABLE.
\r
801 *******************************************************************************/
\r
802 void TIM1_CtrlPWMOutputs(FunctionalState Newstate)
\r
804 /* Check the parameters */
\r
805 assert(IS_FUNCTIONAL_STATE(Newstate));
\r
807 /* Set or Reset the MOE Bit */
\r
808 *(vu32 *) BDTR_MOE_BB = (u16)Newstate;
\r
811 /*******************************************************************************
\r
812 * Function Name : TIM1_ITConfig
\r
813 * Description : Enables or disables the specified TIM1 interrupts.
\r
814 * Input : - TIM1_IT: specifies the TIM1 interrupts sources to be enabled
\r
816 * This parameter can be any combination of the following values:
\r
817 * - TIM1_IT_Update: TIM1 update Interrupt source
\r
818 * - TIM1_IT_CC1: TIM1 Capture Compare 1 Interrupt source
\r
819 * - TIM1_IT_CC2: TIM1 Capture Compare 2 Interrupt source
\r
820 * - TIM1_IT_CC3: TIM1 Capture Compare 3 Interrupt source
\r
821 * - TIM1_IT_CC4: TIM1 Capture Compare 4 Interrupt source
\r
822 * - TIM1_IT_CCUpdate: TIM1 Capture Compare Update Interrupt
\r
824 * - TIM1_IT_Trigger: TIM1 Trigger Interrupt source
\r
825 * - TIM1_IT_Break: TIM1 Break Interrupt source
\r
826 * - Newstate: new state of the TIM1 interrupts.
\r
827 * This parameter can be: ENABLE or DISABLE.
\r
830 *******************************************************************************/
\r
831 void TIM1_ITConfig(u16 TIM1_IT, FunctionalState NewState)
\r
833 /* Check the parameters */
\r
834 assert(IS_TIM1_IT(TIM1_IT));
\r
835 assert(IS_FUNCTIONAL_STATE(NewState));
\r
837 if (NewState == ENABLE)
\r
839 /* Enable the Interrupt sources */
\r
840 TIM1->DIER |= TIM1_IT;
\r
844 /* Disable the Interrupt sources */
\r
845 TIM1->DIER &= (u16)~TIM1_IT;
\r
849 /*******************************************************************************
\r
850 * Function Name : TIM1_DMAConfig
\r
851 * Description : Configures the TIM1
\92s DMA interface.
\r
852 * Input : - TIM1_DMABase: DMA Base address.
\r
853 * This parameter can be one of the following values:
\r
854 * - TIM1_DMABase_CR1, TIM1_DMABase_CR2, TIM1_DMABase_SMCR,
\r
855 * TIM1_DMABase_DIER, TIM1_DMABase_SR, TIM1_DMABase_EGR,
\r
856 * TIM1_DMABase_CCMR1, TIM1_DMABase_CCMR2, TIM1_DMABase_CCER,
\r
857 * TIM1_DMABase_CNT, TIM1_DMABase_PSC, TIM1_DMABase_ARR,
\r
858 * TIM1_DMABase_RCR, TIM1_DMABase_CCR1, TIM1_DMABase_CCR2,
\r
859 * TIM1_DMABase_CCR3, TIM1_DMABase_CCR4, TIM1_DMABase_BDTR,
\r
860 * TIM1_DMABase_DCR.
\r
861 * - TIM1_DMABurstLength: DMA Burst length.
\r
862 * This parameter can be one value between:
\r
863 * TIM1_DMABurstLength_1Byte and TIM1_DMABurstLength_18Bytes.
\r
866 *******************************************************************************/
\r
867 void TIM1_DMAConfig(u16 TIM1_DMABase, u16 TIM1_DMABurstLength)
\r
871 /* Check the parameters */
\r
872 assert(IS_TIM1_DMA_BASE(TIM1_DMABase));
\r
873 assert(IS_TIM1_DMA_LENGTH(TIM1_DMABurstLength));
\r
875 tmpdcr = TIM1->DCR;
\r
877 /* Reset the DBA and the DBL Bits */
\r
878 tmpdcr &= DCR_DMA_Mask;
\r
880 /* Set the DMA Base and the DMA Burst Length */
\r
881 tmpdcr |= TIM1_DMABase | TIM1_DMABurstLength;
\r
883 TIM1->DCR = (u16)tmpdcr;
\r
886 /*******************************************************************************
\r
887 * Function Name : TIM1_DMACmd
\r
888 * Description : Enables or disables the TIM1
\92s DMA Requests.
\r
889 * Input : - TIM1_DMASources: specifies the DMA Request sources.
\r
890 * This parameter can be any combination of the following values:
\r
891 * - TIM1_DMA_Update: TIM1 update Interrupt source
\r
892 * - TIM1_DMA_CC1: TIM1 Capture Compare 1 DMA source
\r
893 * - TIM1_DMA_CC2: TIM1 Capture Compare 2 DMA source
\r
894 * - TIM1_DMA_CC3: TIM1 Capture Compare 3 DMA source
\r
895 * - TIM1_DMA_CC4: TIM1 Capture Compare 4 DMA source
\r
896 * - TIM1_DMA_COM: TIM1 Capture Compare Update DMA
\r
898 * - TIM1_DMA_Trigger: TIM1 Trigger DMA source
\r
899 * - Newstate: new state of the DMA Request sources.
\r
900 * This parameter can be: ENABLE or DISABLE.
\r
903 *******************************************************************************/
\r
904 void TIM1_DMACmd(u16 TIM1_DMASource, FunctionalState Newstate)
\r
908 /* Check the parameters */
\r
909 assert(IS_TIM1_DMA_SOURCE(TIM1_DMASource));
\r
910 assert(IS_FUNCTIONAL_STATE(Newstate));
\r
912 tmpdier = TIM1->DIER;
\r
914 if (Newstate == ENABLE)
\r
916 /* Enable the DMA sources */
\r
917 tmpdier |= TIM1_DMASource;
\r
921 /* Disable the DMA sources */
\r
922 tmpdier &= (u16)~TIM1_DMASource;
\r
924 TIM1->DIER = (u16)tmpdier;
\r
927 /*******************************************************************************
\r
928 * Function Name : TIM1_InternalClockConfig
\r
929 * Description : Configures the TIM1 interrnal Clock
\r
933 *******************************************************************************/
\r
934 void TIM1_InternalClockConfig(void)
\r
936 /* Disable slave mode to clock the prescaler directly with the internal clock */
\r
937 TIM1->SMCR &= SMCR_SMS_Mask;
\r
939 /*******************************************************************************
\r
940 * Function Name : TIM1_ETRClockMode1Config
\r
941 * Description : Configures the TIM1 External clock Mode1
\r
942 * Input : - TIM1_ExtTRGPrescaler: The external Trigger Prescaler.
\r
943 * It can be one of the following values:
\r
944 * - TIM1_ExtTRGPSC_OFF
\r
945 * - TIM1_ExtTRGPSC_DIV2
\r
946 * - TIM1_ExtTRGPSC_DIV4
\r
947 * - TIM1_ExtTRGPSC_DIV8.
\r
948 * - TIM1_ExtTRGPolarity: The external Trigger Polarity.
\r
949 * It can be one of the following values:
\r
950 * - TIM1_ExtTRGPolarity_Inverted
\r
951 * - TIM1_ExtTRGPolarity_NonInverted
\r
952 * - ExtTRGFilter: External Trigger Filter.
\r
953 * This parameter must be a value between 0x00 and 0x0F
\r
956 *******************************************************************************/
\r
957 void TIM1_ETRClockMode1Config(u16 TIM1_ExtTRGPrescaler, u16 TIM1_ExtTRGPolarity,
\r
960 /* Check the parameters */
\r
961 assert(IS_TIM1_EXT_PRESCALER(TIM1_ExtTRGPrescaler));
\r
962 assert(IS_TIM1_EXT_POLARITY(TIM1_ExtTRGPolarity));
\r
964 /* Configure the ETR Clock source */
\r
965 ETR_Config(TIM1_ExtTRGPrescaler, TIM1_ExtTRGPolarity, ExtTRGFilter);
\r
967 /* Select the External clock mode1 */
\r
968 TIM1->SMCR &= SMCR_SMS_Mask;
\r
969 TIM1->SMCR |= TIM1_SlaveMode_External1;
\r
971 /* Select the Trigger selection : ETRF */
\r
972 TIM1->SMCR &= SMCR_TS_Mask;
\r
973 TIM1->SMCR |= TIM1_TS_ETRF;
\r
976 /*******************************************************************************
\r
977 * Function Name : TIM1_ETRClockMode2Config
\r
978 * Description : Configures the TIM1 External clock Mode2
\r
979 * Input : - TIM1_ExtTRGPrescaler: The external Trigger Prescaler.
\r
980 * It can be one of the following values:
\r
981 * - TIM1_ExtTRGPSC_OFF
\r
982 * - TIM1_ExtTRGPSC_DIV2
\r
983 * - TIM1_ExtTRGPSC_DIV4
\r
984 * - TIM1_ExtTRGPSC_DIV8
\r
985 * - TIM1_ExtTRGPolarity: The external Trigger Polarity.
\r
986 * It can be one of the following values:
\r
987 * - TIM1_ExtTRGPolarity_Inverted
\r
988 * - TIM1_ExtTRGPolarity_NonInverted
\r
989 * - ExtTRGFilter: External Trigger Filter.
\r
990 * This parameter must be a value between 0x00 and 0x0F
\r
993 *******************************************************************************/
\r
994 void TIM1_ETRClockMode2Config(u16 TIM1_ExtTRGPrescaler, u16 TIM1_ExtTRGPolarity,
\r
997 /* Check the parameters */
\r
998 assert(IS_TIM1_EXT_PRESCALER(TIM1_ExtTRGPrescaler));
\r
999 assert(IS_TIM1_EXT_POLARITY(TIM1_ExtTRGPolarity));
\r
1001 /* Configure the ETR Clock source */
\r
1002 ETR_Config(TIM1_ExtTRGPrescaler, TIM1_ExtTRGPolarity, ExtTRGFilter);
\r
1004 /* Enable the External clock mode2 */
\r
1005 *(vu32 *) SMCR_ECE_BB = SMCR_ECE_Set;
\r
1008 /*******************************************************************************
\r
1009 * Function Name : TIM1_ITRxExternalClockConfig
\r
1010 * Description : Configures the TIM1 Internal Trigger as External Clock
\r
1011 * Input : - TIM1_ITRSource: Internal Trigger source.
\r
1012 * This parameter can be one of the following values:
\r
1013 * - TIM1_TS_ITR0: Internal Trigger 0
\r
1014 * - TIM1_TS_ITR1: Internal Trigger 1
\r
1015 * - TIM1_TS_ITR2: Internal Trigger 2
\r
1016 * - TIM1_TS_ITR3: Internal Trigger 3
\r
1019 *******************************************************************************/
\r
1020 void TIM1_ITRxExternalClockConfig(u16 TIM1_InputTriggerSource)
\r
1022 /* Check the parameters */
\r
1023 assert(IS_TIM1_INTERNAL_TRIGGER_SELECTION(TIM1_InputTriggerSource));
\r
1025 /* Select the Internal Trigger */
\r
1026 TIM1_SelectInputTrigger(TIM1_InputTriggerSource);
\r
1028 /* Select the External clock mode1 */
\r
1029 TIM1->SMCR |= TIM1_SlaveMode_External1;
\r
1032 /*******************************************************************************
\r
1033 * Function Name : TIM1_TIxExternalClockConfig
\r
1034 * Description : Configures the TIM1 Trigger as External Clock
\r
1035 * Input : - TIM1_TIxExternalCLKSource: Trigger source.
\r
1036 * This parameter can be one of the following values:
\r
1037 * - TIM1_TS_TI1F_ED: TI1 Edge Detector
\r
1038 * - TIM1_TS_TI1FP1: Filtered TIM1 Input 1
\r
1039 * - TIM1_TS_TI2FP2: Filtered TIM1 Input 2
\r
1040 * - TIM1_ICPolarity: specifies the TIx Polarity.
\r
1041 * This parameter can be:
\r
1042 * - TIM1_ICPolarity_Rising
\r
1043 * - TIM1_ICPolarity_Falling
\r
1044 * - ICFilter : specifies the filter value.
\r
1045 * This parameter must be a value between 0x0 and 0xF.
\r
1048 *******************************************************************************/
\r
1049 void TIM1_TIxExternalClockConfig(u16 TIM1_TIxExternalCLKSource,
\r
1050 u16 TIM1_ICPolarity, u8 ICFilter)
\r
1052 /* Check the parameters */
\r
1053 assert(IS_TIM1_TIX_TRIGGER_SELECTION(TIM1_TIxExternalCLKSource));
\r
1054 assert(IS_TIM1_IC_POLARITY(TIM1_ICPolarity));
\r
1055 assert(IS_TIM1_IC_FILTER(ICFilter));
\r
1057 /* Configure the TIM1 Input Clock Source */
\r
1058 if (TIM1_TIxExternalCLKSource == TIM1_TIxExternalCLK1Source_TI2)
\r
1060 TI2_Config(TIM1_ICPolarity, TIM1_ICSelection_DirectTI, ICFilter);
\r
1064 TI1_Config(TIM1_ICPolarity, TIM1_ICSelection_DirectTI, ICFilter);
\r
1067 /* Select the Trigger source */
\r
1068 TIM1_SelectInputTrigger(TIM1_TIxExternalCLKSource);
\r
1070 /* Select the External clock mode1 */
\r
1071 TIM1->SMCR |= TIM1_SlaveMode_External1;
\r
1073 /*******************************************************************************
\r
1074 * Function Name : TIM1_SelectInputTrigger
\r
1075 * Description : Selects the TIM1 Input Trigger source
\r
1076 * Input : - TIM1_InputTriggerSource: The Trigger source.
\r
1077 * This parameter can be one of the following values:
\r
1078 * - TIM1_TS_ITR0: Internal Trigger 0
\r
1079 * - TIM1_TS_ITR1: Internal Trigger 1
\r
1080 * - TIM1_TS_ITR2: Internal Trigger 2
\r
1081 * - TIM1_TS_ITR3: Internal Trigger 3
\r
1082 * - TIM1_TS_TI1F_ED: TI1 Edge Detector
\r
1083 * - TIM1_TS_TI1FP1: Filtered Timer Input 1
\r
1084 * - TIM1_TS_TI2FP2: Filtered Timer Input 2
\r
1085 * - TIM1_TS_ETRF: External Trigger input
\r
1088 *******************************************************************************/
\r
1089 void TIM1_SelectInputTrigger(u16 TIM1_InputTriggerSource)
\r
1093 /* Check the parameters */
\r
1094 assert(IS_TIM1_TRIGGER_SELECTION(TIM1_InputTriggerSource));
\r
1096 tmpsmcr = TIM1->SMCR;
\r
1098 /* Select the Tgigger Source */
\r
1099 tmpsmcr &= SMCR_TS_Mask;
\r
1100 tmpsmcr |= TIM1_InputTriggerSource;
\r
1102 TIM1->SMCR = (u16)tmpsmcr;
\r
1105 /*******************************************************************************
\r
1106 * Function Name : TIM1_UpdateDisableConfig
\r
1107 * Description : Enables or Disables the TIM1 Update event.
\r
1108 * Input : - Newstate: new state of the TIM1 peripheral Preload register
\r
1109 * This parameter can be: ENABLE or DISABLE.
\r
1112 *******************************************************************************/
\r
1113 void TIM1_UpdateDisableConfig(FunctionalState Newstate)
\r
1115 /* Check the parameters */
\r
1116 assert(IS_FUNCTIONAL_STATE(Newstate));
\r
1118 /* Set or Reset the UDIS Bit */
\r
1119 *(vu32 *) CR1_UDIS_BB = (u16)Newstate;
\r
1122 /*******************************************************************************
\r
1123 * Function Name : TIM1_UpdateRequestConfig
\r
1124 * Description : Selects the TIM1 Update Request Interrupt source.
\r
1125 * Input : - TIM1_UpdateSource: specifies the Update source.
\r
1126 * This parameter can be one of the following values:
\r
1127 * - TIM1_UpdateSource_Regular
\r
1128 * - TIM1_UpdateSource_Global
\r
1131 *******************************************************************************/
\r
1132 void TIM1_UpdateRequestConfig(u8 TIM1_UpdateSource)
\r
1134 /* Check the parameters */
\r
1135 assert(IS_TIM1_UPDATE_SOURCE(TIM1_UpdateSource));
\r
1137 /* Set or Reset the URS Bit */
\r
1138 *(vu32 *) CR1_URS_BB = TIM1_UpdateSource;
\r
1141 /*******************************************************************************
\r
1142 * Function Name : TIM1_SelectHallSensor
\r
1143 * Description : Enables or disables the TIM1
\92s Hall sensor interface.
\r
1144 * Input : - Newstate: new state of the TIM1 Hall sensor interface
\r
1147 *******************************************************************************/
\r
1148 void TIM1_SelectHallSensor(FunctionalState Newstate)
\r
1150 /* Check the parameters */
\r
1151 assert(IS_FUNCTIONAL_STATE(Newstate));
\r
1153 /* Set or Reset the TI1S Bit */
\r
1154 *(vu32 *) CR2_TI1S_BB = (u16)Newstate;
\r
1157 /*******************************************************************************
\r
1158 * Function Name : TIM1_SelectOPM
\r
1159 * Description : Enables or disables the TIM1
\92s One Pulse Mode.
\r
1160 * Input : - TIM1_OPMode: specifies the OPM Mode to be used.
\r
1161 * This parameter can be one of the following values:
\r
1162 * - TIM1_OPMode_Single
\r
1163 * - TIM1_OPMode_Repetitive
\r
1166 *******************************************************************************/
\r
1167 void TIM1_SelectOnePulseMode(u16 TIM1_OPMode)
\r
1169 /* Check the parameters */
\r
1170 assert(IS_TIM1_OPM_MODE(TIM1_OPMode));
\r
1172 /* Set or Reset the OPM Bit */
\r
1173 *(vu32 *) CR1_OPM_BB = TIM1_OPMode;
\r
1176 /*******************************************************************************
\r
1177 * Function Name : TIM1_SelectOutputTrigger
\r
1178 * Description : Selects the TIM1 Trigger Output Mode.
\r
1179 * Input : - TIM1_TRGOSource: specifies the Trigger Output source.
\r
1180 * This paramter can be one of the following values:
\r
1181 * - TIM1_TRGOSource_Reset
\r
1182 * - TIM1_TRGOSource_Enable
\r
1183 * - TIM1_TRGOSource_Update
\r
1184 * - TIM1_TRGOSource_OC1
\r
1185 * - TIM1_TRGOSource_OC1Ref
\r
1186 * - TIM1_TRGOSource_OC2Ref
\r
1187 * - TIM1_TRGOSource_OC3Ref
\r
1188 * - TIM1_TRGOSource_OC4Ref
\r
1191 *******************************************************************************/
\r
1192 void TIM1_SelectOutputTrigger(u16 TIM1_TRGOSource)
\r
1196 /* Check the parameters */
\r
1197 assert(IS_TIM1_TRGO_SOURCE(TIM1_TRGOSource));
\r
1199 tmpcr2 = TIM1->CR2;
\r
1201 /* Reset the MMS Bits */
\r
1202 tmpcr2 &= CR2_MMS_Mask;
\r
1204 /* Select the TRGO source */
\r
1205 tmpcr2 |= TIM1_TRGOSource;
\r
1207 TIM1->CR2 = (u16)tmpcr2;
\r
1210 /*******************************************************************************
\r
1211 * Function Name : TIM1_SelectSlaveMode
\r
1212 * Description : Selects the TIM1 Slave Mode.
\r
1213 * Input : - TIM1_SlaveMode: specifies the TIM1 Slave Mode.
\r
1214 * This paramter can be one of the following values:
\r
1215 * - TIM1_SlaveMode_Reset
\r
1216 * - TIM1_SlaveMode_Gated
\r
1217 * - TIM1_SlaveMode_Trigger
\r
1218 * - TIM1_SlaveMode_External1
\r
1221 *******************************************************************************/
\r
1222 void TIM1_SelectSlaveMode(u16 TIM1_SlaveMode)
\r
1226 /* Check the parameters */
\r
1227 assert(IS_TIM1_SLAVE_MODE(TIM1_SlaveMode));
\r
1229 tmpsmcr = TIM1->SMCR;
\r
1231 /* Reset the SMS Bits */
\r
1232 tmpsmcr &= SMCR_SMS_Mask;
\r
1234 /* Select the Slave Mode */
\r
1235 tmpsmcr |= TIM1_SlaveMode;
\r
1237 TIM1->SMCR = (u16)tmpsmcr;
\r
1240 /*******************************************************************************
\r
1241 * Function Name : TIM1_SelectMasterSlaveMode
\r
1242 * Description : Sets or Resets the TIM1 Master/Slave Mode.
\r
1243 * Input : - TIM1_MasterSlaveMode: specifies the TIM1 Master Slave Mode.
\r
1244 * This paramter can be one of the following values:
\r
1245 * - TIM1_MasterSlaveMode_Enable: synchronization between
\r
1246 * the current timer and its slaves (through TRGO).
\r
1247 * - TIM1_MasterSlaveMode_Disable: No action
\r
1250 *******************************************************************************/
\r
1251 void TIM1_SelectMasterSlaveMode(u16 TIM1_MasterSlaveMode)
\r
1253 /* Check the parameters */
\r
1254 assert(IS_TIM1_MSM_STATE(TIM1_MasterSlaveMode));
\r
1256 /* Set or Reset the MSM Bit */
\r
1257 *(vu32 *) SMCR_MSM_BB = TIM1_MasterSlaveMode;
\r
1260 /*******************************************************************************
\r
1261 * Function Name : TIM1_EncoderInterfaceConfig
\r
1262 * Description : Configures the TIM1 Encoder Interface.
\r
1263 * Input : - TIM1_EncoderMode: specifies the TIM1 Encoder Mode.
\r
1264 * This parameter can be one of the following values:
\r
1265 * - TIM1_EncoderMode_TI1: Counter counts on TI1FP1 edge
\r
1266 * depending on TI2FP2 level.
\r
1267 * - TIM1_EncoderMode_TI2: Counter counts on TI2FP2 edge
\r
1268 * depending on TI1FP1 level.
\r
1269 * - TIM1_EncoderMode_TI12: Counter counts on both TI1FP1 and
\r
1270 * TI2FP2 edges depending on the level of the other input.
\r
1271 * - TIM1_IC1Polarity: specifies the IC1 Polarity
\r
1272 * This parmeter can be one of the following values:
\r
1273 * - TIM1_ICPolarity_Falling
\r
1274 * - TIM1_ICPolarity_Rising
\r
1275 * - TIM1_IC2Polarity: specifies the IC2 Polarity
\r
1276 * This parmeter can be one of the following values:
\r
1277 * - TIM1_ICPolarity_Falling
\r
1278 * - TIM1_ICPolarity_Rising
\r
1281 *******************************************************************************/
\r
1282 void TIM1_EncoderInterfaceConfig(u16 TIM1_EncoderMode, u16 TIM1_IC1Polarity,
\r
1283 u16 TIM1_IC2Polarity)
\r
1288 /* Check the parameters */
\r
1289 assert(IS_TIM1_ENCODER_MODE(TIM1_EncoderMode));
\r
1290 assert(IS_TIM1_IC_POLARITY(TIM1_IC1Polarity));
\r
1291 assert(IS_TIM1_IC_POLARITY(TIM1_IC2Polarity));
\r
1293 tmpsmcr = TIM1->SMCR;
\r
1294 tmpccmr1 = TIM1->CCMR1;
\r
1296 /* Set the encoder Mode */
\r
1297 tmpsmcr &= SMCR_SMS_Mask;
\r
1298 tmpsmcr |= TIM1_EncoderMode;
\r
1300 /* Select the Capture Compare 1 and the Capture Compare 2 as input */
\r
1301 tmpccmr1 &= CCMR_CC13S_Mask & CCMR_CC24S_Mask;
\r
1302 tmpccmr1 |= CCMR_TI13Direct_Set | CCMR_TI24Direct_Set;
\r
1304 /* Set the TI1 and the TI2 Polarities */
\r
1305 *(vu32 *) CCER_CC1P_BB = TIM1_IC1Polarity;
\r
1306 *(vu32 *) CCER_CC2P_BB = TIM1_IC2Polarity;
\r
1308 TIM1->SMCR = (u16)tmpsmcr;
\r
1310 TIM1->CCMR1 = (u16)tmpccmr1;
\r
1313 /*******************************************************************************
\r
1314 * Function Name : TIM1_PrescalerConfig
\r
1315 * Description : Configures the TIM1 Prescaler.
\r
1316 * Input : - Prescaler: specifies the Prescaler Register value
\r
1317 * - TIM1_PSCReloadMode: specifies the TIM1 Prescaler Reload mode.
\r
1318 * This parmeter can be one of the following values:
\r
1319 * - TIM1_PSCReloadMode_Update: The Prescaler is loaded at
\r
1320 * the update event.
\r
1321 * - TIM1_PSCReloadMode_Immediate: The Prescaler is loaded
\r
1325 *******************************************************************************/
\r
1326 void TIM1_PrescalerConfig(u16 Prescaler, u16 TIM1_PSCReloadMode)
\r
1328 /* Check the parameters */
\r
1329 assert(IS_TIM1_PRESCALER_RELOAD(TIM1_PSCReloadMode));
\r
1331 /* Set the Prescaler value */
\r
1332 TIM1->PSC = Prescaler;
\r
1334 /* Set or reset the UG Bit */
\r
1335 *(vu32 *) EGR_UG_BB = TIM1_PSCReloadMode;
\r
1337 /*******************************************************************************
\r
1338 * Function Name : TIM1_CounterModeConfig
\r
1339 * Description : Specifies the TIM1 Counter Mode to be used.
\r
1340 * Input : - TIM1_CounterMode: specifies the Counter Mode to be used
\r
1341 * This parameter can be one of the following values:
\r
1342 * - TIM1_CounterMode_Up: TIM1 Up Counting Mode
\r
1343 * - TIM1_CounterMode_Down: TIM1 Down Counting Mode
\r
1344 * - TIM1_CounterMode_CenterAligned1: TIM1 Center Aligned Mode1
\r
1345 * - TIM1_CounterMode_CenterAligned2: TIM1 Center Aligned Mode2
\r
1346 * - TIM1_CounterMode_CenterAligned3: TIM1 Center Aligned Mode3
\r
1349 *******************************************************************************/
\r
1350 void TIM1_CounterModeConfig(u16 TIM1_CounterMode)
\r
1354 /* Check the parameters */
\r
1355 assert(IS_TIM1_COUNTER_MODE(TIM1_CounterMode));
\r
1357 tmpcr1 = TIM1->CR1;
\r
1359 /* Reset the CMS and DIR Bits */
\r
1360 tmpcr1 &= CR1_CounterMode_Mask;
\r
1362 /* Set the Counter Mode */
\r
1363 tmpcr1 |= TIM1_CounterMode;
\r
1365 TIM1->CR1 = (u16)tmpcr1;
\r
1368 /*******************************************************************************
\r
1369 * Function Name : TIM1_ForcedOC1Config
\r
1370 * Description : Forces the TIM1 Channel1 output waveform to active or inactive
\r
1372 * Input : - TIM1_ForcedAction: specifies the forced Action to be set to
\r
1373 * the output waveform.
\r
1374 * This parameter can be one of the following values:
\r
1375 * - TIM1_ForcedAction_Active: Force active level on OC1REF
\r
1376 * - TIM1_ForcedAction_InActive: Force inactive level on
\r
1380 *******************************************************************************/
\r
1381 void TIM1_ForcedOC1Config(u16 TIM1_ForcedAction)
\r
1385 /* Check the parameters */
\r
1386 assert(IS_TIM1_FORCED_ACTION(TIM1_ForcedAction));
\r
1388 tmpccmr1 = TIM1->CCMR1;
\r
1390 /* Reset the OCM Bits */
\r
1391 tmpccmr1 &= CCMR_OCM13_Mask;
\r
1393 /* Configure The Forced output Mode */
\r
1394 tmpccmr1 |= TIM1_ForcedAction;
\r
1396 TIM1->CCMR1 = (u16)tmpccmr1;
\r
1399 /*******************************************************************************
\r
1400 * Function Name : TIM1_ForcedOC2Config
\r
1401 * Description : Forces the TIM1 Channel2 output waveform to active or inactive
\r
1403 * Input : - TIM1_ForcedAction: specifies the forced Action to be set to
\r
1404 * the output waveform.
\r
1405 * This parameter can be one of the following values:
\r
1406 * - TIM1_ForcedAction_Active: Force active level on OC2REF
\r
1407 * - TIM1_ForcedAction_InActive: Force inactive level on
\r
1411 *******************************************************************************/
\r
1412 void TIM1_ForcedOC2Config(u16 TIM1_ForcedAction)
\r
1416 /* Check the parameters */
\r
1417 assert(IS_TIM1_FORCED_ACTION(TIM1_ForcedAction));
\r
1419 tmpccmr1 = TIM1->CCMR1;
\r
1421 /* Reset the OCM Bits */
\r
1422 tmpccmr1 &= CCMR_OCM24_Mask;
\r
1424 /* Configure The Forced output Mode */
\r
1425 tmpccmr1 |= (u32)TIM1_ForcedAction << 8;
\r
1427 TIM1->CCMR1 = (u16)tmpccmr1;
\r
1430 /*******************************************************************************
\r
1431 * Function Name : TIM1_ForcedOC3Config
\r
1432 * Description : Forces the TIM1 Channel3 output waveform to active or inactive
\r
1434 * Input : - TIM1_ForcedAction: specifies the forced Action to be set to
\r
1435 * the output waveform.
\r
1436 * This parameter can be one of the following values:
\r
1437 * - TIM1_ForcedAction_Active: Force active level on OC3REF
\r
1438 * - TIM1_ForcedAction_InActive: Force inactive level on
\r
1442 *******************************************************************************/
\r
1443 void TIM1_ForcedOC3Config(u16 TIM1_ForcedAction)
\r
1447 /* Check the parameters */
\r
1448 assert(IS_TIM1_FORCED_ACTION(TIM1_ForcedAction));
\r
1450 tmpccmr2 = TIM1->CCMR2;
\r
1452 /* Reset the OCM Bits */
\r
1453 tmpccmr2 &= CCMR_OCM13_Mask;
\r
1455 /* Configure The Forced output Mode */
\r
1456 tmpccmr2 |= TIM1_ForcedAction;
\r
1458 TIM1->CCMR2 = (u16)tmpccmr2;
\r
1461 /*******************************************************************************
\r
1462 * Function Name : TIM1_ForcedOC4Config
\r
1463 * Description : Forces the TIM1 Channel4 output waveform to active or inactive
\r
1465 * Input : - TIM1_ForcedAction: specifies the forced Action to be set to
\r
1466 * the output waveform.
\r
1467 * This parameter can be one of the following values:
\r
1468 * - TIM1_ForcedAction_Active: Force active level on OC4REF
\r
1469 * - TIM1_ForcedAction_InActive: Force inactive level on
\r
1473 *******************************************************************************/
\r
1474 void TIM1_ForcedOC4Config(u16 TIM1_ForcedAction)
\r
1478 /* Check the parameters */
\r
1479 assert(IS_TIM1_FORCED_ACTION(TIM1_ForcedAction));
\r
1481 tmpccmr2 = TIM1->CCMR1;
\r
1483 /* Reset the OCM Bits */
\r
1484 tmpccmr2 &= CCMR_OCM24_Mask;
\r
1486 /* Configure The Forced output Mode */
\r
1487 tmpccmr2 |= (u16)((u16)TIM1_ForcedAction << 8);
\r
1489 TIM1->CCMR2 = (u16)tmpccmr2;
\r
1492 /*******************************************************************************
\r
1493 * Function Name : TIM1_ARRPreloadConfig
\r
1494 * Description : Enables or disables TIM1 peripheral Preload register on ARR.
\r
1495 * Input : - Newstate: new state of the TIM1 peripheral Preload register
\r
1496 * This parameter can be: ENABLE or DISABLE.
\r
1499 *******************************************************************************/
\r
1500 void TIM1_ARRPreloadConfig(FunctionalState Newstate)
\r
1502 /* Check the parameters */
\r
1503 assert(IS_FUNCTIONAL_STATE(Newstate));
\r
1505 /* Set or Reset the ARPE Bit */
\r
1506 *(vu32 *) CR1_ARPE_BB = (u16)Newstate;
\r
1509 /*******************************************************************************
\r
1510 * Function Name : TIM1_SelectCOM
\r
1511 * Description : Selects the TIM1 peripheral Commutation event.
\r
1512 * Input : - Newstate: new state of the Commutation event.
\r
1513 * This parameter can be: ENABLE or DISABLE.
\r
1516 *******************************************************************************/
\r
1517 void TIM1_SelectCOM(FunctionalState Newstate)
\r
1519 /* Check the parameters */
\r
1520 assert(IS_FUNCTIONAL_STATE(Newstate));
\r
1522 /* Set or Reset the CCUS Bit */
\r
1523 *(vu32 *) CR2_CCUS_BB = (u16)Newstate;
\r
1526 /*******************************************************************************
\r
1527 * Function Name : TIM1_SelectCCDMA
\r
1528 * Description : Selects the TIM1 peripheral Capture Compare DMA source.
\r
1529 * Input : - Newstate: new state of the Capture Compare DMA source
\r
1530 * This parameter can be: ENABLE or DISABLE.
\r
1533 *******************************************************************************/
\r
1534 void TIM1_SelectCCDMA(FunctionalState Newstate)
\r
1536 /* Check the parameters */
\r
1537 assert(IS_FUNCTIONAL_STATE(Newstate));
\r
1539 /* Set or Reset the CCDS Bit */
\r
1540 *(vu32 *) CR2_CCDS_BB = (u16)Newstate;
\r
1543 /*******************************************************************************
\r
1544 * Function Name : TIM1_CCPreloadControl
\r
1545 * Description : Sets or Resets the TIM1 peripheral Capture Compare Preload
\r
1547 * Input : - Newstate: new state of the Capture Compare Preload Control bit
\r
1548 * This parameter can be: ENABLE or DISABLE.
\r
1551 *******************************************************************************/
\r
1552 void TIM1_CCPreloadControl(FunctionalState Newstate)
\r
1554 /* Check the parameters */
\r
1555 assert(IS_FUNCTIONAL_STATE(Newstate));
\r
1557 /* Set or Reset the CCPC Bit */
\r
1558 *(vu32 *) CR2_CCPC_BB = (u16)Newstate;
\r
1561 /*******************************************************************************
\r
1562 * Function Name : TIM1_OC1PreloadConfig
\r
1563 * Description : Enables or disables the TIM1 peripheral Preload Register on CCR1.
\r
1564 * Input : - TIM1_OCPreload: new state of the Capture Compare Preload
\r
1566 * This parameter can be one of the following values:
\r
1567 * - TIM1_OCPreload_Enable
\r
1568 * - TIM1_OCPreload_Disable
\r
1571 *******************************************************************************/
\r
1572 void TIM1_OC1PreloadConfig(u16 TIM1_OCPreload)
\r
1574 /* Check the parameters */
\r
1575 assert(IS_TIM1_OCPRELOAD_STATE(TIM1_OCPreload));
\r
1577 /* Set or Reset the OC1PE Bit */
\r
1578 *(vu32 *) CCMR1_OC1PE_BB = (u16)TIM1_OCPreload;
\r
1581 /*******************************************************************************
\r
1582 * Function Name : TIM1_OC2PreloadConfig
\r
1583 * Description : Enables or disables the TIM1 peripheral Preload Register on CCR2.
\r
1584 * Input : - TIM1_OCPreload: new state of the Capture Compare Preload
\r
1586 * This parameter can be one of the following values:
\r
1587 * - TIM1_OCPreload_Enable
\r
1588 * - TIM1_OCPreload_Disable
\r
1591 *******************************************************************************/
\r
1592 void TIM1_OC2PreloadConfig(u16 TIM1_OCPreload)
\r
1594 /* Check the parameters */
\r
1595 assert(IS_TIM1_OCPRELOAD_STATE(TIM1_OCPreload));
\r
1597 /* Set or Reset the OC2PE Bit */
\r
1598 *(vu32 *) CCMR1_OC2PE_BB = (u16)TIM1_OCPreload;
\r
1601 /*******************************************************************************
\r
1602 * Function Name : TIM1_OC3PreloadConfig
\r
1603 * Description : Enables or disables the TIM1 peripheral Preload Register on CCR3.
\r
1604 * Input : - TIM1_OCPreload: new state of the Capture Compare Preload
\r
1606 * This parameter can be one of the following values:
\r
1607 * - TIM1_OCPreload_Enable
\r
1608 * - TIM1_OCPreload_Disable
\r
1611 *******************************************************************************/
\r
1612 void TIM1_OC3PreloadConfig(u16 TIM1_OCPreload)
\r
1614 /* Check the parameters */
\r
1615 assert(IS_TIM1_OCPRELOAD_STATE(TIM1_OCPreload));
\r
1617 /* Set or Reset the OC3PE Bit */
\r
1618 *(vu32 *) CCMR2_OC3PE_BB = (u16)TIM1_OCPreload;
\r
1621 /*******************************************************************************
\r
1622 * Function Name : TIM1_OC4PreloadConfig
\r
1623 * Description : Enables or disables the TIM1 peripheral Preload Register on CCR4.
\r
1624 * Input : - TIM1_OCPreload: new state of the Capture Compare Preload
\r
1626 * This parameter can be one of the following values:
\r
1627 * - TIM1_OCPreload_Enable
\r
1628 * - TIM1_OCPreload_Disable
\r
1631 *******************************************************************************/
\r
1632 void TIM1_OC4PreloadConfig(u16 TIM1_OCPreload)
\r
1634 /* Check the parameters */
\r
1635 assert(IS_TIM1_OCPRELOAD_STATE(TIM1_OCPreload));
\r
1637 /* Set or Reset the OC4PE Bit */
\r
1638 *(vu32 *) CCMR2_OC4PE_BB = (u16)TIM1_OCPreload;
\r
1641 /*******************************************************************************
\r
1642 * Function Name : TIM1_OC1FastConfig
\r
1643 * Description : Configures the TIM1 Capture Compare 1 Fast feature.
\r
1644 * Input : - TIM1_OCFast: new state of the Output Compare Fast Enable bit.
\r
1645 * This parameter can be one of the following values:
\r
1646 * - TIM1_OCFast_Enable
\r
1647 * - TIM1_OCFast_Disable
\r
1650 *******************************************************************************/
\r
1651 void TIM1_OC1FastConfig(u16 TIM1_OCFast)
\r
1653 /* Check the parameters */
\r
1654 assert(IS_TIM1_OCFAST_STATE(TIM1_OCFast));
\r
1656 /* Set or Reset the OC1FE Bit */
\r
1657 *(vu32 *) CCMR1_OC1FE_BB = (u16)TIM1_OCFast;
\r
1660 /*******************************************************************************
\r
1661 * Function Name : TIM1_OC2FastConfig
\r
1662 * Description : Configures the TIM1 Capture Compare Fast feature.
\r
1663 * Input : - TIM1_OCFast: new state of the Output Compare Fast Enable bit.
\r
1664 * This parameter can be one of the following values:
\r
1665 * - TIM1_OCFast_Enable
\r
1666 * - TIM1_OCFast_Disable
\r
1669 *******************************************************************************/
\r
1670 void TIM1_OC2FastConfig(u16 TIM1_OCFast)
\r
1672 /* Check the parameters */
\r
1673 assert(IS_TIM1_OCFAST_STATE(TIM1_OCFast));
\r
1675 /* Set or Reset the OC2FE Bit */
\r
1676 *(vu32 *) CCMR1_OC2FE_BB = (u16)TIM1_OCFast;
\r
1679 /*******************************************************************************
\r
1680 * Function Name : TIM1_OC3FastConfig
\r
1681 * Description : Configures the TIM1 Capture Compare Fast feature.
\r
1682 * Input : - TIM1_OCFast: new state of the Output Compare Fast Enable bit.
\r
1683 * This parameter can be one of the following values:
\r
1684 * - TIM1_OCFast_Enable
\r
1685 * - TIM1_OCFast_Disable
\r
1688 *******************************************************************************/
\r
1689 void TIM1_OC3FastConfig(u16 TIM1_OCFast)
\r
1691 /* Check the parameters */
\r
1692 assert(IS_TIM1_OCFAST_STATE(TIM1_OCFast));
\r
1694 /* Set or Reset the OC3FE Bit */
\r
1695 *(vu32 *) CCMR2_OC3FE_BB = (u16)TIM1_OCFast;
\r
1698 /*******************************************************************************
\r
1699 * Function Name : TIM1_OC4FastConfig
\r
1700 * Description : Configures the TIM1 Capture Compare Fast feature.
\r
1701 * Input : - TIM1_OCFast: new state of the Output Compare Fast Enable bit.
\r
1702 * This parameter can be one of the following values:
\r
1703 * - TIM1_OCFast_Enable
\r
1704 * - TIM1_OCFast_Disable
\r
1707 *******************************************************************************/
\r
1708 void TIM1_OC4FastConfig(u16 TIM1_OCFast)
\r
1710 /* Check the parameters */
\r
1711 assert(IS_TIM1_OCFAST_STATE(TIM1_OCFast));
\r
1713 /* Set or Reset the OC4FE Bit */
\r
1714 *(vu32 *) CCMR2_OC4FE_BB = (u16)TIM1_OCFast;
\r
1717 /*******************************************************************************
\r
1718 * Function Name : TIM1_GenerateEvent
\r
1719 * Description : Configures the TIM1 event to be generate by software.
\r
1720 * Input : - TIM1_EventSource: specifies the event source.
\r
1721 * This parameter can be one or more of the following values:
\r
1722 * - TIM1_EventSource_Update: TIM1 update Event source
\r
1723 * - TIM1_EventSource_CC1: TIM1 Capture Compare 1 Event source
\r
1724 * - TIM1_EventSource_CC2: TIM1 Capture Compare 2 Event source
\r
1725 * - TIM1_EventSource_CC3: TIM1 Capture Compare 3 Event source
\r
1726 * - TIM1_EventSource_CC4: TIM1 Capture Compare 4 Event source
\r
1727 * - TIM1_EventSource_COM: TIM1 COM Event source
\r
1728 * - TIM1_EventSource_Trigger: TIM1 Trigger Event source
\r
1729 * - TIM1_EventSourceBreak: TIM1 Break Event source
\r
1732 *******************************************************************************/
\r
1733 void TIM1_GenerateEvent(u16 TIM1_EventSource)
\r
1735 /* Check the parameters */
\r
1736 assert(IS_TIM1_EVENT_SOURCE(TIM1_EventSource));
\r
1738 /* Set the event sources */
\r
1739 TIM1->EGR |= TIM1_EventSource;
\r
1742 /*******************************************************************************
\r
1743 * Function Name : TIM1_OC1PolarityConfig
\r
1744 * Description : Configures the TIM1 Channel 1 polarity.
\r
1745 * Input : - TIM1_OCPolarity: specifies the OC1 Polarity
\r
1746 * This parmeter can be one of the following values:
\r
1747 * - TIM1_OCPolarity_High: Output Compare active high
\r
1748 * - TIM1_OCPolarity_Low: Output Compare active low
\r
1751 *******************************************************************************/
\r
1752 void TIM1_OC1PolarityConfig(u16 TIM1_OCPolarity)
\r
1754 /* Check the parameters */
\r
1755 assert(IS_TIM1_OC_POLARITY(TIM1_OCPolarity));
\r
1757 /* Set or Reset the CC1P Bit */
\r
1758 *(vu32 *) CCER_CC1P_BB = (u16)TIM1_OCPolarity;
\r
1761 /*******************************************************************************
\r
1762 * Function Name : TIM1_OC1NPolarityConfig
\r
1763 * Description : Configures the TIM1 Channel 1N polarity.
\r
1764 * Input : - TIM1_OCPolarity: specifies the OC1N Polarity
\r
1765 * This parmeter can be one of the following values:
\r
1766 * - TIM1_OCPolarity_High: Output Compare active high
\r
1767 * - TIM1_OCPolarity_Low: Output Compare active low
\r
1770 *******************************************************************************/
\r
1771 void TIM1_OC1NPolarityConfig(u16 TIM1_OCPolarity)
\r
1773 /* Check the parameters */
\r
1774 assert(IS_TIM1_OC_POLARITY(TIM1_OCPolarity));
\r
1776 /* Set or Reset the CC3P Bit */
\r
1777 *(vu32 *) CCER_CC1NP_BB = (u16)TIM1_OCPolarity;
\r
1780 /*******************************************************************************
\r
1781 * Function Name : TIM1_OC2PolarityConfig
\r
1782 * Description : Configures the TIM1 Channel 2 polarity.
\r
1783 * Input : - TIM1_OCPolarity: specifies the OC2 Polarity
\r
1784 * This parmeter can be one of the following values:
\r
1785 * - TIM1_OCPolarity_High: Output Compare active high
\r
1786 * - TIM1_OCPolarity_Low: Output Compare active low
\r
1789 *******************************************************************************/
\r
1790 void TIM1_OC2PolarityConfig(u16 TIM1_OCPolarity)
\r
1792 /* Check the parameters */
\r
1793 assert(IS_TIM1_OC_POLARITY(TIM1_OCPolarity));
\r
1795 /* Set or Reset the CC2P Bit */
\r
1796 *(vu32 *) CCER_CC2P_BB = (u16)TIM1_OCPolarity;
\r
1799 /*******************************************************************************
\r
1800 * Function Name : TIM1_OC2NPolarityConfig
\r
1801 * Description : Configures the TIM1 Channel 2N polarity.
\r
1802 * Input : - TIM1_OCPolarity: specifies the OC2N Polarity
\r
1803 * This parmeter can be one of the following values:
\r
1804 * - TIM1_OCPolarity_High: Output Compare active high
\r
1805 * - TIM1_OCPolarity_Low: Output Compare active low
\r
1808 *******************************************************************************/
\r
1809 void TIM1_OC2NPolarityConfig(u16 TIM1_OCPolarity)
\r
1811 /* Check the parameters */
\r
1812 assert(IS_TIM1_OC_POLARITY(TIM1_OCPolarity));
\r
1814 /* Set or Reset the CC3P Bit */
\r
1815 *(vu32 *) CCER_CC2NP_BB = (u16)TIM1_OCPolarity;
\r
1818 /*******************************************************************************
\r
1819 * Function Name : TIM1_OC3PolarityConfig
\r
1820 * Description : Configures the TIM1 Channel 3 polarity.
\r
1821 * Input : - TIM1_OCPolarity: specifies the OC3 Polarity
\r
1822 * This parmeter can be one of the following values:
\r
1823 * - TIM1_OCPolarity_High: Output Compare active high
\r
1824 * - TIM1_OCPolarity_Low: Output Compare active low
\r
1827 *******************************************************************************/
\r
1828 void TIM1_OC3PolarityConfig(u16 TIM1_OCPolarity)
\r
1830 /* Check the parameters */
\r
1831 assert(IS_TIM1_OC_POLARITY(TIM1_OCPolarity));
\r
1833 /* Set or Reset the CC3P Bit */
\r
1834 *(vu32 *) CCER_CC3P_BB = (u16)TIM1_OCPolarity;
\r
1837 /*******************************************************************************
\r
1838 * Function Name : TIM1_OC3NPolarityConfig
\r
1839 * Description : Configures the TIM1 Channel 3N polarity.
\r
1840 * Input : - TIM1_OCPolarity: specifies the OC3N Polarity
\r
1841 * This parmeter can be one of the following values:
\r
1842 * - TIM1_OCPolarity_High: Output Compare active high
\r
1843 * - TIM1_OCPolarity_Low: Output Compare active low
\r
1846 *******************************************************************************/
\r
1847 void TIM1_OC3NPolarityConfig(u16 TIM1_OCPolarity)
\r
1849 /* Check the parameters */
\r
1850 assert(IS_TIM1_OC_POLARITY(TIM1_OCPolarity));
\r
1852 /* Set or Reset the CC3P Bit */
\r
1853 *(vu32 *) CCER_CC3NP_BB = (u16)TIM1_OCPolarity;
\r
1856 /*******************************************************************************
\r
1857 * Function Name : TIM1_OC4PolarityConfig
\r
1858 * Description : Configures the TIM1 Channel 4 polarity.
\r
1859 * Input : - TIM1_OCPolarity: specifies the OC4 Polarity
\r
1860 * This parmeter can be one of the following values:
\r
1861 * - TIM1_OCPolarity_High: Output Compare active high
\r
1862 * - TIM1_OCPolarity_Low: Output Compare active low
\r
1865 *******************************************************************************/
\r
1866 void TIM1_OC4PolarityConfig(u16 TIM1_OCPolarity)
\r
1868 /* Check the parameters */
\r
1869 assert(IS_TIM1_OC_POLARITY(TIM1_OCPolarity));
\r
1871 /* Set or Reset the CC4P Bit */
\r
1872 *(vu32 *) CCER_CC4P_BB = (u16)TIM1_OCPolarity;
\r
1875 /*******************************************************************************
\r
1876 * Function Name : TIM1_CCxCmd
\r
1877 * Description : Enables or disables the TIM1 Capture Compare Channel x.
\r
1878 * Input : - TIM1_Channel: specifies the TIM1 Channel
\r
1879 * This parmeter can be one of the following values:
\r
1880 * - TIM1_Channel1: TIM1 Channel1
\r
1881 * - TIM1_Channel2: TIM1 Channel2
\r
1882 * - TIM1_Channel3: TIM1 Channel3
\r
1883 * - TIM1_Channel4: TIM1 Channel4
\r
1884 * - Newstate: specifies the TIM1 Channel CCxE bit new state.
\r
1885 * This parameter can be: ENABLE or DISABLE.
\r
1888 *******************************************************************************/
\r
1889 void TIM1_CCxCmd(u16 TIM1_Channel, FunctionalState Newstate)
\r
1891 /* Check the parameters */
\r
1892 assert(IS_TIM1_CHANNEL(TIM1_Channel));
\r
1893 assert(IS_FUNCTIONAL_STATE(Newstate));
\r
1895 if(TIM1_Channel == TIM1_Channel_1)
\r
1897 /* Set or Reset the CC1E Bit */
\r
1898 *(vu32 *) CCER_CC1E_BB = (u16)Newstate;
\r
1900 else if(TIM1_Channel == TIM1_Channel_2)
\r
1902 /* Set or Reset the CC2E Bit */
\r
1903 *(vu32 *) CCER_CC2E_BB = (u16)Newstate;
\r
1905 else if(TIM1_Channel == TIM1_Channel_3)
\r
1907 /* Set or Reset the CC3E Bit */
\r
1908 *(vu32 *) CCER_CC3E_BB = (u16)Newstate;
\r
1912 /* Set or Reset the CC4E Bit */
\r
1913 *(vu32 *) CCER_CC4E_BB = (u16)Newstate;
\r
1917 /*******************************************************************************
\r
1918 * Function Name : TIM1_CCxNCmd
\r
1919 * Description : Enables or disables the TIM1 Capture Compare Channel xN.
\r
1920 * Input : - TIM1_Channel: specifies the TIM1 Channel
\r
1921 * This parmeter can be one of the following values:
\r
1922 * - TIM1_Channel1: TIM1 Channel1
\r
1923 * - TIM1_Channel2: TIM1 Channel2
\r
1924 * - TIM1_Channel3: TIM1 Channel3
\r
1925 * - Newstate: specifies the TIM1 Channel CCxNE bit new state.
\r
1926 * This parameter can be: ENABLE or DISABLE.
\r
1929 *******************************************************************************/
\r
1930 void TIM1_CCxNCmd(u16 TIM1_Channel, FunctionalState Newstate)
\r
1932 /* Check the parameters */
\r
1933 assert(IS_TIM1_COMPLEMENTARY_CHANNEL(TIM1_Channel));
\r
1934 assert(IS_FUNCTIONAL_STATE(Newstate));
\r
1936 if(TIM1_Channel == TIM1_Channel_1)
\r
1938 /* Set or Reset the CC1NE Bit */
\r
1939 *(vu32 *) CCER_CC1NE_BB = (u16)Newstate;
\r
1941 else if(TIM1_Channel == TIM1_Channel_2)
\r
1943 /* Set or Reset the CC2NE Bit */
\r
1944 *(vu32 *) CCER_CC2NE_BB = (u16)Newstate;
\r
1948 /* Set or Reset the CC3NE Bit */
\r
1949 *(vu32 *) CCER_CC3NE_BB = (u16)Newstate;
\r
1953 /*******************************************************************************
\r
1954 * Function Name : TIM1_SelectOCxM
\r
1955 * Description : Selects the TIM1 Ouput Compare Mode.
\r
1956 * This function disables the selected channel before changing
\r
1957 * the Ouput Compare Mode. User has to enable this channel using
\r
1958 * TIM1_CCxCmd and TIM1_CCxNCmd functions.
\r
1959 * Input : - TIM1_Channel: specifies the TIM1 Channel
\r
1960 * This parmeter can be one of the following values:
\r
1961 * - TIM1_Channel1: TIM1 Channel1
\r
1962 * - TIM1_Channel2: TIM1 Channel2
\r
1963 * - TIM1_Channel3: TIM1 Channel3
\r
1964 * - TIM1_Channel4: TIM1 Channel4
\r
1965 * - TIM1_OCMode: specifies the TIM1 Output Compare Mode.
\r
1966 * This paramter can be one of the following values:
\r
1967 * - TIM1_OCMode_Timing
\r
1968 * - TIM1_OCMode_Active
\r
1969 * - TIM1_OCMode_Toggle
\r
1970 * - TIM1_OCMode_PWM1
\r
1971 * - TIM1_OCMode_PWM2
\r
1972 * - TIM1_ForcedAction_Active
\r
1973 * - TIM1_ForcedAction_InActive
\r
1976 *******************************************************************************/
\r
1977 void TIM1_SelectOCxM(u16 TIM1_Channel, u16 TIM1_OCMode)
\r
1979 /* Check the parameters */
\r
1980 assert(IS_TIM1_CHANNEL(TIM1_Channel));
\r
1981 assert(IS_TIM1_OCM(TIM1_OCMode));
\r
1983 if(TIM1_Channel == TIM1_Channel_1)
\r
1985 /* Disable the Channel 1: Reset the CCE Bit */
\r
1986 *(vu32 *) CCER_CC1E_BB = CCER_CCE_Reset;
\r
1988 /* Reset the Output Compare Bits */
\r
1989 TIM1->CCMR1 &= OC13Mode_Mask;
\r
1991 /* Set the Ouput Compare Mode */
\r
1992 TIM1->CCMR1 |= TIM1_OCMode;
\r
1994 else if(TIM1_Channel == TIM1_Channel_2)
\r
1996 /* Disable the Channel 2: Reset the CCE Bit */
\r
1997 *(vu32 *) CCER_CC2E_BB = CCER_CCE_Reset;
\r
1999 /* Reset the Output Compare Bits */
\r
2000 TIM1->CCMR1 &= OC24Mode_Mask;
\r
2002 /* Set the Ouput Compare Mode */
\r
2003 TIM1->CCMR1 |= (u16)((u16)TIM1_OCMode << 8);
\r
2005 else if(TIM1_Channel == TIM1_Channel_3)
\r
2007 /* Disable the Channel 3: Reset the CCE Bit */
\r
2008 *(vu32 *) CCER_CC3E_BB = CCER_CCE_Reset;
\r
2010 /* Reset the Output Compare Bits */
\r
2011 TIM1->CCMR2 &= OC13Mode_Mask;
\r
2013 /* Set the Ouput Compare Mode */
\r
2014 TIM1->CCMR2 |= TIM1_OCMode;
\r
2018 /* Disable the Channel 4: Reset the CCE Bit */
\r
2019 *(vu32 *) CCER_CC4E_BB = CCER_CCE_Reset;
\r
2021 /* Reset the Output Compare Bits */
\r
2022 TIM1->CCMR2 &= OC24Mode_Mask;
\r
2024 /* Set the Ouput Compare Mode */
\r
2025 TIM1->CCMR2 |= (u16)((u16)TIM1_OCMode << 8);
\r
2029 /*******************************************************************************
\r
2030 * Function Name : TIM1_SetAutoreload
\r
2031 * Description : Sets the TIM1 Autoreload Register value.
\r
2032 * Input : - Autoreload: specifies the Autoreload register new value.
\r
2035 *******************************************************************************/
\r
2036 void TIM1_SetAutoreload(u16 Autoreload)
\r
2038 /* Set the Autoreload Register value */
\r
2039 TIM1->ARR = Autoreload;
\r
2042 /*******************************************************************************
\r
2043 * Function Name : TIM1_SetCompare1
\r
2044 * Description : Sets the TIM1 Capture Compare1 Register value.
\r
2045 * Input : - Compare1: specifies the Capture Compare1 register new value.
\r
2048 *******************************************************************************/
\r
2049 void TIM1_SetCompare1(u16 Compare1)
\r
2051 /* Set the Capture Compare1 Register value */
\r
2052 TIM1->CCR1 = Compare1;
\r
2055 /*******************************************************************************
\r
2056 * Function Name : TIM1_SetCompare2
\r
2057 * Description : Sets the TIM1 Capture Compare2 Register value.
\r
2058 * Input : - Compare2: specifies the Capture Compare2 register new value.
\r
2061 *******************************************************************************/
\r
2062 void TIM1_SetCompare2(u16 Compare2)
\r
2064 /* Set the Capture Compare2 Register value */
\r
2065 TIM1->CCR2 = Compare2;
\r
2068 /*******************************************************************************
\r
2069 * Function Name : TIM1_SetCompare3
\r
2070 * Description : Sets the TIM1 Capture Compare3 Register value.
\r
2071 * Input : - Compare3: specifies the Capture Compare3 register new value.
\r
2074 *******************************************************************************/
\r
2075 void TIM1_SetCompare3(u16 Compare3)
\r
2077 /* Set the Capture Compare3 Register value */
\r
2078 TIM1->CCR3 = Compare3;
\r
2081 /*******************************************************************************
\r
2082 * Function Name : TIM1_SetCompare4
\r
2083 * Description : Sets the TIM1 Capture Compare4 Register value.
\r
2084 * Input : - Compare4: specifies the Capture Compare4 register new value.
\r
2087 *******************************************************************************/
\r
2088 void TIM1_SetCompare4(u16 Compare4)
\r
2090 /* Set the Capture Compare4 Register value */
\r
2091 TIM1->CCR4 = Compare4;
\r
2094 /*******************************************************************************
\r
2095 * Function Name : TIM1_SetIC1Prescaler
\r
2096 * Description : Sets the TIM1 Input Capture 1 prescaler.
\r
2097 * Input : - TIM1_IC1Prescaler: specifies the Input Capture prescaler
\r
2099 * This parameter can be one of the following values:
\r
2100 * - TIM1_ICPSC_DIV1: no prescaler
\r
2101 * - TIM1_ICPSC_DIV2: capture is done once every 2 events
\r
2102 * - TIM1_ICPSC_DIV4: capture is done once every 4 events
\r
2103 * - TIM1_ICPSC_DIV8: capture is done once every 8 events
\r
2106 *******************************************************************************/
\r
2107 void TIM1_SetIC1Prescaler(u16 TIM1_IC1Prescaler)
\r
2111 /* Check the parameters */
\r
2112 assert(IS_TIM1_IC_PRESCALER(TIM1_IC1Prescaler));
\r
2114 tmpccmr1 = TIM1->CCMR1;
\r
2116 /* Reset the IC1PSC Bits */
\r
2117 tmpccmr1 &= CCMR_IC13PSC_Mask;
\r
2119 /* Set the IC1PSC value */
\r
2120 tmpccmr1 |= TIM1_IC1Prescaler;
\r
2122 TIM1->CCMR1 = (u16)tmpccmr1;
\r
2125 /*******************************************************************************
\r
2126 * Function Name : TIM1_SetIC2Prescaler
\r
2127 * Description : Sets the TIM1 Input Capture 2 prescaler.
\r
2128 * Input : - TIM1_IC2Prescaler: specifies the Input Capture prescaler
\r
2130 * This parameter can be one of the following values:
\r
2131 * - TIM1_ICPSC_DIV1: no prescaler
\r
2132 * - TIM1_ICPSC_DIV2: capture is done once every 2 events
\r
2133 * - TIM1_ICPSC_DIV4: capture is done once every 4 events
\r
2134 * - TIM1_ICPSC_DIV8: capture is done once every 8 events
\r
2137 *******************************************************************************/
\r
2138 void TIM1_SetIC2Prescaler(u16 TIM1_IC2Prescaler)
\r
2142 /* Check the parameters */
\r
2143 assert(IS_TIM1_IC_PRESCALER(TIM1_IC2Prescaler));
\r
2145 tmpccmr1 = TIM1->CCMR1;
\r
2147 /* Reset the IC2PSC Bits */
\r
2148 tmpccmr1 &= CCMR_IC24PSC_Mask;
\r
2150 /* Set the IC2PSC value */
\r
2151 tmpccmr1 |= (u16)((u16)TIM1_IC2Prescaler << 8);
\r
2153 TIM1->CCMR1 = (u16)tmpccmr1;
\r
2156 /*******************************************************************************
\r
2157 * Function Name : TIM1_SetIC3Prescaler
\r
2158 * Description : Sets the TIM1 Input Capture 3 prescaler.
\r
2159 * Input : - TIM1_IC3Prescaler: specifies the Input Capture prescaler
\r
2161 * This parameter can be one of the following values:
\r
2162 * - TIM1_ICPSC_DIV1: no prescaler
\r
2163 * - TIM1_ICPSC_DIV2: capture is done once every 2 events
\r
2164 * - TIM1_ICPSC_DIV4: capture is done once every 4 events
\r
2165 * - TIM1_ICPSC_DIV8: capture is done once every 8 events
\r
2168 *******************************************************************************/
\r
2169 void TIM1_SetIC3Prescaler(u16 TIM1_IC3Prescaler)
\r
2173 /* Check the parameters */
\r
2174 assert(IS_TIM1_IC_PRESCALER(TIM1_IC3Prescaler));
\r
2176 tmpccmr2 = TIM1->CCMR2;
\r
2178 /* Reset the IC3PSC Bits */
\r
2179 tmpccmr2 &= CCMR_IC13PSC_Mask;
\r
2181 /* Set the IC3PSC value */
\r
2182 tmpccmr2 |= TIM1_IC3Prescaler;
\r
2184 TIM1->CCMR2 = (u16)tmpccmr2;
\r
2187 /*******************************************************************************
\r
2188 * Function Name : TIM1_SetIC4Prescaler
\r
2189 * Description : Sets the TIM1 Input Capture 4 prescaler.
\r
2190 * Input : - TIM1_IC4Prescaler: specifies the Input Capture prescaler
\r
2192 * This parameter can be one of the following values:
\r
2193 * - TIM1_ICPSC_DIV1: no prescaler
\r
2194 * - TIM1_ICPSC_DIV2: capture is done once every 2 events
\r
2195 * - TIM1_ICPSC_DIV4: capture is done once every 4 events
\r
2196 * - TIM1_ICPSC_DIV8: capture is done once every 8 events
\r
2199 *******************************************************************************/
\r
2200 void TIM1_SetIC4Prescaler(u16 TIM1_IC4Prescaler)
\r
2204 /* Check the parameters */
\r
2205 assert(IS_TIM1_IC_PRESCALER(TIM1_IC4Prescaler));
\r
2207 tmpccmr2 = TIM1->CCMR2;
\r
2209 /* Reset the IC4PSC Bits */
\r
2210 tmpccmr2 &= CCMR_IC24PSC_Mask;
\r
2212 /* Set the IC4PSC value */
\r
2213 tmpccmr2 |= (u16)((u16)TIM1_IC4Prescaler << 8);
\r
2215 TIM1->CCMR2 = (u16)tmpccmr2;
\r
2218 /*******************************************************************************
\r
2219 * Function Name : TIM1_SetClockDivision
\r
2220 * Description : Sets the TIM1 Clock Division value.
\r
2221 * Input : - TIM1_CKD: specifies the clock division value.
\r
2222 * This parameter can be one of the following value:
\r
2223 * - TIM1_CKD_DIV1: TDTS = Tck_tim
\r
2224 * - TIM1_CKD_DIV2: TDTS = 2*Tck_tim
\r
2225 * - TIM1_CKD_DIV4: TDTS = 4*Tck_tim
\r
2228 *******************************************************************************/
\r
2229 void TIM1_SetClockDivision(u16 TIM1_CKD)
\r
2233 /* Check the parameters */
\r
2234 assert(IS_TIM1_CKD_DIV(TIM1_CKD));
\r
2236 tmpcr1 = TIM1->CR1;
\r
2238 /* Reset the CKD Bits */
\r
2239 tmpcr1 &= CR1_CKD_Mask;
\r
2241 /* Set the CKD value */
\r
2242 tmpcr1 |= TIM1_CKD;
\r
2244 TIM1->CR1 = (u16)tmpcr1;
\r
2247 /*******************************************************************************
\r
2248 * Function Name : TIM1_GetCapture1
\r
2249 * Description : Gets the TIM1 Input Capture 1 value.
\r
2252 * Return : Capture Compare 1 Register value.
\r
2253 *******************************************************************************/
\r
2254 u16 TIM1_GetCapture1(void)
\r
2256 /* Get the Capture 1 Register value */
\r
2257 return TIM1->CCR1;
\r
2260 /*******************************************************************************
\r
2261 * Function Name : TIM1_GetCapture2
\r
2262 * Description : Gets the TIM1 Input Capture 2 value.
\r
2265 * Return : Capture Compare 2 Register value.
\r
2266 *******************************************************************************/
\r
2267 u16 TIM1_GetCapture2(void)
\r
2269 /* Get the Capture 2 Register value */
\r
2270 return TIM1->CCR2;
\r
2273 /*******************************************************************************
\r
2274 * Function Name : TIM1_GetCapture3
\r
2275 * Description : Gets the TIM1 Input Capture 3 value.
\r
2278 * Return : Capture Compare 3 Register value.
\r
2279 *******************************************************************************/
\r
2280 u16 TIM1_GetCapture3(void)
\r
2282 /* Get the Capture 3 Register value */
\r
2283 return TIM1->CCR3;
\r
2286 /*******************************************************************************
\r
2287 * Function Name : TIM1_GetCapture4
\r
2288 * Description : Gets the TIM1 Input Capture 4 value.
\r
2291 * Return : Capture Compare 4 Register value.
\r
2292 *******************************************************************************/
\r
2293 u16 TIM1_GetCapture4(void)
\r
2295 /* Get the Capture 4 Register value */
\r
2296 return TIM1->CCR4;
\r
2299 /*******************************************************************************
\r
2300 * Function Name : TIM1_GetCounter
\r
2301 * Description : Gets the TIM1 Counter value.
\r
2304 * Return : Counter Register value.
\r
2305 *******************************************************************************/
\r
2306 u16 TIM1_GetCounter(void)
\r
2308 /* Get the Counter Register value */
\r
2312 /*******************************************************************************
\r
2313 * Function Name : TIM1_GetPrescaler
\r
2314 * Description : Gets the TIM1 Prescaler value.
\r
2317 * Return : Prescaler Register value.
\r
2318 *******************************************************************************/
\r
2319 u16 TIM1_GetPrescaler(void)
\r
2321 /* Get the Prescaler Register value */
\r
2325 /*******************************************************************************
\r
2326 * Function Name : TIM1_GetFlagStatus
\r
2327 * Description : Checks whether the specified TIM1 flag is set or not.
\r
2328 * Input : - TIM1_FLAG: specifies the flag to check.
\r
2329 * This parameter can be one of the following values:
\r
2330 * - TIM1_FLAG_Update: TIM1 update Flag
\r
2331 * - TIM1_FLAG_CC1: TIM1 Capture Compare 1 Flag
\r
2332 * - TIM1_FLAG_CC2: TIM1 Capture Compare 2 Flag
\r
2333 * - TIM1_FLAG_CC3: TIM1 Capture Compare 3 Flag
\r
2334 * - TIM1_FLAG_CC4: TIM1 Capture Compare 4 Flag
\r
2335 * - TIM1_FLAG_COM: TIM1 Commutation Flag
\r
2336 * - TIM1_FLAG_Trigger: TIM1 Trigger Flag
\r
2337 * - TIM1_FLAG_Break: TIM1 Break Flag
\r
2338 * - TIM1_FLAG_CC1OF: TIM1 Capture Compare 1 overcapture Flag
\r
2339 * - TIM1_FLAG_CC2OF: TIM1 Capture Compare 2 overcapture Flag
\r
2340 * - TIM1_FLAG_CC3OF: TIM1 Capture Compare 3 overcapture Flag
\r
2341 * - TIM1_FLAG_CC4OF: TIM1 Capture Compare 4 overcapture Flag
\r
2343 * Return : The new state of TIM1_FLAG (SET or RESET).
\r
2344 *******************************************************************************/
\r
2345 FlagStatus TIM1_GetFlagStatus(u16 TIM1_FLAG)
\r
2347 FlagStatus bitstatus = RESET;
\r
2349 /* Check the parameters */
\r
2350 assert(IS_TIM1_GET_FLAG(TIM1_FLAG));
\r
2352 if ((TIM1->SR & TIM1_FLAG) != (u16)RESET )
\r
2358 bitstatus = RESET;
\r
2363 /*******************************************************************************
\r
2364 * Function Name : TIM1_ClearFlag
\r
2365 * Description : Clears the TIM1
\92s pending flags.
\r
2366 * Input : - TIM1_FLAG: specifies the flag to clear.
\r
2367 * This parameter can be any combination of the following values:
\r
2368 * - TIM1_FLAG_Update: TIM1 update Flag
\r
2369 * - TIM1_FLAG_CC1: TIM1 Capture Compare 1 Flag
\r
2370 * - TIM1_FLAG_CC2: TIM1 Capture Compare 2 Flag
\r
2371 * - TIM1_FLAG_CC3: TIM1 Capture Compare 3 Flag
\r
2372 * - TIM1_FLAG_CC4: TIM1 Capture Compare 4 Flag
\r
2373 * - TIM1_FLAG_COM: TIM1 Commutation Flag
\r
2374 * - TIM1_FLAG_Trigger: TIM1 Trigger Flag
\r
2375 * - TIM1_FLAG_Break: TIM1 Break Flag
\r
2376 * - TIM1_FLAG_CC1OF: TIM1 Capture Compare 1 overcapture Flag
\r
2377 * - TIM1_FLAG_CC2OF: TIM1 Capture Compare 2 overcapture Flag
\r
2378 * - TIM1_FLAG_CC3OF: TIM1 Capture Compare 3 overcapture Flag
\r
2379 * - TIM1_FLAG_CC4OF: TIM1 Capture Compare 4 overcapture Flag
\r
2382 *******************************************************************************/
\r
2383 void TIM1_ClearFlag(u16 TIM1_FLAG)
\r
2385 /* Check the parameters */
\r
2386 assert(IS_TIM1_CLEAR_FLAG(TIM1_FLAG));
\r
2388 /* Clear the flags */
\r
2389 TIM1->SR &= (u16)~TIM1_FLAG;
\r
2392 /*******************************************************************************
\r
2393 * Function Name : TIM1_GetITStatus
\r
2394 * Description : Checks whether the TIM1 interrupt has occurred or not.
\r
2395 * Input : - TIM1_IT: specifies the TIM1 interrupt source to check.
\r
2396 * This parameter can be one of the following values:
\r
2397 * - TIM1_IT_Update: TIM1 update Interrupt source
\r
2398 * - TIM1_IT_CC1: TIM1 Capture Compare 1 Interrupt source
\r
2399 * - TIM1_IT_CC2: TIM1 Capture Compare 2 Interrupt source
\r
2400 * - TIM1_IT_CC3: TIM1 Capture Compare 3 Interrupt source
\r
2401 * - TIM1_IT_CC4: TIM1 Capture Compare 4 Interrupt source
\r
2402 * - TIM1_IT_COM: TIM1 Commutation Interrupt
\r
2404 * - TIM1_IT_Trigger: TIM1 Trigger Interrupt source
\r
2405 * - TIM1_IT_Break: TIM1 Break Interrupt source
\r
2407 * Return : The new state of the TIM1_IT(SET or RESET).
\r
2408 *******************************************************************************/
\r
2409 ITStatus TIM1_GetITStatus(u16 TIM1_IT)
\r
2411 ITStatus bitstatus = RESET;
\r
2413 u16 TIM1_itStatus = 0x0, TIM1_itEnable = 0x0;
\r
2415 /* Check the parameters */
\r
2416 assert(IS_TIM1_GET_IT(TIM1_IT));
\r
2418 TIM1_itStatus = TIM1->SR & TIM1_IT;
\r
2420 TIM1_itEnable = TIM1->DIER & TIM1_IT;
\r
2422 if ((TIM1_itStatus != (u16)RESET ) && (TIM1_itEnable != (u16)RESET ))
\r
2428 bitstatus = RESET;
\r
2433 /*******************************************************************************
\r
2434 * Function Name : TIM1_ClearITPendingBit
\r
2435 * Description : Clears the TIM1's interrupt pending bits.
\r
2436 * Input : - TIM1_IT: specifies the pending bit to clear.
\r
2437 * This parameter can be any combination of the following values:
\r
2438 * - TIM1_IT_Update: TIM1 update Interrupt source
\r
2439 * - TIM1_IT_CC1: TIM1 Capture Compare 1 Interrupt source
\r
2440 * - TIM1_IT_CC2: TIM1 Capture Compare 2 Interrupt source
\r
2441 * - TIM1_IT_CC3: TIM1 Capture Compare 3 Interrupt source
\r
2442 * - TIM1_IT_CC4: TIM1 Capture Compare 4 Interrupt source
\r
2443 * - TIM1_IT_COM: TIM1 Commutation Interrupt
\r
2445 * - TIM1_IT_Trigger: TIM1 Trigger Interrupt source
\r
2446 * - TIM1_IT_Break: TIM1 Break Interrupt source
\r
2449 *******************************************************************************/
\r
2450 void TIM1_ClearITPendingBit(u16 TIM1_IT)
\r
2452 /* Check the parameters */
\r
2453 assert(IS_TIM1_IT(TIM1_IT));
\r
2455 /* Clear the IT pending Bit */
\r
2456 TIM1->SR &= (u16)~TIM1_IT;
\r
2459 /*******************************************************************************
\r
2460 * Function Name : TI1_Config
\r
2461 * Description : Configure the TI1 as Input.
\r
2462 * Input : - TIM1_ICPolarity : The Input Polarity.
\r
2463 * This parameter can be one of the following values:
\r
2464 * - TIM1_ICPolarity_Rising
\r
2465 * - TIM1_ICPolarity_Falling
\r
2466 * - TIM1_ICSelection: specifies the input to be used.
\r
2467 * This parameter can be one of the following values:
\r
2468 * - TIM1_ICSelection_DirectTI: TIM1 Input 1 is selected to
\r
2469 * be connected to IC1.
\r
2470 * - TIM1_ICSelection_IndirectTI: TIM1 Input 1 is selected to
\r
2471 * be connected to IC2.
\r
2472 * - TIM1_ICSelection_TRGI:TIM1 Input 1 is selected to be
\r
2473 * connected to TRGI.
\r
2474 * - TIM1_ICFilter: Specifies the Input Capture Filter.
\r
2475 * This parameter must be a value between 0x00 and 0x0F.
\r
2478 *******************************************************************************/
\r
2479 static void TI1_Config(u16 TIM1_ICPolarity, u16 TIM1_ICSelection,
\r
2484 tmpccmr1 = TIM1->CCMR1;
\r
2486 /* Disable the Channel 1: Reset the CCE Bit */
\r
2487 *(vu32 *) CCER_CC1E_BB = CCER_CCE_Reset;
\r
2489 /* Select the Input and set the filter */
\r
2490 tmpccmr1 &= CCMR_CC13S_Mask & CCMR_IC13F_Mask;
\r
2491 tmpccmr1 |= (u16)TIM1_ICSelection | (u16)((u16)TIM1_ICFilter << 4);
\r
2493 TIM1->CCMR1 = (u16)tmpccmr1;
\r
2495 /* Select the Polarity */
\r
2496 *(vu32 *) CCER_CC1P_BB = TIM1_ICPolarity;
\r
2498 /* Set the CCE Bit */
\r
2499 *(vu32 *) CCER_CC1E_BB = CCER_CCE_Set;
\r
2502 /*******************************************************************************
\r
2503 * Function Name : TI2_Config
\r
2504 * Description : Configure the TI2 as Input.
\r
2505 * Input : - TIM1_ICPolarity : The Input Polarity.
\r
2506 * This parameter can be one of the following values:
\r
2507 * - TIM1_ICPolarity_Rising
\r
2508 * - TIM1_ICPolarity_Falling
\r
2509 * - TIM1_ICSelection: specifies the input to be used.
\r
2510 * This parameter can be one of the following values:
\r
2511 * - TIM1_ICSelection_DirectTI: TIM1 Input 2 is selected to
\r
2512 * be connected to IC2.
\r
2513 * - TIM1_ICSelection_IndirectTI: TIM1 Input 2 is selected to
\r
2514 * be connected to IC1.
\r
2515 * - TIM1_ICSelection_TRGI: TIM1 Input 2 is selected to be
\r
2516 * connected to TRGI.
\r
2517 * - TIM1_ICFilter: Specifies the Input Capture Filter.
\r
2518 * This parameter must be a value between 0x00 and 0x0F.
\r
2521 *******************************************************************************/
\r
2522 static void TI2_Config(u16 TIM1_ICPolarity, u16 TIM1_ICSelection,
\r
2527 tmpccmr1 = TIM1->CCMR1;
\r
2529 /* Disable the Channel 2: Reset the CCE Bit */
\r
2530 *(vu32 *) CCER_CC2E_BB = CCER_CCE_Reset;
\r
2532 /* Select the Input and set the filter */
\r
2533 tmpccmr1 &= CCMR_CC24S_Mask & CCMR_IC24F_Mask;
\r
2534 tmpccmr1 |= (u16)((u16)TIM1_ICSelection << 8) | (u16)((u16)TIM1_ICFilter <<12);
\r
2536 TIM1->CCMR1 = (u16)tmpccmr1;
\r
2538 /* Select the Polarity */
\r
2539 *(vu32 *) CCER_CC2P_BB = TIM1_ICPolarity;
\r
2541 /* Set the CCE Bit */
\r
2542 *(vu32 *) CCER_CC2E_BB = CCER_CCE_Set;
\r
2546 /*******************************************************************************
\r
2547 * Function Name : TI3_Config
\r
2548 * Description : Configure the TI3 as Input.
\r
2549 * Input : - TIM1_ICPolarity : The Input Polarity.
\r
2550 * This parameter can be one of the following values:
\r
2551 * - TIM1_ICPolarity_Rising
\r
2552 * - TIM1_ICPolarity_Falling
\r
2553 * - TIM1_ICSelection: specifies the input to be used.
\r
2554 * This parameter can be one of the following values:
\r
2555 * - TIM1_ICSelection_DirectTI: TIM1 Input 3 is selected to
\r
2556 * be connected to IC3.
\r
2557 * - TIM1_ICSelection_IndirectTI: TIM1 Input 3 is selected to
\r
2558 * be connected to IC4.
\r
2559 * - TIM1_ICSelection_TRGI: TIM1 Input 3 is selected to be
\r
2560 * connected to TRGI.
\r
2561 * - TIM1_ICFilter: Specifies the Input Capture Filter.
\r
2562 * This parameter must be a value between 0x00 and 0x0F.
\r
2565 *******************************************************************************/
\r
2566 static void TI3_Config(u16 TIM1_ICPolarity, u16 TIM1_ICSelection,
\r
2571 tmpccmr2 = TIM1->CCMR2;
\r
2573 /* Disable the Channel 3: Reset the CCE Bit */
\r
2574 *(vu32 *) CCER_CC3E_BB = CCER_CCE_Reset;
\r
2576 /* Select the Input and set the filter */
\r
2577 tmpccmr2 &= CCMR_CC13S_Mask & CCMR_IC13F_Mask;
\r
2578 tmpccmr2 |= (u16)TIM1_ICSelection | (u16)((u16)TIM1_ICFilter << 4);
\r
2580 TIM1->CCMR2 = (u16)tmpccmr2;
\r
2582 /* Select the Polarity */
\r
2583 *(vu32 *) CCER_CC3P_BB = TIM1_ICPolarity;
\r
2585 /* Set the CCE Bit */
\r
2586 *(vu32 *) CCER_CC3E_BB = CCER_CCE_Set;
\r
2589 /*******************************************************************************
\r
2590 * Function Name : TI4_Config
\r
2591 * Description : Configure the TI4 as Input.
\r
2592 * Input : - TIM1_ICPolarity : The Input Polarity.
\r
2593 * This parameter can be one of the following values:
\r
2594 * - TIM1_ICPolarity_Rising
\r
2595 * - TIM1_ICPolarity_Falling
\r
2596 * - TIM1_ICSelection: specifies the input to be used.
\r
2597 * This parameter can be one of the following values:
\r
2598 * - TIM1_ICSelection_DirectTI: TIM1 Input 4 is selected to
\r
2599 * be connected to IC4.
\r
2600 * - TIM1_ICSelection_IndirectTI: TIM1 Input 4 is selected to
\r
2601 * be connected to IC3.
\r
2602 * - TIM1_ICSelection_TRGI: TIM1 Input 4 is selected to be
\r
2603 * connected to TRGI.
\r
2604 * - TIM1_ICFilter: Specifies the Input Capture Filter.
\r
2605 * This parameter must be a value between 0x00 and 0x0F.
\r
2608 *******************************************************************************/
\r
2609 static void TI4_Config(u16 TIM1_ICPolarity, u16 TIM1_ICSelection,
\r
2614 tmpccmr2 = TIM1->CCMR2;
\r
2616 /* Disable the Channel 4: Reset the CCE Bit */
\r
2617 *(vu32 *) CCER_CC4E_BB = CCER_CCE_Reset;
\r
2619 /* Select the Input and set the filter */
\r
2620 tmpccmr2 &= CCMR_CC24S_Mask & CCMR_IC24F_Mask;
\r
2621 tmpccmr2 |= (u16)((u16)TIM1_ICSelection << 8) | (u16)((u16)TIM1_ICFilter << 12);
\r
2623 TIM1->CCMR2 = (u16)tmpccmr2;
\r
2625 /* Select the Polarity */
\r
2626 *(vu32 *) CCER_CC4P_BB = TIM1_ICPolarity;
\r
2628 /* Set the CCE Bit */
\r
2629 *(vu32 *) CCER_CC4E_BB = CCER_CCE_Set;
\r
2632 /*******************************************************************************
\r
2633 * Function Name : ETR_Config
\r
2634 * Description : Configure the External Trigger
\r
2635 * Input : - TIM1_ExtTRGPrescaler: The external Trigger Prescaler.
\r
2636 * This parameter can be one of the following values:
\r
2637 * - TIM1_ExtTRGPSC_OFF
\r
2638 * - TIM1_ExtTRGPSC_DIV2
\r
2639 * - TIM1_ExtTRGPSC_DIV4
\r
2640 * - TIM1_ExtTRGPSC_DIV8
\r
2641 * - TIM1_ExtTRGPolarity: The external Trigger Polarity.
\r
2642 * This parameter can be one of the following values:
\r
2643 * - TIM1_ExtTRGPolarity_Inverted
\r
2644 * - TIM1_ExtTRGPolarity_NonInverted
\r
2645 * - ExtTRGFilter: External Trigger Filter.
\r
2646 * This parameter must be a value between 0x00 and 0x0F.
\r
2649 *******************************************************************************/
\r
2650 static void ETR_Config(u16 TIM1_ExtTRGPrescaler, u16 TIM1_ExtTRGPolarity,
\r
2655 tmpsmcr = TIM1->SMCR;
\r
2657 /* Set the Prescaler, the Filter value and the Polarity */
\r
2658 tmpsmcr &= SMCR_ETR_Mask;
\r
2659 tmpsmcr |= TIM1_ExtTRGPrescaler | TIM1_ExtTRGPolarity | (u16)((u16)ExtTRGFilter << 8);
\r
2661 TIM1->SMCR = (u16)tmpsmcr;
\r
2664 /******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/
\r
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