git.sur5r.net Git - freertos/blob - Demo/CORTUS_APS3_GCC/Demo/RegTest.c

   1 /*\r
   2     FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.\r
   3         \r
   4 \r
   5     ***************************************************************************\r
   6      *                                                                       *\r
   7      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
   8      *    Complete, revised, and edited pdf reference manuals are also       *\r
   9      *    available.                                                         *\r
  10      *                                                                       *\r
  11      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
  12      *    ensuring you get running as quickly as possible and with an        *\r
  13      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
  14      *    the FreeRTOS project to continue with its mission of providing     *\r
  15      *    professional grade, cross platform, de facto standard solutions    *\r
  16      *    for microcontrollers - completely free of charge!                  *\r
  17      *                                                                       *\r
  18      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
  19      *                                                                       *\r
  20      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
  21      *                                                                       *\r
  22     ***************************************************************************\r
  23 \r
  24 \r
  25     This file is part of the FreeRTOS distribution.\r
  26 \r
  27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  28     the terms of the GNU General Public License (version 2) as published by the\r
  29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  30     >>>NOTE<<< The modification to the GPL is included to allow you to\r
  31     distribute a combined work that includes FreeRTOS without being obliged to\r
  32     provide the source code for proprietary components outside of the FreeRTOS\r
  33     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
  34     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
  35     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
  36     more details. You should have received a copy of the GNU General Public\r
  37     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
  38     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
  39     by writing to Richard Barry, contact details for whom are available on the\r
  40     FreeRTOS WEB site.\r
  41 \r
  42     1 tab == 4 spaces!\r
  43 \r
  44     http://www.FreeRTOS.org - Documentation, latest information, license and\r
  45     contact details.\r
  46 \r
  47     http://www.SafeRTOS.com - A version that is certified for use in safety\r
  48     critical systems.\r
  49 \r
  50     http://www.OpenRTOS.com - Commercial support, development, porting,\r
  51     licensing and training services.\r
  52 */\r
  53 \r
  54 #include "FreeRTOS.h"\r
  55 #include "task.h"\r
  56 \r
  57 /*\r
  58  * Two test tasks that fill the CPU registers with known values before\r
  59  * continuously looping round checking that each register still contains its\r
  60  * expected value.  Both tasks use a separate set of values, with an incorrect\r
  61  * value being found at any time being indicative of an error in the context\r
  62  * switch mechanism.  One of the tasks uses a yield instruction to increase the\r
  63  * test coverage.  The nature of these tasks necessitates that they are written\r
  64  * in assembly code.\r
  65  */\r
  66 static void vRegTest1( void *pvParameters );\r
  67 static void vRegTest2( void *pvParameters );\r
  68 \r
  69 /*\r
  70  * A task that tests the management of the Interrupt Controller (IC) during a\r
  71  * context switch.  The state of the IC current mask level must be maintained\r
  72  * across context switches.  Also, yields must be able to be performed when the\r
  73  * interrupt controller mask is not zero.  This task tests both these\r
  74  * requirements.\r
  75  */\r
  76 static void prvICCheck1Task( void *pvParameters );\r
  77 \r
  78 /* Counters used to ensure the tasks are still running. */\r
  79 static volatile unsigned long ulRegTest1Counter = 0UL, ulRegTest2Counter = 0UL, ulICTestCounter = 0UL;\r
  80 \r
  81 /* Handle to the task that checks the interrupt controller behaviour.  This is\r
  82 used by the traceTASK_SWITCHED_OUT() macro, which is defined in\r
  83 FreeRTOSConfig.h and can be removed - it is just for the purpose of this test. */\r
  84 xTaskHandle xICTestTask = NULL;\r
  85 \r
  86 /* Variable that gets set to pdTRUE by traceTASK_SWITCHED_OUT each time\r
  87 is switched out. */\r
  88 volatile unsigned long ulTaskSwitchedOut;\r
  89 /*-----------------------------------------------------------*/\r
  90 \r
  91 void vStartRegTestTasks( void )\r
  92 {\r
  93         xTaskCreate( vRegTest1, ( signed char * ) "RTest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
  94         xTaskCreate( vRegTest2, ( signed char * ) "RTest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
  95         xTaskCreate( prvICCheck1Task, ( signed char * ) "ICCheck", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, &xICTestTask );\r
  96 }\r
  97 /*-----------------------------------------------------------*/\r
  98 \r
  99 static void vRegTest1( void *pvParameters )\r
 100 {\r
 101         __asm volatile\r
 102         (\r
 103                 "       mov             r2, #0x02                                                       \n" /* Fill the registers with known values, r0 is always 0 and r1 is the stack pointer. */\r
 104                 "       mov             r3, #0x03                                                       \n"\r
 105                 "       mov             r4, #0x04                                                       \n"\r
 106                 "       mov             r5, #0x05                                                       \n"\r
 107                 "       mov             r6, #0x06                                                       \n"\r
 108                 "       mov             r7, #0x07                                                       \n"\r
 109                 "       mov             r8, #0x08                                                       \n"\r
 110                 "       mov             r9, #0x09                                                       \n"\r
 111                 "       mov             r10, #0x0a                                                      \n"\r
 112                 "       mov             r11, #0x0b                                                      \n"\r
 113                 "       mov             r12, #0x0c                                                      \n"\r
 114                 "       mov             r13, #0x0d                                                      \n"\r
 115                 "       mov             r14, #0x0e                                                      \n"\r
 116                 "       mov             r15, #0x0f                                                      \n"\r
 117                 "                                                                                               \n"\r
 118                 "reg_check_loop_1:                                                              \n"\r
 119                 "       trap    #31                                                                     \n"\r
 120                 "       cmp             r2, #0x02                                                       \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */\r
 121                 "       bne.s   reg_check_error_1                                       \n"\r
 122                 "       cmp             r3, #0x03                                                       \n"\r
 123                 "       bne.s   reg_check_error_1                                       \n"\r
 124                 "       cmp             r4, #0x04                                                       \n"\r
 125                 "       bne.s   reg_check_error_1                                       \n"\r
 126                 "       cmp             r5, #0x05                                                       \n"\r
 127                 "       bne.s   reg_check_error_1                                       \n"\r
 128                 "       cmp             r6, #0x06                                                       \n"\r
 129                 "       bne.s   reg_check_error_1                                       \n"\r
 130                 "       cmp             r7, #0x07                                                       \n"\r
 131                 "       bne.s   reg_check_error_1                                       \n"\r
 132                 "       cmp             r8, #0x08                                                       \n"\r
 133                 "       bne.s   reg_check_error_1                                       \n"\r
 134                 "       cmp             r9, #0x09                                                       \n"\r
 135                 "       bne.s   reg_check_error_1                                       \n"\r
 136                 "       cmp             r10, #0x0a                                                      \n"\r
 137                 "       bne.s   reg_check_error_1                                       \n"\r
 138                 "       cmp             r11, #0x0b                                                      \n"\r
 139                 "       bne.s   reg_check_error_1                                       \n"\r
 140                 "       cmp             r12, #0x0c                                                      \n"\r
 141                 "       bne.s   reg_check_error_1                                       \n"\r
 142                 "       cmp             r13, #0x0d                                                      \n"\r
 143                 "       bne.s   reg_check_error_1                                       \n"\r
 144                 "       cmp             r14, #0x0e                                                      \n"\r
 145                 "       bne.s   reg_check_error_1                                       \n"\r
 146                 "       cmp             r15, #0x0f                                                      \n"\r
 147                 "       bne.s   reg_check_error_1                                       \n"\r
 148                 "                                                                                               \n"\r
 149                 "       ld              r2, [r0]+short(ulRegTest1Counter)       \n" /* Increment the loop counter to show that this task is still running error free. */\r
 150                 "       add             r2, #1                                                          \n"\r
 151                 "       st              r2, [r0]+short(ulRegTest1Counter)       \n"\r
 152                 "       mov             r2, #0x02                                                       \n"\r
 153                 "                                                                                               \n"\r
 154                 "       bra.s   reg_check_loop_1                                        \n" /* Do it all again. */\r
 155                 "                                                                                               \n"\r
 156                 "reg_check_error_1:                                                             \n"\r
 157                         "bra.s          .                                                               \n"\r
 158         );\r
 159 }\r
 160 /*-----------------------------------------------------------*/\r
 161 \r
 162 static void vRegTest2( void *pvParameters )\r
 163 {\r
 164         __asm volatile\r
 165         (\r
 166                 "       mov             r2, #0x12                                                       \n" /* Fill the registers with known values, r0 is always 0 and r1 is the stack pointer. */\r
 167                 "       mov             r3, #0x13                                                       \n"\r
 168                 "       mov             r4, #0x14                                                       \n"\r
 169                 "       mov             r5, #0x15                                                       \n"\r
 170                 "       mov             r6, #0x16                                                       \n"\r
 171                 "       mov             r7, #0x17                                                       \n"\r
 172                 "       mov             r8, #0x18                                                       \n"\r
 173                 "       mov             r9, #0x19                                                       \n"\r
 174                 "       mov             r10, #0x1a                                                      \n"\r
 175                 "       mov             r11, #0x1b                                                      \n"\r
 176                 "       mov             r12, #0x1c                                                      \n"\r
 177                 "       mov             r13, #0x1d                                                      \n"\r
 178                 "       mov             r14, #0x1e                                                      \n"\r
 179                 "       mov             r15, #0x1f                                                      \n"\r
 180                 "                                                                                               \n"\r
 181                 "reg_check_loop_2:                                                              \n"\r
 182                 "       cmp             r2, #0x12                                                       \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */\r
 183                 "       bne.s   reg_check_error_2                                       \n"\r
 184                 "       cmp             r3, #0x13                                                       \n"\r
 185                 "       bne.s   reg_check_error_2                                       \n"\r
 186                 "       cmp             r4, #0x14                                                       \n"\r
 187                 "       bne.s   reg_check_error_2                                       \n"\r
 188                 "       cmp             r5, #0x15                                                       \n"\r
 189                 "       bne.s   reg_check_error_2                                       \n"\r
 190                 "       cmp             r6, #0x16                                                       \n"\r
 191                 "       bne.s   reg_check_error_2                                       \n"\r
 192                 "       cmp             r7, #0x17                                                       \n"\r
 193                 "       bne.s   reg_check_error_2                                       \n"\r
 194                 "       cmp             r8, #0x18                                                       \n"\r
 195                 "       bne.s   reg_check_error_2                                       \n"\r
 196                 "       cmp             r9, #0x19                                                       \n"\r
 197                 "       bne.s   reg_check_error_2                                       \n"\r
 198                 "       cmp             r10, #0x1a                                                      \n"\r
 199                 "       bne.s   reg_check_error_2                                       \n"\r
 200                 "       cmp             r11, #0x1b                                                      \n"\r
 201                 "       bne.s   reg_check_error_2                                       \n"\r
 202                 "       cmp             r12, #0x1c                                                      \n"\r
 203                 "       bne.s   reg_check_error_2                                       \n"\r
 204                 "       cmp             r13, #0x1d                                                      \n"\r
 205                 "       bne.s   reg_check_error_2                                       \n"\r
 206                 "       cmp             r14, #0x1e                                                      \n"\r
 207                 "       bne.s   reg_check_error_2                                       \n"\r
 208                 "       cmp             r15, #0x1f                                                      \n"\r
 209                 "       bne.s   reg_check_error_2                                       \n"\r
 210                 "                                                                                               \n"\r
 211                 "       ld              r2, [r0]+short(ulRegTest2Counter)       \n" /* Increment the loop counter to show that this task is still running error free. */\r
 212                 "       add             r2, #1                                                          \n"\r
 213                 "       st              r2, [r0]+short(ulRegTest2Counter)       \n"\r
 214                 "       mov             r2, #0x12                                                       \n"\r
 215                 "                                                                                               \n"\r
 216                 "       bra.s   reg_check_loop_2                                        \n" /* Do it all again. */\r
 217                 "                                                                                               \n"\r
 218                 "reg_check_error_2:                                                             \n"\r
 219                         "bra.s          .                                                               \n"\r
 220         );\r
 221 }\r
 222 /*-----------------------------------------------------------*/\r
 223 \r
 224 static void prvICCheck1Task( void *pvParameters )\r
 225 {\r
 226 long lICCheckStatus = pdPASS;\r
 227 \r
 228         for( ;; )\r
 229         {\r
 230                 /* At this point the interrupt mask should be zero. */\r
 231                 if( ic->cpl != 0 )\r
 232                 {\r
 233                         lICCheckStatus = pdFAIL;\r
 234                 }\r
 235 \r
 236                 /* If we yield here, it should still be 0 when the task next runs.\r
 237                 ulTaskSwitchedOut is just used to check that a switch does actually\r
 238                 happen. */\r
 239                 ulTaskSwitchedOut = pdFALSE;\r
 240                 taskYIELD();\r
 241                 if( ( ulTaskSwitchedOut != pdTRUE ) || ( ic->cpl != 0 ) )\r
 242                 {\r
 243                         lICCheckStatus = pdFAIL;\r
 244                 }\r
 245 \r
 246                 /* Set the interrupt mask to portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1,\r
 247                 before checking it is as expected. */\r
 248                 taskENTER_CRITICAL();\r
 249                 if( ic->cpl != ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 ) )\r
 250                 {\r
 251                         lICCheckStatus = pdFAIL;\r
 252                 }\r
 253 \r
 254                 /* If we yield here, it should still be\r
 255                 portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 10 when the task next runs.  */\r
 256                 ulTaskSwitchedOut = pdFALSE;\r
 257                 taskYIELD();\r
 258                 if( ( ulTaskSwitchedOut != pdTRUE ) || ( ic->cpl != ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 ) ) )\r
 259                 {\r
 260                         lICCheckStatus = pdFAIL;\r
 261                 }\r
 262 \r
 263                 /* Return the interrupt mask to its default state. */\r
 264                 taskEXIT_CRITICAL();\r
 265 \r
 266                 /* Just increment a loop counter so the check task knows if this task\r
 267                 is still running or not. */\r
 268                 if( lICCheckStatus == pdPASS )\r
 269                 {\r
 270                         ulICTestCounter++;\r
 271                 }\r
 272         }\r
 273 }\r
 274 /*-----------------------------------------------------------*/\r
 275 \r
 276 portBASE_TYPE xAreRegTestTasksStillRunning( void )\r
 277 {\r
 278 static unsigned long ulLastCounter1 = 0UL, ulLastCounter2 = 0UL, ulLastICTestCounter = 0UL;\r
 279 long lReturn;\r
 280 \r
 281         /* Check that both loop counters are still incrementing, indicating that\r
 282         both reg test tasks are still running error free. */\r
 283         if( ulLastCounter1 == ulRegTest1Counter )\r
 284         {\r
 285                 lReturn = pdFAIL;\r
 286         }\r
 287         else if( ulLastCounter2 == ulRegTest2Counter )\r
 288         {\r
 289                 lReturn = pdFAIL;\r
 290         }\r
 291         else if( ulLastICTestCounter == ulICTestCounter )\r
 292         {\r
 293                 lReturn = pdFAIL;\r
 294         }\r
 295         else\r
 296         {\r
 297                 lReturn = pdPASS;\r
 298         }\r
 299 \r
 300         ulLastCounter1 = ulRegTest1Counter;\r
 301         ulLastCounter2 = ulRegTest2Counter;\r
 302         ulLastICTestCounter = ulICTestCounter;\r
 303 \r
 304         return lReturn;\r
 305 }\r
 306 \r
 307 \r
 308 \r
 309 \r
 310 \r
 311 \r
 312 \r
 313 \r
 314 \r
 315 \r
 316 \r
 317 \r
 318 \r
 319 \r