1 /* Coldfire C Header File
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2 * Copyright Freescale Semiconductor Inc
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3 * All rights reserved.
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5 * 2008/05/23 Revision: 0.95
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7 * (c) Copyright UNIS, a.s. 1997-2008
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12 * http : www.processorexpert.com
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13 * mail : info@processorexpert.com
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16 #ifndef __MCF52221_I2C_H__
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17 #define __MCF52221_I2C_H__
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20 /*********************************************************************
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24 *********************************************************************/
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26 /* Register read/write macros */
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27 #define MCF_I2C_I2ADR (*(vuint8 *)(0x40000300))
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28 #define MCF_I2C_I2FDR (*(vuint8 *)(0x40000304))
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29 #define MCF_I2C_I2CR (*(vuint8 *)(0x40000308))
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30 #define MCF_I2C_I2SR (*(vuint8 *)(0x4000030C))
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31 #define MCF_I2C_I2DR (*(vuint8 *)(0x40000310))
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35 /* Bit definitions and macros for MCF_I2C_I2ADR */
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36 #define MCF_I2C_I2ADR_ADR(x) (((x)&0x7F)<<0x1)
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38 /* Bit definitions and macros for MCF_I2C_I2FDR */
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39 #define MCF_I2C_I2FDR_IC(x) (((x)&0x3F)<<0)
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41 /* Bit definitions and macros for MCF_I2C_I2CR */
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42 #define MCF_I2C_I2CR_RSTA (0x4)
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43 #define MCF_I2C_I2CR_TXAK (0x8)
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44 #define MCF_I2C_I2CR_MTX (0x10)
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45 #define MCF_I2C_I2CR_MSTA (0x20)
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46 #define MCF_I2C_I2CR_IIEN (0x40)
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47 #define MCF_I2C_I2CR_IEN (0x80)
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49 /* Bit definitions and macros for MCF_I2C_I2SR */
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50 #define MCF_I2C_I2SR_RXAK (0x1)
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51 #define MCF_I2C_I2SR_IIF (0x2)
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52 #define MCF_I2C_I2SR_SRW (0x4)
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53 #define MCF_I2C_I2SR_IAL (0x10)
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54 #define MCF_I2C_I2SR_IBB (0x20)
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55 #define MCF_I2C_I2SR_IAAS (0x40)
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56 #define MCF_I2C_I2SR_ICF (0x80)
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58 /* Bit definitions and macros for MCF_I2C_I2DR */
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59 #define MCF_I2C_I2DR_DATA(x) (((x)&0xFF)<<0)
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62 #endif /* __MCF52221_I2C_H__ */
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