1 /* Coldfire C Header File
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2 * Copyright Freescale Semiconductor Inc
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3 * All rights reserved.
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5 * 2008/05/23 Revision: 0.95
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7 * (c) Copyright UNIS, a.s. 1997-2008
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12 * http : www.processorexpert.com
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13 * mail : info@processorexpert.com
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16 #ifndef __MCF52221_QSPI_H__
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17 #define __MCF52221_QSPI_H__
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20 /*********************************************************************
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22 * Queued Serial Peripheral Interface (QSPI)
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24 *********************************************************************/
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26 /* Register read/write macros */
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27 #define MCF_QSPI_QMR (*(vuint16*)(0x40000340))
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28 #define MCF_QSPI_QDLYR (*(vuint16*)(0x40000344))
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29 #define MCF_QSPI_QWR (*(vuint16*)(0x40000348))
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30 #define MCF_QSPI_QIR (*(vuint16*)(0x4000034C))
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31 #define MCF_QSPI_QAR (*(vuint16*)(0x40000350))
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32 #define MCF_QSPI_QDR (*(vuint16*)(0x40000354))
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35 /* Bit definitions and macros for MCF_QSPI_QMR */
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36 #define MCF_QSPI_QMR_BAUD(x) (((x)&0xFF)<<0)
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37 #define MCF_QSPI_QMR_CPHA (0x100)
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38 #define MCF_QSPI_QMR_CPOL (0x200)
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39 #define MCF_QSPI_QMR_BITS(x) (((x)&0xF)<<0xA)
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40 #define MCF_QSPI_QMR_DOHIE (0x4000)
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41 #define MCF_QSPI_QMR_MSTR (0x8000)
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43 /* Bit definitions and macros for MCF_QSPI_QDLYR */
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44 #define MCF_QSPI_QDLYR_DTL(x) (((x)&0xFF)<<0)
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45 #define MCF_QSPI_QDLYR_QCD(x) (((x)&0x7F)<<0x8)
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46 #define MCF_QSPI_QDLYR_SPE (0x8000)
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48 /* Bit definitions and macros for MCF_QSPI_QWR */
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49 #define MCF_QSPI_QWR_NEWQP(x) (((x)&0xF)<<0)
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50 #define MCF_QSPI_QWR_CPTQP(x) (((x)&0xF)<<0x4)
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51 #define MCF_QSPI_QWR_ENDQP(x) (((x)&0xF)<<0x8)
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52 #define MCF_QSPI_QWR_CSIV (0x1000)
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53 #define MCF_QSPI_QWR_WRTO (0x2000)
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54 #define MCF_QSPI_QWR_WREN (0x4000)
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55 #define MCF_QSPI_QWR_HALT (0x8000)
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57 /* Bit definitions and macros for MCF_QSPI_QIR */
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58 #define MCF_QSPI_QIR_SPIF (0x1)
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59 #define MCF_QSPI_QIR_ABRT (0x4)
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60 #define MCF_QSPI_QIR_WCEF (0x8)
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61 #define MCF_QSPI_QIR_SPIFE (0x100)
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62 #define MCF_QSPI_QIR_ABRTE (0x400)
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63 #define MCF_QSPI_QIR_WCEFE (0x800)
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64 #define MCF_QSPI_QIR_ABRTL (0x1000)
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65 #define MCF_QSPI_QIR_ABRTB (0x4000)
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66 #define MCF_QSPI_QIR_WCEFB (0x8000)
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68 /* Bit definitions and macros for MCF_QSPI_QAR */
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69 #define MCF_QSPI_QAR_ADDR(x) (((x)&0x3F)<<0)
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70 #define MCF_QSPI_QAR_TRANS (0)
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71 #define MCF_QSPI_QAR_RECV (0x10)
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72 #define MCF_QSPI_QAR_CMD (0x20)
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74 /* Bit definitions and macros for MCF_QSPI_QDR */
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75 #define MCF_QSPI_QDR_DATA(x) (((x)&0xFFFF)<<0)
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76 #define MCF_QSPI_QDR_CONT (0x8000)
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77 #define MCF_QSPI_QDR_BITSE (0x4000)
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78 #define MCF_QSPI_QDR_DT (0x2000)
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79 #define MCF_QSPI_QDR_DSCK (0x1000)
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80 #define MCF_QSPI_QDR_QSPI_CS3 (0x800)
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81 #define MCF_QSPI_QDR_QSPI_CS2 (0x400)
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82 #define MCF_QSPI_QDR_QSPI_CS1 (0x200)
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83 #define MCF_QSPI_QDR_QSPI_CS0 (0x100)
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86 #endif /* __MCF52221_QSPI_H__ */
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