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1 /*\r
2         FreeRTOS.org V5.3.0 - Copyright (C) 2003-2009 Richard Barry.\r
3 \r
4         This file is part of the FreeRTOS.org distribution.\r
5 \r
6         FreeRTOS.org is free software; you can redistribute it and/or modify it\r
7         under the terms of the GNU General Public License (version 2) as published\r
8         by the Free Software Foundation and modified by the FreeRTOS exception.\r
9         **NOTE** The exception to the GPL is included to allow you to distribute a\r
10         combined work that includes FreeRTOS.org without being obliged to provide\r
11         the source code for any proprietary components.  Alternative commercial\r
12         license and support terms are also available upon request.  See the \r
13         licensing section of http://www.FreeRTOS.org for full details.\r
14 \r
15         FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT\r
16         ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
17         FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
18         more details.\r
19 \r
20         You should have received a copy of the GNU General Public License along\r
21         with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59\r
22         Temple Place, Suite 330, Boston, MA  02111-1307  USA.\r
23 \r
24 \r
25         ***************************************************************************\r
26         *                                                                         *\r
27         * Get the FreeRTOS eBook!  See http://www.FreeRTOS.org/Documentation      *\r
28         *                                                                         *\r
29         * This is a concise, step by step, 'hands on' guide that describes both   *\r
30         * general multitasking concepts and FreeRTOS specifics. It presents and   *\r
31         * explains numerous examples that are written using the FreeRTOS API.     *\r
32         * Full source code for all the examples is provided in an accompanying    *\r
33         * .zip file.                                                              *\r
34         *                                                                         *\r
35         ***************************************************************************\r
36 \r
37         1 tab == 4 spaces!\r
38 \r
39         Please ensure to read the configuration and relevant port sections of the\r
40         online documentation.\r
41 \r
42         http://www.FreeRTOS.org - Documentation, latest information, license and\r
43         contact details.\r
44 \r
45         http://www.SafeRTOS.com - A version that is certified for use in safety\r
46         critical systems.\r
47 \r
48         http://www.OpenRTOS.com - Commercial support, development, porting,\r
49         licensing and training services.\r
50 */\r
51 \r
52 \r
53 /*\r
54  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
55  * documentation provides more details of the standard demo application tasks.\r
56  * In addition to the standard demo tasks, the following tasks and tests are\r
57  * defined and/or created within this file:\r
58  *\r
59  * "Check" task -  This only executes every five seconds but has a high priority\r
60  * to ensure it gets processor time.  Its main function is to check that all the\r
61  * standard demo tasks are still operational.  While no errors have been\r
62  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
63  * rate increasing to 500ms being a visual indication that at least one task has\r
64  * reported unexpected behaviour.\r
65  *\r
66  * "Reg test" tasks - These fill the registers with known values, then check\r
67  * that each register still contains its expected value.  Each task uses\r
68  * different values.  The tasks run with very low priority so get preempted very\r
69  * frequently.  A register containing an unexpected value is indicative of an\r
70  * error in the context switching mechanism.\r
71  *\r
72  */\r
73 \r
74 /* Standard includes. */\r
75 #include <stdio.h>\r
76 \r
77 /* Scheduler includes. */\r
78 #include "FreeRTOS.h"\r
79 #include "task.h"\r
80 #include "queue.h"\r
81 #include "semphr.h"\r
82 \r
83 /* Demo app includes. */\r
84 #include "BlockQ.h"\r
85 #include "crflash.h"\r
86 #include "partest.h"\r
87 #include "semtest.h"\r
88 #include "GenQTest.h"\r
89 #include "QPeek.h"\r
90 #include "comtest2.h"\r
91 \r
92 /*-----------------------------------------------------------*/\r
93 \r
94 /* The time between cycles of the 'check' functionality - as described at the\r
95 top of this file. */\r
96 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
97 \r
98 /* The rate at which the LED controlled by the 'check' task will flash should an\r
99 error have been detected. */\r
100 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
101 \r
102 /* The LED controlled by the 'check' task. */\r
103 #define mainCHECK_LED                                           ( 3 )\r
104 \r
105 /* ComTest constants - there is no free LED for the comtest tasks. */\r
106 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
107 #define mainCOM_TEST_LED                                        ( 5 )\r
108 \r
109 /* Task priorities. */\r
110 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
111 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
112 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
113 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
114 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
115 \r
116 /* Co-routines are used to flash the LEDs. */\r
117 #define mainNUM_FLASH_CO_ROUTINES                       ( 3 )\r
118 \r
119 /* The baud rate used by the comtest tasks. */\r
120 #define mainBAUD_RATE                                           ( 38400 )\r
121 \r
122 /* There is no spare LED for the comtest tasks, so this is set to an invalid\r
123 number. */\r
124 #define mainCOM_LED                                                     ( 4 )\r
125 \r
126 /*\r
127  * Configure the hardware for the demo.\r
128  */\r
129 static void prvSetupHardware( void );\r
130 \r
131 /*\r
132  * Implements the 'check' task functionality as described at the top of this\r
133  * file.\r
134  */\r
135 static void prvCheckTask( void *pvParameters );\r
136 \r
137 /*\r
138  * Implement the 'Reg test' functionality as described at the top of this file.\r
139  */\r
140 static void vRegTest1Task( void *pvParameters );\r
141 static void vRegTest2Task( void *pvParameters );\r
142 \r
143 /*-----------------------------------------------------------*/\r
144 \r
145 /* Counters used to detect errors within the reg test tasks. */\r
146 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
147 \r
148 /*-----------------------------------------------------------*/\r
149 \r
150 int main( void )\r
151 {\r
152         /* Setup the hardware ready for this demo. */\r
153         prvSetupHardware();\r
154 \r
155         /* Start the standard demo tasks. */\r
156         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
157         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
158         vStartQueuePeekTasks();\r
159         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
160         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_RATE, mainCOM_LED );\r
161 \r
162         /* For demo purposes use some co-routines to flash the LEDs. */\r
163         vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );\r
164 \r
165         /* Create the check task. */\r
166         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
167 \r
168 \r
169         /* Start the reg test tasks - defined in this file. */\r
170         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
171         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
172 \r
173         /* Start the scheduler. */\r
174         vTaskStartScheduler();\r
175 \r
176     /* Will only get here if there was insufficient memory to create the idle\r
177     task. */\r
178         for( ;; )\r
179         {\r
180         }\r
181 }\r
182 /*-----------------------------------------------------------*/\r
183 \r
184 static void prvCheckTask( void *pvParameters )\r
185 {\r
186 unsigned portLONG ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
187 portTickType xLastExecutionTime;\r
188 volatile unsigned portBASE_TYPE uxUnusedStack;\r
189 \r
190         ( void ) pvParameters;\r
191 \r
192         /* Initialise the variable used to control our iteration rate prior to\r
193         its first use. */\r
194         xLastExecutionTime = xTaskGetTickCount();\r
195 \r
196         for( ;; )\r
197         {\r
198                 /* Wait until it is time to run the tests again. */\r
199                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
200 \r
201                 /* Has an error been found in any task? */\r
202                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
203                 {\r
204                         ulError |= 0x01UL;\r
205                 }\r
206 \r
207                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
208                 {\r
209                         ulError |= 0x02UL;\r
210                 }\r
211 \r
212                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
213                 {\r
214                         ulError |= 0x04UL;\r
215                 }\r
216 \r
217                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
218             {\r
219                 ulError |= 0x20UL;\r
220             }\r
221             \r
222             if( xAreComTestTasksStillRunning() != pdTRUE )\r
223             {\r
224                 ulError |= 0x40UL;\r
225             }\r
226 \r
227                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
228                 {\r
229                         ulError |= 0x1000UL;\r
230                 }\r
231 \r
232                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
233                 {\r
234                         ulError |= 0x1000UL;\r
235                 }\r
236 \r
237                 ulLastRegTest1Count = ulRegTest1Counter;\r
238                 ulLastRegTest2Count = ulRegTest2Counter;\r
239 \r
240                 /* If an error has been found then increase our cycle rate, and in so\r
241                 doing increase the rate at which the check task LED toggles. */\r
242                 if( ulError != 0 )\r
243                 {\r
244                 ulTicksToWait = mainERROR_PERIOD;\r
245                 }\r
246 \r
247                 /* Toggle the LED each itteration. */\r
248                 vParTestToggleLED( mainCHECK_LED );\r
249                 \r
250                 /* For demo only - how much unused stack does this task have? */\r
251                 uxUnusedStack = uxTaskGetStackHighWaterMark( NULL );\r
252         }\r
253 }\r
254 /*-----------------------------------------------------------*/\r
255 \r
256 void prvSetupHardware( void )\r
257 {\r
258         portDISABLE_INTERRUPTS();\r
259 \r
260         /* Setup the port used to toggle LEDs. */\r
261         vParTestInitialise();\r
262 }\r
263 /*-----------------------------------------------------------*/\r
264 \r
265 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
266 {\r
267         /* This will get called if a stack overflow is detected during the context\r
268         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
269         problems within nested interrupts, but only do this for debug purposes as\r
270         it will increase the context switch time. */\r
271 \r
272         ( void ) pxTask;\r
273         ( void ) pcTaskName;\r
274 \r
275         for( ;; )\r
276         {\r
277         }\r
278 }\r
279 /*-----------------------------------------------------------*/\r
280 \r
281 void vApplicationIdleHook( void );\r
282 void vApplicationIdleHook( void )\r
283 {\r
284         /* The co-routines run in the idle task. */\r
285         vCoRoutineSchedule();\r
286 }\r
287 /*-----------------------------------------------------------*/\r
288 \r
289 void exit( int n )\r
290 {\r
291         /* To keep the linker happy only as the libraries have been removed from\r
292         the build. */\r
293         ( void ) n;\r
294         for( ;; ) {}\r
295 }\r
296 /*-----------------------------------------------------------*/\r
297 \r
298 static void vRegTest1Task( void *pvParameters )\r
299 {\r
300         /* Sanity check - did we receive the parameter expected? */\r
301         if( pvParameters != &ulRegTest1Counter )\r
302         {\r
303                 /* Change here so the check task can detect that an error occurred. */\r
304                 for( ;; )\r
305                 {\r
306                 }\r
307         }\r
308 \r
309         /* Set all the registers to known values, then check that each retains its\r
310         expected value - as described at the top of this file.  If an error is\r
311         found then the loop counter will no longer be incremented allowing the check\r
312         task to recognise the error. */\r
313         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
314                                                 "       moveq           #1, d0                                  \n\t"\r
315                                                 "       moveq           #2, d1                                  \n\t"\r
316                                                 "       moveq           #3, d2                                  \n\t"\r
317                                                 "       moveq           #4, d3                                  \n\t"\r
318                                                 "       moveq           #5, d4                                  \n\t"\r
319                                                 "       moveq           #6, d5                                  \n\t"\r
320                                                 "       moveq           #7, d6                                  \n\t"\r
321                                                 "       moveq           #8, d7                                  \n\t"\r
322                                                 "       move            #9, a0                                  \n\t"\r
323                                                 "       move            #10, a1                                 \n\t"\r
324                                                 "       move            #11, a2                                 \n\t"\r
325                                                 "       move            #12, a3                                 \n\t"\r
326                                                 "       move            #13, a4                                 \n\t"\r
327                                                 "       move            #14, a5                                 \n\t"\r
328                                                 "       move            #15, a6                                 \n\t"\r
329                                                 "                                                                               \n\t"\r
330                                                 "       cmpi.l          #1, d0                                  \n\t"\r
331                                                 "       bne                     reg_test_1_error                \n\t"\r
332                                                 "       cmpi.l          #2, d1                                  \n\t"\r
333                                                 "       bne                     reg_test_1_error                \n\t"\r
334                                                 "       cmpi.l          #3, d2                                  \n\t"\r
335                                                 "       bne                     reg_test_1_error                \n\t"\r
336                                                 "       cmpi.l          #4, d3                                  \n\t"\r
337                                                 "       bne                     reg_test_1_error                \n\t"\r
338                                                 "       cmpi.l          #5, d4                                  \n\t"\r
339                                                 "       bne                     reg_test_1_error                \n\t"\r
340                                                 "       cmpi.l          #6, d5                                  \n\t"\r
341                                                 "       bne                     reg_test_1_error                \n\t"\r
342                                                 "       cmpi.l          #7, d6                                  \n\t"\r
343                                                 "       bne                     reg_test_1_error                \n\t"\r
344                                                 "       cmpi.l          #8, d7                                  \n\t"\r
345                                                 "       bne                     reg_test_1_error                \n\t"\r
346                                                 "       move            a0, d0                                  \n\t"\r
347                                                 "       cmpi.l          #9, d0                                  \n\t"\r
348                                                 "       bne                     reg_test_1_error                \n\t"\r
349                                                 "       move            a1, d0                                  \n\t"\r
350                                                 "       cmpi.l          #10, d0                                 \n\t"\r
351                                                 "       bne                     reg_test_1_error                \n\t"\r
352                                                 "       move            a2, d0                                  \n\t"\r
353                                                 "       cmpi.l          #11, d0                                 \n\t"\r
354                                                 "       bne                     reg_test_1_error                \n\t"\r
355                                                 "       move            a3, d0                                  \n\t"\r
356                                                 "       cmpi.l          #12, d0                                 \n\t"\r
357                                                 "       bne                     reg_test_1_error                \n\t"\r
358                                                 "       move            a4, d0                                  \n\t"\r
359                                                 "       cmpi.l          #13, d0                                 \n\t"\r
360                                                 "       bne                     reg_test_1_error                \n\t"\r
361                                                 "       move            a5, d0                                  \n\t"\r
362                                                 "       cmpi.l          #14, d0                                 \n\t"\r
363                                                 "       bne                     reg_test_1_error                \n\t"\r
364                                                 "       move            a6, d0                                  \n\t"\r
365                                                 "       cmpi.l          #15, d0                                 \n\t"\r
366                                                 "       bne                     reg_test_1_error                \n\t"\r
367                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
368                                                 "       addq            #1, d0                                  \n\t"\r
369                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
370                                                 "       bra                     reg_test_1_start                \n\t"\r
371                                                 "reg_test_1_error:                                              \n\t"\r
372                                                 "       bra                     reg_test_1_error                \n\t"\r
373                                         );\r
374 }\r
375 /*-----------------------------------------------------------*/\r
376 \r
377 static void vRegTest2Task( void *pvParameters )\r
378 {\r
379         /* Sanity check - did we receive the parameter expected? */\r
380         if( pvParameters != &ulRegTest2Counter )\r
381         {\r
382                 /* Change here so the check task can detect that an error occurred. */\r
383                 for( ;; )\r
384                 {\r
385                 }\r
386         }\r
387 \r
388         /* Set all the registers to known values, then check that each retains its\r
389         expected value - as described at the top of this file.  If an error is\r
390         found then the loop counter will no longer be incremented allowing the check\r
391         task to recognise the error. */\r
392         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
393                                                 "       moveq           #10, d0                                 \n\t"\r
394                                                 "       moveq           #20, d1                                 \n\t"\r
395                                                 "       moveq           #30, d2                                 \n\t"\r
396                                                 "       moveq           #40, d3                                 \n\t"\r
397                                                 "       moveq           #50, d4                                 \n\t"\r
398                                                 "       moveq           #60, d5                                 \n\t"\r
399                                                 "       moveq           #70, d6                                 \n\t"\r
400                                                 "       moveq           #80, d7                                 \n\t"\r
401                                                 "       move            #90, a0                                 \n\t"\r
402                                                 "       move            #100, a1                                \n\t"\r
403                                                 "       move            #110, a2                                \n\t"\r
404                                                 "       move            #120, a3                                \n\t"\r
405                                                 "       move            #130, a4                                \n\t"\r
406                                                 "       move            #140, a5                                \n\t"\r
407                                                 "       move            #150, a6                                \n\t"\r
408                                                 "                                                                               \n\t"\r
409                                                 "       cmpi.l          #10, d0                                 \n\t"\r
410                                                 "       bne                     reg_test_2_error                \n\t"\r
411                                                 "       cmpi.l          #20, d1                                 \n\t"\r
412                                                 "       bne                     reg_test_2_error                \n\t"\r
413                                                 "       cmpi.l          #30, d2                                 \n\t"\r
414                                                 "       bne                     reg_test_2_error                \n\t"\r
415                                                 "       cmpi.l          #40, d3                                 \n\t"\r
416                                                 "       bne                     reg_test_2_error                \n\t"\r
417                                                 "       cmpi.l          #50, d4                                 \n\t"\r
418                                                 "       bne                     reg_test_2_error                \n\t"\r
419                                                 "       cmpi.l          #60, d5                                 \n\t"\r
420                                                 "       bne                     reg_test_2_error                \n\t"\r
421                                                 "       cmpi.l          #70, d6                                 \n\t"\r
422                                                 "       bne                     reg_test_2_error                \n\t"\r
423                                                 "       cmpi.l          #80, d7                                 \n\t"\r
424                                                 "       bne                     reg_test_2_error                \n\t"\r
425                                                 "       move            a0, d0                                  \n\t"\r
426                                                 "       cmpi.l          #90, d0                                 \n\t"\r
427                                                 "       bne                     reg_test_2_error                \n\t"\r
428                                                 "       move            a1, d0                                  \n\t"\r
429                                                 "       cmpi.l          #100, d0                                \n\t"\r
430                                                 "       bne                     reg_test_2_error                \n\t"\r
431                                                 "       move            a2, d0                                  \n\t"\r
432                                                 "       cmpi.l          #110, d0                                \n\t"\r
433                                                 "       bne                     reg_test_2_error                \n\t"\r
434                                                 "       move            a3, d0                                  \n\t"\r
435                                                 "       cmpi.l          #120, d0                                \n\t"\r
436                                                 "       bne                     reg_test_2_error                \n\t"\r
437                                                 "       move            a4, d0                                  \n\t"\r
438                                                 "       cmpi.l          #130, d0                                \n\t"\r
439                                                 "       bne                     reg_test_2_error                \n\t"\r
440                                                 "       move            a5, d0                                  \n\t"\r
441                                                 "       cmpi.l          #140, d0                                \n\t"\r
442                                                 "       bne                     reg_test_2_error                \n\t"\r
443                                                 "       move            a6, d0                                  \n\t"\r
444                                                 "       cmpi.l          #150, d0                                \n\t"\r
445                                                 "       bne                     reg_test_2_error                \n\t"\r
446                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
447                                                 "       addq            #1, d0                                  \n\t"\r
448                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
449                                                 "       bra                     reg_test_2_start                \n\t"\r
450                                                 "reg_test_2_error:                                              \n\t"\r
451                                                 "       bra                     reg_test_2_error                \n\t"\r
452                                         );\r
453 }\r
454 /*-----------------------------------------------------------*/\r
455 \r
456 \r
457 \r