git.sur5r.net Git - freertos/blob - Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c

   1 /*\r
   2     FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.\r
   3 \r
   4     This file is part of the FreeRTOS distribution.\r
   5 \r
   6     FreeRTOS is free software; you can redistribute it and/or modify it    under\r
   7     the terms of the GNU General Public License (version 2) as published by the\r
   8     Free Software Foundation and modified by the FreeRTOS exception.\r
   9     **NOTE** The exception to the GPL is included to allow you to distribute a\r
  10     combined work that includes FreeRTOS without being obliged to provide the\r
  11     source code for proprietary components outside of the FreeRTOS kernel.\r
  12     Alternative commercial license and support terms are also available upon\r
  13     request.  See the licensing section of http://www.FreeRTOS.org for full\r
  14     license details.\r
  15 \r
  16     FreeRTOS is distributed in the hope that it will be useful,    but WITHOUT\r
  17     ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  18     FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
  19     more details.\r
  20 \r
  21     You should have received a copy of the GNU General Public License along\r
  22     with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
  23     Temple Place, Suite 330, Boston, MA  02111-1307  USA.\r
  24 \r
  25 \r
  26     ***************************************************************************\r
  27     *                                                                         *\r
  28     * The FreeRTOS eBook and reference manual are available to purchase for a *\r
  29     * small fee. Help yourself get started quickly while also helping the     *\r
  30     * FreeRTOS project! See http://www.FreeRTOS.org/Documentation for details *\r
  31     *                                                                         *\r
  32     ***************************************************************************\r
  33 \r
  34     1 tab == 4 spaces!\r
  35 \r
  36     Please ensure to read the configuration and relevant port sections of the\r
  37     online documentation.\r
  38 \r
  39     http://www.FreeRTOS.org - Documentation, latest information, license and\r
  40     contact details.\r
  41 \r
  42     http://www.SafeRTOS.com - A version that is certified for use in safety\r
  43     critical systems.\r
  44 \r
  45     http://www.OpenRTOS.com - Commercial support, development, porting,\r
  46     licensing and training services.\r
  47 */\r
  48 \r
  49 \r
  50 /*\r
  51  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
  52  * documentation provides more details of the standard demo application tasks.\r
  53  * In addition to the standard demo tasks, the following tasks and tests are\r
  54  * defined and/or created within this file:\r
  55  *\r
  56  * "Check" task -  This only executes every five seconds but has a high priority\r
  57  * to ensure it gets processor time.  Its main function is to check that all the\r
  58  * standard demo tasks are still operational.  While no errors have been\r
  59  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
  60  * rate increasing to 500ms being a visual indication that at least one task has\r
  61  * reported unexpected behaviour.\r
  62  *\r
  63  * "Reg test" tasks - These fill the registers with known values, then check\r
  64  * that each register still contains its expected value.  Each task uses\r
  65  * different values.  The tasks run with very low priority so get preempted very\r
  66  * frequently.  A register containing an unexpected value is indicative of an\r
  67  * error in the context switching mechanism.\r
  68  *\r
  69  */\r
  70 \r
  71 /* Standard includes. */\r
  72 #include <stdio.h>\r
  73 \r
  74 /* Scheduler includes. */\r
  75 #include "FreeRTOS.h"\r
  76 #include "task.h"\r
  77 #include "queue.h"\r
  78 #include "semphr.h"\r
  79 \r
  80 /* Demo app includes. */\r
  81 #include "BlockQ.h"\r
  82 #include "crflash.h"\r
  83 #include "partest.h"\r
  84 #include "semtest.h"\r
  85 #include "GenQTest.h"\r
  86 #include "QPeek.h"\r
  87 #include "comtest2.h"\r
  88 \r
  89 /*-----------------------------------------------------------*/\r
  90 \r
  91 /* The time between cycles of the 'check' functionality - as described at the\r
  92 top of this file. */\r
  93 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
  94 \r
  95 /* The rate at which the LED controlled by the 'check' task will flash should an\r
  96 error have been detected. */\r
  97 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
  98 \r
  99 /* The LED controlled by the 'check' task. */\r
 100 #define mainCHECK_LED                                           ( 3 )\r
 101 \r
 102 /* ComTest constants - there is no free LED for the comtest tasks. */\r
 103 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
 104 #define mainCOM_TEST_LED                                        ( 5 )\r
 105 \r
 106 /* Task priorities. */\r
 107 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
 108 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
 109 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
 110 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
 111 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
 112 \r
 113 /* Co-routines are used to flash the LEDs. */\r
 114 #define mainNUM_FLASH_CO_ROUTINES                       ( 3 )\r
 115 \r
 116 /* The baud rate used by the comtest tasks. */\r
 117 #define mainBAUD_RATE                                           ( 38400 )\r
 118 \r
 119 /* There is no spare LED for the comtest tasks, so this is set to an invalid\r
 120 number. */\r
 121 #define mainCOM_LED                                                     ( 4 )\r
 122 \r
 123 /*\r
 124  * Configure the hardware for the demo.\r
 125  */\r
 126 static void prvSetupHardware( void );\r
 127 \r
 128 /*\r
 129  * Implements the 'check' task functionality as described at the top of this\r
 130  * file.\r
 131  */\r
 132 static void prvCheckTask( void *pvParameters );\r
 133 \r
 134 /*\r
 135  * Implement the 'Reg test' functionality as described at the top of this file.\r
 136  */\r
 137 static void vRegTest1Task( void *pvParameters );\r
 138 static void vRegTest2Task( void *pvParameters );\r
 139 \r
 140 /*-----------------------------------------------------------*/\r
 141 \r
 142 /* Counters used to detect errors within the reg test tasks. */\r
 143 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
 144 \r
 145 /*-----------------------------------------------------------*/\r
 146 \r
 147 int main( void )\r
 148 {\r
 149         /* Setup the hardware ready for this demo. */\r
 150         prvSetupHardware();\r
 151 \r
 152         /* Start the standard demo tasks. */\r
 153         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
 154         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
 155         vStartQueuePeekTasks();\r
 156         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
 157         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_RATE, mainCOM_LED );\r
 158 \r
 159         /* For demo purposes use some co-routines to flash the LEDs. */\r
 160         vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );\r
 161 \r
 162         /* Create the check task. */\r
 163         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
 164 \r
 165 \r
 166         /* Start the reg test tasks - defined in this file. */\r
 167         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
 168         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
 169 \r
 170         /* Start the scheduler. */\r
 171         vTaskStartScheduler();\r
 172 \r
 173     /* Will only get here if there was insufficient memory to create the idle\r
 174     task. */\r
 175         for( ;; )\r
 176         {\r
 177         }\r
 178 }\r
 179 /*-----------------------------------------------------------*/\r
 180 \r
 181 static void prvCheckTask( void *pvParameters )\r
 182 {\r
 183 unsigned portLONG ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
 184 portTickType xLastExecutionTime;\r
 185 volatile unsigned portBASE_TYPE uxUnusedStack;\r
 186 \r
 187         ( void ) pvParameters;\r
 188 \r
 189         /* Initialise the variable used to control our iteration rate prior to\r
 190         its first use. */\r
 191         xLastExecutionTime = xTaskGetTickCount();\r
 192 \r
 193         for( ;; )\r
 194         {\r
 195                 /* Wait until it is time to run the tests again. */\r
 196                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
 197 \r
 198                 /* Has an error been found in any task? */\r
 199                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
 200                 {\r
 201                         ulError |= 0x01UL;\r
 202                 }\r
 203 \r
 204                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
 205                 {\r
 206                         ulError |= 0x02UL;\r
 207                 }\r
 208 \r
 209                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
 210                 {\r
 211                         ulError |= 0x04UL;\r
 212                 }\r
 213 \r
 214                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
 215             {\r
 216                 ulError |= 0x20UL;\r
 217             }\r
 218             \r
 219             if( xAreComTestTasksStillRunning() != pdTRUE )\r
 220             {\r
 221                 ulError |= 0x40UL;\r
 222             }\r
 223 \r
 224                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
 225                 {\r
 226                         ulError |= 0x1000UL;\r
 227                 }\r
 228 \r
 229                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
 230                 {\r
 231                         ulError |= 0x1000UL;\r
 232                 }\r
 233 \r
 234                 ulLastRegTest1Count = ulRegTest1Counter;\r
 235                 ulLastRegTest2Count = ulRegTest2Counter;\r
 236 \r
 237                 /* If an error has been found then increase our cycle rate, and in so\r
 238                 doing increase the rate at which the check task LED toggles. */\r
 239                 if( ulError != 0 )\r
 240                 {\r
 241                 ulTicksToWait = mainERROR_PERIOD;\r
 242                 }\r
 243 \r
 244                 /* Toggle the LED each itteration. */\r
 245                 vParTestToggleLED( mainCHECK_LED );\r
 246                 \r
 247                 /* For demo only - how much unused stack does this task have? */\r
 248                 uxUnusedStack = uxTaskGetStackHighWaterMark( NULL );\r
 249         }\r
 250 }\r
 251 /*-----------------------------------------------------------*/\r
 252 \r
 253 void prvSetupHardware( void )\r
 254 {\r
 255         portDISABLE_INTERRUPTS();\r
 256 \r
 257         /* Setup the port used to toggle LEDs. */\r
 258         vParTestInitialise();\r
 259 }\r
 260 /*-----------------------------------------------------------*/\r
 261 \r
 262 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
 263 {\r
 264         /* This will get called if a stack overflow is detected during the context\r
 265         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
 266         problems within nested interrupts, but only do this for debug purposes as\r
 267         it will increase the context switch time. */\r
 268 \r
 269         ( void ) pxTask;\r
 270         ( void ) pcTaskName;\r
 271 \r
 272         for( ;; )\r
 273         {\r
 274         }\r
 275 }\r
 276 /*-----------------------------------------------------------*/\r
 277 \r
 278 void vApplicationIdleHook( void );\r
 279 void vApplicationIdleHook( void )\r
 280 {\r
 281         /* The co-routines run in the idle task. */\r
 282         vCoRoutineSchedule();\r
 283 }\r
 284 /*-----------------------------------------------------------*/\r
 285 \r
 286 void exit( int n )\r
 287 {\r
 288         /* To keep the linker happy only as the libraries have been removed from\r
 289         the build. */\r
 290         ( void ) n;\r
 291         for( ;; ) {}\r
 292 }\r
 293 /*-----------------------------------------------------------*/\r
 294 \r
 295 static void vRegTest1Task( void *pvParameters )\r
 296 {\r
 297         /* Sanity check - did we receive the parameter expected? */\r
 298         if( pvParameters != &ulRegTest1Counter )\r
 299         {\r
 300                 /* Change here so the check task can detect that an error occurred. */\r
 301                 for( ;; )\r
 302                 {\r
 303                 }\r
 304         }\r
 305 \r
 306         /* Set all the registers to known values, then check that each retains its\r
 307         expected value - as described at the top of this file.  If an error is\r
 308         found then the loop counter will no longer be incremented allowing the check\r
 309         task to recognise the error. */\r
 310         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
 311                                                 "       moveq           #1, d0                                  \n\t"\r
 312                                                 "       moveq           #2, d1                                  \n\t"\r
 313                                                 "       moveq           #3, d2                                  \n\t"\r
 314                                                 "       moveq           #4, d3                                  \n\t"\r
 315                                                 "       moveq           #5, d4                                  \n\t"\r
 316                                                 "       moveq           #6, d5                                  \n\t"\r
 317                                                 "       moveq           #7, d6                                  \n\t"\r
 318                                                 "       moveq           #8, d7                                  \n\t"\r
 319                                                 "       move            #9, a0                                  \n\t"\r
 320                                                 "       move            #10, a1                                 \n\t"\r
 321                                                 "       move            #11, a2                                 \n\t"\r
 322                                                 "       move            #12, a3                                 \n\t"\r
 323                                                 "       move            #13, a4                                 \n\t"\r
 324                                                 "       move            #14, a5                                 \n\t"\r
 325                                                 "       move            #15, a6                                 \n\t"\r
 326                                                 "                                                                               \n\t"\r
 327                                                 "       cmpi.l          #1, d0                                  \n\t"\r
 328                                                 "       bne                     reg_test_1_error                \n\t"\r
 329                                                 "       cmpi.l          #2, d1                                  \n\t"\r
 330                                                 "       bne                     reg_test_1_error                \n\t"\r
 331                                                 "       cmpi.l          #3, d2                                  \n\t"\r
 332                                                 "       bne                     reg_test_1_error                \n\t"\r
 333                                                 "       cmpi.l          #4, d3                                  \n\t"\r
 334                                                 "       bne                     reg_test_1_error                \n\t"\r
 335                                                 "       cmpi.l          #5, d4                                  \n\t"\r
 336                                                 "       bne                     reg_test_1_error                \n\t"\r
 337                                                 "       cmpi.l          #6, d5                                  \n\t"\r
 338                                                 "       bne                     reg_test_1_error                \n\t"\r
 339                                                 "       cmpi.l          #7, d6                                  \n\t"\r
 340                                                 "       bne                     reg_test_1_error                \n\t"\r
 341                                                 "       cmpi.l          #8, d7                                  \n\t"\r
 342                                                 "       bne                     reg_test_1_error                \n\t"\r
 343                                                 "       move            a0, d0                                  \n\t"\r
 344                                                 "       cmpi.l          #9, d0                                  \n\t"\r
 345                                                 "       bne                     reg_test_1_error                \n\t"\r
 346                                                 "       move            a1, d0                                  \n\t"\r
 347                                                 "       cmpi.l          #10, d0                                 \n\t"\r
 348                                                 "       bne                     reg_test_1_error                \n\t"\r
 349                                                 "       move            a2, d0                                  \n\t"\r
 350                                                 "       cmpi.l          #11, d0                                 \n\t"\r
 351                                                 "       bne                     reg_test_1_error                \n\t"\r
 352                                                 "       move            a3, d0                                  \n\t"\r
 353                                                 "       cmpi.l          #12, d0                                 \n\t"\r
 354                                                 "       bne                     reg_test_1_error                \n\t"\r
 355                                                 "       move            a4, d0                                  \n\t"\r
 356                                                 "       cmpi.l          #13, d0                                 \n\t"\r
 357                                                 "       bne                     reg_test_1_error                \n\t"\r
 358                                                 "       move            a5, d0                                  \n\t"\r
 359                                                 "       cmpi.l          #14, d0                                 \n\t"\r
 360                                                 "       bne                     reg_test_1_error                \n\t"\r
 361                                                 "       move            a6, d0                                  \n\t"\r
 362                                                 "       cmpi.l          #15, d0                                 \n\t"\r
 363                                                 "       bne                     reg_test_1_error                \n\t"\r
 364                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
 365                                                 "       addq            #1, d0                                  \n\t"\r
 366                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
 367                                                 "       bra                     reg_test_1_start                \n\t"\r
 368                                                 "reg_test_1_error:                                              \n\t"\r
 369                                                 "       bra                     reg_test_1_error                \n\t"\r
 370                                         );\r
 371 }\r
 372 /*-----------------------------------------------------------*/\r
 373 \r
 374 static void vRegTest2Task( void *pvParameters )\r
 375 {\r
 376         /* Sanity check - did we receive the parameter expected? */\r
 377         if( pvParameters != &ulRegTest2Counter )\r
 378         {\r
 379                 /* Change here so the check task can detect that an error occurred. */\r
 380                 for( ;; )\r
 381                 {\r
 382                 }\r
 383         }\r
 384 \r
 385         /* Set all the registers to known values, then check that each retains its\r
 386         expected value - as described at the top of this file.  If an error is\r
 387         found then the loop counter will no longer be incremented allowing the check\r
 388         task to recognise the error. */\r
 389         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
 390                                                 "       moveq           #10, d0                                 \n\t"\r
 391                                                 "       moveq           #20, d1                                 \n\t"\r
 392                                                 "       moveq           #30, d2                                 \n\t"\r
 393                                                 "       moveq           #40, d3                                 \n\t"\r
 394                                                 "       moveq           #50, d4                                 \n\t"\r
 395                                                 "       moveq           #60, d5                                 \n\t"\r
 396                                                 "       moveq           #70, d6                                 \n\t"\r
 397                                                 "       moveq           #80, d7                                 \n\t"\r
 398                                                 "       move            #90, a0                                 \n\t"\r
 399                                                 "       move            #100, a1                                \n\t"\r
 400                                                 "       move            #110, a2                                \n\t"\r
 401                                                 "       move            #120, a3                                \n\t"\r
 402                                                 "       move            #130, a4                                \n\t"\r
 403                                                 "       move            #140, a5                                \n\t"\r
 404                                                 "       move            #150, a6                                \n\t"\r
 405                                                 "                                                                               \n\t"\r
 406                                                 "       cmpi.l          #10, d0                                 \n\t"\r
 407                                                 "       bne                     reg_test_2_error                \n\t"\r
 408                                                 "       cmpi.l          #20, d1                                 \n\t"\r
 409                                                 "       bne                     reg_test_2_error                \n\t"\r
 410                                                 "       cmpi.l          #30, d2                                 \n\t"\r
 411                                                 "       bne                     reg_test_2_error                \n\t"\r
 412                                                 "       cmpi.l          #40, d3                                 \n\t"\r
 413                                                 "       bne                     reg_test_2_error                \n\t"\r
 414                                                 "       cmpi.l          #50, d4                                 \n\t"\r
 415                                                 "       bne                     reg_test_2_error                \n\t"\r
 416                                                 "       cmpi.l          #60, d5                                 \n\t"\r
 417                                                 "       bne                     reg_test_2_error                \n\t"\r
 418                                                 "       cmpi.l          #70, d6                                 \n\t"\r
 419                                                 "       bne                     reg_test_2_error                \n\t"\r
 420                                                 "       cmpi.l          #80, d7                                 \n\t"\r
 421                                                 "       bne                     reg_test_2_error                \n\t"\r
 422                                                 "       move            a0, d0                                  \n\t"\r
 423                                                 "       cmpi.l          #90, d0                                 \n\t"\r
 424                                                 "       bne                     reg_test_2_error                \n\t"\r
 425                                                 "       move            a1, d0                                  \n\t"\r
 426                                                 "       cmpi.l          #100, d0                                \n\t"\r
 427                                                 "       bne                     reg_test_2_error                \n\t"\r
 428                                                 "       move            a2, d0                                  \n\t"\r
 429                                                 "       cmpi.l          #110, d0                                \n\t"\r
 430                                                 "       bne                     reg_test_2_error                \n\t"\r
 431                                                 "       move            a3, d0                                  \n\t"\r
 432                                                 "       cmpi.l          #120, d0                                \n\t"\r
 433                                                 "       bne                     reg_test_2_error                \n\t"\r
 434                                                 "       move            a4, d0                                  \n\t"\r
 435                                                 "       cmpi.l          #130, d0                                \n\t"\r
 436                                                 "       bne                     reg_test_2_error                \n\t"\r
 437                                                 "       move            a5, d0                                  \n\t"\r
 438                                                 "       cmpi.l          #140, d0                                \n\t"\r
 439                                                 "       bne                     reg_test_2_error                \n\t"\r
 440                                                 "       move            a6, d0                                  \n\t"\r
 441                                                 "       cmpi.l          #150, d0                                \n\t"\r
 442                                                 "       bne                     reg_test_2_error                \n\t"\r
 443                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
 444                                                 "       addq            #1, d0                                  \n\t"\r
 445                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
 446                                                 "       bra                     reg_test_2_start                \n\t"\r
 447                                                 "reg_test_2_error:                                              \n\t"\r
 448                                                 "       bra                     reg_test_2_error                \n\t"\r
 449                                         );\r
 450 }\r
 451 /*-----------------------------------------------------------*/\r
 452 \r
 453 \r
 454 \r