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1 /*\r
2         FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.\r
3 \r
4         This file is part of the FreeRTOS distribution.\r
5 \r
6         FreeRTOS is free software; you can redistribute it and/or modify it     under \r
7         the terms of the GNU General Public License (version 2) as published by the \r
8         Free Software Foundation and modified by the FreeRTOS exception.\r
9         **NOTE** The exception to the GPL is included to allow you to distribute a\r
10         combined work that includes FreeRTOS without being obliged to provide the \r
11         source code for proprietary components outside of the FreeRTOS kernel.  \r
12         Alternative commercial license and support terms are also available upon \r
13         request.  See the licensing section of http://www.FreeRTOS.org for full \r
14         license details.\r
15 \r
16         FreeRTOS is distributed in the hope that it will be useful,     but WITHOUT\r
17         ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
18         FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
19         more details.\r
20 \r
21         You should have received a copy of the GNU General Public License along\r
22         with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
23         Temple Place, Suite 330, Boston, MA  02111-1307  USA.\r
24 \r
25 \r
26         ***************************************************************************\r
27         *                                                                         *\r
28         * Looking for a quick start?  Then check out the FreeRTOS eBook!          *\r
29         * See http://www.FreeRTOS.org/Documentation for details                   *\r
30         *                                                                         *\r
31         ***************************************************************************\r
32 \r
33         1 tab == 4 spaces!\r
34 \r
35         Please ensure to read the configuration and relevant port sections of the\r
36         online documentation.\r
37 \r
38         http://www.FreeRTOS.org - Documentation, latest information, license and\r
39         contact details.\r
40 \r
41         http://www.SafeRTOS.com - A version that is certified for use in safety\r
42         critical systems.\r
43 \r
44         http://www.OpenRTOS.com - Commercial support, development, porting,\r
45         licensing and training services.\r
46 */\r
47 \r
48 \r
49 /*\r
50  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
51  * documentation provides more details of the standard demo application tasks.\r
52  * In addition to the standard demo tasks, the following tasks and tests are\r
53  * defined and/or created within this file:\r
54  *\r
55  * "Check" task -  This only executes every five seconds but has a high priority\r
56  * to ensure it gets processor time.  Its main function is to check that all the\r
57  * standard demo tasks are still operational.  While no errors have been\r
58  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
59  * rate increasing to 500ms being a visual indication that at least one task has\r
60  * reported unexpected behaviour.\r
61  *\r
62  * "Reg test" tasks - These fill the registers with known values, then check\r
63  * that each register still contains its expected value.  Each task uses\r
64  * different values.  The tasks run with very low priority so get preempted very\r
65  * frequently.  A register containing an unexpected value is indicative of an\r
66  * error in the context switching mechanism.\r
67  *\r
68  */\r
69 \r
70 /* Standard includes. */\r
71 #include <stdio.h>\r
72 \r
73 /* Scheduler includes. */\r
74 #include "FreeRTOS.h"\r
75 #include "task.h"\r
76 #include "queue.h"\r
77 #include "semphr.h"\r
78 \r
79 /* Demo app includes. */\r
80 #include "BlockQ.h"\r
81 #include "crflash.h"\r
82 #include "partest.h"\r
83 #include "semtest.h"\r
84 #include "GenQTest.h"\r
85 #include "QPeek.h"\r
86 #include "comtest2.h"\r
87 \r
88 /*-----------------------------------------------------------*/\r
89 \r
90 /* The time between cycles of the 'check' functionality - as described at the\r
91 top of this file. */\r
92 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
93 \r
94 /* The rate at which the LED controlled by the 'check' task will flash should an\r
95 error have been detected. */\r
96 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
97 \r
98 /* The LED controlled by the 'check' task. */\r
99 #define mainCHECK_LED                                           ( 3 )\r
100 \r
101 /* ComTest constants - there is no free LED for the comtest tasks. */\r
102 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
103 #define mainCOM_TEST_LED                                        ( 5 )\r
104 \r
105 /* Task priorities. */\r
106 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
107 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
108 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
109 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
110 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
111 \r
112 /* Co-routines are used to flash the LEDs. */\r
113 #define mainNUM_FLASH_CO_ROUTINES                       ( 3 )\r
114 \r
115 /* The baud rate used by the comtest tasks. */\r
116 #define mainBAUD_RATE                                           ( 38400 )\r
117 \r
118 /* There is no spare LED for the comtest tasks, so this is set to an invalid\r
119 number. */\r
120 #define mainCOM_LED                                                     ( 4 )\r
121 \r
122 /*\r
123  * Configure the hardware for the demo.\r
124  */\r
125 static void prvSetupHardware( void );\r
126 \r
127 /*\r
128  * Implements the 'check' task functionality as described at the top of this\r
129  * file.\r
130  */\r
131 static void prvCheckTask( void *pvParameters );\r
132 \r
133 /*\r
134  * Implement the 'Reg test' functionality as described at the top of this file.\r
135  */\r
136 static void vRegTest1Task( void *pvParameters );\r
137 static void vRegTest2Task( void *pvParameters );\r
138 \r
139 /*-----------------------------------------------------------*/\r
140 \r
141 /* Counters used to detect errors within the reg test tasks. */\r
142 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
143 \r
144 /*-----------------------------------------------------------*/\r
145 \r
146 int main( void )\r
147 {\r
148         /* Setup the hardware ready for this demo. */\r
149         prvSetupHardware();\r
150 \r
151         /* Start the standard demo tasks. */\r
152         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
153         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
154         vStartQueuePeekTasks();\r
155         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
156         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_RATE, mainCOM_LED );\r
157 \r
158         /* For demo purposes use some co-routines to flash the LEDs. */\r
159         vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );\r
160 \r
161         /* Create the check task. */\r
162         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
163 \r
164 \r
165         /* Start the reg test tasks - defined in this file. */\r
166         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
167         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
168 \r
169         /* Start the scheduler. */\r
170         vTaskStartScheduler();\r
171 \r
172     /* Will only get here if there was insufficient memory to create the idle\r
173     task. */\r
174         for( ;; )\r
175         {\r
176         }\r
177 }\r
178 /*-----------------------------------------------------------*/\r
179 \r
180 static void prvCheckTask( void *pvParameters )\r
181 {\r
182 unsigned portLONG ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
183 portTickType xLastExecutionTime;\r
184 volatile unsigned portBASE_TYPE uxUnusedStack;\r
185 \r
186         ( void ) pvParameters;\r
187 \r
188         /* Initialise the variable used to control our iteration rate prior to\r
189         its first use. */\r
190         xLastExecutionTime = xTaskGetTickCount();\r
191 \r
192         for( ;; )\r
193         {\r
194                 /* Wait until it is time to run the tests again. */\r
195                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
196 \r
197                 /* Has an error been found in any task? */\r
198                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
199                 {\r
200                         ulError |= 0x01UL;\r
201                 }\r
202 \r
203                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
204                 {\r
205                         ulError |= 0x02UL;\r
206                 }\r
207 \r
208                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
209                 {\r
210                         ulError |= 0x04UL;\r
211                 }\r
212 \r
213                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
214             {\r
215                 ulError |= 0x20UL;\r
216             }\r
217             \r
218             if( xAreComTestTasksStillRunning() != pdTRUE )\r
219             {\r
220                 ulError |= 0x40UL;\r
221             }\r
222 \r
223                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
224                 {\r
225                         ulError |= 0x1000UL;\r
226                 }\r
227 \r
228                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
229                 {\r
230                         ulError |= 0x1000UL;\r
231                 }\r
232 \r
233                 ulLastRegTest1Count = ulRegTest1Counter;\r
234                 ulLastRegTest2Count = ulRegTest2Counter;\r
235 \r
236                 /* If an error has been found then increase our cycle rate, and in so\r
237                 doing increase the rate at which the check task LED toggles. */\r
238                 if( ulError != 0 )\r
239                 {\r
240                 ulTicksToWait = mainERROR_PERIOD;\r
241                 }\r
242 \r
243                 /* Toggle the LED each itteration. */\r
244                 vParTestToggleLED( mainCHECK_LED );\r
245                 \r
246                 /* For demo only - how much unused stack does this task have? */\r
247                 uxUnusedStack = uxTaskGetStackHighWaterMark( NULL );\r
248         }\r
249 }\r
250 /*-----------------------------------------------------------*/\r
251 \r
252 void prvSetupHardware( void )\r
253 {\r
254         portDISABLE_INTERRUPTS();\r
255 \r
256         /* Setup the port used to toggle LEDs. */\r
257         vParTestInitialise();\r
258 }\r
259 /*-----------------------------------------------------------*/\r
260 \r
261 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
262 {\r
263         /* This will get called if a stack overflow is detected during the context\r
264         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
265         problems within nested interrupts, but only do this for debug purposes as\r
266         it will increase the context switch time. */\r
267 \r
268         ( void ) pxTask;\r
269         ( void ) pcTaskName;\r
270 \r
271         for( ;; )\r
272         {\r
273         }\r
274 }\r
275 /*-----------------------------------------------------------*/\r
276 \r
277 void vApplicationIdleHook( void );\r
278 void vApplicationIdleHook( void )\r
279 {\r
280         /* The co-routines run in the idle task. */\r
281         vCoRoutineSchedule();\r
282 }\r
283 /*-----------------------------------------------------------*/\r
284 \r
285 void exit( int n )\r
286 {\r
287         /* To keep the linker happy only as the libraries have been removed from\r
288         the build. */\r
289         ( void ) n;\r
290         for( ;; ) {}\r
291 }\r
292 /*-----------------------------------------------------------*/\r
293 \r
294 static void vRegTest1Task( void *pvParameters )\r
295 {\r
296         /* Sanity check - did we receive the parameter expected? */\r
297         if( pvParameters != &ulRegTest1Counter )\r
298         {\r
299                 /* Change here so the check task can detect that an error occurred. */\r
300                 for( ;; )\r
301                 {\r
302                 }\r
303         }\r
304 \r
305         /* Set all the registers to known values, then check that each retains its\r
306         expected value - as described at the top of this file.  If an error is\r
307         found then the loop counter will no longer be incremented allowing the check\r
308         task to recognise the error. */\r
309         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
310                                                 "       moveq           #1, d0                                  \n\t"\r
311                                                 "       moveq           #2, d1                                  \n\t"\r
312                                                 "       moveq           #3, d2                                  \n\t"\r
313                                                 "       moveq           #4, d3                                  \n\t"\r
314                                                 "       moveq           #5, d4                                  \n\t"\r
315                                                 "       moveq           #6, d5                                  \n\t"\r
316                                                 "       moveq           #7, d6                                  \n\t"\r
317                                                 "       moveq           #8, d7                                  \n\t"\r
318                                                 "       move            #9, a0                                  \n\t"\r
319                                                 "       move            #10, a1                                 \n\t"\r
320                                                 "       move            #11, a2                                 \n\t"\r
321                                                 "       move            #12, a3                                 \n\t"\r
322                                                 "       move            #13, a4                                 \n\t"\r
323                                                 "       move            #14, a5                                 \n\t"\r
324                                                 "       move            #15, a6                                 \n\t"\r
325                                                 "                                                                               \n\t"\r
326                                                 "       cmpi.l          #1, d0                                  \n\t"\r
327                                                 "       bne                     reg_test_1_error                \n\t"\r
328                                                 "       cmpi.l          #2, d1                                  \n\t"\r
329                                                 "       bne                     reg_test_1_error                \n\t"\r
330                                                 "       cmpi.l          #3, d2                                  \n\t"\r
331                                                 "       bne                     reg_test_1_error                \n\t"\r
332                                                 "       cmpi.l          #4, d3                                  \n\t"\r
333                                                 "       bne                     reg_test_1_error                \n\t"\r
334                                                 "       cmpi.l          #5, d4                                  \n\t"\r
335                                                 "       bne                     reg_test_1_error                \n\t"\r
336                                                 "       cmpi.l          #6, d5                                  \n\t"\r
337                                                 "       bne                     reg_test_1_error                \n\t"\r
338                                                 "       cmpi.l          #7, d6                                  \n\t"\r
339                                                 "       bne                     reg_test_1_error                \n\t"\r
340                                                 "       cmpi.l          #8, d7                                  \n\t"\r
341                                                 "       bne                     reg_test_1_error                \n\t"\r
342                                                 "       move            a0, d0                                  \n\t"\r
343                                                 "       cmpi.l          #9, d0                                  \n\t"\r
344                                                 "       bne                     reg_test_1_error                \n\t"\r
345                                                 "       move            a1, d0                                  \n\t"\r
346                                                 "       cmpi.l          #10, d0                                 \n\t"\r
347                                                 "       bne                     reg_test_1_error                \n\t"\r
348                                                 "       move            a2, d0                                  \n\t"\r
349                                                 "       cmpi.l          #11, d0                                 \n\t"\r
350                                                 "       bne                     reg_test_1_error                \n\t"\r
351                                                 "       move            a3, d0                                  \n\t"\r
352                                                 "       cmpi.l          #12, d0                                 \n\t"\r
353                                                 "       bne                     reg_test_1_error                \n\t"\r
354                                                 "       move            a4, d0                                  \n\t"\r
355                                                 "       cmpi.l          #13, d0                                 \n\t"\r
356                                                 "       bne                     reg_test_1_error                \n\t"\r
357                                                 "       move            a5, d0                                  \n\t"\r
358                                                 "       cmpi.l          #14, d0                                 \n\t"\r
359                                                 "       bne                     reg_test_1_error                \n\t"\r
360                                                 "       move            a6, d0                                  \n\t"\r
361                                                 "       cmpi.l          #15, d0                                 \n\t"\r
362                                                 "       bne                     reg_test_1_error                \n\t"\r
363                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
364                                                 "       addq            #1, d0                                  \n\t"\r
365                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
366                                                 "       bra                     reg_test_1_start                \n\t"\r
367                                                 "reg_test_1_error:                                              \n\t"\r
368                                                 "       bra                     reg_test_1_error                \n\t"\r
369                                         );\r
370 }\r
371 /*-----------------------------------------------------------*/\r
372 \r
373 static void vRegTest2Task( void *pvParameters )\r
374 {\r
375         /* Sanity check - did we receive the parameter expected? */\r
376         if( pvParameters != &ulRegTest2Counter )\r
377         {\r
378                 /* Change here so the check task can detect that an error occurred. */\r
379                 for( ;; )\r
380                 {\r
381                 }\r
382         }\r
383 \r
384         /* Set all the registers to known values, then check that each retains its\r
385         expected value - as described at the top of this file.  If an error is\r
386         found then the loop counter will no longer be incremented allowing the check\r
387         task to recognise the error. */\r
388         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
389                                                 "       moveq           #10, d0                                 \n\t"\r
390                                                 "       moveq           #20, d1                                 \n\t"\r
391                                                 "       moveq           #30, d2                                 \n\t"\r
392                                                 "       moveq           #40, d3                                 \n\t"\r
393                                                 "       moveq           #50, d4                                 \n\t"\r
394                                                 "       moveq           #60, d5                                 \n\t"\r
395                                                 "       moveq           #70, d6                                 \n\t"\r
396                                                 "       moveq           #80, d7                                 \n\t"\r
397                                                 "       move            #90, a0                                 \n\t"\r
398                                                 "       move            #100, a1                                \n\t"\r
399                                                 "       move            #110, a2                                \n\t"\r
400                                                 "       move            #120, a3                                \n\t"\r
401                                                 "       move            #130, a4                                \n\t"\r
402                                                 "       move            #140, a5                                \n\t"\r
403                                                 "       move            #150, a6                                \n\t"\r
404                                                 "                                                                               \n\t"\r
405                                                 "       cmpi.l          #10, d0                                 \n\t"\r
406                                                 "       bne                     reg_test_2_error                \n\t"\r
407                                                 "       cmpi.l          #20, d1                                 \n\t"\r
408                                                 "       bne                     reg_test_2_error                \n\t"\r
409                                                 "       cmpi.l          #30, d2                                 \n\t"\r
410                                                 "       bne                     reg_test_2_error                \n\t"\r
411                                                 "       cmpi.l          #40, d3                                 \n\t"\r
412                                                 "       bne                     reg_test_2_error                \n\t"\r
413                                                 "       cmpi.l          #50, d4                                 \n\t"\r
414                                                 "       bne                     reg_test_2_error                \n\t"\r
415                                                 "       cmpi.l          #60, d5                                 \n\t"\r
416                                                 "       bne                     reg_test_2_error                \n\t"\r
417                                                 "       cmpi.l          #70, d6                                 \n\t"\r
418                                                 "       bne                     reg_test_2_error                \n\t"\r
419                                                 "       cmpi.l          #80, d7                                 \n\t"\r
420                                                 "       bne                     reg_test_2_error                \n\t"\r
421                                                 "       move            a0, d0                                  \n\t"\r
422                                                 "       cmpi.l          #90, d0                                 \n\t"\r
423                                                 "       bne                     reg_test_2_error                \n\t"\r
424                                                 "       move            a1, d0                                  \n\t"\r
425                                                 "       cmpi.l          #100, d0                                \n\t"\r
426                                                 "       bne                     reg_test_2_error                \n\t"\r
427                                                 "       move            a2, d0                                  \n\t"\r
428                                                 "       cmpi.l          #110, d0                                \n\t"\r
429                                                 "       bne                     reg_test_2_error                \n\t"\r
430                                                 "       move            a3, d0                                  \n\t"\r
431                                                 "       cmpi.l          #120, d0                                \n\t"\r
432                                                 "       bne                     reg_test_2_error                \n\t"\r
433                                                 "       move            a4, d0                                  \n\t"\r
434                                                 "       cmpi.l          #130, d0                                \n\t"\r
435                                                 "       bne                     reg_test_2_error                \n\t"\r
436                                                 "       move            a5, d0                                  \n\t"\r
437                                                 "       cmpi.l          #140, d0                                \n\t"\r
438                                                 "       bne                     reg_test_2_error                \n\t"\r
439                                                 "       move            a6, d0                                  \n\t"\r
440                                                 "       cmpi.l          #150, d0                                \n\t"\r
441                                                 "       bne                     reg_test_2_error                \n\t"\r
442                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
443                                                 "       addq            #1, d0                                  \n\t"\r
444                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
445                                                 "       bra                     reg_test_2_start                \n\t"\r
446                                                 "reg_test_2_error:                                              \n\t"\r
447                                                 "       bra                     reg_test_2_error                \n\t"\r
448                                         );\r
449 }\r
450 /*-----------------------------------------------------------*/\r
451 \r
452 \r
453 \r