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1 /*\r
2         FreeRTOS.org V5.1.0 - Copyright (C) 2003-2008 Richard Barry.\r
3 \r
4         This file is part of the FreeRTOS.org distribution.\r
5 \r
6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
7         it under the terms of the GNU General Public License as published by\r
8         the Free Software Foundation; either version 2 of the License, or\r
9         (at your option) any later version.\r
10 \r
11         FreeRTOS.org is distributed in the hope that it will be useful,\r
12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
14         GNU General Public License for more details.\r
15 \r
16         You should have received a copy of the GNU General Public License\r
17         along with FreeRTOS.org; if not, write to the Free Software\r
18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
19 \r
20         A special exception to the GPL can be applied should you wish to distribute\r
21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
22         the source code for any proprietary components.  See the licensing section\r
23         of http://www.FreeRTOS.org for full details of how and when the exception\r
24         can be applied.\r
25 \r
26     ***************************************************************************\r
27     ***************************************************************************\r
28     *                                                                         *\r
29     * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *\r
30     * and even write all or part of your application on your behalf.          *\r
31     * See http://www.OpenRTOS.com for details of the services we provide to   *\r
32     * expedite your project.                                                  *\r
33     *                                                                         *\r
34     ***************************************************************************\r
35     ***************************************************************************\r
36 \r
37         Please ensure to read the configuration and relevant port sections of the\r
38         online documentation.\r
39 \r
40         http://www.FreeRTOS.org - Documentation, latest information, license and\r
41         contact details.\r
42 \r
43         http://www.SafeRTOS.com - A version that is certified for use in safety\r
44         critical systems.\r
45 \r
46         http://www.OpenRTOS.com - Commercial support, development, porting,\r
47         licensing and training services.\r
48 */\r
49 \r
50 \r
51 /*\r
52  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
53  * documentation provides more details of the standard demo application tasks.\r
54  * In addition to the standard demo tasks, the following tasks and tests are\r
55  * defined and/or created within this file:\r
56  *\r
57  * "Check" task -  This only executes every five seconds but has a high priority\r
58  * to ensure it gets processor time.  Its main function is to check that all the\r
59  * standard demo tasks are still operational.  While no errors have been\r
60  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
61  * rate increasing to 500ms being a visual indication that at least one task has\r
62  * reported unexpected behaviour.\r
63  *\r
64  * "Reg test" tasks - These fill the registers with known values, then check\r
65  * that each register still contains its expected value.  Each task uses\r
66  * different values.  The tasks run with very low priority so get preempted very\r
67  * frequently.  A register containing an unexpected value is indicative of an\r
68  * error in the context switching mechanism.\r
69  *\r
70  */\r
71 \r
72 /* Standard includes. */\r
73 #include <stdio.h>\r
74 \r
75 /* Scheduler includes. */\r
76 #include "FreeRTOS.h"\r
77 #include "task.h"\r
78 #include "queue.h"\r
79 #include "semphr.h"\r
80 \r
81 /* Demo app includes. */\r
82 #include "BlockQ.h"\r
83 #include "crflash.h"\r
84 #include "partest.h"\r
85 #include "semtest.h"\r
86 #include "GenQTest.h"\r
87 #include "QPeek.h"\r
88 #include "comtest2.h"\r
89 \r
90 /*-----------------------------------------------------------*/\r
91 \r
92 /* The time between cycles of the 'check' functionality - as described at the\r
93 top of this file. */\r
94 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
95 \r
96 /* The rate at which the LED controlled by the 'check' task will flash should an\r
97 error have been detected. */\r
98 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
99 \r
100 /* The LED controlled by the 'check' task. */\r
101 #define mainCHECK_LED                                           ( 3 )\r
102 \r
103 /* ComTest constants - there is no free LED for the comtest tasks. */\r
104 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
105 #define mainCOM_TEST_LED                                        ( 5 )\r
106 \r
107 /* Task priorities. */\r
108 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
109 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
110 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
111 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
112 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
113 \r
114 /* Co-routines are used to flash the LEDs. */\r
115 #define mainNUM_FLASH_CO_ROUTINES                       ( 3 )\r
116 \r
117 /* The baud rate used by the comtest tasks. */\r
118 #define mainBAUD_RATE                                           ( 38400 )\r
119 \r
120 /* There is no spare LED for the comtest tasks, so this is set to an invalid\r
121 number. */\r
122 #define mainCOM_LED                                                     ( 4 )\r
123 \r
124 /*\r
125  * Configure the hardware for the demo.\r
126  */\r
127 static void prvSetupHardware( void );\r
128 \r
129 /*\r
130  * Implements the 'check' task functionality as described at the top of this\r
131  * file.\r
132  */\r
133 static void prvCheckTask( void *pvParameters );\r
134 \r
135 /*\r
136  * Implement the 'Reg test' functionality as described at the top of this file.\r
137  */\r
138 static void vRegTest1Task( void *pvParameters );\r
139 static void vRegTest2Task( void *pvParameters );\r
140 \r
141 /*-----------------------------------------------------------*/\r
142 \r
143 /* Counters used to detect errors within the reg test tasks. */\r
144 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
145 \r
146 /*-----------------------------------------------------------*/\r
147 \r
148 int main( void )\r
149 {\r
150         /* Setup the hardware ready for this demo. */\r
151         prvSetupHardware();\r
152 \r
153         /* Start the standard demo tasks. */\r
154         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
155         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
156         vStartQueuePeekTasks();\r
157         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
158         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_RATE, mainCOM_LED );\r
159 \r
160         /* For demo purposes use some co-routines to flash the LEDs. */\r
161         vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );\r
162 \r
163         /* Create the check task. */\r
164         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
165 \r
166 \r
167         /* Start the reg test tasks - defined in this file. */\r
168         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
169         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
170 \r
171         /* Start the scheduler. */\r
172         vTaskStartScheduler();\r
173 \r
174     /* Will only get here if there was insufficient memory to create the idle\r
175     task. */\r
176         for( ;; )\r
177         {\r
178         }\r
179 }\r
180 /*-----------------------------------------------------------*/\r
181 \r
182 static void prvCheckTask( void *pvParameters )\r
183 {\r
184 unsigned portLONG ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
185 portTickType xLastExecutionTime;\r
186 volatile unsigned portBASE_TYPE uxUnusedStack;\r
187 \r
188         ( void ) pvParameters;\r
189 \r
190         /* Initialise the variable used to control our iteration rate prior to\r
191         its first use. */\r
192         xLastExecutionTime = xTaskGetTickCount();\r
193 \r
194         for( ;; )\r
195         {\r
196                 /* Wait until it is time to run the tests again. */\r
197                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
198 \r
199                 /* Has an error been found in any task? */\r
200                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
201                 {\r
202                         ulError |= 0x01UL;\r
203                 }\r
204 \r
205                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
206                 {\r
207                         ulError |= 0x02UL;\r
208                 }\r
209 \r
210                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
211                 {\r
212                         ulError |= 0x04UL;\r
213                 }\r
214 \r
215                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
216             {\r
217                 ulError |= 0x20UL;\r
218             }\r
219             \r
220             if( xAreComTestTasksStillRunning() != pdTRUE )\r
221             {\r
222                 ulError |= 0x40UL;\r
223             }\r
224 \r
225                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
226                 {\r
227                         ulError |= 0x1000UL;\r
228                 }\r
229 \r
230                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
231                 {\r
232                         ulError |= 0x1000UL;\r
233                 }\r
234 \r
235                 ulLastRegTest1Count = ulRegTest1Counter;\r
236                 ulLastRegTest2Count = ulRegTest2Counter;\r
237 \r
238                 /* If an error has been found then increase our cycle rate, and in so\r
239                 doing increase the rate at which the check task LED toggles. */\r
240                 if( ulError != 0 )\r
241                 {\r
242                 ulTicksToWait = mainERROR_PERIOD;\r
243                 }\r
244 \r
245                 /* Toggle the LED each itteration. */\r
246                 vParTestToggleLED( mainCHECK_LED );\r
247                 \r
248                 /* For demo only - how much unused stack does this task have? */\r
249                 uxUnusedStack = uxTaskGetStackHighWaterMark( NULL );\r
250         }\r
251 }\r
252 /*-----------------------------------------------------------*/\r
253 \r
254 void prvSetupHardware( void )\r
255 {\r
256         portDISABLE_INTERRUPTS();\r
257 \r
258         /* Setup the port used to toggle LEDs. */\r
259         vParTestInitialise();\r
260 }\r
261 /*-----------------------------------------------------------*/\r
262 \r
263 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
264 {\r
265         /* This will get called if a stack overflow is detected during the context\r
266         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
267         problems within nested interrupts, but only do this for debug purposes as\r
268         it will increase the context switch time. */\r
269 \r
270         ( void ) pxTask;\r
271         ( void ) pcTaskName;\r
272 \r
273         for( ;; )\r
274         {\r
275         }\r
276 }\r
277 /*-----------------------------------------------------------*/\r
278 \r
279 void vApplicationIdleHook( void );\r
280 void vApplicationIdleHook( void )\r
281 {\r
282         /* The co-routines run in the idle task. */\r
283         vCoRoutineSchedule();\r
284 }\r
285 /*-----------------------------------------------------------*/\r
286 \r
287 void exit( int n )\r
288 {\r
289         /* To keep the linker happy only as the libraries have been removed from\r
290         the build. */\r
291         ( void ) n;\r
292         for( ;; ) {}\r
293 }\r
294 /*-----------------------------------------------------------*/\r
295 \r
296 static void vRegTest1Task( void *pvParameters )\r
297 {\r
298         /* Sanity check - did we receive the parameter expected? */\r
299         if( pvParameters != &ulRegTest1Counter )\r
300         {\r
301                 /* Change here so the check task can detect that an error occurred. */\r
302                 for( ;; )\r
303                 {\r
304                 }\r
305         }\r
306 \r
307         /* Set all the registers to known values, then check that each retains its\r
308         expected value - as described at the top of this file.  If an error is\r
309         found then the loop counter will no longer be incremented allowing the check\r
310         task to recognise the error. */\r
311         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
312                                                 "       moveq           #1, d0                                  \n\t"\r
313                                                 "       moveq           #2, d1                                  \n\t"\r
314                                                 "       moveq           #3, d2                                  \n\t"\r
315                                                 "       moveq           #4, d3                                  \n\t"\r
316                                                 "       moveq           #5, d4                                  \n\t"\r
317                                                 "       moveq           #6, d5                                  \n\t"\r
318                                                 "       moveq           #7, d6                                  \n\t"\r
319                                                 "       moveq           #8, d7                                  \n\t"\r
320                                                 "       move            #9, a0                                  \n\t"\r
321                                                 "       move            #10, a1                                 \n\t"\r
322                                                 "       move            #11, a2                                 \n\t"\r
323                                                 "       move            #12, a3                                 \n\t"\r
324                                                 "       move            #13, a4                                 \n\t"\r
325                                                 "       move            #14, a5                                 \n\t"\r
326                                                 "       move            #15, a6                                 \n\t"\r
327                                                 "                                                                               \n\t"\r
328                                                 "       cmpi.l          #1, d0                                  \n\t"\r
329                                                 "       bne                     reg_test_1_error                \n\t"\r
330                                                 "       cmpi.l          #2, d1                                  \n\t"\r
331                                                 "       bne                     reg_test_1_error                \n\t"\r
332                                                 "       cmpi.l          #3, d2                                  \n\t"\r
333                                                 "       bne                     reg_test_1_error                \n\t"\r
334                                                 "       cmpi.l          #4, d3                                  \n\t"\r
335                                                 "       bne                     reg_test_1_error                \n\t"\r
336                                                 "       cmpi.l          #5, d4                                  \n\t"\r
337                                                 "       bne                     reg_test_1_error                \n\t"\r
338                                                 "       cmpi.l          #6, d5                                  \n\t"\r
339                                                 "       bne                     reg_test_1_error                \n\t"\r
340                                                 "       cmpi.l          #7, d6                                  \n\t"\r
341                                                 "       bne                     reg_test_1_error                \n\t"\r
342                                                 "       cmpi.l          #8, d7                                  \n\t"\r
343                                                 "       bne                     reg_test_1_error                \n\t"\r
344                                                 "       move            a0, d0                                  \n\t"\r
345                                                 "       cmpi.l          #9, d0                                  \n\t"\r
346                                                 "       bne                     reg_test_1_error                \n\t"\r
347                                                 "       move            a1, d0                                  \n\t"\r
348                                                 "       cmpi.l          #10, d0                                 \n\t"\r
349                                                 "       bne                     reg_test_1_error                \n\t"\r
350                                                 "       move            a2, d0                                  \n\t"\r
351                                                 "       cmpi.l          #11, d0                                 \n\t"\r
352                                                 "       bne                     reg_test_1_error                \n\t"\r
353                                                 "       move            a3, d0                                  \n\t"\r
354                                                 "       cmpi.l          #12, d0                                 \n\t"\r
355                                                 "       bne                     reg_test_1_error                \n\t"\r
356                                                 "       move            a4, d0                                  \n\t"\r
357                                                 "       cmpi.l          #13, d0                                 \n\t"\r
358                                                 "       bne                     reg_test_1_error                \n\t"\r
359                                                 "       move            a5, d0                                  \n\t"\r
360                                                 "       cmpi.l          #14, d0                                 \n\t"\r
361                                                 "       bne                     reg_test_1_error                \n\t"\r
362                                                 "       move            a6, d0                                  \n\t"\r
363                                                 "       cmpi.l          #15, d0                                 \n\t"\r
364                                                 "       bne                     reg_test_1_error                \n\t"\r
365                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
366                                                 "       addq            #1, d0                                  \n\t"\r
367                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
368                                                 "       bra                     reg_test_1_start                \n\t"\r
369                                                 "reg_test_1_error:                                              \n\t"\r
370                                                 "       bra                     reg_test_1_error                \n\t"\r
371                                         );\r
372 }\r
373 /*-----------------------------------------------------------*/\r
374 \r
375 static void vRegTest2Task( void *pvParameters )\r
376 {\r
377         /* Sanity check - did we receive the parameter expected? */\r
378         if( pvParameters != &ulRegTest2Counter )\r
379         {\r
380                 /* Change here so the check task can detect that an error occurred. */\r
381                 for( ;; )\r
382                 {\r
383                 }\r
384         }\r
385 \r
386         /* Set all the registers to known values, then check that each retains its\r
387         expected value - as described at the top of this file.  If an error is\r
388         found then the loop counter will no longer be incremented allowing the check\r
389         task to recognise the error. */\r
390         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
391                                                 "       moveq           #10, d0                                 \n\t"\r
392                                                 "       moveq           #20, d1                                 \n\t"\r
393                                                 "       moveq           #30, d2                                 \n\t"\r
394                                                 "       moveq           #40, d3                                 \n\t"\r
395                                                 "       moveq           #50, d4                                 \n\t"\r
396                                                 "       moveq           #60, d5                                 \n\t"\r
397                                                 "       moveq           #70, d6                                 \n\t"\r
398                                                 "       moveq           #80, d7                                 \n\t"\r
399                                                 "       move            #90, a0                                 \n\t"\r
400                                                 "       move            #100, a1                                \n\t"\r
401                                                 "       move            #110, a2                                \n\t"\r
402                                                 "       move            #120, a3                                \n\t"\r
403                                                 "       move            #130, a4                                \n\t"\r
404                                                 "       move            #140, a5                                \n\t"\r
405                                                 "       move            #150, a6                                \n\t"\r
406                                                 "                                                                               \n\t"\r
407                                                 "       cmpi.l          #10, d0                                 \n\t"\r
408                                                 "       bne                     reg_test_2_error                \n\t"\r
409                                                 "       cmpi.l          #20, d1                                 \n\t"\r
410                                                 "       bne                     reg_test_2_error                \n\t"\r
411                                                 "       cmpi.l          #30, d2                                 \n\t"\r
412                                                 "       bne                     reg_test_2_error                \n\t"\r
413                                                 "       cmpi.l          #40, d3                                 \n\t"\r
414                                                 "       bne                     reg_test_2_error                \n\t"\r
415                                                 "       cmpi.l          #50, d4                                 \n\t"\r
416                                                 "       bne                     reg_test_2_error                \n\t"\r
417                                                 "       cmpi.l          #60, d5                                 \n\t"\r
418                                                 "       bne                     reg_test_2_error                \n\t"\r
419                                                 "       cmpi.l          #70, d6                                 \n\t"\r
420                                                 "       bne                     reg_test_2_error                \n\t"\r
421                                                 "       cmpi.l          #80, d7                                 \n\t"\r
422                                                 "       bne                     reg_test_2_error                \n\t"\r
423                                                 "       move            a0, d0                                  \n\t"\r
424                                                 "       cmpi.l          #90, d0                                 \n\t"\r
425                                                 "       bne                     reg_test_2_error                \n\t"\r
426                                                 "       move            a1, d0                                  \n\t"\r
427                                                 "       cmpi.l          #100, d0                                \n\t"\r
428                                                 "       bne                     reg_test_2_error                \n\t"\r
429                                                 "       move            a2, d0                                  \n\t"\r
430                                                 "       cmpi.l          #110, d0                                \n\t"\r
431                                                 "       bne                     reg_test_2_error                \n\t"\r
432                                                 "       move            a3, d0                                  \n\t"\r
433                                                 "       cmpi.l          #120, d0                                \n\t"\r
434                                                 "       bne                     reg_test_2_error                \n\t"\r
435                                                 "       move            a4, d0                                  \n\t"\r
436                                                 "       cmpi.l          #130, d0                                \n\t"\r
437                                                 "       bne                     reg_test_2_error                \n\t"\r
438                                                 "       move            a5, d0                                  \n\t"\r
439                                                 "       cmpi.l          #140, d0                                \n\t"\r
440                                                 "       bne                     reg_test_2_error                \n\t"\r
441                                                 "       move            a6, d0                                  \n\t"\r
442                                                 "       cmpi.l          #150, d0                                \n\t"\r
443                                                 "       bne                     reg_test_2_error                \n\t"\r
444                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
445                                                 "       addq            #1, d0                                  \n\t"\r
446                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
447                                                 "       bra                     reg_test_2_start                \n\t"\r
448                                                 "reg_test_2_error:                                              \n\t"\r
449                                                 "       bra                     reg_test_2_error                \n\t"\r
450                                         );\r
451 }\r
452 /*-----------------------------------------------------------*/\r
453 \r
454 \r
455 \r