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Comment the command line interpreter and lwIP sockets based server code.
[freertos] / Demo / ColdFire_MCF52221_CodeWarrior / sources / main.c
1 /*\r
2     FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.\r
3         \r
4 \r
5     ***************************************************************************\r
6      *                                                                       *\r
7      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
8      *    Complete, revised, and edited pdf reference manuals are also       *\r
9      *    available.                                                         *\r
10      *                                                                       *\r
11      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
12      *    ensuring you get running as quickly as possible and with an        *\r
13      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
14      *    the FreeRTOS project to continue with its mission of providing     *\r
15      *    professional grade, cross platform, de facto standard solutions    *\r
16      *    for microcontrollers - completely free of charge!                  *\r
17      *                                                                       *\r
18      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
19      *                                                                       *\r
20      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
21      *                                                                       *\r
22     ***************************************************************************\r
23 \r
24 \r
25     This file is part of the FreeRTOS distribution.\r
26 \r
27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
28     the terms of the GNU General Public License (version 2) as published by the\r
29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
30     >>>NOTE<<< The modification to the GPL is included to allow you to\r
31     distribute a combined work that includes FreeRTOS without being obliged to\r
32     provide the source code for proprietary components outside of the FreeRTOS\r
33     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
34     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
35     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
36     more details. You should have received a copy of the GNU General Public\r
37     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
38     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
39     by writing to Richard Barry, contact details for whom are available on the\r
40     FreeRTOS WEB site.\r
41 \r
42     1 tab == 4 spaces!\r
43 \r
44     http://www.FreeRTOS.org - Documentation, latest information, license and\r
45     contact details.\r
46 \r
47     http://www.SafeRTOS.com - A version that is certified for use in safety\r
48     critical systems.\r
49 \r
50     http://www.OpenRTOS.com - Commercial support, development, porting,\r
51     licensing and training services.\r
52 */\r
53 \r
54 \r
55 /*\r
56  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
57  * documentation provides more details of the standard demo application tasks.\r
58  * In addition to the standard demo tasks, the following tasks and tests are\r
59  * defined and/or created within this file:\r
60  *\r
61  * "Check" task -  This only executes every five seconds but has a high priority\r
62  * to ensure it gets processor time.  Its main function is to check that all the\r
63  * standard demo tasks are still operational.  While no errors have been\r
64  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
65  * rate increasing to 500ms being a visual indication that at least one task has\r
66  * reported unexpected behaviour.\r
67  *\r
68  * "Reg test" tasks - These fill the registers with known values, then check\r
69  * that each register still contains its expected value.  Each task uses\r
70  * different values.  The tasks run with very low priority so get preempted very\r
71  * frequently.  A register containing an unexpected value is indicative of an\r
72  * error in the context switching mechanism.\r
73  *\r
74  */\r
75 \r
76 /* Standard includes. */\r
77 #include <stdio.h>\r
78 \r
79 /* Scheduler includes. */\r
80 #include "FreeRTOS.h"\r
81 #include "task.h"\r
82 #include "queue.h"\r
83 #include "semphr.h"\r
84 \r
85 /* Demo app includes. */\r
86 #include "BlockQ.h"\r
87 #include "crflash.h"\r
88 #include "partest.h"\r
89 #include "semtest.h"\r
90 #include "GenQTest.h"\r
91 #include "QPeek.h"\r
92 #include "comtest2.h"\r
93 \r
94 /*-----------------------------------------------------------*/\r
95 \r
96 /* The time between cycles of the 'check' functionality - as described at the\r
97 top of this file. */\r
98 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
99 \r
100 /* The rate at which the LED controlled by the 'check' task will flash should an\r
101 error have been detected. */\r
102 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
103 \r
104 /* The LED controlled by the 'check' task. */\r
105 #define mainCHECK_LED                                           ( 3 )\r
106 \r
107 /* ComTest constants - there is no free LED for the comtest tasks. */\r
108 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
109 #define mainCOM_TEST_LED                                        ( 5 )\r
110 \r
111 /* Task priorities. */\r
112 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
113 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
114 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
115 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
116 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
117 \r
118 /* Co-routines are used to flash the LEDs. */\r
119 #define mainNUM_FLASH_CO_ROUTINES                       ( 3 )\r
120 \r
121 /* The baud rate used by the comtest tasks. */\r
122 #define mainBAUD_RATE                                           ( 38400 )\r
123 \r
124 /* There is no spare LED for the comtest tasks, so this is set to an invalid\r
125 number. */\r
126 #define mainCOM_LED                                                     ( 4 )\r
127 \r
128 /*\r
129  * Configure the hardware for the demo.\r
130  */\r
131 static void prvSetupHardware( void );\r
132 \r
133 /*\r
134  * Implements the 'check' task functionality as described at the top of this\r
135  * file.\r
136  */\r
137 static void prvCheckTask( void *pvParameters );\r
138 \r
139 /*\r
140  * Implement the 'Reg test' functionality as described at the top of this file.\r
141  */\r
142 static void vRegTest1Task( void *pvParameters );\r
143 static void vRegTest2Task( void *pvParameters );\r
144 \r
145 /*-----------------------------------------------------------*/\r
146 \r
147 /* Counters used to detect errors within the reg test tasks. */\r
148 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
149 \r
150 /*-----------------------------------------------------------*/\r
151 \r
152 int main( void )\r
153 {\r
154         /* Setup the hardware ready for this demo. */\r
155         prvSetupHardware();\r
156 \r
157         /* Start the standard demo tasks. */\r
158         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
159         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
160         vStartQueuePeekTasks();\r
161         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
162         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_RATE, mainCOM_LED );\r
163 \r
164         /* For demo purposes use some co-routines to flash the LEDs. */\r
165         vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );\r
166 \r
167         /* Create the check task. */\r
168         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
169 \r
170 \r
171         /* Start the reg test tasks - defined in this file. */\r
172         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
173         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
174 \r
175         /* Start the scheduler. */\r
176         vTaskStartScheduler();\r
177 \r
178     /* Will only get here if there was insufficient memory to create the idle\r
179     task. */\r
180         for( ;; )\r
181         {\r
182         }\r
183 }\r
184 /*-----------------------------------------------------------*/\r
185 \r
186 static void prvCheckTask( void *pvParameters )\r
187 {\r
188 unsigned portLONG ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
189 portTickType xLastExecutionTime;\r
190 volatile unsigned portBASE_TYPE uxUnusedStack;\r
191 \r
192         ( void ) pvParameters;\r
193 \r
194         /* Initialise the variable used to control our iteration rate prior to\r
195         its first use. */\r
196         xLastExecutionTime = xTaskGetTickCount();\r
197 \r
198         for( ;; )\r
199         {\r
200                 /* Wait until it is time to run the tests again. */\r
201                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
202 \r
203                 /* Has an error been found in any task? */\r
204                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
205                 {\r
206                         ulError |= 0x01UL;\r
207                 }\r
208 \r
209                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
210                 {\r
211                         ulError |= 0x02UL;\r
212                 }\r
213 \r
214                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
215                 {\r
216                         ulError |= 0x04UL;\r
217                 }\r
218 \r
219                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
220             {\r
221                 ulError |= 0x20UL;\r
222             }\r
223             \r
224             if( xAreComTestTasksStillRunning() != pdTRUE )\r
225             {\r
226                 ulError |= 0x40UL;\r
227             }\r
228 \r
229                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
230                 {\r
231                         ulError |= 0x1000UL;\r
232                 }\r
233 \r
234                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
235                 {\r
236                         ulError |= 0x1000UL;\r
237                 }\r
238 \r
239                 ulLastRegTest1Count = ulRegTest1Counter;\r
240                 ulLastRegTest2Count = ulRegTest2Counter;\r
241 \r
242                 /* If an error has been found then increase our cycle rate, and in so\r
243                 doing increase the rate at which the check task LED toggles. */\r
244                 if( ulError != 0 )\r
245                 {\r
246                 ulTicksToWait = mainERROR_PERIOD;\r
247                 }\r
248 \r
249                 /* Toggle the LED each itteration. */\r
250                 vParTestToggleLED( mainCHECK_LED );\r
251                 \r
252                 /* For demo only - how much unused stack does this task have? */\r
253                 uxUnusedStack = uxTaskGetStackHighWaterMark( NULL );\r
254         }\r
255 }\r
256 /*-----------------------------------------------------------*/\r
257 \r
258 void prvSetupHardware( void )\r
259 {\r
260         portDISABLE_INTERRUPTS();\r
261 \r
262         /* Setup the port used to toggle LEDs. */\r
263         vParTestInitialise();\r
264 }\r
265 /*-----------------------------------------------------------*/\r
266 \r
267 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
268 {\r
269         /* This will get called if a stack overflow is detected during the context\r
270         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
271         problems within nested interrupts, but only do this for debug purposes as\r
272         it will increase the context switch time. */\r
273 \r
274         ( void ) pxTask;\r
275         ( void ) pcTaskName;\r
276 \r
277         for( ;; )\r
278         {\r
279         }\r
280 }\r
281 /*-----------------------------------------------------------*/\r
282 \r
283 void vApplicationIdleHook( void );\r
284 void vApplicationIdleHook( void )\r
285 {\r
286         /* The co-routines run in the idle task. */\r
287         vCoRoutineSchedule();\r
288 }\r
289 /*-----------------------------------------------------------*/\r
290 \r
291 void exit( int n )\r
292 {\r
293         /* To keep the linker happy only as the libraries have been removed from\r
294         the build. */\r
295         ( void ) n;\r
296         for( ;; ) {}\r
297 }\r
298 /*-----------------------------------------------------------*/\r
299 \r
300 static void vRegTest1Task( void *pvParameters )\r
301 {\r
302         /* Sanity check - did we receive the parameter expected? */\r
303         if( pvParameters != &ulRegTest1Counter )\r
304         {\r
305                 /* Change here so the check task can detect that an error occurred. */\r
306                 for( ;; )\r
307                 {\r
308                 }\r
309         }\r
310 \r
311         /* Set all the registers to known values, then check that each retains its\r
312         expected value - as described at the top of this file.  If an error is\r
313         found then the loop counter will no longer be incremented allowing the check\r
314         task to recognise the error. */\r
315         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
316                                                 "       moveq           #1, d0                                  \n\t"\r
317                                                 "       moveq           #2, d1                                  \n\t"\r
318                                                 "       moveq           #3, d2                                  \n\t"\r
319                                                 "       moveq           #4, d3                                  \n\t"\r
320                                                 "       moveq           #5, d4                                  \n\t"\r
321                                                 "       moveq           #6, d5                                  \n\t"\r
322                                                 "       moveq           #7, d6                                  \n\t"\r
323                                                 "       moveq           #8, d7                                  \n\t"\r
324                                                 "       move            #9, a0                                  \n\t"\r
325                                                 "       move            #10, a1                                 \n\t"\r
326                                                 "       move            #11, a2                                 \n\t"\r
327                                                 "       move            #12, a3                                 \n\t"\r
328                                                 "       move            #13, a4                                 \n\t"\r
329                                                 "       move            #14, a5                                 \n\t"\r
330                                                 "       move            #15, a6                                 \n\t"\r
331                                                 "                                                                               \n\t"\r
332                                                 "       cmpi.l          #1, d0                                  \n\t"\r
333                                                 "       bne                     reg_test_1_error                \n\t"\r
334                                                 "       cmpi.l          #2, d1                                  \n\t"\r
335                                                 "       bne                     reg_test_1_error                \n\t"\r
336                                                 "       cmpi.l          #3, d2                                  \n\t"\r
337                                                 "       bne                     reg_test_1_error                \n\t"\r
338                                                 "       cmpi.l          #4, d3                                  \n\t"\r
339                                                 "       bne                     reg_test_1_error                \n\t"\r
340                                                 "       cmpi.l          #5, d4                                  \n\t"\r
341                                                 "       bne                     reg_test_1_error                \n\t"\r
342                                                 "       cmpi.l          #6, d5                                  \n\t"\r
343                                                 "       bne                     reg_test_1_error                \n\t"\r
344                                                 "       cmpi.l          #7, d6                                  \n\t"\r
345                                                 "       bne                     reg_test_1_error                \n\t"\r
346                                                 "       cmpi.l          #8, d7                                  \n\t"\r
347                                                 "       bne                     reg_test_1_error                \n\t"\r
348                                                 "       move            a0, d0                                  \n\t"\r
349                                                 "       cmpi.l          #9, d0                                  \n\t"\r
350                                                 "       bne                     reg_test_1_error                \n\t"\r
351                                                 "       move            a1, d0                                  \n\t"\r
352                                                 "       cmpi.l          #10, d0                                 \n\t"\r
353                                                 "       bne                     reg_test_1_error                \n\t"\r
354                                                 "       move            a2, d0                                  \n\t"\r
355                                                 "       cmpi.l          #11, d0                                 \n\t"\r
356                                                 "       bne                     reg_test_1_error                \n\t"\r
357                                                 "       move            a3, d0                                  \n\t"\r
358                                                 "       cmpi.l          #12, d0                                 \n\t"\r
359                                                 "       bne                     reg_test_1_error                \n\t"\r
360                                                 "       move            a4, d0                                  \n\t"\r
361                                                 "       cmpi.l          #13, d0                                 \n\t"\r
362                                                 "       bne                     reg_test_1_error                \n\t"\r
363                                                 "       move            a5, d0                                  \n\t"\r
364                                                 "       cmpi.l          #14, d0                                 \n\t"\r
365                                                 "       bne                     reg_test_1_error                \n\t"\r
366                                                 "       move            a6, d0                                  \n\t"\r
367                                                 "       cmpi.l          #15, d0                                 \n\t"\r
368                                                 "       bne                     reg_test_1_error                \n\t"\r
369                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
370                                                 "       addq            #1, d0                                  \n\t"\r
371                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
372                                                 "       bra                     reg_test_1_start                \n\t"\r
373                                                 "reg_test_1_error:                                              \n\t"\r
374                                                 "       bra                     reg_test_1_error                \n\t"\r
375                                         );\r
376 }\r
377 /*-----------------------------------------------------------*/\r
378 \r
379 static void vRegTest2Task( void *pvParameters )\r
380 {\r
381         /* Sanity check - did we receive the parameter expected? */\r
382         if( pvParameters != &ulRegTest2Counter )\r
383         {\r
384                 /* Change here so the check task can detect that an error occurred. */\r
385                 for( ;; )\r
386                 {\r
387                 }\r
388         }\r
389 \r
390         /* Set all the registers to known values, then check that each retains its\r
391         expected value - as described at the top of this file.  If an error is\r
392         found then the loop counter will no longer be incremented allowing the check\r
393         task to recognise the error. */\r
394         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
395                                                 "       moveq           #10, d0                                 \n\t"\r
396                                                 "       moveq           #20, d1                                 \n\t"\r
397                                                 "       moveq           #30, d2                                 \n\t"\r
398                                                 "       moveq           #40, d3                                 \n\t"\r
399                                                 "       moveq           #50, d4                                 \n\t"\r
400                                                 "       moveq           #60, d5                                 \n\t"\r
401                                                 "       moveq           #70, d6                                 \n\t"\r
402                                                 "       moveq           #80, d7                                 \n\t"\r
403                                                 "       move            #90, a0                                 \n\t"\r
404                                                 "       move            #100, a1                                \n\t"\r
405                                                 "       move            #110, a2                                \n\t"\r
406                                                 "       move            #120, a3                                \n\t"\r
407                                                 "       move            #130, a4                                \n\t"\r
408                                                 "       move            #140, a5                                \n\t"\r
409                                                 "       move            #150, a6                                \n\t"\r
410                                                 "                                                                               \n\t"\r
411                                                 "       cmpi.l          #10, d0                                 \n\t"\r
412                                                 "       bne                     reg_test_2_error                \n\t"\r
413                                                 "       cmpi.l          #20, d1                                 \n\t"\r
414                                                 "       bne                     reg_test_2_error                \n\t"\r
415                                                 "       cmpi.l          #30, d2                                 \n\t"\r
416                                                 "       bne                     reg_test_2_error                \n\t"\r
417                                                 "       cmpi.l          #40, d3                                 \n\t"\r
418                                                 "       bne                     reg_test_2_error                \n\t"\r
419                                                 "       cmpi.l          #50, d4                                 \n\t"\r
420                                                 "       bne                     reg_test_2_error                \n\t"\r
421                                                 "       cmpi.l          #60, d5                                 \n\t"\r
422                                                 "       bne                     reg_test_2_error                \n\t"\r
423                                                 "       cmpi.l          #70, d6                                 \n\t"\r
424                                                 "       bne                     reg_test_2_error                \n\t"\r
425                                                 "       cmpi.l          #80, d7                                 \n\t"\r
426                                                 "       bne                     reg_test_2_error                \n\t"\r
427                                                 "       move            a0, d0                                  \n\t"\r
428                                                 "       cmpi.l          #90, d0                                 \n\t"\r
429                                                 "       bne                     reg_test_2_error                \n\t"\r
430                                                 "       move            a1, d0                                  \n\t"\r
431                                                 "       cmpi.l          #100, d0                                \n\t"\r
432                                                 "       bne                     reg_test_2_error                \n\t"\r
433                                                 "       move            a2, d0                                  \n\t"\r
434                                                 "       cmpi.l          #110, d0                                \n\t"\r
435                                                 "       bne                     reg_test_2_error                \n\t"\r
436                                                 "       move            a3, d0                                  \n\t"\r
437                                                 "       cmpi.l          #120, d0                                \n\t"\r
438                                                 "       bne                     reg_test_2_error                \n\t"\r
439                                                 "       move            a4, d0                                  \n\t"\r
440                                                 "       cmpi.l          #130, d0                                \n\t"\r
441                                                 "       bne                     reg_test_2_error                \n\t"\r
442                                                 "       move            a5, d0                                  \n\t"\r
443                                                 "       cmpi.l          #140, d0                                \n\t"\r
444                                                 "       bne                     reg_test_2_error                \n\t"\r
445                                                 "       move            a6, d0                                  \n\t"\r
446                                                 "       cmpi.l          #150, d0                                \n\t"\r
447                                                 "       bne                     reg_test_2_error                \n\t"\r
448                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
449                                                 "       addq            #1, d0                                  \n\t"\r
450                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
451                                                 "       bra                     reg_test_2_start                \n\t"\r
452                                                 "reg_test_2_error:                                              \n\t"\r
453                                                 "       bra                     reg_test_2_error                \n\t"\r
454                                         );\r
455 }\r
456 /*-----------------------------------------------------------*/\r
457 \r
458 \r
459 \r