git.sur5r.net Git - freertos/blob - Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c

   1 /*\r
   2         FreeRTOS.org V5.0.4 - Copyright (C) 2003-2008 Richard Barry.\r
   3 \r
   4         This file is part of the FreeRTOS.org distribution.\r
   5 \r
   6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
   7         it under the terms of the GNU General Public License as published by\r
   8         the Free Software Foundation; either version 2 of the License, or\r
   9         (at your option) any later version.\r
  10 \r
  11         FreeRTOS.org is distributed in the hope that it will be useful,\r
  12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  14         GNU General Public License for more details.\r
  15 \r
  16         You should have received a copy of the GNU General Public License\r
  17         along with FreeRTOS.org; if not, write to the Free Software\r
  18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
  19 \r
  20         A special exception to the GPL can be applied should you wish to distribute\r
  21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
  22         the source code for any proprietary components.  See the licensing section\r
  23         of http://www.FreeRTOS.org for full details of how and when the exception\r
  24         can be applied.\r
  25 \r
  26     ***************************************************************************\r
  27     ***************************************************************************\r
  28     *                                                                         *\r
  29     * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *\r
  30     * and even write all or part of your application on your behalf.          *\r
  31     * See http://www.OpenRTOS.com for details of the services we provide to   *\r
  32     * expedite your project.                                                  *\r
  33     *                                                                         *\r
  34     ***************************************************************************\r
  35     ***************************************************************************\r
  36 \r
  37         Please ensure to read the configuration and relevant port sections of the\r
  38         online documentation.\r
  39 \r
  40         http://www.FreeRTOS.org - Documentation, latest information, license and\r
  41         contact details.\r
  42 \r
  43         http://www.SafeRTOS.com - A version that is certified for use in safety\r
  44         critical systems.\r
  45 \r
  46         http://www.OpenRTOS.com - Commercial support, development, porting,\r
  47         licensing and training services.\r
  48 */\r
  49 \r
  50 \r
  51 /*\r
  52  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
  53  * documentation provides more details of the standard demo application tasks.\r
  54  * In addition to the standard demo tasks, the following tasks and tests are\r
  55  * defined and/or created within this file:\r
  56  *\r
  57  * "Check" task -  This only executes every five seconds but has a high priority\r
  58  * to ensure it gets processor time.  Its main function is to check that all the\r
  59  * standard demo tasks are still operational.  While no errors have been\r
  60  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
  61  * rate increasing to 500ms being a visual indication that at least one task has\r
  62  * reported unexpected behaviour.\r
  63  *\r
  64  * "Reg test" tasks - These fill the registers with known values, then check\r
  65  * that each register still contains its expected value.  Each task uses\r
  66  * different values.  The tasks run with very low priority so get preempted very\r
  67  * frequently.  A register containing an unexpected value is indicative of an\r
  68  * error in the context switching mechanism.\r
  69  *\r
  70  */\r
  71 \r
  72 /* Standard includes. */\r
  73 #include <stdio.h>\r
  74 \r
  75 /* Scheduler includes. */\r
  76 #include "FreeRTOS.h"\r
  77 #include "task.h"\r
  78 #include "queue.h"\r
  79 #include "semphr.h"\r
  80 \r
  81 /* Demo app includes. */\r
  82 #include "BlockQ.h"\r
  83 #include "death.h"\r
  84 #include "flash.h"\r
  85 #include "partest.h"\r
  86 #include "semtest.h"\r
  87 #include "PollQ.h"\r
  88 #include "GenQTest.h"\r
  89 #include "QPeek.h"\r
  90 #include "recmutex.h"\r
  91 \r
  92 /*-----------------------------------------------------------*/\r
  93 \r
  94 /* The time between cycles of the 'check' functionality - as described at the\r
  95 top of this file. */\r
  96 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
  97 \r
  98 /* The rate at which the LED controlled by the 'check' task will flash should an\r
  99 error have been detected. */\r
 100 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
 101 \r
 102 /* The LED controlled by the 'check' task. */\r
 103 #define mainCHECK_LED                                           ( 3 )\r
 104 \r
 105 /* ComTest constants - there is no free LED for the comtest tasks. */\r
 106 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
 107 #define mainCOM_TEST_LED                                        ( 5 )\r
 108 \r
 109 /* Task priorities. */\r
 110 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
 111 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
 112 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
 113 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
 114 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
 115 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
 116 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
 117 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
 118 #define mainWEB_TASK_PRIORITY                   ( tskIDLE_PRIORITY + 2 )\r
 119 \r
 120 /*\r
 121  * Configure the hardware for the demo.\r
 122  */\r
 123 static void prvSetupHardware( void );\r
 124 \r
 125 /*\r
 126  * Implements the 'check' task functionality as described at the top of this\r
 127  * file.\r
 128  */\r
 129 static void prvCheckTask( void *pvParameters );\r
 130 \r
 131 /*\r
 132  * Implement the 'Reg test' functionality as described at the top of this file.\r
 133  */\r
 134 static void vRegTest1Task( void *pvParameters );\r
 135 static void vRegTest2Task( void *pvParameters );\r
 136 \r
 137 /*-----------------------------------------------------------*/\r
 138 \r
 139 /* Counters used to detect errors within the reg test tasks. */\r
 140 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
 141 \r
 142 /*-----------------------------------------------------------*/\r
 143 \r
 144 int main( void )\r
 145 {\r
 146         /* Setup the hardware ready for this demo. */\r
 147         prvSetupHardware();\r
 148 \r
 149         /* Start the standard demo tasks. */\r
 150         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
 151         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
 152         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
 153         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
 154         vStartQueuePeekTasks();\r
 155         vStartRecursiveMutexTasks();\r
 156         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
 157 \r
 158         /* Start the reg test tasks - defined in this file. */\r
 159         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
 160         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
 161 \r
 162         /* Create the check task. */\r
 163         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
 164 \r
 165         /* The suicide tasks must be created last as they need to know how many\r
 166         tasks were running prior to their creation in order to ascertain whether\r
 167         or not the correct/expected number of tasks are running at any given time. */\r
 168     vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
 169 \r
 170         /* Start the scheduler. */\r
 171         vTaskStartScheduler();\r
 172 \r
 173     /* Will only get here if there was insufficient memory to create the idle\r
 174     task. */\r
 175         for( ;; )\r
 176         {\r
 177         }\r
 178 }\r
 179 /*-----------------------------------------------------------*/\r
 180 \r
 181 static void prvCheckTask( void *pvParameters )\r
 182 {\r
 183 unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
 184 portTickType xLastExecutionTime;\r
 185 \r
 186         ( void ) pvParameters;\r
 187 \r
 188         /* Initialise the variable used to control our iteration rate prior to\r
 189         its first use. */\r
 190         xLastExecutionTime = xTaskGetTickCount();\r
 191 \r
 192         for( ;; )\r
 193         {\r
 194                 /* Wait until it is time to run the tests again. */\r
 195                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
 196 \r
 197                 /* Has an error been found in any task? */\r
 198                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
 199                 {\r
 200                         ulError |= 0x01UL;\r
 201                 }\r
 202 \r
 203                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
 204                 {\r
 205                         ulError |= 0x02UL;\r
 206                 }\r
 207 \r
 208                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
 209                 {\r
 210                         ulError |= 0x04UL;\r
 211                 }\r
 212 \r
 213                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
 214             {\r
 215                 ulError |= 0x20UL;\r
 216             }\r
 217 \r
 218                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
 219             {\r
 220                 ulError |= 0x40UL;\r
 221             }\r
 222 \r
 223                 if( xIsCreateTaskStillRunning() != pdTRUE )\r
 224             {\r
 225                 ulError |= 0x80UL;\r
 226             }\r
 227 \r
 228                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
 229             {\r
 230                 ulError |= 0x200UL;\r
 231             }\r
 232 \r
 233                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
 234                 {\r
 235                         ulError |= 0x1000UL;\r
 236                 }\r
 237 \r
 238                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
 239                 {\r
 240                         ulError |= 0x1000UL;\r
 241                 }\r
 242 \r
 243                 ulLastRegTest1Count = ulRegTest1Counter;\r
 244                 ulLastRegTest2Count = ulRegTest2Counter;\r
 245 \r
 246                 /* If an error has been found then increase our cycle rate, and in so\r
 247                 going increase the rate at which the check task LED toggles. */\r
 248                 if( ulError != 0 )\r
 249                 {\r
 250                 ulTicksToWait = mainERROR_PERIOD;\r
 251                 }\r
 252 \r
 253                 /* Toggle the LED each itteration. */\r
 254                 vParTestToggleLED( mainCHECK_LED );\r
 255         }\r
 256 }\r
 257 /*-----------------------------------------------------------*/\r
 258 \r
 259 void prvSetupHardware( void )\r
 260 {\r
 261         portDISABLE_INTERRUPTS();\r
 262 \r
 263         /* Setup the port used to toggle LEDs. */\r
 264         vParTestInitialise();\r
 265 }\r
 266 /*-----------------------------------------------------------*/\r
 267 \r
 268 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
 269 {\r
 270         /* This will get called if a stack overflow is detected during the context\r
 271         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
 272         problems within nested interrupts, but only do this for debug purposes as\r
 273         it will increase the context switch time. */\r
 274 \r
 275         ( void ) pxTask;\r
 276         ( void ) pcTaskName;\r
 277 \r
 278         for( ;; )\r
 279         {\r
 280         }\r
 281 }\r
 282 /*-----------------------------------------------------------*/\r
 283 \r
 284 static void vRegTest1Task( void *pvParameters )\r
 285 {\r
 286         /* Sanity check - did we receive the parameter expected? */\r
 287         if( pvParameters != &ulRegTest1Counter )\r
 288         {\r
 289                 /* Change here so the check task can detect that an error occurred. */\r
 290                 for( ;; )\r
 291                 {\r
 292                 }\r
 293         }\r
 294 \r
 295         /* Set all the registers to known values, then check that each retains its\r
 296         expected value - as described at the top of this file.  If an error is\r
 297         found then the loop counter will no longer be incremented allowing the check\r
 298         task to recognise the error. */\r
 299         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
 300                                                 "       moveq           #1, d0                                  \n\t"\r
 301                                                 "       moveq           #2, d1                                  \n\t"\r
 302                                                 "       moveq           #3, d2                                  \n\t"\r
 303                                                 "       moveq           #4, d3                                  \n\t"\r
 304                                                 "       moveq           #5, d4                                  \n\t"\r
 305                                                 "       moveq           #6, d5                                  \n\t"\r
 306                                                 "       moveq           #7, d6                                  \n\t"\r
 307                                                 "       moveq           #8, d7                                  \n\t"\r
 308                                                 "       move            #9, a0                                  \n\t"\r
 309                                                 "       move            #10, a1                                 \n\t"\r
 310                                                 "       move            #11, a2                                 \n\t"\r
 311                                                 "       move            #12, a3                                 \n\t"\r
 312                                                 "       move            #13, a4                                 \n\t"\r
 313                                                 "       move            #14, a5                                 \n\t"\r
 314                                                 "       move            #15, a6                                 \n\t"\r
 315                                                 "                                                                               \n\t"\r
 316                                                 "       cmpi.l          #1, d0                                  \n\t"\r
 317                                                 "       bne                     reg_test_1_error                \n\t"\r
 318                                                 "       cmpi.l          #2, d1                                  \n\t"\r
 319                                                 "       bne                     reg_test_1_error                \n\t"\r
 320                                                 "       cmpi.l          #3, d2                                  \n\t"\r
 321                                                 "       bne                     reg_test_1_error                \n\t"\r
 322                                                 "       cmpi.l          #4, d3                                  \n\t"\r
 323                                                 "       bne                     reg_test_1_error                \n\t"\r
 324                                                 "       cmpi.l          #5, d4                                  \n\t"\r
 325                                                 "       bne                     reg_test_1_error                \n\t"\r
 326                                                 "       cmpi.l          #6, d5                                  \n\t"\r
 327                                                 "       bne                     reg_test_1_error                \n\t"\r
 328                                                 "       cmpi.l          #7, d6                                  \n\t"\r
 329                                                 "       bne                     reg_test_1_error                \n\t"\r
 330                                                 "       cmpi.l          #8, d7                                  \n\t"\r
 331                                                 "       bne                     reg_test_1_error                \n\t"\r
 332                                                 "       move            a0, d0                                  \n\t"\r
 333                                                 "       cmpi.l          #9, d0                                  \n\t"\r
 334                                                 "       bne                     reg_test_1_error                \n\t"\r
 335                                                 "       move            a1, d0                                  \n\t"\r
 336                                                 "       cmpi.l          #10, d0                                 \n\t"\r
 337                                                 "       bne                     reg_test_1_error                \n\t"\r
 338                                                 "       move            a2, d0                                  \n\t"\r
 339                                                 "       cmpi.l          #11, d0                                 \n\t"\r
 340                                                 "       bne                     reg_test_1_error                \n\t"\r
 341                                                 "       move            a3, d0                                  \n\t"\r
 342                                                 "       cmpi.l          #12, d0                                 \n\t"\r
 343                                                 "       bne                     reg_test_1_error                \n\t"\r
 344                                                 "       move            a4, d0                                  \n\t"\r
 345                                                 "       cmpi.l          #13, d0                                 \n\t"\r
 346                                                 "       bne                     reg_test_1_error                \n\t"\r
 347                                                 "       move            a5, d0                                  \n\t"\r
 348                                                 "       cmpi.l          #14, d0                                 \n\t"\r
 349                                                 "       bne                     reg_test_1_error                \n\t"\r
 350                                                 "       move            a6, d0                                  \n\t"\r
 351                                                 "       cmpi.l          #15, d0                                 \n\t"\r
 352                                                 "       bne                     reg_test_1_error                \n\t"\r
 353                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
 354                                                 "       addq            #1, d0                                  \n\t"\r
 355                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
 356                                                 "       bra                     reg_test_1_start                \n\t"\r
 357                                                 "reg_test_1_error:                                              \n\t"\r
 358                                                 "       bra                     reg_test_1_error                \n\t"\r
 359                                         );\r
 360 }\r
 361 /*-----------------------------------------------------------*/\r
 362 \r
 363 static void vRegTest2Task( void *pvParameters )\r
 364 {\r
 365         /* Sanity check - did we receive the parameter expected? */\r
 366         if( pvParameters != &ulRegTest2Counter )\r
 367         {\r
 368                 /* Change here so the check task can detect that an error occurred. */\r
 369                 for( ;; )\r
 370                 {\r
 371                 }\r
 372         }\r
 373 \r
 374         /* Set all the registers to known values, then check that each retains its\r
 375         expected value - as described at the top of this file.  If an error is\r
 376         found then the loop counter will no longer be incremented allowing the check\r
 377         task to recognise the error. */\r
 378         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
 379                                                 "       moveq           #10, d0                                 \n\t"\r
 380                                                 "       moveq           #20, d1                                 \n\t"\r
 381                                                 "       moveq           #30, d2                                 \n\t"\r
 382                                                 "       moveq           #40, d3                                 \n\t"\r
 383                                                 "       moveq           #50, d4                                 \n\t"\r
 384                                                 "       moveq           #60, d5                                 \n\t"\r
 385                                                 "       moveq           #70, d6                                 \n\t"\r
 386                                                 "       moveq           #80, d7                                 \n\t"\r
 387                                                 "       move            #90, a0                                 \n\t"\r
 388                                                 "       move            #100, a1                                \n\t"\r
 389                                                 "       move            #110, a2                                \n\t"\r
 390                                                 "       move            #120, a3                                \n\t"\r
 391                                                 "       move            #130, a4                                \n\t"\r
 392                                                 "       move            #140, a5                                \n\t"\r
 393                                                 "       move            #150, a6                                \n\t"\r
 394                                                 "                                                                               \n\t"\r
 395                                                 "       cmpi.l          #10, d0                                 \n\t"\r
 396                                                 "       bne                     reg_test_2_error                \n\t"\r
 397                                                 "       cmpi.l          #20, d1                                 \n\t"\r
 398                                                 "       bne                     reg_test_2_error                \n\t"\r
 399                                                 "       cmpi.l          #30, d2                                 \n\t"\r
 400                                                 "       bne                     reg_test_2_error                \n\t"\r
 401                                                 "       cmpi.l          #40, d3                                 \n\t"\r
 402                                                 "       bne                     reg_test_2_error                \n\t"\r
 403                                                 "       cmpi.l          #50, d4                                 \n\t"\r
 404                                                 "       bne                     reg_test_2_error                \n\t"\r
 405                                                 "       cmpi.l          #60, d5                                 \n\t"\r
 406                                                 "       bne                     reg_test_2_error                \n\t"\r
 407                                                 "       cmpi.l          #70, d6                                 \n\t"\r
 408                                                 "       bne                     reg_test_2_error                \n\t"\r
 409                                                 "       cmpi.l          #80, d7                                 \n\t"\r
 410                                                 "       bne                     reg_test_2_error                \n\t"\r
 411                                                 "       move            a0, d0                                  \n\t"\r
 412                                                 "       cmpi.l          #90, d0                                 \n\t"\r
 413                                                 "       bne                     reg_test_2_error                \n\t"\r
 414                                                 "       move            a1, d0                                  \n\t"\r
 415                                                 "       cmpi.l          #100, d0                                \n\t"\r
 416                                                 "       bne                     reg_test_2_error                \n\t"\r
 417                                                 "       move            a2, d0                                  \n\t"\r
 418                                                 "       cmpi.l          #110, d0                                \n\t"\r
 419                                                 "       bne                     reg_test_2_error                \n\t"\r
 420                                                 "       move            a3, d0                                  \n\t"\r
 421                                                 "       cmpi.l          #120, d0                                \n\t"\r
 422                                                 "       bne                     reg_test_2_error                \n\t"\r
 423                                                 "       move            a4, d0                                  \n\t"\r
 424                                                 "       cmpi.l          #130, d0                                \n\t"\r
 425                                                 "       bne                     reg_test_2_error                \n\t"\r
 426                                                 "       move            a5, d0                                  \n\t"\r
 427                                                 "       cmpi.l          #140, d0                                \n\t"\r
 428                                                 "       bne                     reg_test_2_error                \n\t"\r
 429                                                 "       move            a6, d0                                  \n\t"\r
 430                                                 "       cmpi.l          #150, d0                                \n\t"\r
 431                                                 "       bne                     reg_test_2_error                \n\t"\r
 432                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
 433                                                 "       addq            #1, d0                                  \n\t"\r
 434                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
 435                                                 "       bra                     reg_test_2_start                \n\t"\r
 436                                                 "reg_test_2_error:                                              \n\t"\r
 437                                                 "       bra                     reg_test_2_error                \n\t"\r
 438                                         );\r
 439 }\r
 440 /*-----------------------------------------------------------*/\r
 441 \r
 442 /* To keep the linker happy. */\r
 443 void exit( int n )\r
 444 {\r
 445         ( void ) n;\r
 446         for( ;; ) {}\r
 447 }\r
 448 \r
 449 \r