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1 /*\r
2         FreeRTOS.org V5.1.2 - Copyright (C) 2003-2009 Richard Barry.\r
3 \r
4         This file is part of the FreeRTOS.org distribution.\r
5 \r
6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
7         it under the terms of the GNU General Public License as published by\r
8         the Free Software Foundation; either version 2 of the License, or\r
9         (at your option) any later version.\r
10 \r
11         FreeRTOS.org is distributed in the hope that it will be useful,\r
12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
14         GNU General Public License for more details.\r
15 \r
16         You should have received a copy of the GNU General Public License\r
17         along with FreeRTOS.org; if not, write to the Free Software\r
18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
19 \r
20         A special exception to the GPL can be applied should you wish to distribute\r
21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
22         the source code for any proprietary components.  See the licensing section\r
23         of http://www.FreeRTOS.org for full details of how and when the exception\r
24         can be applied.\r
25 \r
26     ***************************************************************************\r
27     ***************************************************************************\r
28     *                                                                         *\r
29     * Get the FreeRTOS eBook!  See http://www.FreeRTOS.org/Documentation      *\r
30         *                                                                         *\r
31         * This is a concise, step by step, 'hands on' guide that describes both   *\r
32         * general multitasking concepts and FreeRTOS specifics. It presents and   *\r
33         * explains numerous examples that are written using the FreeRTOS API.     *\r
34         * Full source code for all the examples is provided in an accompanying    *\r
35         * .zip file.                                                              *\r
36     *                                                                         *\r
37     ***************************************************************************\r
38     ***************************************************************************\r
39 \r
40         Please ensure to read the configuration and relevant port sections of the\r
41         online documentation.\r
42 \r
43         http://www.FreeRTOS.org - Documentation, latest information, license and\r
44         contact details.\r
45 \r
46         http://www.SafeRTOS.com - A version that is certified for use in safety\r
47         critical systems.\r
48 \r
49         http://www.OpenRTOS.com - Commercial support, development, porting,\r
50         licensing and training services.\r
51 */\r
52 \r
53 \r
54 /*\r
55  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
56  * documentation provides more details of the standard demo application tasks.\r
57  * In addition to the standard demo tasks, the following tasks and tests are\r
58  * defined and/or created within this file:\r
59  *\r
60  * "Check" task -  This only executes every five seconds but has a high priority\r
61  * to ensure it gets processor time.  Its main function is to check that all the\r
62  * standard demo tasks are still operational.  While no errors have been\r
63  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
64  * rate increasing to 500ms being a visual indication that at least one task has\r
65  * reported unexpected behaviour.\r
66  *\r
67  * "Reg test" tasks - These fill the registers with known values, then check\r
68  * that each register still contains its expected value.  Each task uses\r
69  * different values.  The tasks run with very low priority so get preempted very\r
70  * frequently.  A register containing an unexpected value is indicative of an\r
71  * error in the context switching mechanism.\r
72  *\r
73  */\r
74 \r
75 /* Standard includes. */\r
76 #include <stdio.h>\r
77 \r
78 /* Scheduler includes. */\r
79 #include "FreeRTOS.h"\r
80 #include "task.h"\r
81 #include "queue.h"\r
82 #include "semphr.h"\r
83 \r
84 /* Demo app includes. */\r
85 #include "BlockQ.h"\r
86 #include "crflash.h"\r
87 #include "partest.h"\r
88 #include "semtest.h"\r
89 #include "GenQTest.h"\r
90 #include "QPeek.h"\r
91 #include "comtest2.h"\r
92 \r
93 /*-----------------------------------------------------------*/\r
94 \r
95 /* The time between cycles of the 'check' functionality - as described at the\r
96 top of this file. */\r
97 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
98 \r
99 /* The rate at which the LED controlled by the 'check' task will flash should an\r
100 error have been detected. */\r
101 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
102 \r
103 /* The LED controlled by the 'check' task. */\r
104 #define mainCHECK_LED                                           ( 3 )\r
105 \r
106 /* ComTest constants - there is no free LED for the comtest tasks. */\r
107 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
108 #define mainCOM_TEST_LED                                        ( 5 )\r
109 \r
110 /* Task priorities. */\r
111 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
112 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
113 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
114 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
115 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
116 \r
117 /* Co-routines are used to flash the LEDs. */\r
118 #define mainNUM_FLASH_CO_ROUTINES                       ( 3 )\r
119 \r
120 /* The baud rate used by the comtest tasks. */\r
121 #define mainBAUD_RATE                                           ( 38400 )\r
122 \r
123 /* There is no spare LED for the comtest tasks, so this is set to an invalid\r
124 number. */\r
125 #define mainCOM_LED                                                     ( 4 )\r
126 \r
127 /*\r
128  * Configure the hardware for the demo.\r
129  */\r
130 static void prvSetupHardware( void );\r
131 \r
132 /*\r
133  * Implements the 'check' task functionality as described at the top of this\r
134  * file.\r
135  */\r
136 static void prvCheckTask( void *pvParameters );\r
137 \r
138 /*\r
139  * Implement the 'Reg test' functionality as described at the top of this file.\r
140  */\r
141 static void vRegTest1Task( void *pvParameters );\r
142 static void vRegTest2Task( void *pvParameters );\r
143 \r
144 /*-----------------------------------------------------------*/\r
145 \r
146 /* Counters used to detect errors within the reg test tasks. */\r
147 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
148 \r
149 /*-----------------------------------------------------------*/\r
150 \r
151 int main( void )\r
152 {\r
153         /* Setup the hardware ready for this demo. */\r
154         prvSetupHardware();\r
155 \r
156         /* Start the standard demo tasks. */\r
157         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
158         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
159         vStartQueuePeekTasks();\r
160         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
161         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_RATE, mainCOM_LED );\r
162 \r
163         /* For demo purposes use some co-routines to flash the LEDs. */\r
164         vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );\r
165 \r
166         /* Create the check task. */\r
167         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
168 \r
169 \r
170         /* Start the reg test tasks - defined in this file. */\r
171         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
172         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
173 \r
174         /* Start the scheduler. */\r
175         vTaskStartScheduler();\r
176 \r
177     /* Will only get here if there was insufficient memory to create the idle\r
178     task. */\r
179         for( ;; )\r
180         {\r
181         }\r
182 }\r
183 /*-----------------------------------------------------------*/\r
184 \r
185 static void prvCheckTask( void *pvParameters )\r
186 {\r
187 unsigned portLONG ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
188 portTickType xLastExecutionTime;\r
189 volatile unsigned portBASE_TYPE uxUnusedStack;\r
190 \r
191         ( void ) pvParameters;\r
192 \r
193         /* Initialise the variable used to control our iteration rate prior to\r
194         its first use. */\r
195         xLastExecutionTime = xTaskGetTickCount();\r
196 \r
197         for( ;; )\r
198         {\r
199                 /* Wait until it is time to run the tests again. */\r
200                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
201 \r
202                 /* Has an error been found in any task? */\r
203                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
204                 {\r
205                         ulError |= 0x01UL;\r
206                 }\r
207 \r
208                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
209                 {\r
210                         ulError |= 0x02UL;\r
211                 }\r
212 \r
213                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
214                 {\r
215                         ulError |= 0x04UL;\r
216                 }\r
217 \r
218                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
219             {\r
220                 ulError |= 0x20UL;\r
221             }\r
222             \r
223             if( xAreComTestTasksStillRunning() != pdTRUE )\r
224             {\r
225                 ulError |= 0x40UL;\r
226             }\r
227 \r
228                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
229                 {\r
230                         ulError |= 0x1000UL;\r
231                 }\r
232 \r
233                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
234                 {\r
235                         ulError |= 0x1000UL;\r
236                 }\r
237 \r
238                 ulLastRegTest1Count = ulRegTest1Counter;\r
239                 ulLastRegTest2Count = ulRegTest2Counter;\r
240 \r
241                 /* If an error has been found then increase our cycle rate, and in so\r
242                 doing increase the rate at which the check task LED toggles. */\r
243                 if( ulError != 0 )\r
244                 {\r
245                 ulTicksToWait = mainERROR_PERIOD;\r
246                 }\r
247 \r
248                 /* Toggle the LED each itteration. */\r
249                 vParTestToggleLED( mainCHECK_LED );\r
250                 \r
251                 /* For demo only - how much unused stack does this task have? */\r
252                 uxUnusedStack = uxTaskGetStackHighWaterMark( NULL );\r
253         }\r
254 }\r
255 /*-----------------------------------------------------------*/\r
256 \r
257 void prvSetupHardware( void )\r
258 {\r
259         portDISABLE_INTERRUPTS();\r
260 \r
261         /* Setup the port used to toggle LEDs. */\r
262         vParTestInitialise();\r
263 }\r
264 /*-----------------------------------------------------------*/\r
265 \r
266 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
267 {\r
268         /* This will get called if a stack overflow is detected during the context\r
269         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
270         problems within nested interrupts, but only do this for debug purposes as\r
271         it will increase the context switch time. */\r
272 \r
273         ( void ) pxTask;\r
274         ( void ) pcTaskName;\r
275 \r
276         for( ;; )\r
277         {\r
278         }\r
279 }\r
280 /*-----------------------------------------------------------*/\r
281 \r
282 void vApplicationIdleHook( void );\r
283 void vApplicationIdleHook( void )\r
284 {\r
285         /* The co-routines run in the idle task. */\r
286         vCoRoutineSchedule();\r
287 }\r
288 /*-----------------------------------------------------------*/\r
289 \r
290 void exit( int n )\r
291 {\r
292         /* To keep the linker happy only as the libraries have been removed from\r
293         the build. */\r
294         ( void ) n;\r
295         for( ;; ) {}\r
296 }\r
297 /*-----------------------------------------------------------*/\r
298 \r
299 static void vRegTest1Task( void *pvParameters )\r
300 {\r
301         /* Sanity check - did we receive the parameter expected? */\r
302         if( pvParameters != &ulRegTest1Counter )\r
303         {\r
304                 /* Change here so the check task can detect that an error occurred. */\r
305                 for( ;; )\r
306                 {\r
307                 }\r
308         }\r
309 \r
310         /* Set all the registers to known values, then check that each retains its\r
311         expected value - as described at the top of this file.  If an error is\r
312         found then the loop counter will no longer be incremented allowing the check\r
313         task to recognise the error. */\r
314         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
315                                                 "       moveq           #1, d0                                  \n\t"\r
316                                                 "       moveq           #2, d1                                  \n\t"\r
317                                                 "       moveq           #3, d2                                  \n\t"\r
318                                                 "       moveq           #4, d3                                  \n\t"\r
319                                                 "       moveq           #5, d4                                  \n\t"\r
320                                                 "       moveq           #6, d5                                  \n\t"\r
321                                                 "       moveq           #7, d6                                  \n\t"\r
322                                                 "       moveq           #8, d7                                  \n\t"\r
323                                                 "       move            #9, a0                                  \n\t"\r
324                                                 "       move            #10, a1                                 \n\t"\r
325                                                 "       move            #11, a2                                 \n\t"\r
326                                                 "       move            #12, a3                                 \n\t"\r
327                                                 "       move            #13, a4                                 \n\t"\r
328                                                 "       move            #14, a5                                 \n\t"\r
329                                                 "       move            #15, a6                                 \n\t"\r
330                                                 "                                                                               \n\t"\r
331                                                 "       cmpi.l          #1, d0                                  \n\t"\r
332                                                 "       bne                     reg_test_1_error                \n\t"\r
333                                                 "       cmpi.l          #2, d1                                  \n\t"\r
334                                                 "       bne                     reg_test_1_error                \n\t"\r
335                                                 "       cmpi.l          #3, d2                                  \n\t"\r
336                                                 "       bne                     reg_test_1_error                \n\t"\r
337                                                 "       cmpi.l          #4, d3                                  \n\t"\r
338                                                 "       bne                     reg_test_1_error                \n\t"\r
339                                                 "       cmpi.l          #5, d4                                  \n\t"\r
340                                                 "       bne                     reg_test_1_error                \n\t"\r
341                                                 "       cmpi.l          #6, d5                                  \n\t"\r
342                                                 "       bne                     reg_test_1_error                \n\t"\r
343                                                 "       cmpi.l          #7, d6                                  \n\t"\r
344                                                 "       bne                     reg_test_1_error                \n\t"\r
345                                                 "       cmpi.l          #8, d7                                  \n\t"\r
346                                                 "       bne                     reg_test_1_error                \n\t"\r
347                                                 "       move            a0, d0                                  \n\t"\r
348                                                 "       cmpi.l          #9, d0                                  \n\t"\r
349                                                 "       bne                     reg_test_1_error                \n\t"\r
350                                                 "       move            a1, d0                                  \n\t"\r
351                                                 "       cmpi.l          #10, d0                                 \n\t"\r
352                                                 "       bne                     reg_test_1_error                \n\t"\r
353                                                 "       move            a2, d0                                  \n\t"\r
354                                                 "       cmpi.l          #11, d0                                 \n\t"\r
355                                                 "       bne                     reg_test_1_error                \n\t"\r
356                                                 "       move            a3, d0                                  \n\t"\r
357                                                 "       cmpi.l          #12, d0                                 \n\t"\r
358                                                 "       bne                     reg_test_1_error                \n\t"\r
359                                                 "       move            a4, d0                                  \n\t"\r
360                                                 "       cmpi.l          #13, d0                                 \n\t"\r
361                                                 "       bne                     reg_test_1_error                \n\t"\r
362                                                 "       move            a5, d0                                  \n\t"\r
363                                                 "       cmpi.l          #14, d0                                 \n\t"\r
364                                                 "       bne                     reg_test_1_error                \n\t"\r
365                                                 "       move            a6, d0                                  \n\t"\r
366                                                 "       cmpi.l          #15, d0                                 \n\t"\r
367                                                 "       bne                     reg_test_1_error                \n\t"\r
368                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
369                                                 "       addq            #1, d0                                  \n\t"\r
370                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
371                                                 "       bra                     reg_test_1_start                \n\t"\r
372                                                 "reg_test_1_error:                                              \n\t"\r
373                                                 "       bra                     reg_test_1_error                \n\t"\r
374                                         );\r
375 }\r
376 /*-----------------------------------------------------------*/\r
377 \r
378 static void vRegTest2Task( void *pvParameters )\r
379 {\r
380         /* Sanity check - did we receive the parameter expected? */\r
381         if( pvParameters != &ulRegTest2Counter )\r
382         {\r
383                 /* Change here so the check task can detect that an error occurred. */\r
384                 for( ;; )\r
385                 {\r
386                 }\r
387         }\r
388 \r
389         /* Set all the registers to known values, then check that each retains its\r
390         expected value - as described at the top of this file.  If an error is\r
391         found then the loop counter will no longer be incremented allowing the check\r
392         task to recognise the error. */\r
393         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
394                                                 "       moveq           #10, d0                                 \n\t"\r
395                                                 "       moveq           #20, d1                                 \n\t"\r
396                                                 "       moveq           #30, d2                                 \n\t"\r
397                                                 "       moveq           #40, d3                                 \n\t"\r
398                                                 "       moveq           #50, d4                                 \n\t"\r
399                                                 "       moveq           #60, d5                                 \n\t"\r
400                                                 "       moveq           #70, d6                                 \n\t"\r
401                                                 "       moveq           #80, d7                                 \n\t"\r
402                                                 "       move            #90, a0                                 \n\t"\r
403                                                 "       move            #100, a1                                \n\t"\r
404                                                 "       move            #110, a2                                \n\t"\r
405                                                 "       move            #120, a3                                \n\t"\r
406                                                 "       move            #130, a4                                \n\t"\r
407                                                 "       move            #140, a5                                \n\t"\r
408                                                 "       move            #150, a6                                \n\t"\r
409                                                 "                                                                               \n\t"\r
410                                                 "       cmpi.l          #10, d0                                 \n\t"\r
411                                                 "       bne                     reg_test_2_error                \n\t"\r
412                                                 "       cmpi.l          #20, d1                                 \n\t"\r
413                                                 "       bne                     reg_test_2_error                \n\t"\r
414                                                 "       cmpi.l          #30, d2                                 \n\t"\r
415                                                 "       bne                     reg_test_2_error                \n\t"\r
416                                                 "       cmpi.l          #40, d3                                 \n\t"\r
417                                                 "       bne                     reg_test_2_error                \n\t"\r
418                                                 "       cmpi.l          #50, d4                                 \n\t"\r
419                                                 "       bne                     reg_test_2_error                \n\t"\r
420                                                 "       cmpi.l          #60, d5                                 \n\t"\r
421                                                 "       bne                     reg_test_2_error                \n\t"\r
422                                                 "       cmpi.l          #70, d6                                 \n\t"\r
423                                                 "       bne                     reg_test_2_error                \n\t"\r
424                                                 "       cmpi.l          #80, d7                                 \n\t"\r
425                                                 "       bne                     reg_test_2_error                \n\t"\r
426                                                 "       move            a0, d0                                  \n\t"\r
427                                                 "       cmpi.l          #90, d0                                 \n\t"\r
428                                                 "       bne                     reg_test_2_error                \n\t"\r
429                                                 "       move            a1, d0                                  \n\t"\r
430                                                 "       cmpi.l          #100, d0                                \n\t"\r
431                                                 "       bne                     reg_test_2_error                \n\t"\r
432                                                 "       move            a2, d0                                  \n\t"\r
433                                                 "       cmpi.l          #110, d0                                \n\t"\r
434                                                 "       bne                     reg_test_2_error                \n\t"\r
435                                                 "       move            a3, d0                                  \n\t"\r
436                                                 "       cmpi.l          #120, d0                                \n\t"\r
437                                                 "       bne                     reg_test_2_error                \n\t"\r
438                                                 "       move            a4, d0                                  \n\t"\r
439                                                 "       cmpi.l          #130, d0                                \n\t"\r
440                                                 "       bne                     reg_test_2_error                \n\t"\r
441                                                 "       move            a5, d0                                  \n\t"\r
442                                                 "       cmpi.l          #140, d0                                \n\t"\r
443                                                 "       bne                     reg_test_2_error                \n\t"\r
444                                                 "       move            a6, d0                                  \n\t"\r
445                                                 "       cmpi.l          #150, d0                                \n\t"\r
446                                                 "       bne                     reg_test_2_error                \n\t"\r
447                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
448                                                 "       addq            #1, d0                                  \n\t"\r
449                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
450                                                 "       bra                     reg_test_2_start                \n\t"\r
451                                                 "reg_test_2_error:                                              \n\t"\r
452                                                 "       bra                     reg_test_2_error                \n\t"\r
453                                         );\r
454 }\r
455 /*-----------------------------------------------------------*/\r
456 \r
457 \r
458 \r