2 FreeRTOS.org V5.2.0 - Copyright (C) 2003-2009 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify it
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7 under the terms of the GNU General Public License (version 2) as published
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8 by the Free Software Foundation and modified by the FreeRTOS exception.
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10 FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT
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11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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15 You should have received a copy of the GNU General Public License along
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16 with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59
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17 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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19 A special exception to the GPL is included to allow you to distribute a
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20 combined work that includes FreeRTOS.org without being obliged to provide
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21 the source code for any proprietary components. See the licensing section
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22 of http://www.FreeRTOS.org for full details.
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25 ***************************************************************************
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27 * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *
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29 * This is a concise, step by step, 'hands on' guide that describes both *
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30 * general multitasking concepts and FreeRTOS specifics. It presents and *
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31 * explains numerous examples that are written using the FreeRTOS API. *
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32 * Full source code for all the examples is provided in an accompanying *
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35 ***************************************************************************
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39 Please ensure to read the configuration and relevant port sections of the
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40 online documentation.
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42 http://www.FreeRTOS.org - Documentation, latest information, license and
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45 http://www.SafeRTOS.com - A version that is certified for use in safety
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48 http://www.OpenRTOS.com - Commercial support, development, porting,
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49 licensing and training services.
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52 #include "FreeRTOS.h"
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55 /* Constants used to configure the interrupts. */
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56 #define portPRESCALE_VALUE 64
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57 #define portPRESCALE_REG_SETTING ( 5 << 8 )
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58 #define portPIT_INTERRUPT_ENABLED ( 0x08 )
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59 #define configPIT0_INTERRUPT_VECTOR ( 55 )
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62 * FreeRTOS.org requires two interrupts - a tick interrupt generated from a
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63 * timer source, and a spare interrupt vector used for context switching.
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64 * The configuration below uses PIT0 for the former, and vector 16 for the
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65 * latter. **IF YOUR APPLICATION HAS BOTH OF THESE INTERRUPTS FREE THEN YOU DO
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66 * NOT NEED TO CHANGE ANY OF THIS CODE** - otherwise instructions are provided
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67 * here for using alternative interrupt sources.
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69 * To change the tick interrupt source:
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71 * 1) Modify vApplicationSetupInterrupts() below to be correct for whichever
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72 * peripheral is to be used to generate the tick interrupt.
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74 * 2) Change the name of the function __cs3_isr_interrupt_119() defined within
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75 * this file to be correct for the interrupt vector used by the timer peripheral.
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76 * The name of the function should contain the vector number, so by default vector
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77 * number 119 is being used.
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79 * 3) Make sure the tick interrupt is cleared within the interrupt handler function.
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80 * Currently __cs3_isr_interrupt_119() clears the PIT0 interrupt.
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82 * To change the spare interrupt source:
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84 * 1) Modify vApplicationSetupInterrupts() below to be correct for whichever
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85 * interrupt vector is to be used. Make sure you use a spare interrupt on interrupt
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86 * controller 0, otherwise the register used to request context switches will also
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87 * require modification. By default vector 16 is used which is free on most MCF52xxx
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90 * 2) Change the definition of configYIELD_INTERRUPT_VECTOR within FreeRTOSConfig.h
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91 * to be correct for your chosen interrupt vector.
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93 * 3) Change the name of the function __cs3_isr_interrupt_80() within portasm.S
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94 * to be correct for whichever vector number is being used. By default interrupt
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95 * controller 0 vector number 16 is used, which corresponds to vector number 80.
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97 void vApplicationSetupInterrupts( void )
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99 const unsigned portSHORT usCompareMatchValue = ( ( configCPU_CLOCK_HZ / portPRESCALE_VALUE ) / configTICK_RATE_HZ );
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101 /* Configure interrupt priority and level and unmask interrupt for PIT0. */
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102 MCF_INTC0_ICR55 = ( 1 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );
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103 MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK55 );
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105 /* Do the same for vector 16 (interrupt controller 0). I don't think the
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106 write to MCF_INTC0_IMRH is actually required here but is included for
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108 MCF_INTC0_ICR16 = ( 0 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );
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109 MCF_INTC0_IMRH &= ~( MCF_INTC_IPRL_INT16 );
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111 /* Configure PIT0 to generate the RTOS tick. */
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112 MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;
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113 MCF_PIT0_PCSR = ( portPRESCALE_REG_SETTING | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );
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114 MCF_PIT0_PMR = usCompareMatchValue;
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116 /*-----------------------------------------------------------*/
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118 void __attribute__ ((interrupt)) __cs3_isr_interrupt_119( void )
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120 unsigned portLONG ulSavedInterruptMask;
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122 /* Clear the PIT0 interrupt. */
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123 MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;
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125 /* Increment the RTOS tick. */
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126 ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
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127 vTaskIncrementTick();
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128 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
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130 /* If we are using the pre-emptive scheduler then also request a
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131 context switch as incrementing the tick could have unblocked a task. */
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132 #if configUSE_PREEMPTION == 1
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