1 /* Coldfire C Header File
\r
2 * Copyright Freescale Semiconductor Inc
\r
3 * All rights reserved.
\r
5 * 2007/03/19 Revision: 0.91
\r
8 #ifndef __MCF52235_CLOCK_H__
\r
9 #define __MCF52235_CLOCK_H__
\r
12 /*********************************************************************
\r
14 * Clock Module (CLOCK)
\r
16 *********************************************************************/
\r
18 /* Register read/write macros */
\r
19 #define MCF_CLOCK_SYNCR (*(vuint16*)(&__IPSBAR[0x120000]))
\r
20 #define MCF_CLOCK_SYNSR (*(vuint8 *)(&__IPSBAR[0x120002]))
\r
21 #define MCF_CLOCK_LPCR (*(vuint8 *)(&__IPSBAR[0x120007]))
\r
22 #define MCF_CLOCK_CCHR (*(vuint8 *)(&__IPSBAR[0x120008]))
\r
23 #define MCF_CLOCK_RTCDR (*(vuint32*)(&__IPSBAR[0x12000C]))
\r
26 /* Bit definitions and macros for MCF_CLOCK_SYNCR */
\r
27 #define MCF_CLOCK_SYNCR_PLLEN (0x1)
\r
28 #define MCF_CLOCK_SYNCR_PLLMODE (0x2)
\r
29 #define MCF_CLOCK_SYNCR_CLKSRC (0x4)
\r
30 #define MCF_CLOCK_SYNCR_FWKUP (0x20)
\r
31 #define MCF_CLOCK_SYNCR_DISCLK (0x40)
\r
32 #define MCF_CLOCK_SYNCR_LOCEN (0x80)
\r
33 #define MCF_CLOCK_SYNCR_RFD(x) (((x)&0x7)<<0x8)
\r
34 #define MCF_CLOCK_SYNCR_LOCRE (0x800)
\r
35 #define MCF_CLOCK_SYNCR_MFD(x) (((x)&0x7)<<0xC)
\r
36 #define MCF_CLOCK_SYNCR_LOLRE (0x8000)
\r
38 /* Bit definitions and macros for MCF_CLOCK_SYNSR */
\r
39 #define MCF_CLOCK_SYNSR_LOCS (0x4)
\r
40 #define MCF_CLOCK_SYNSR_LOCK (0x8)
\r
41 #define MCF_CLOCK_SYNSR_LOCKS (0x10)
\r
42 #define MCF_CLOCK_SYNSR_EXTOSC (0x80)
\r
44 /* Bit definitions and macros for MCF_CLOCK_LPCR */
\r
45 #define MCF_CLOCK_LPCR_LPD(x) (((x)&0xF)<<0)
\r
47 /* Bit definitions and macros for MCF_CLOCK_CCHR */
\r
48 #define MCF_CLOCK_CCHR_CCHR(x) (((x)&0x7)<<0)
\r
50 /* Bit definitions and macros for MCF_CLOCK_RTCDR */
\r
51 #define MCF_CLOCK_RTCDR_RTCDF(x) (((x)&0xFFFFFFFF)<<0)
\r
54 #endif /* __MCF52235_CLOCK_H__ */
\r