1 /* Coldfire C Header File
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2 * Copyright Freescale Semiconductor Inc
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3 * All rights reserved.
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5 * 2007/03/19 Revision: 0.91
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8 #ifndef __MCF52235_EPHY_H__
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9 #define __MCF52235_EPHY_H__
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12 /*********************************************************************
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14 * Ethernet Physical Transceiver (EPHY)
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16 *********************************************************************/
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18 /* Register read/write macros */
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19 #define MCF_EPHY_EPHYCTL0 (*(vuint8 *)(&__IPSBAR[0x1E0000]))
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20 #define MCF_EPHY_EPHYCTL1 (*(vuint8 *)(&__IPSBAR[0x1E0001]))
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21 #define MCF_EPHY_EPHYSR (*(vuint8 *)(&__IPSBAR[0x1E0002]))
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24 /* Bit definitions and macros for MCF_EPHY_EPHYCTL0 */
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25 #define MCF_EPHY_EPHYCTL0_EPHYIEN (0x1)
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26 #define MCF_EPHY_EPHYCTL0_EPHYWAI (0x4)
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27 #define MCF_EPHY_EPHYCTL0_LEDEN (0x8)
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28 #define MCF_EPHY_EPHYCTL0_DIS10 (0x10)
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29 #define MCF_EPHY_EPHYCTL0_DIS100 (0x20)
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30 #define MCF_EPHY_EPHYCTL0_ANDIS (0x40)
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31 #define MCF_EPHY_EPHYCTL0_EPHYEN (0x80)
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33 /* Bit definitions and macros for MCF_EPHY_EPHYCTL1 */
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34 #define MCF_EPHY_EPHYCTL1_PHYADD(x) (((x)&0x1F)<<0)
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36 /* Bit definitions and macros for MCF_EPHY_EPHYSR */
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37 #define MCF_EPHY_EPHYSR_EPHYIF (0x1)
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38 #define MCF_EPHY_EPHYSR_10DIS (0x10)
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39 #define MCF_EPHY_EPHYSR_100DIS (0x20)
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42 #endif /* __MCF52235_EPHY_H__ */
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