1 /* Coldfire C Header File
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2 * Copyright Freescale Semiconductor Inc
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3 * All rights reserved.
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5 * 2007/03/19 Revision: 0.91
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8 #ifndef __MCF52235_RCM_H__
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9 #define __MCF52235_RCM_H__
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12 /*********************************************************************
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14 * Reset Controller Module (RCM)
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16 *********************************************************************/
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18 /* Register read/write macros */
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19 #define MCF_RCM_RCR (*(vuint8 *)(&__IPSBAR[0x110000]))
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20 #define MCF_RCM_RSR (*(vuint8 *)(&__IPSBAR[0x110001]))
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21 #define MCF_RCM_CCR (*(vuint16*)(&__IPSBAR[0x110004]))
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22 #define MCF_RCM_CIR (*(vuint16*)(&__IPSBAR[0x11000A]))
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24 /* Bit definitions and macros for MCF_RCM_RCR */
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25 #define MCF_RCM_RCR_LVDE (0x1)
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26 #define MCF_RCM_RCR_LVDRE (0x4)
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27 #define MCF_RCM_RCR_LVDIE (0x8)
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28 #define MCF_RCM_RCR_LVDF (0x10)
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29 #define MCF_RCM_RCR_FRCRSTOUT (0x40)
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30 #define MCF_RCM_RCR_SOFTRST (0x80)
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32 /* Bit definitions and macros for MCF_RCM_RSR */
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33 #define MCF_RCM_RSR_LOL (0x1)
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34 #define MCF_RCM_RSR_LOC (0x2)
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35 #define MCF_RCM_RSR_EXT (0x4)
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36 #define MCF_RCM_RSR_POR (0x8)
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37 #define MCF_RCM_RSR_WDR (0x10)
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38 #define MCF_RCM_RSR_SOFT (0x20)
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39 #define MCF_RCM_RSR_LVD (0x40)
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41 /* Bit definitions and macros for MCF_RCM_CCR */
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42 #define MCF_RCM_CCR_LOAD (0x8000)
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45 #endif /* __MCF52235_RCM_H__ */
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