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1 /*\r
2     FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.\r
3 \r
4     This file is part of the FreeRTOS distribution.\r
5 \r
6     FreeRTOS is free software; you can redistribute it and/or modify it    under\r
7     the terms of the GNU General Public License (version 2) as published by the\r
8     Free Software Foundation and modified by the FreeRTOS exception.\r
9     **NOTE** The exception to the GPL is included to allow you to distribute a\r
10     combined work that includes FreeRTOS without being obliged to provide the\r
11     source code for proprietary components outside of the FreeRTOS kernel.\r
12     Alternative commercial license and support terms are also available upon\r
13     request.  See the licensing section of http://www.FreeRTOS.org for full\r
14     license details.\r
15 \r
16     FreeRTOS is distributed in the hope that it will be useful,    but WITHOUT\r
17     ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
18     FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
19     more details.\r
20 \r
21     You should have received a copy of the GNU General Public License along\r
22     with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
23     Temple Place, Suite 330, Boston, MA  02111-1307  USA.\r
24 \r
25 \r
26     ***************************************************************************\r
27     *                                                                         *\r
28     * The FreeRTOS eBook and reference manual are available to purchase for a *\r
29     * small fee. Help yourself get started quickly while also helping the     *\r
30     * FreeRTOS project! See http://www.FreeRTOS.org/Documentation for details *\r
31     *                                                                         *\r
32     ***************************************************************************\r
33 \r
34     1 tab == 4 spaces!\r
35 \r
36     Please ensure to read the configuration and relevant port sections of the\r
37     online documentation.\r
38 \r
39     http://www.FreeRTOS.org - Documentation, latest information, license and\r
40     contact details.\r
41 \r
42     http://www.SafeRTOS.com - A version that is certified for use in safety\r
43     critical systems.\r
44 \r
45     http://www.OpenRTOS.com - Commercial support, development, porting,\r
46     licensing and training services.\r
47 */\r
48 \r
49 \r
50 /*\r
51  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
52  * documentation provides more details of the standard demo application tasks.\r
53  * In addition to the standard demo tasks, the following tasks and tests are\r
54  * defined and/or created within this file:\r
55  *\r
56  * "uIP" task -  This is the task that handles the uIP stack.  All TCP/IP\r
57  * processing is performed in this task.  It manages the WEB server functionality.\r
58  *\r
59  * "Check" task -  This only executes every five seconds but has a high priority\r
60  * to ensure it gets processor time.  Its main function is to check that all the\r
61  * standard demo tasks are still operational.  An error found in any task will be\r
62  * latched in the ulErrorCode variable for display through the WEB server (the\r
63  * error code is displayed at the foot of the table that contains information on\r
64  * the state of each task).\r
65  *\r
66  * "Reg test" tasks - These fill the registers with known values, then check\r
67  * that each register still contains its expected value.  Each task uses\r
68  * different values.  The tasks run with very low priority so get preempted very\r
69  * frequently.  A register containing an unexpected value is indicative of an\r
70  * error in the context switching mechanism.\r
71  *\r
72  */\r
73 \r
74 /* Standard includes. */\r
75 #include <stdio.h>\r
76 \r
77 /* Scheduler includes. */\r
78 #include "FreeRTOS.h"\r
79 #include "task.h"\r
80 #include "queue.h"\r
81 #include "semphr.h"\r
82 \r
83 /* Demo app includes. */\r
84 #include "BlockQ.h"\r
85 #include "death.h"\r
86 #include "blocktim.h"\r
87 #include "flash.h"\r
88 #include "partest.h"\r
89 #include "semtest.h"\r
90 #include "PollQ.h"\r
91 #include "GenQTest.h"\r
92 #include "QPeek.h"\r
93 #include "recmutex.h"\r
94 #include "IntQueue.h"\r
95 #include "comtest2.h"\r
96 \r
97 /*-----------------------------------------------------------*/\r
98 \r
99 /* The time between cycles of the 'check' functionality - as described at the\r
100 top of this file. */\r
101 #define mainCHECK_TASK_PERIOD                                   ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
102 \r
103 /* Task priorities. */\r
104 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
105 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
106 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
107 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
108 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
109 \r
110 /* The WEB server task uses more stack than most other tasks because of its\r
111 reliance on using sprintf(). */\r
112 #define mainBASIC_WEB_STACK_SIZE                        ( configMINIMAL_STACK_SIZE * 2 )\r
113 \r
114 /*\r
115  * Configure the hardware for the demo.\r
116  */\r
117 static void prvSetupHardware( void );\r
118 \r
119 /*\r
120  * Implements the 'check' task functionality as described at the top of this\r
121  * file.\r
122  */\r
123 static void prvCheckTask( void *pvParameters );\r
124 \r
125 /*\r
126  * The task that implements the WEB server.\r
127  */\r
128 extern void vuIP_Task( void *pvParameters );\r
129 \r
130 /*\r
131  * Implement the 'Reg test' functionality as described at the top of this file.\r
132  */\r
133 static void vRegTest1Task( void *pvParameters );\r
134 static void vRegTest2Task( void *pvParameters );\r
135 \r
136 /*-----------------------------------------------------------*/\r
137 \r
138 /* Counters used to detect errors within the reg test tasks. */\r
139 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
140 \r
141 /* Any errors that the check task finds in any tasks are latched into \r
142 ulErrorCode, and then displayed via the WEB server. */\r
143 static unsigned portLONG ulErrorCode = 0UL;\r
144 \r
145 /*-----------------------------------------------------------*/\r
146 \r
147 int main( void )\r
148 {\r
149         /* Setup the hardware ready for this demo. */\r
150         prvSetupHardware();\r
151 \r
152         /* Create the WEB server task. */\r
153         xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
154 \r
155         /* Start the standard demo tasks. */\r
156         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
157         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
158     vCreateBlockTimeTasks();\r
159         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
160         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
161         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
162         vStartQueuePeekTasks();\r
163     vStartRecursiveMutexTasks();\r
164 \r
165         /* Start the reg test tasks - defined in this file. */\r
166         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
167         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
168 \r
169         /* Create the check task. */\r
170         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
171 \r
172         /* Start the scheduler. */\r
173         vTaskStartScheduler();\r
174 \r
175     /* Will only get here if there was insufficient heap to create the idle\r
176     task. */\r
177         for( ;; );\r
178 }\r
179 /*-----------------------------------------------------------*/\r
180 \r
181 static void prvCheckTask( void *pvParameters )\r
182 {\r
183 unsigned ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
184 portTickType xLastExecutionTime;\r
185 \r
186         /* To prevent compiler warnings. */\r
187         ( void ) pvParameters;\r
188 \r
189         /* Initialise the variable used to control our iteration rate prior to\r
190         its first use. */\r
191         xLastExecutionTime = xTaskGetTickCount();\r
192 \r
193         for( ;; )\r
194         {\r
195                 /* Wait until it is time to run the tests again. */\r
196                 vTaskDelayUntil( &xLastExecutionTime, mainCHECK_TASK_PERIOD );\r
197 \r
198                 /* Has an error been found in any task? */\r
199                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
200                 {\r
201                         ulErrorCode |= 0x01UL;\r
202                 }\r
203 \r
204                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
205                 {\r
206                         ulErrorCode |= 0x02UL;\r
207                 }\r
208 \r
209                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
210                 {\r
211                         ulErrorCode |= 0x04UL;\r
212                 }\r
213 \r
214                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
215             {\r
216                 ulErrorCode |= 0x20UL;\r
217             }\r
218 \r
219                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
220             {\r
221                 ulErrorCode |= 0x40UL;\r
222             }\r
223 \r
224                 if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
225                 {\r
226                         ulErrorCode |= 0x80UL;\r
227                 }\r
228 \r
229             if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
230             {\r
231                 ulErrorCode |= 0x100UL;\r
232             }\r
233 \r
234                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
235                 {\r
236                         ulErrorCode |= 0x200UL;\r
237                 }\r
238 \r
239                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
240                 {\r
241                         ulErrorCode |= 0x200UL;\r
242                 }\r
243 \r
244                 /* Remember the reg test counts so a stall in their values can be\r
245                 detected next time around. */\r
246                 ulLastRegTest1Count = ulRegTest1Counter;\r
247                 ulLastRegTest2Count = ulRegTest2Counter;\r
248         }\r
249 }\r
250 /*-----------------------------------------------------------*/\r
251 \r
252 unsigned portLONG ulGetErrorCode( void )\r
253 {\r
254         /* Returns the error code for display via the WEB server. */\r
255         return ulErrorCode;\r
256 }\r
257 /*-----------------------------------------------------------*/\r
258 \r
259 void prvSetupHardware( void )\r
260 {\r
261 __attribute__ ((section(".cfmconfig")))\r
262 static const unsigned long _cfm[6] = {\r
263         0, /* KEY_UPPER 0x00000400 */\r
264         0, /* KEY_LOWER 0x00000404 */\r
265         0, /* CFMPROT 0x00000408 */\r
266         0, /* CFMSACC 0x0000040C */\r
267         0, /* CFMDACC 0x00000410 */\r
268         0, /* CFMSEC 0x00000414 */\r
269 };\r
270 \r
271         /* Just to stop compiler warnings. */\r
272         ( void ) _cfm;\r
273 \r
274         /* Ensure the watchdog is disabled. */\r
275         MCF_SCM_CWCR = 0;\r
276 \r
277     /* Initialize IPSBAR (0x40000000). */\r
278         asm volatile(\r
279                 "move.l  #0x40000000,%d0        \n"\r
280                 "andi.l  #0xC0000000,%d0        \n"\r
281                 "add.l   #0x1,%d0                       \n"\r
282                 "move.l  %d0,0x40000000         "\r
283         );\r
284 \r
285     /* Initialize FLASHBAR (0x00) */\r
286         asm volatile(\r
287                 "move.l  #0x00,%d0                      \n"\r
288                 "andi.l  #0xFFF80000,%d0        \n"\r
289                 "add.l   #0x41,%d0                      \n"\r
290                 "movec   %d0,%FLASHBAR          "\r
291         );\r
292 \r
293         portDISABLE_INTERRUPTS();\r
294 \r
295         /* RAMBAR. */\r
296         MCF_SCM_RAMBAR = MCF_SCM_RAMBAR_BA( RAMBAR_ADDRESS ) | MCF_SCM_RAMBAR_BDE;\r
297 \r
298         /* Multiply 25MHz crystal by 12 to get 60MHz clock. */\r
299         MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD(4) | MCF_CLOCK_SYNCR_CLKSRC| MCF_CLOCK_SYNCR_PLLMODE | MCF_CLOCK_SYNCR_PLLEN ;\r
300         while (!(MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK))\r
301         {\r
302         }\r
303 \r
304         /* Setup the port used to toggle LEDs. */\r
305         vParTestInitialise();\r
306 }\r
307 /*-----------------------------------------------------------*/\r
308 \r
309 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
310 {\r
311         /* This will get called if a stack overflow is detected during the context\r
312         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
313         problems within nested interrupts, but only do this for debug purposes as\r
314         it will increase the context switch time. */\r
315 \r
316         ( void ) pxTask;\r
317         ( void ) pcTaskName;\r
318 \r
319         for( ;; );\r
320 }\r
321 /*-----------------------------------------------------------*/\r
322 \r
323 static void vRegTest1Task( void *pvParameters )\r
324 {\r
325         /* Sanity check - did we receive the parameter expected? */\r
326         if( pvParameters != &ulRegTest1Counter )\r
327         {\r
328                 /* Change here so the check task can detect that an error occurred. */\r
329                 for( ;; );\r
330         }\r
331 \r
332         /* Set all the registers to known values, then check that each retains its\r
333         expected value - as described at the top of this file.  If an error is\r
334         found then the loop counter will no longer be incremented allowing the check\r
335         task to recognise the error. */\r
336         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
337                                                 "       moveq           #1, %d0                                 \n\t"\r
338                                                 "       moveq           #2, %d1                                 \n\t"\r
339                                                 "       moveq           #3, %d2                                 \n\t"\r
340                                                 "       moveq           #4, %d3                                 \n\t"\r
341                                                 "       moveq           #5, %d4                                 \n\t"\r
342                                                 "       moveq           #6, %d5                                 \n\t"\r
343                                                 "       moveq           #7, %d6                                 \n\t"\r
344                                                 "       moveq           #8, %d7                                 \n\t"\r
345                                                 "       move            #9, %a0                                 \n\t"\r
346                                                 "       move            #10, %a1                                \n\t"\r
347                                                 "       move            #11, %a2                                \n\t"\r
348                                                 "       move            #12, %a3                                \n\t"\r
349                                                 "       move            #13, %a4                                \n\t"\r
350                                                 "       move            #14, %a5                                \n\t"\r
351                                                 "       move            #15, %a6                                \n\t"\r
352                                                 "                                                                               \n\t"\r
353                                                 "       cmpi.l          #1, %d0                                 \n\t"\r
354                                                 "       bne                     reg_test_1_error                \n\t"\r
355                                                 "       cmpi.l          #2, %d1                                 \n\t"\r
356                                                 "       bne                     reg_test_1_error                \n\t"\r
357                                                 "       cmpi.l          #3, %d2                                 \n\t"\r
358                                                 "       bne                     reg_test_1_error                \n\t"\r
359                                                 "       cmpi.l          #4, %d3                                 \n\t"\r
360                                                 "       bne                     reg_test_1_error                \n\t"\r
361                                                 "       cmpi.l          #5, %d4                                 \n\t"\r
362                                                 "       bne                     reg_test_1_error                \n\t"\r
363                                                 "       cmpi.l          #6, %d5                                 \n\t"\r
364                                                 "       bne                     reg_test_1_error                \n\t"\r
365                                                 "       cmpi.l          #7, %d6                                 \n\t"\r
366                                                 "       bne                     reg_test_1_error                \n\t"\r
367                                                 "       cmpi.l          #8, %d7                                 \n\t"\r
368                                                 "       bne                     reg_test_1_error                \n\t"\r
369                                                 "       move            %a0, %d0                                \n\t"\r
370                                                 "       cmpi.l          #9, %d0                                 \n\t"\r
371                                                 "       bne                     reg_test_1_error                \n\t"\r
372                                                 "       move            %a1, %d0                                \n\t"\r
373                                                 "       cmpi.l          #10, %d0                                \n\t"\r
374                                                 "       bne                     reg_test_1_error                \n\t"\r
375                                                 "       move            %a2, %d0                                \n\t"\r
376                                                 "       cmpi.l          #11, %d0                                \n\t"\r
377                                                 "       bne                     reg_test_1_error                \n\t"\r
378                                                 "       move            %a3, %d0                                \n\t"\r
379                                                 "       cmpi.l          #12, %d0                                \n\t"\r
380                                                 "       bne                     reg_test_1_error                \n\t"\r
381                                                 "       move            %a4, %d0                                \n\t"\r
382                                                 "       cmpi.l          #13, %d0                                \n\t"\r
383                                                 "       bne                     reg_test_1_error                \n\t"\r
384                                                 "       move            %a5, %d0                                \n\t"\r
385                                                 "       cmpi.l          #14, %d0                                \n\t"\r
386                                                 "       bne                     reg_test_1_error                \n\t"\r
387                                                 "       move            %a6, %d0                                \n\t"\r
388                                                 "       cmpi.l          #15, %d0                                \n\t"\r
389                                                 "       bne                     reg_test_1_error                \n\t"\r
390                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
391                                                 "       addql           #1, %d0                                 \n\t"\r
392                                                 "       movel           %d0, ulRegTest1Counter  \n\t"\r
393                                                 "       bra                     reg_test_1_start                \n\t"\r
394                                                 "reg_test_1_error:                                              \n\t"\r
395                                                 "       bra                     reg_test_1_error                \n\t"\r
396                                         );\r
397 }\r
398 /*-----------------------------------------------------------*/\r
399 \r
400 static void vRegTest2Task( void *pvParameters )\r
401 {\r
402         /* Sanity check - did we receive the parameter expected? */\r
403         if( pvParameters != &ulRegTest2Counter )\r
404         {\r
405                 /* Change here so the check task can detect that an error occurred. */\r
406                 for( ;; );\r
407         }\r
408 \r
409         /* Set all the registers to known values, then check that each retains its\r
410         expected value - as described at the top of this file.  If an error is\r
411         found then the loop counter will no longer be incremented allowing the check\r
412         task to recognise the error. */\r
413         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
414                                                 "       moveq           #10, %d0                                \n\t"\r
415                                                 "       moveq           #20, %d1                                \n\t"\r
416                                                 "       moveq           #30, %d2                                \n\t"\r
417                                                 "       moveq           #40, %d3                                \n\t"\r
418                                                 "       moveq           #50, %d4                                \n\t"\r
419                                                 "       moveq           #60, %d5                                \n\t"\r
420                                                 "       moveq           #70, %d6                                \n\t"\r
421                                                 "       moveq           #80, %d7                                \n\t"\r
422                                                 "       move            #90, %a0                                \n\t"\r
423                                                 "       move            #100, %a1                               \n\t"\r
424                                                 "       move            #110, %a2                               \n\t"\r
425                                                 "       move            #120, %a3                               \n\t"\r
426                                                 "       move            #130, %a4                               \n\t"\r
427                                                 "       move            #140, %a5                               \n\t"\r
428                                                 "       move            #150, %a6                               \n\t"\r
429                                                 "                                                                               \n\t"\r
430                                                 "       cmpi.l          #10, %d0                                \n\t"\r
431                                                 "       bne                     reg_test_2_error                \n\t"\r
432                                                 "       cmpi.l          #20, %d1                                \n\t"\r
433                                                 "       bne                     reg_test_2_error                \n\t"\r
434                                                 "       cmpi.l          #30, %d2                                \n\t"\r
435                                                 "       bne                     reg_test_2_error                \n\t"\r
436                                                 "       cmpi.l          #40, %d3                                \n\t"\r
437                                                 "       bne                     reg_test_2_error                \n\t"\r
438                                                 "       cmpi.l          #50, %d4                                \n\t"\r
439                                                 "       bne                     reg_test_2_error                \n\t"\r
440                                                 "       cmpi.l          #60, %d5                                \n\t"\r
441                                                 "       bne                     reg_test_2_error                \n\t"\r
442                                                 "       cmpi.l          #70, %d6                                \n\t"\r
443                                                 "       bne                     reg_test_2_error                \n\t"\r
444                                                 "       cmpi.l          #80, %d7                                \n\t"\r
445                                                 "       bne                     reg_test_2_error                \n\t"\r
446                                                 "       move            %a0, %d0                                \n\t"\r
447                                                 "       cmpi.l          #90, %d0                                \n\t"\r
448                                                 "       bne                     reg_test_2_error                \n\t"\r
449                                                 "       move            %a1, %d0                                \n\t"\r
450                                                 "       cmpi.l          #100, %d0                               \n\t"\r
451                                                 "       bne                     reg_test_2_error                \n\t"\r
452                                                 "       move            %a2, %d0                                \n\t"\r
453                                                 "       cmpi.l          #110, %d0                               \n\t"\r
454                                                 "       bne                     reg_test_2_error                \n\t"\r
455                                                 "       move            %a3, %d0                                \n\t"\r
456                                                 "       cmpi.l          #120, %d0                               \n\t"\r
457                                                 "       bne                     reg_test_2_error                \n\t"\r
458                                                 "       move            %a4, %d0                                \n\t"\r
459                                                 "       cmpi.l          #130, %d0                               \n\t"\r
460                                                 "       bne                     reg_test_2_error                \n\t"\r
461                                                 "       move            %a5, %d0                                \n\t"\r
462                                                 "       cmpi.l          #140, %d0                               \n\t"\r
463                                                 "       bne                     reg_test_2_error                \n\t"\r
464                                                 "       move            %a6, %d0                                \n\t"\r
465                                                 "       cmpi.l          #150, %d0                               \n\t"\r
466                                                 "       bne                     reg_test_2_error                \n\t"\r
467                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
468                                                 "       addql           #1, %d0                                 \n\t"\r
469                                                 "       movel           %d0, ulRegTest2Counter  \n\t"\r
470                                                 "       bra                     reg_test_2_start                \n\t"\r
471                                                 "reg_test_2_error:                                              \n\t"\r
472                                                 "       bra                     reg_test_2_error                \n\t"\r
473                                         );\r
474 }\r
475 /*-----------------------------------------------------------*/\r
476 \r