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1 /*\r
2         FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.\r
3 \r
4         This file is part of the FreeRTOS distribution.\r
5 \r
6         FreeRTOS is free software; you can redistribute it and/or modify it     under \r
7         the terms of the GNU General Public License (version 2) as published by the \r
8         Free Software Foundation and modified by the FreeRTOS exception.\r
9         **NOTE** The exception to the GPL is included to allow you to distribute a\r
10         combined work that includes FreeRTOS without being obliged to provide the \r
11         source code for proprietary components outside of the FreeRTOS kernel.  \r
12         Alternative commercial license and support terms are also available upon \r
13         request.  See the licensing section of http://www.FreeRTOS.org for full \r
14         license details.\r
15 \r
16         FreeRTOS is distributed in the hope that it will be useful,     but WITHOUT\r
17         ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
18         FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
19         more details.\r
20 \r
21         You should have received a copy of the GNU General Public License along\r
22         with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
23         Temple Place, Suite 330, Boston, MA  02111-1307  USA.\r
24 \r
25 \r
26         ***************************************************************************\r
27         *                                                                         *\r
28         * Looking for a quick start?  Then check out the FreeRTOS eBook!          *\r
29         * See http://www.FreeRTOS.org/Documentation for details                   *\r
30         *                                                                         *\r
31         ***************************************************************************\r
32 \r
33         1 tab == 4 spaces!\r
34 \r
35         Please ensure to read the configuration and relevant port sections of the\r
36         online documentation.\r
37 \r
38         http://www.FreeRTOS.org - Documentation, latest information, license and\r
39         contact details.\r
40 \r
41         http://www.SafeRTOS.com - A version that is certified for use in safety\r
42         critical systems.\r
43 \r
44         http://www.OpenRTOS.com - Commercial support, development, porting,\r
45         licensing and training services.\r
46 */\r
47 \r
48 \r
49 /*\r
50  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
51  * documentation provides more details of the standard demo application tasks.\r
52  * In addition to the standard demo tasks, the following tasks and tests are\r
53  * defined and/or created within this file:\r
54  *\r
55  * "uIP" task -  This is the task that handles the uIP stack.  All TCP/IP\r
56  * processing is performed in this task.  It manages the WEB server functionality.\r
57  *\r
58  * "Check" task -  This only executes every five seconds but has a high priority\r
59  * to ensure it gets processor time.  Its main function is to check that all the\r
60  * standard demo tasks are still operational.  An error found in any task will be\r
61  * latched in the ulErrorCode variable for display through the WEB server (the\r
62  * error code is displayed at the foot of the table that contains information on\r
63  * the state of each task).\r
64  *\r
65  * "Reg test" tasks - These fill the registers with known values, then check\r
66  * that each register still contains its expected value.  Each task uses\r
67  * different values.  The tasks run with very low priority so get preempted very\r
68  * frequently.  A register containing an unexpected value is indicative of an\r
69  * error in the context switching mechanism.\r
70  *\r
71  */\r
72 \r
73 /* Standard includes. */\r
74 #include <stdio.h>\r
75 \r
76 /* Scheduler includes. */\r
77 #include "FreeRTOS.h"\r
78 #include "task.h"\r
79 #include "queue.h"\r
80 #include "semphr.h"\r
81 \r
82 /* Demo app includes. */\r
83 #include "BlockQ.h"\r
84 #include "death.h"\r
85 #include "blocktim.h"\r
86 #include "flash.h"\r
87 #include "partest.h"\r
88 #include "semtest.h"\r
89 #include "PollQ.h"\r
90 #include "GenQTest.h"\r
91 #include "QPeek.h"\r
92 #include "recmutex.h"\r
93 #include "IntQueue.h"\r
94 #include "comtest2.h"\r
95 \r
96 /*-----------------------------------------------------------*/\r
97 \r
98 /* The time between cycles of the 'check' functionality - as described at the\r
99 top of this file. */\r
100 #define mainCHECK_TASK_PERIOD                                   ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
101 \r
102 /* Task priorities. */\r
103 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
104 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
105 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
106 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
107 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
108 \r
109 /* The WEB server task uses more stack than most other tasks because of its\r
110 reliance on using sprintf(). */\r
111 #define mainBASIC_WEB_STACK_SIZE                        ( configMINIMAL_STACK_SIZE * 2 )\r
112 \r
113 /*\r
114  * Configure the hardware for the demo.\r
115  */\r
116 static void prvSetupHardware( void );\r
117 \r
118 /*\r
119  * Implements the 'check' task functionality as described at the top of this\r
120  * file.\r
121  */\r
122 static void prvCheckTask( void *pvParameters );\r
123 \r
124 /*\r
125  * The task that implements the WEB server.\r
126  */\r
127 extern void vuIP_Task( void *pvParameters );\r
128 \r
129 /*\r
130  * Implement the 'Reg test' functionality as described at the top of this file.\r
131  */\r
132 static void vRegTest1Task( void *pvParameters );\r
133 static void vRegTest2Task( void *pvParameters );\r
134 \r
135 /*-----------------------------------------------------------*/\r
136 \r
137 /* Counters used to detect errors within the reg test tasks. */\r
138 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
139 \r
140 /* Any errors that the check task finds in any tasks are latched into \r
141 ulErrorCode, and then displayed via the WEB server. */\r
142 static unsigned portLONG ulErrorCode = 0UL;\r
143 \r
144 /*-----------------------------------------------------------*/\r
145 \r
146 int main( void )\r
147 {\r
148         /* Setup the hardware ready for this demo. */\r
149         prvSetupHardware();\r
150 \r
151         /* Create the WEB server task. */\r
152         xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
153 \r
154         /* Start the standard demo tasks. */\r
155         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
156         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
157     vCreateBlockTimeTasks();\r
158         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
159         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
160         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
161         vStartQueuePeekTasks();\r
162     vStartRecursiveMutexTasks();\r
163 \r
164         /* Start the reg test tasks - defined in this file. */\r
165         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
166         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
167 \r
168         /* Create the check task. */\r
169         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
170 \r
171         /* Start the scheduler. */\r
172         vTaskStartScheduler();\r
173 \r
174     /* Will only get here if there was insufficient heap to create the idle\r
175     task. */\r
176         for( ;; );\r
177 }\r
178 /*-----------------------------------------------------------*/\r
179 \r
180 static void prvCheckTask( void *pvParameters )\r
181 {\r
182 unsigned ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
183 portTickType xLastExecutionTime;\r
184 \r
185         /* To prevent compiler warnings. */\r
186         ( void ) pvParameters;\r
187 \r
188         /* Initialise the variable used to control our iteration rate prior to\r
189         its first use. */\r
190         xLastExecutionTime = xTaskGetTickCount();\r
191 \r
192         for( ;; )\r
193         {\r
194                 /* Wait until it is time to run the tests again. */\r
195                 vTaskDelayUntil( &xLastExecutionTime, mainCHECK_TASK_PERIOD );\r
196 \r
197                 /* Has an error been found in any task? */\r
198                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
199                 {\r
200                         ulErrorCode |= 0x01UL;\r
201                 }\r
202 \r
203                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
204                 {\r
205                         ulErrorCode |= 0x02UL;\r
206                 }\r
207 \r
208                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
209                 {\r
210                         ulErrorCode |= 0x04UL;\r
211                 }\r
212 \r
213                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
214             {\r
215                 ulErrorCode |= 0x20UL;\r
216             }\r
217 \r
218                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
219             {\r
220                 ulErrorCode |= 0x40UL;\r
221             }\r
222 \r
223                 if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
224                 {\r
225                         ulErrorCode |= 0x80UL;\r
226                 }\r
227 \r
228             if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
229             {\r
230                 ulErrorCode |= 0x100UL;\r
231             }\r
232 \r
233                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
234                 {\r
235                         ulErrorCode |= 0x200UL;\r
236                 }\r
237 \r
238                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
239                 {\r
240                         ulErrorCode |= 0x200UL;\r
241                 }\r
242 \r
243                 /* Remember the reg test counts so a stall in their values can be\r
244                 detected next time around. */\r
245                 ulLastRegTest1Count = ulRegTest1Counter;\r
246                 ulLastRegTest2Count = ulRegTest2Counter;\r
247         }\r
248 }\r
249 /*-----------------------------------------------------------*/\r
250 \r
251 unsigned portLONG ulGetErrorCode( void )\r
252 {\r
253         /* Returns the error code for display via the WEB server. */\r
254         return ulErrorCode;\r
255 }\r
256 /*-----------------------------------------------------------*/\r
257 \r
258 void prvSetupHardware( void )\r
259 {\r
260 __attribute__ ((section(".cfmconfig")))\r
261 static const unsigned long _cfm[6] = {\r
262         0, /* KEY_UPPER 0x00000400 */\r
263         0, /* KEY_LOWER 0x00000404 */\r
264         0, /* CFMPROT 0x00000408 */\r
265         0, /* CFMSACC 0x0000040C */\r
266         0, /* CFMDACC 0x00000410 */\r
267         0, /* CFMSEC 0x00000414 */\r
268 };\r
269 \r
270         /* Just to stop compiler warnings. */\r
271         ( void ) _cfm;\r
272 \r
273         /* Ensure the watchdog is disabled. */\r
274         MCF_SCM_CWCR = 0;\r
275 \r
276     /* Initialize IPSBAR (0x40000000). */\r
277         asm volatile(\r
278                 "move.l  #0x40000000,%d0        \n"\r
279                 "andi.l  #0xC0000000,%d0        \n"\r
280                 "add.l   #0x1,%d0                       \n"\r
281                 "move.l  %d0,0x40000000         "\r
282         );\r
283 \r
284     /* Initialize FLASHBAR (0x00) */\r
285         asm volatile(\r
286                 "move.l  #0x00,%d0                      \n"\r
287                 "andi.l  #0xFFF80000,%d0        \n"\r
288                 "add.l   #0x41,%d0                      \n"\r
289                 "movec   %d0,%FLASHBAR          "\r
290         );\r
291 \r
292         portDISABLE_INTERRUPTS();\r
293 \r
294         /* RAMBAR. */\r
295         MCF_SCM_RAMBAR = MCF_SCM_RAMBAR_BA( RAMBAR_ADDRESS ) | MCF_SCM_RAMBAR_BDE;\r
296 \r
297         /* Multiply 25MHz crystal by 12 to get 60MHz clock. */\r
298         MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD(4) | MCF_CLOCK_SYNCR_CLKSRC| MCF_CLOCK_SYNCR_PLLMODE | MCF_CLOCK_SYNCR_PLLEN ;\r
299         while (!(MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK))\r
300         {\r
301         }\r
302 \r
303         /* Setup the port used to toggle LEDs. */\r
304         vParTestInitialise();\r
305 }\r
306 /*-----------------------------------------------------------*/\r
307 \r
308 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
309 {\r
310         /* This will get called if a stack overflow is detected during the context\r
311         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
312         problems within nested interrupts, but only do this for debug purposes as\r
313         it will increase the context switch time. */\r
314 \r
315         ( void ) pxTask;\r
316         ( void ) pcTaskName;\r
317 \r
318         for( ;; );\r
319 }\r
320 /*-----------------------------------------------------------*/\r
321 \r
322 static void vRegTest1Task( void *pvParameters )\r
323 {\r
324         /* Sanity check - did we receive the parameter expected? */\r
325         if( pvParameters != &ulRegTest1Counter )\r
326         {\r
327                 /* Change here so the check task can detect that an error occurred. */\r
328                 for( ;; );\r
329         }\r
330 \r
331         /* Set all the registers to known values, then check that each retains its\r
332         expected value - as described at the top of this file.  If an error is\r
333         found then the loop counter will no longer be incremented allowing the check\r
334         task to recognise the error. */\r
335         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
336                                                 "       moveq           #1, %d0                                 \n\t"\r
337                                                 "       moveq           #2, %d1                                 \n\t"\r
338                                                 "       moveq           #3, %d2                                 \n\t"\r
339                                                 "       moveq           #4, %d3                                 \n\t"\r
340                                                 "       moveq           #5, %d4                                 \n\t"\r
341                                                 "       moveq           #6, %d5                                 \n\t"\r
342                                                 "       moveq           #7, %d6                                 \n\t"\r
343                                                 "       moveq           #8, %d7                                 \n\t"\r
344                                                 "       move            #9, %a0                                 \n\t"\r
345                                                 "       move            #10, %a1                                \n\t"\r
346                                                 "       move            #11, %a2                                \n\t"\r
347                                                 "       move            #12, %a3                                \n\t"\r
348                                                 "       move            #13, %a4                                \n\t"\r
349                                                 "       move            #14, %a5                                \n\t"\r
350                                                 "       move            #15, %a6                                \n\t"\r
351                                                 "                                                                               \n\t"\r
352                                                 "       cmpi.l          #1, %d0                                 \n\t"\r
353                                                 "       bne                     reg_test_1_error                \n\t"\r
354                                                 "       cmpi.l          #2, %d1                                 \n\t"\r
355                                                 "       bne                     reg_test_1_error                \n\t"\r
356                                                 "       cmpi.l          #3, %d2                                 \n\t"\r
357                                                 "       bne                     reg_test_1_error                \n\t"\r
358                                                 "       cmpi.l          #4, %d3                                 \n\t"\r
359                                                 "       bne                     reg_test_1_error                \n\t"\r
360                                                 "       cmpi.l          #5, %d4                                 \n\t"\r
361                                                 "       bne                     reg_test_1_error                \n\t"\r
362                                                 "       cmpi.l          #6, %d5                                 \n\t"\r
363                                                 "       bne                     reg_test_1_error                \n\t"\r
364                                                 "       cmpi.l          #7, %d6                                 \n\t"\r
365                                                 "       bne                     reg_test_1_error                \n\t"\r
366                                                 "       cmpi.l          #8, %d7                                 \n\t"\r
367                                                 "       bne                     reg_test_1_error                \n\t"\r
368                                                 "       move            %a0, %d0                                \n\t"\r
369                                                 "       cmpi.l          #9, %d0                                 \n\t"\r
370                                                 "       bne                     reg_test_1_error                \n\t"\r
371                                                 "       move            %a1, %d0                                \n\t"\r
372                                                 "       cmpi.l          #10, %d0                                \n\t"\r
373                                                 "       bne                     reg_test_1_error                \n\t"\r
374                                                 "       move            %a2, %d0                                \n\t"\r
375                                                 "       cmpi.l          #11, %d0                                \n\t"\r
376                                                 "       bne                     reg_test_1_error                \n\t"\r
377                                                 "       move            %a3, %d0                                \n\t"\r
378                                                 "       cmpi.l          #12, %d0                                \n\t"\r
379                                                 "       bne                     reg_test_1_error                \n\t"\r
380                                                 "       move            %a4, %d0                                \n\t"\r
381                                                 "       cmpi.l          #13, %d0                                \n\t"\r
382                                                 "       bne                     reg_test_1_error                \n\t"\r
383                                                 "       move            %a5, %d0                                \n\t"\r
384                                                 "       cmpi.l          #14, %d0                                \n\t"\r
385                                                 "       bne                     reg_test_1_error                \n\t"\r
386                                                 "       move            %a6, %d0                                \n\t"\r
387                                                 "       cmpi.l          #15, %d0                                \n\t"\r
388                                                 "       bne                     reg_test_1_error                \n\t"\r
389                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
390                                                 "       addql           #1, %d0                                 \n\t"\r
391                                                 "       movel           %d0, ulRegTest1Counter  \n\t"\r
392                                                 "       bra                     reg_test_1_start                \n\t"\r
393                                                 "reg_test_1_error:                                              \n\t"\r
394                                                 "       bra                     reg_test_1_error                \n\t"\r
395                                         );\r
396 }\r
397 /*-----------------------------------------------------------*/\r
398 \r
399 static void vRegTest2Task( void *pvParameters )\r
400 {\r
401         /* Sanity check - did we receive the parameter expected? */\r
402         if( pvParameters != &ulRegTest2Counter )\r
403         {\r
404                 /* Change here so the check task can detect that an error occurred. */\r
405                 for( ;; );\r
406         }\r
407 \r
408         /* Set all the registers to known values, then check that each retains its\r
409         expected value - as described at the top of this file.  If an error is\r
410         found then the loop counter will no longer be incremented allowing the check\r
411         task to recognise the error. */\r
412         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
413                                                 "       moveq           #10, %d0                                \n\t"\r
414                                                 "       moveq           #20, %d1                                \n\t"\r
415                                                 "       moveq           #30, %d2                                \n\t"\r
416                                                 "       moveq           #40, %d3                                \n\t"\r
417                                                 "       moveq           #50, %d4                                \n\t"\r
418                                                 "       moveq           #60, %d5                                \n\t"\r
419                                                 "       moveq           #70, %d6                                \n\t"\r
420                                                 "       moveq           #80, %d7                                \n\t"\r
421                                                 "       move            #90, %a0                                \n\t"\r
422                                                 "       move            #100, %a1                               \n\t"\r
423                                                 "       move            #110, %a2                               \n\t"\r
424                                                 "       move            #120, %a3                               \n\t"\r
425                                                 "       move            #130, %a4                               \n\t"\r
426                                                 "       move            #140, %a5                               \n\t"\r
427                                                 "       move            #150, %a6                               \n\t"\r
428                                                 "                                                                               \n\t"\r
429                                                 "       cmpi.l          #10, %d0                                \n\t"\r
430                                                 "       bne                     reg_test_2_error                \n\t"\r
431                                                 "       cmpi.l          #20, %d1                                \n\t"\r
432                                                 "       bne                     reg_test_2_error                \n\t"\r
433                                                 "       cmpi.l          #30, %d2                                \n\t"\r
434                                                 "       bne                     reg_test_2_error                \n\t"\r
435                                                 "       cmpi.l          #40, %d3                                \n\t"\r
436                                                 "       bne                     reg_test_2_error                \n\t"\r
437                                                 "       cmpi.l          #50, %d4                                \n\t"\r
438                                                 "       bne                     reg_test_2_error                \n\t"\r
439                                                 "       cmpi.l          #60, %d5                                \n\t"\r
440                                                 "       bne                     reg_test_2_error                \n\t"\r
441                                                 "       cmpi.l          #70, %d6                                \n\t"\r
442                                                 "       bne                     reg_test_2_error                \n\t"\r
443                                                 "       cmpi.l          #80, %d7                                \n\t"\r
444                                                 "       bne                     reg_test_2_error                \n\t"\r
445                                                 "       move            %a0, %d0                                \n\t"\r
446                                                 "       cmpi.l          #90, %d0                                \n\t"\r
447                                                 "       bne                     reg_test_2_error                \n\t"\r
448                                                 "       move            %a1, %d0                                \n\t"\r
449                                                 "       cmpi.l          #100, %d0                               \n\t"\r
450                                                 "       bne                     reg_test_2_error                \n\t"\r
451                                                 "       move            %a2, %d0                                \n\t"\r
452                                                 "       cmpi.l          #110, %d0                               \n\t"\r
453                                                 "       bne                     reg_test_2_error                \n\t"\r
454                                                 "       move            %a3, %d0                                \n\t"\r
455                                                 "       cmpi.l          #120, %d0                               \n\t"\r
456                                                 "       bne                     reg_test_2_error                \n\t"\r
457                                                 "       move            %a4, %d0                                \n\t"\r
458                                                 "       cmpi.l          #130, %d0                               \n\t"\r
459                                                 "       bne                     reg_test_2_error                \n\t"\r
460                                                 "       move            %a5, %d0                                \n\t"\r
461                                                 "       cmpi.l          #140, %d0                               \n\t"\r
462                                                 "       bne                     reg_test_2_error                \n\t"\r
463                                                 "       move            %a6, %d0                                \n\t"\r
464                                                 "       cmpi.l          #150, %d0                               \n\t"\r
465                                                 "       bne                     reg_test_2_error                \n\t"\r
466                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
467                                                 "       addql           #1, %d0                                 \n\t"\r
468                                                 "       movel           %d0, ulRegTest2Counter  \n\t"\r
469                                                 "       bra                     reg_test_2_start                \n\t"\r
470                                                 "reg_test_2_error:                                              \n\t"\r
471                                                 "       bra                     reg_test_2_error                \n\t"\r
472                                         );\r
473 }\r
474 /*-----------------------------------------------------------*/\r
475 \r