git.sur5r.net Git - freertos/blob - Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/main.c

   1 /*\r
   2         FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.\r
   3 \r
   4         This file is part of the FreeRTOS.org distribution.\r
   5 \r
   6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
   7         it under the terms of the GNU General Public License as published by\r
   8         the Free Software Foundation; either version 2 of the License, or\r
   9         (at your option) any later version.\r
  10 \r
  11         FreeRTOS.org is distributed in the hope that it will be useful,\r
  12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  14         GNU General Public License for more details.\r
  15 \r
  16         You should have received a copy of the GNU General Public License\r
  17         along with FreeRTOS.org; if not, write to the Free Software\r
  18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
  19 \r
  20         A special exception to the GPL can be applied should you wish to distribute\r
  21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
  22         the source code for any proprietary components.  See the licensing section\r
  23         of http://www.FreeRTOS.org for full details of how and when the exception\r
  24         can be applied.\r
  25 \r
  26     ***************************************************************************\r
  27     ***************************************************************************\r
  28     *                                                                         *\r
  29     * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *\r
  30     * and even write all or part of your application on your behalf.          *\r
  31     * See http://www.OpenRTOS.com for details of the services we provide to   *\r
  32     * expedite your project.                                                  *\r
  33     *                                                                         *\r
  34     ***************************************************************************\r
  35     ***************************************************************************\r
  36 \r
  37         Please ensure to read the configuration and relevant port sections of the\r
  38         online documentation.\r
  39 \r
  40         http://www.FreeRTOS.org - Documentation, latest information, license and\r
  41         contact details.\r
  42 \r
  43         http://www.SafeRTOS.com - A version that is certified for use in safety\r
  44         critical systems.\r
  45 \r
  46         http://www.OpenRTOS.com - Commercial support, development, porting,\r
  47         licensing and training services.\r
  48 */\r
  49 \r
  50 \r
  51 /*\r
  52  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
  53  * documentation provides more details of the standard demo application tasks.\r
  54  * In addition to the standard demo tasks, the following tasks and tests are\r
  55  * defined and/or created within this file:\r
  56  *\r
  57  * "uIP" task -  This is the task that handles the uIP stack.  All TCP/IP\r
  58  * processing is performed in this task.  It manages the WEB server functionality.\r
  59  *\r
  60  * "Check" task -  This only executes every five seconds but has a high priority\r
  61  * to ensure it gets processor time.  Its main function is to check that all the\r
  62  * standard demo tasks are still operational.  An error found in any task will be\r
  63  * latched in the ulErrorCode variable for display through the WEB server (the\r
  64  * error code is displayed at the foot of the table that contains information on\r
  65  * the state of each task).\r
  66  *\r
  67  * "Reg test" tasks - These fill the registers with known values, then check\r
  68  * that each register still contains its expected value.  Each task uses\r
  69  * different values.  The tasks run with very low priority so get preempted very\r
  70  * frequently.  A register containing an unexpected value is indicative of an\r
  71  * error in the context switching mechanism.\r
  72  *\r
  73  */\r
  74 \r
  75 /* Standard includes. */\r
  76 #include <stdio.h>\r
  77 \r
  78 /* Scheduler includes. */\r
  79 #include "FreeRTOS.h"\r
  80 #include "task.h"\r
  81 #include "queue.h"\r
  82 #include "semphr.h"\r
  83 \r
  84 /* Demo app includes. */\r
  85 #include "BlockQ.h"\r
  86 #include "death.h"\r
  87 #include "blocktim.h"\r
  88 #include "flash.h"\r
  89 #include "partest.h"\r
  90 #include "semtest.h"\r
  91 #include "PollQ.h"\r
  92 #include "GenQTest.h"\r
  93 #include "QPeek.h"\r
  94 #include "recmutex.h"\r
  95 #include "IntQueue.h"\r
  96 #include "comtest2.h"\r
  97 \r
  98 /*-----------------------------------------------------------*/\r
  99 \r
 100 /* The time between cycles of the 'check' functionality - as described at the\r
 101 top of this file. */\r
 102 #define mainCHECK_TASK_PERIOD                                   ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
 103 \r
 104 /* Task priorities. */\r
 105 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
 106 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
 107 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
 108 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
 109 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
 110 \r
 111 /* The WEB server task uses more stack than most other tasks because of its\r
 112 reliance on using sprintf(). */\r
 113 #define mainBASIC_WEB_STACK_SIZE                        ( configMINIMAL_STACK_SIZE * 2 )\r
 114 \r
 115 /*\r
 116  * Configure the hardware for the demo.\r
 117  */\r
 118 static void prvSetupHardware( void );\r
 119 \r
 120 /*\r
 121  * Implements the 'check' task functionality as described at the top of this\r
 122  * file.\r
 123  */\r
 124 static void prvCheckTask( void *pvParameters );\r
 125 \r
 126 /*\r
 127  * The task that implements the WEB server.\r
 128  */\r
 129 extern void vuIP_Task( void *pvParameters );\r
 130 \r
 131 /*\r
 132  * Implement the 'Reg test' functionality as described at the top of this file.\r
 133  */\r
 134 static void vRegTest1Task( void *pvParameters );\r
 135 static void vRegTest2Task( void *pvParameters );\r
 136 \r
 137 /*-----------------------------------------------------------*/\r
 138 \r
 139 /* Counters used to detect errors within the reg test tasks. */\r
 140 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
 141 \r
 142 /* Any errors that the check task finds in any tasks are latched into \r
 143 ulErrorCode, and then displayed via the WEB server. */\r
 144 static unsigned portLONG ulErrorCode = 0UL;\r
 145 \r
 146 /*-----------------------------------------------------------*/\r
 147 \r
 148 int main( void )\r
 149 {\r
 150         /* Setup the hardware ready for this demo. */\r
 151         prvSetupHardware();\r
 152 \r
 153         /* Create the WEB server task. */\r
 154         xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
 155 \r
 156         /* Start the standard demo tasks. */\r
 157         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
 158         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
 159     vCreateBlockTimeTasks();\r
 160         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
 161         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
 162         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
 163         vStartQueuePeekTasks();\r
 164     vStartRecursiveMutexTasks();\r
 165 \r
 166         /* Start the reg test tasks - defined in this file. */\r
 167         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
 168         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
 169 \r
 170         /* Create the check task. */\r
 171         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
 172 \r
 173         /* Start the scheduler. */\r
 174         vTaskStartScheduler();\r
 175 \r
 176     /* Will only get here if there was insufficient heap to create the idle\r
 177     task. */\r
 178         for( ;; );\r
 179 }\r
 180 /*-----------------------------------------------------------*/\r
 181 \r
 182 static void prvCheckTask( void *pvParameters )\r
 183 {\r
 184 unsigned ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
 185 portTickType xLastExecutionTime;\r
 186 \r
 187         /* To prevent compiler warnings. */\r
 188         ( void ) pvParameters;\r
 189 \r
 190         /* Initialise the variable used to control our iteration rate prior to\r
 191         its first use. */\r
 192         xLastExecutionTime = xTaskGetTickCount();\r
 193 \r
 194         for( ;; )\r
 195         {\r
 196                 /* Wait until it is time to run the tests again. */\r
 197                 vTaskDelayUntil( &xLastExecutionTime, mainCHECK_TASK_PERIOD );\r
 198 \r
 199                 /* Has an error been found in any task? */\r
 200                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
 201                 {\r
 202                         ulErrorCode |= 0x01UL;\r
 203                 }\r
 204 \r
 205                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
 206                 {\r
 207                         ulErrorCode |= 0x02UL;\r
 208                 }\r
 209 \r
 210                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
 211                 {\r
 212                         ulErrorCode |= 0x04UL;\r
 213                 }\r
 214 \r
 215                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
 216             {\r
 217                 ulErrorCode |= 0x20UL;\r
 218             }\r
 219 \r
 220                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
 221             {\r
 222                 ulErrorCode |= 0x40UL;\r
 223             }\r
 224 \r
 225                 if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
 226                 {\r
 227                         ulErrorCode |= 0x80UL;\r
 228                 }\r
 229 \r
 230             if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
 231             {\r
 232                 ulErrorCode |= 0x100UL;\r
 233             }\r
 234 \r
 235                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
 236                 {\r
 237                         ulErrorCode |= 0x200UL;\r
 238                 }\r
 239 \r
 240                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
 241                 {\r
 242                         ulErrorCode |= 0x200UL;\r
 243                 }\r
 244 \r
 245                 /* Remember the reg test counts so a stall in their values can be\r
 246                 detected next time around. */\r
 247                 ulLastRegTest1Count = ulRegTest1Counter;\r
 248                 ulLastRegTest2Count = ulRegTest2Counter;\r
 249         }\r
 250 }\r
 251 /*-----------------------------------------------------------*/\r
 252 \r
 253 unsigned portLONG ulGetErrorCode( void )\r
 254 {\r
 255         /* Returns the error code for display via the WEB server. */\r
 256         return ulErrorCode;\r
 257 }\r
 258 /*-----------------------------------------------------------*/\r
 259 \r
 260 void prvSetupHardware( void )\r
 261 {\r
 262 __attribute__ ((section(".cfmconfig")))\r
 263 static const unsigned long _cfm[6] = {\r
 264         0, /* KEY_UPPER 0x00000400 */\r
 265         0, /* KEY_LOWER 0x00000404 */\r
 266         0, /* CFMPROT 0x00000408 */\r
 267         0, /* CFMSACC 0x0000040C */\r
 268         0, /* CFMDACC 0x00000410 */\r
 269         0, /* CFMSEC 0x00000414 */\r
 270 };\r
 271 \r
 272         /* Just to stop compiler warnings. */\r
 273         ( void ) _cfm;\r
 274 \r
 275         /* Ensure the watchdog is disabled. */\r
 276         MCF_SCM_CWCR = 0;\r
 277 \r
 278     /* Initialize IPSBAR (0x40000000). */\r
 279         asm volatile(\r
 280                 "move.l  #0x40000000,%d0        \n"\r
 281                 "andi.l  #0xC0000000,%d0        \n"\r
 282                 "add.l   #0x1,%d0                       \n"\r
 283                 "move.l  %d0,0x40000000         "\r
 284         );\r
 285 \r
 286     /* Initialize FLASHBAR (0x00) */\r
 287         asm volatile(\r
 288                 "move.l  #0x00,%d0                      \n"\r
 289                 "andi.l  #0xFFF80000,%d0        \n"\r
 290                 "add.l   #0x41,%d0                      \n"\r
 291                 "movec   %d0,%FLASHBAR          "\r
 292         );\r
 293 \r
 294         portDISABLE_INTERRUPTS();\r
 295 \r
 296         /* RAMBAR. */\r
 297         MCF_SCM_RAMBAR = MCF_SCM_RAMBAR_BA( RAMBAR_ADDRESS ) | MCF_SCM_RAMBAR_BDE;\r
 298 \r
 299         /* Multiply 25MHz crystal by 12 to get 60MHz clock. */\r
 300         MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD(4) | MCF_CLOCK_SYNCR_CLKSRC| MCF_CLOCK_SYNCR_PLLMODE | MCF_CLOCK_SYNCR_PLLEN ;\r
 301         while (!(MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK))\r
 302         {\r
 303         }\r
 304 \r
 305         /* Setup the port used to toggle LEDs. */\r
 306         vParTestInitialise();\r
 307 }\r
 308 /*-----------------------------------------------------------*/\r
 309 \r
 310 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
 311 {\r
 312         /* This will get called if a stack overflow is detected during the context\r
 313         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
 314         problems within nested interrupts, but only do this for debug purposes as\r
 315         it will increase the context switch time. */\r
 316 \r
 317         ( void ) pxTask;\r
 318         ( void ) pcTaskName;\r
 319 \r
 320         for( ;; );\r
 321 }\r
 322 /*-----------------------------------------------------------*/\r
 323 \r
 324 static void vRegTest1Task( void *pvParameters )\r
 325 {\r
 326         /* Sanity check - did we receive the parameter expected? */\r
 327         if( pvParameters != &ulRegTest1Counter )\r
 328         {\r
 329                 /* Change here so the check task can detect that an error occurred. */\r
 330                 for( ;; );\r
 331         }\r
 332 \r
 333         /* Set all the registers to known values, then check that each retains its\r
 334         expected value - as described at the top of this file.  If an error is\r
 335         found then the loop counter will no longer be incremented allowing the check\r
 336         task to recognise the error. */\r
 337         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
 338                                                 "       moveq           #1, %d0                                 \n\t"\r
 339                                                 "       moveq           #2, %d1                                 \n\t"\r
 340                                                 "       moveq           #3, %d2                                 \n\t"\r
 341                                                 "       moveq           #4, %d3                                 \n\t"\r
 342                                                 "       moveq           #5, %d4                                 \n\t"\r
 343                                                 "       moveq           #6, %d5                                 \n\t"\r
 344                                                 "       moveq           #7, %d6                                 \n\t"\r
 345                                                 "       moveq           #8, %d7                                 \n\t"\r
 346                                                 "       move            #9, %a0                                 \n\t"\r
 347                                                 "       move            #10, %a1                                \n\t"\r
 348                                                 "       move            #11, %a2                                \n\t"\r
 349                                                 "       move            #12, %a3                                \n\t"\r
 350                                                 "       move            #13, %a4                                \n\t"\r
 351                                                 "       move            #14, %a5                                \n\t"\r
 352                                                 "       move            #15, %a6                                \n\t"\r
 353                                                 "                                                                               \n\t"\r
 354                                                 "       cmpi.l          #1, %d0                                 \n\t"\r
 355                                                 "       bne                     reg_test_1_error                \n\t"\r
 356                                                 "       cmpi.l          #2, %d1                                 \n\t"\r
 357                                                 "       bne                     reg_test_1_error                \n\t"\r
 358                                                 "       cmpi.l          #3, %d2                                 \n\t"\r
 359                                                 "       bne                     reg_test_1_error                \n\t"\r
 360                                                 "       cmpi.l          #4, %d3                                 \n\t"\r
 361                                                 "       bne                     reg_test_1_error                \n\t"\r
 362                                                 "       cmpi.l          #5, %d4                                 \n\t"\r
 363                                                 "       bne                     reg_test_1_error                \n\t"\r
 364                                                 "       cmpi.l          #6, %d5                                 \n\t"\r
 365                                                 "       bne                     reg_test_1_error                \n\t"\r
 366                                                 "       cmpi.l          #7, %d6                                 \n\t"\r
 367                                                 "       bne                     reg_test_1_error                \n\t"\r
 368                                                 "       cmpi.l          #8, %d7                                 \n\t"\r
 369                                                 "       bne                     reg_test_1_error                \n\t"\r
 370                                                 "       move            %a0, %d0                                \n\t"\r
 371                                                 "       cmpi.l          #9, %d0                                 \n\t"\r
 372                                                 "       bne                     reg_test_1_error                \n\t"\r
 373                                                 "       move            %a1, %d0                                \n\t"\r
 374                                                 "       cmpi.l          #10, %d0                                \n\t"\r
 375                                                 "       bne                     reg_test_1_error                \n\t"\r
 376                                                 "       move            %a2, %d0                                \n\t"\r
 377                                                 "       cmpi.l          #11, %d0                                \n\t"\r
 378                                                 "       bne                     reg_test_1_error                \n\t"\r
 379                                                 "       move            %a3, %d0                                \n\t"\r
 380                                                 "       cmpi.l          #12, %d0                                \n\t"\r
 381                                                 "       bne                     reg_test_1_error                \n\t"\r
 382                                                 "       move            %a4, %d0                                \n\t"\r
 383                                                 "       cmpi.l          #13, %d0                                \n\t"\r
 384                                                 "       bne                     reg_test_1_error                \n\t"\r
 385                                                 "       move            %a5, %d0                                \n\t"\r
 386                                                 "       cmpi.l          #14, %d0                                \n\t"\r
 387                                                 "       bne                     reg_test_1_error                \n\t"\r
 388                                                 "       move            %a6, %d0                                \n\t"\r
 389                                                 "       cmpi.l          #15, %d0                                \n\t"\r
 390                                                 "       bne                     reg_test_1_error                \n\t"\r
 391                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
 392                                                 "       addql           #1, %d0                                 \n\t"\r
 393                                                 "       movel           %d0, ulRegTest1Counter  \n\t"\r
 394                                                 "       bra                     reg_test_1_start                \n\t"\r
 395                                                 "reg_test_1_error:                                              \n\t"\r
 396                                                 "       bra                     reg_test_1_error                \n\t"\r
 397                                         );\r
 398 }\r
 399 /*-----------------------------------------------------------*/\r
 400 \r
 401 static void vRegTest2Task( void *pvParameters )\r
 402 {\r
 403         /* Sanity check - did we receive the parameter expected? */\r
 404         if( pvParameters != &ulRegTest2Counter )\r
 405         {\r
 406                 /* Change here so the check task can detect that an error occurred. */\r
 407                 for( ;; );\r
 408         }\r
 409 \r
 410         /* Set all the registers to known values, then check that each retains its\r
 411         expected value - as described at the top of this file.  If an error is\r
 412         found then the loop counter will no longer be incremented allowing the check\r
 413         task to recognise the error. */\r
 414         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
 415                                                 "       moveq           #10, %d0                                \n\t"\r
 416                                                 "       moveq           #20, %d1                                \n\t"\r
 417                                                 "       moveq           #30, %d2                                \n\t"\r
 418                                                 "       moveq           #40, %d3                                \n\t"\r
 419                                                 "       moveq           #50, %d4                                \n\t"\r
 420                                                 "       moveq           #60, %d5                                \n\t"\r
 421                                                 "       moveq           #70, %d6                                \n\t"\r
 422                                                 "       moveq           #80, %d7                                \n\t"\r
 423                                                 "       move            #90, %a0                                \n\t"\r
 424                                                 "       move            #100, %a1                               \n\t"\r
 425                                                 "       move            #110, %a2                               \n\t"\r
 426                                                 "       move            #120, %a3                               \n\t"\r
 427                                                 "       move            #130, %a4                               \n\t"\r
 428                                                 "       move            #140, %a5                               \n\t"\r
 429                                                 "       move            #150, %a6                               \n\t"\r
 430                                                 "                                                                               \n\t"\r
 431                                                 "       cmpi.l          #10, %d0                                \n\t"\r
 432                                                 "       bne                     reg_test_2_error                \n\t"\r
 433                                                 "       cmpi.l          #20, %d1                                \n\t"\r
 434                                                 "       bne                     reg_test_2_error                \n\t"\r
 435                                                 "       cmpi.l          #30, %d2                                \n\t"\r
 436                                                 "       bne                     reg_test_2_error                \n\t"\r
 437                                                 "       cmpi.l          #40, %d3                                \n\t"\r
 438                                                 "       bne                     reg_test_2_error                \n\t"\r
 439                                                 "       cmpi.l          #50, %d4                                \n\t"\r
 440                                                 "       bne                     reg_test_2_error                \n\t"\r
 441                                                 "       cmpi.l          #60, %d5                                \n\t"\r
 442                                                 "       bne                     reg_test_2_error                \n\t"\r
 443                                                 "       cmpi.l          #70, %d6                                \n\t"\r
 444                                                 "       bne                     reg_test_2_error                \n\t"\r
 445                                                 "       cmpi.l          #80, %d7                                \n\t"\r
 446                                                 "       bne                     reg_test_2_error                \n\t"\r
 447                                                 "       move            %a0, %d0                                \n\t"\r
 448                                                 "       cmpi.l          #90, %d0                                \n\t"\r
 449                                                 "       bne                     reg_test_2_error                \n\t"\r
 450                                                 "       move            %a1, %d0                                \n\t"\r
 451                                                 "       cmpi.l          #100, %d0                               \n\t"\r
 452                                                 "       bne                     reg_test_2_error                \n\t"\r
 453                                                 "       move            %a2, %d0                                \n\t"\r
 454                                                 "       cmpi.l          #110, %d0                               \n\t"\r
 455                                                 "       bne                     reg_test_2_error                \n\t"\r
 456                                                 "       move            %a3, %d0                                \n\t"\r
 457                                                 "       cmpi.l          #120, %d0                               \n\t"\r
 458                                                 "       bne                     reg_test_2_error                \n\t"\r
 459                                                 "       move            %a4, %d0                                \n\t"\r
 460                                                 "       cmpi.l          #130, %d0                               \n\t"\r
 461                                                 "       bne                     reg_test_2_error                \n\t"\r
 462                                                 "       move            %a5, %d0                                \n\t"\r
 463                                                 "       cmpi.l          #140, %d0                               \n\t"\r
 464                                                 "       bne                     reg_test_2_error                \n\t"\r
 465                                                 "       move            %a6, %d0                                \n\t"\r
 466                                                 "       cmpi.l          #150, %d0                               \n\t"\r
 467                                                 "       bne                     reg_test_2_error                \n\t"\r
 468                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
 469                                                 "       addql           #1, %d0                                 \n\t"\r
 470                                                 "       movel           %d0, ulRegTest2Counter  \n\t"\r
 471                                                 "       bra                     reg_test_2_start                \n\t"\r
 472                                                 "reg_test_2_error:                                              \n\t"\r
 473                                                 "       bra                     reg_test_2_error                \n\t"\r
 474                                         );\r
 475 }\r
 476 /*-----------------------------------------------------------*/\r
 477 \r