1 /* Coldfire C Header File
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2 * Copyright Freescale Semiconductor Inc
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3 * All rights reserved.
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5 * 2008/04/17 Revision: 0.2
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7 * (c) Copyright UNIS, spol. s r.o. 1997-2008
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12 * http : www.processorexpert.com
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13 * mail : info@processorexpert.com
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16 #ifndef __MCF52259_PIT_H__
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17 #define __MCF52259_PIT_H__
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20 /*********************************************************************
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22 * Programmable Interrupt Timer (PIT)
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24 *********************************************************************/
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26 /* Register read/write macros */
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27 #define MCF_PIT0_PCSR (*(vuint16*)(0x40150000))
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28 #define MCF_PIT0_PMR (*(vuint16*)(0x40150002))
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29 #define MCF_PIT0_PCNTR (*(vuint16*)(0x40150004))
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31 #define MCF_PIT1_PCSR (*(vuint16*)(0x40160000))
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32 #define MCF_PIT1_PMR (*(vuint16*)(0x40160002))
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33 #define MCF_PIT1_PCNTR (*(vuint16*)(0x40160004))
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35 #define MCF_PIT_PCSR(x) (*(vuint16*)(0x40150000 + ((x)*0x10000)))
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36 #define MCF_PIT_PMR(x) (*(vuint16*)(0x40150002 + ((x)*0x10000)))
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37 #define MCF_PIT_PCNTR(x) (*(vuint16*)(0x40150004 + ((x)*0x10000)))
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40 /* Bit definitions and macros for MCF_PIT_PCSR */
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41 #define MCF_PIT_PCSR_EN (0x1)
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42 #define MCF_PIT_PCSR_RLD (0x2)
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43 #define MCF_PIT_PCSR_PIF (0x4)
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44 #define MCF_PIT_PCSR_PIE (0x8)
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45 #define MCF_PIT_PCSR_OVW (0x10)
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46 #define MCF_PIT_PCSR_DBG (0x20)
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47 #define MCF_PIT_PCSR_DOZE (0x40)
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48 #define MCF_PIT_PCSR_PRE(x) (((x)&0xF)<<0x8)
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50 /* Bit definitions and macros for MCF_PIT_PMR */
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51 #define MCF_PIT_PMR_PM(x) (((x)&0xFFFF)<<0)
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53 /* Bit definitions and macros for MCF_PIT_PCNTR */
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54 #define MCF_PIT_PCNTR_PC(x) (((x)&0xFFFF)<<0)
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57 #endif /* __MCF52259_PIT_H__ */
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